platform/upstream/llvm.git
2 years ago[GlobalISel] Combine mulo x, 2 -> addo x, x
Jessica Paquette [Tue, 28 Sep 2021 22:04:23 +0000 (15:04 -0700)]
[GlobalISel] Combine mulo x, 2 -> addo x, x

Similar to what SDAG does when it sees a smulo/umulo against 2
(see: `DAGCombiner::visitMULO`)

This pattern is fairly common in Swift code AFAICT.

Here's an example extracted from a Swift testcase:

https://godbolt.org/z/6cT8Mesx7

Differential Revision: https://reviews.llvm.org/D110662

2 years ago[libc] Add support for 128 bit ints in limits.h
Michael Jones [Tue, 28 Sep 2021 18:25:43 +0000 (18:25 +0000)]
[libc] Add support for 128 bit ints in limits.h

Also, this adds unit tests to check that limits.h complies with the C
standard.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D110643

2 years ago[clang] Let PPCallbacks::PragmaWarning() pass specifier as enum instead of string
Nico Weber [Tue, 28 Sep 2021 15:55:11 +0000 (11:55 -0400)]
[clang] Let PPCallbacks::PragmaWarning() pass specifier as enum instead of string

Differential Revision: https://reviews.llvm.org/D110635

2 years agofixes bug #51926 where dangling comma caused overrun
Fred Grim [Sat, 25 Sep 2021 16:07:12 +0000 (09:07 -0700)]
fixes bug #51926 where dangling comma caused overrun

bug 51926 identified an issue where a dangling comma caused the cell count to be to off by one

Differential Revision: https://reviews.llvm.org/D110481

2 years ago[NFC][sanitizer] Return StackDepotStats by value
Vitaly Buka [Tue, 28 Sep 2021 18:20:18 +0000 (11:20 -0700)]
[NFC][sanitizer] Return StackDepotStats by value

Differential Revision: https://reviews.llvm.org/D110644

2 years ago[mlir][Python] Fix lifetime of ExecutionEngine runtime functions.
Sean Silva [Tue, 28 Sep 2021 21:58:51 +0000 (21:58 +0000)]
[mlir][Python] Fix lifetime of ExecutionEngine runtime functions.

We weren't retaining the ctypes closures that the ExecutionEngine was
calling back into, leading to mysterious errors.

Open to feedback about how to test this. And an extra pair of eyes to
make sure I caught all the places that need to be aware of this.

Differential Revision: https://reviews.llvm.org/D110661

2 years agoReland [clang] Rework dontcall attributes
Arthur Eubanks [Thu, 23 Sep 2021 20:54:24 +0000 (13:54 -0700)]
Reland [clang] Rework dontcall attributes

To avoid using the AST when emitting diagnostics, split the "dontcall"
attribute into "dontcall-warn" and "dontcall-error", and also add the
frontend attribute value as the LLVM attribute value. This gives us all
the information to report diagnostics we need from within the IR (aside
from access to the original source).

One downside is we directly use LLVM's demangler rather than using the
existing Clang diagnostic pretty printing of symbols.

Previous revisions didn't properly declare the new dependencies.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D110364

2 years ago[mlir][tosa] Add i32 to supported quantized type
Rob Suderman [Tue, 28 Sep 2021 21:53:07 +0000 (14:53 -0700)]
[mlir][tosa] Add i32 to supported quantized type

Quantized int type should include I32 types as its the output of a quantizd
convolution or matmul operation.

Reviewed By: NatashaKnk

Differential Revision: https://reviews.llvm.org/D110651

2 years ago[CodeGen] Fix wrapping personality symbol on ARM
Shoaib Meenai [Tue, 28 Sep 2021 03:10:23 +0000 (20:10 -0700)]
[CodeGen] Fix wrapping personality symbol on ARM

The ARM backend was explicitly setting global binding on the personality
symbol. This was added without any comment in a7ec2dcefd954, which
introduced EHABI support (back in 2011). None of the other backends do
anything equivalent, as far as I can tell.

This causes problems when attempting to wrap the personality symbol.
Wrapped symbols are marked as weak inside LTO to inhibit IPO (see
https://reviews.llvm.org/D33621). When we wrap the personality symbol,
it initially gets weak binding, and then the ARM backend attempts to
change the binding to global, which causes an error in MC because of
attempting to change the binding of a symbol from non-global to global
(the error was added in https://reviews.llvm.org/D90108).

Simply drop the ARM backend's explicit global binding setting to fix
this. This matches all the other backends, and a large internal
application successfully linked and ran with this change, so it
shouldn't cause any problems. Test via LLD, since wrapping is required
to exhibit the issue.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D110609

2 years agoFlang OpenMP Report Plugin
Stuart Ellis [Tue, 28 Sep 2021 21:17:27 +0000 (22:17 +0100)]
Flang OpenMP Report Plugin

This plugin parses Fortran files and creates a
YAML report with all the OpenMP constructs and
clauses seen in the file.

The following tests have been modified to be
compatible for testing the plugin, hence why
they are not reused from another directory:

- omp-atomic.f90
- omp-declarative-directive.f90
- omp-device-constructs.f90

The plugin outputs a single file in the same
directory as the source file in the following format:
`<source-file-name>.yaml`

Building the plugin:
`ninja flangOmpReport`

Running the plugin:
`./bin/flang-new -fc1 -load lib/flangOmpReport.so -plugin flang-omp-report -fopenmp <source_file.f90>`

Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>
Co-authored-by: Stuart Ellis <stuart.ellis@arm.com>
Reviewed By: awarzynski, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D109890

2 years agoRemove unnecessary async group creates and awaits.
bakhtiyar [Tue, 28 Sep 2021 21:35:15 +0000 (14:35 -0700)]
Remove unnecessary async group creates and awaits.

Reviewed By: ezhulenev

Differential Revision: https://reviews.llvm.org/D110605

2 years agoRename target block size to min task size for clarity.
bakhtiyar [Tue, 28 Sep 2021 21:34:53 +0000 (14:34 -0700)]
Rename target block size to min task size for clarity.

Reviewed By: ezhulenev

Differential Revision: https://reviews.llvm.org/D110604

2 years agoRevert "[clang] Rework dontcall attributes"
Arthur Eubanks [Tue, 28 Sep 2021 21:49:27 +0000 (14:49 -0700)]
Revert "[clang] Rework dontcall attributes"

This reverts commit 2943071e2ee0c7f31f34062a44d12aeb0e3a66fd.

Breaks bots

2 years agoRevert "[test] Pin some RUN lines in optimization-remark.c to new PM"
Arthur Eubanks [Tue, 28 Sep 2021 21:42:23 +0000 (14:42 -0700)]
Revert "[test] Pin some RUN lines in optimization-remark.c to new PM"

This reverts commit 952f030fe6ade193ead8f23a7654cf8d2c7aa3df.

Causes bot failures.

2 years ago[mlir] Unroll-and-jam loops with iter_args.
Amy Zhuang [Tue, 28 Sep 2021 20:54:15 +0000 (13:54 -0700)]
[mlir] Unroll-and-jam loops with iter_args.

Unroll-and-jam currently doesn't work when the loop being unroll-and-jammed
or any of its inner loops has iter_args. This patch modifies the
unroll-and-jam utility to support loops with iter_args.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D110085

2 years ago[libc++] Simplify std::ranges::subrange
Louis Dionne [Thu, 23 Sep 2021 22:09:17 +0000 (18:09 -0400)]
[libc++] Simplify std::ranges::subrange

Instead of using a base class to store the members and the optional
size, use [[no_unique_address]] to achieve the same thing without
needing a base class.

Also, as a fly-by:
- Change subrange from struct to class (per the standard)
- Improve the diagnostic for when one doesn't provide a size to the ctor of a sized subrange
- Replace this->member by just member since it's not in a dependent base anymore

This change would be an ABI break due to [[no_unique_address]], but we
haven't shipped ranges anywhere yet, so this shouldn't affect anyone.

Differential Revision: https://reviews.llvm.org/D110370

2 years ago[test] Pin some RUN lines in optimization-remark.c to new PM
Arthur Eubanks [Tue, 28 Sep 2021 21:29:33 +0000 (14:29 -0700)]
[test] Pin some RUN lines in optimization-remark.c to new PM

Some people downstream are reporting that this test fails. I've been
unable to reproduce, but there is indeed something spooky going on.
Pinning to the new PM suppresses the failure. I'm continuing to
investigate this.

2 years ago[clang] Rework dontcall attributes
Arthur Eubanks [Thu, 23 Sep 2021 20:54:24 +0000 (13:54 -0700)]
[clang] Rework dontcall attributes

To avoid using the AST when emitting diagnostics, split the "dontcall"
attribute into "dontcall-warn" and "dontcall-error", and also add the
frontend attribute value as the LLVM attribute value. This gives us all
the information to report diagnostics we need from within the IR (aside
from access to the original source).

One downside is we directly use LLVM's demangler rather than using the
existing Clang diagnostic pretty printing of symbols.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D110364

2 years ago[libc] Add implementations of the C standard condition variable functions.
Siva Chandra Reddy [Wed, 25 Aug 2021 19:52:09 +0000 (19:52 +0000)]
[libc] Add implementations of the C standard condition variable functions.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D108948

2 years ago[InstCombine] reduce redundant code for shl-binop folds
Sanjay Patel [Tue, 28 Sep 2021 20:59:18 +0000 (16:59 -0400)]
[InstCombine] reduce redundant code for shl-binop folds

This is NFCI (no-functional-change-intended), but there
are benign diffs possible with commutable ops as seen in
the test diffs.

The transforms were repeated for the commutative opcodes,
but that should not be necessary if we canonicalize the
patterns that we're matching. If both operands of the
binop match, that should get folded eventually.

The transform that starts with a mask op seems to
over-constrain the use checks, so that could be a
potential enhancement.

2 years ago[InstCombine] add multi-use tests for shl folds; NFC
Sanjay Patel [Tue, 28 Sep 2021 20:51:19 +0000 (16:51 -0400)]
[InstCombine] add multi-use tests for shl folds; NFC

2 years ago[LTO] Avoid repeated Triple construction. NFC
Fangrui Song [Tue, 28 Sep 2021 20:39:41 +0000 (13:39 -0700)]
[LTO] Avoid repeated Triple construction. NFC

2 years ago[mlir] Fix bug in FoldSubview with rank reducing subview
thomasraoux [Tue, 28 Sep 2021 16:26:41 +0000 (09:26 -0700)]
[mlir] Fix bug in FoldSubview with rank reducing subview

Fix how we calculate the new permutation map of the transfer ops.

Differential Revision: https://reviews.llvm.org/D110638

2 years ago[llvm-jitlink] Add -slab-page-size to tests that need it.
Lang Hames [Tue, 28 Sep 2021 20:13:57 +0000 (13:13 -0700)]
[llvm-jitlink] Add -slab-page-size to tests that need it.

Also fixes 80-column rule violations.

2 years ago[libc++] Clarify the name of Lit features related to standard library selection
Louis Dionne [Tue, 28 Sep 2021 20:02:43 +0000 (16:02 -0400)]
[libc++] Clarify the name of Lit features related to standard library selection

Before this patch, we had features named 'libc++', 'libstdc++' and
'msvc' to describe the three implementations that use our test suite.
This patch renames them to 'stdlib=libc++', 'stdlib=libstdc++', etc
to avoid confusion between MSVC's STL and the MSVC compiler (or Clang
in MSVC mode).

Furthermore, this prepares the terrain for adding support for additional
"implementations" to the test suite. Basically, I'd like to be able to
treat Apple's libc++ differently from LLVM's libc++ for the purpose of
testing, because those effectively behave in different ways in some aspects.

2 years agoFix memcpy-nobuiltin.c test case
serge-sans-paille [Tue, 28 Sep 2021 19:54:27 +0000 (21:54 +0200)]
Fix memcpy-nobuiltin.c test case

Make it more generic by accepting weak_odr and dso_local specifiers.

Differential Revision: https://reviews.llvm.org/D109967

2 years agoRevert "Improve the effectiveness of BDCE's debug info salvaging"
Nikita Popov [Tue, 28 Sep 2021 19:49:36 +0000 (21:49 +0200)]
Revert "Improve the effectiveness of BDCE's debug info salvaging"

This reverts commit f6954bf80472cbfc06e39dac75a4a72120c9bd15.

This breaks the test-suite O3 build:

/home/nikic/llvm-test-suite/build-O3/tools/timeit --summary Bitcode/Benchmarks/Halide/local_laplacian/CMakeFiles/halide_local_laplacian.dir/local_laplacian.bc.o.time /home/nikic/llvm-project/build/bin/clang++  -DNDEBUG  -O3   -w -Werror=date-time -save-stats=obj -save-stats=obj -std=c++11 -MD -MT Bitcode/Benchmarks/Halide/local_laplacian/CMakeFiles/halide_local_laplacian.dir/local_laplacian.bc.o -MF Bitcode/Benchmarks/Halide/local_laplacian/CMakeFiles/halide_local_laplacian.dir/local_laplacian.bc.o.d -o Bitcode/Benchmarks/Halide/local_laplacian/CMakeFiles/halide_local_laplacian.dir/local_laplacian.bc.o -c ../Bitcode/Benchmarks/Halide/local_laplacian/local_laplacian.bc
While deleting: i64 %
Use still stuck around after Def is destroyed:  %12620 = mul i64 %12619, <badref>
clang++: /home/nikic/llvm-project/llvm/lib/IR/Value.cpp:103: llvm::Value::~Value(): Assertion `materialized_use_empty() && "Uses remain when a value is destroyed!"' failed.

2 years agoAdd profile count. Regenerate check lines. NFC
Anna Thomas [Tue, 28 Sep 2021 19:32:49 +0000 (15:32 -0400)]
Add profile count. Regenerate check lines. NFC

Function profile counts added to test cases. Regenerated test lines for
loop predication test.

2 years ago[llvm-profgen] Strip context to support non-CS profile generation for hybrid sample
wlei [Fri, 24 Sep 2021 18:32:32 +0000 (11:32 -0700)]
[llvm-profgen] Strip context to support non-CS profile generation for hybrid sample

Differential Revision: https://reviews.llvm.org/D109769

2 years agoSimplify handling of builtin with inline redefinition
serge-sans-paille [Thu, 16 Sep 2021 16:13:15 +0000 (18:13 +0200)]
Simplify handling of builtin with inline redefinition

(This is a recommit of 3d6f49a56995b845 that should no longer break validation since
bd379915de38a9af3d65e1).

It is a common practice in glibc header to provide an inline redefinition of an
existing function. It is especially the case for fortified function.

Clang currently has an imperfect approach to the problem, using a combination of
trivially recursive function detection and noinline attribute.

Simplify the logic by suffixing these functions by `.inline` during codegen, so
that they are not recognized as builtin by llvm.

After that patch, clang passes all tests from https://github.com/serge-sans-paille/fortify-test-suite

Differential Revision: https://reviews.llvm.org/D109967

2 years ago[llvm][profile] Add padding after binary IDs
Leonard Chan [Tue, 28 Sep 2021 18:49:37 +0000 (11:49 -0700)]
[llvm][profile] Add padding after binary IDs

Some tests with binary IDs would fail with error: no profile can be merged.
This is because raw profiles could have unaligned headers when emitting binary
IDs. This means padding should be emitted after binary IDs are emitted to
ensure everything else is aligned. This patch adds padding after each binary ID
to ensure the next binary ID size is 8-byte aligned. This also adds extra
checks to ensure we aren't reading corrupted data when printing binary IDs.

Differential Revision: https://reviews.llvm.org/D110365

2 years agoRevert "Add support for `NOLINTBEGIN` ... `NOLINTEND` comments"
Aaron Ballman [Tue, 28 Sep 2021 18:47:26 +0000 (14:47 -0400)]
Revert "Add support for `NOLINTBEGIN` ... `NOLINTEND` comments"

This reverts commit c0687e1984a82925918c874b7bb68ad34c32aed0.

There are testing failures being caught by bots.
See http://45.33.8.238/linux/56886/step_8.txt as an example.

2 years ago[InstCombine] add/move tests for shl with binop; NFC
Sanjay Patel [Tue, 28 Sep 2021 18:28:53 +0000 (14:28 -0400)]
[InstCombine] add/move tests for shl with binop; NFC

2 years ago[docs ]Fix indentation
Akira Hatanaka [Mon, 13 Sep 2021 16:15:16 +0000 (09:15 -0700)]
[docs ]Fix indentation

2 years agoRevert "Simplify handling of builtin with inline redefinition"
Kevin Athey [Tue, 28 Sep 2021 18:08:32 +0000 (11:08 -0700)]
Revert "Simplify handling of builtin with inline redefinition"

This reverts commit 3d6f49a56995b845c40be5827ded5d1e3f692cec.

Broke bot: https://lab.llvm.org/buildbot/#/builders/5/builds/12360

2 years ago[CUDA] Move CUDA SDK include path further down the include search path.
Artem Belevich [Mon, 27 Sep 2021 22:16:05 +0000 (15:16 -0700)]
[CUDA] Move CUDA SDK include path further down the include search path.

This allows clang to work on Linux distributions like Debian where
<CUDA-PATH>/include may be a symlink to /usr/include. We only need
`cuda_wrappers` to be present before the standard C++ library headers.
The CUDA SDK headers themselves do not need to be found that early.

This addresses https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=995122
mentioned in post-commit comments on D108247

Differential Revision: https://reviews.llvm.org/D110596

2 years ago[NFC][sanitizer] Clang-format some code
Vitaly Buka [Tue, 28 Sep 2021 17:04:41 +0000 (10:04 -0700)]
[NFC][sanitizer] Clang-format some code

2 years ago[libc] Add FE_DFL_ENV and handle it in fesetenv.
Siva Chandra Reddy [Tue, 28 Sep 2021 06:53:09 +0000 (06:53 +0000)]
[libc] Add FE_DFL_ENV and handle it in fesetenv.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D110611

2 years ago[Polly] Check the properties of accesses to operands of a matrix-matrix
Roman Gareev [Sat, 25 Sep 2021 14:19:33 +0000 (19:19 +0500)]
[Polly] Check the properties of accesses to operands of a matrix-matrix
multiplication

The following code modifies elements of the array D.

    for (i = 0; i < _PB_NI; i++)
      for (j = 0; j < _PB_NJ; j++)
      {
        for (k = 0; k < _PB_NK; k++)
        {
          double Mul = A[i][k] * B[k][j];
          D[i][j][k] += Mul;
          C[i][j] += Mul;
        }
      }

Nevertheless, the code is recognised as a matrix-matrix multiplication, since
the second and third dimensions of D are accessed with non-zero strides.

This fixes the typo, which was made during the translation to C++ bindings
(https://reviews.llvm.org/D35845).

Reviewed By: Michael Kruse <llvm@meinersbur.de>

Differential Revision: https://reviews.llvm.org/D110491

2 years ago[MSP430][Clang] Remove support for -mmcu=msp430
Jozef Lawrynowicz [Tue, 28 Sep 2021 17:47:14 +0000 (20:47 +0300)]
[MSP430][Clang] Remove support for -mmcu=msp430

The -mmcu= option accepts a generic MCU named "msp430", which sets the
CPU to msp430 and disables hardware multiply support.

The current purpose of accepting this value is to allow -mmcu= to be
used as an alias for -mcpu=, however there are some downsides to doing
this. -mmcu= provides additional features that will interfere
with the expected behavior if the user tries to to use it as an alias
for -mcpu=.

-mmcu=msp430 will conflict with -mhwmult=, since the "msp430" MCU is
defined to have no hardware multiply support, so the user will not be
able to set an explicit hardware multiply version.

-mmcu=msp430 will put "-Tmsp430.ld" on the linker command line, however
TI's support files do not provide a linker script with this name and so
the user would have to explicitly create it.

Differential Revision: https://reviews.llvm.org/D108299

2 years agoDebugInfo: Use sugared function type when emitting function declarations for call...
David Blaikie [Tue, 28 Sep 2021 02:33:37 +0000 (19:33 -0700)]
DebugInfo: Use sugared function type when emitting function declarations for call sites

Otherwise we're losing type information for these functions.

2 years ago[llvm-jitlink] Add a -slab-page-size option to override process page size.
Lang Hames [Tue, 28 Sep 2021 17:25:11 +0000 (10:25 -0700)]
[llvm-jitlink] Add a -slab-page-size option to override process page size.

The slab allocator is frequently used in -noexec tests where we want a
consistent memory layout. In this context we also want to set the effective
page size, rather than using the page size of the host process, since not all
systems use the same page size. The -slab-page-size option allows us to set
the page size for such tests.

The -slab-page-size option will also be honored in exec mode when using the
slab allocator, but will trigger an error if the requested size is not a
multiple of the actual process page size.

This option was motivated by test failures on a ppc64 bot that was returning
zero from sys::Process::getPageSize(), so it also contains a check for errors
and zero results from that function if the -slab-page-size option is absent.

Existing slab allocator tests will be updated to use this option in a follow-up
commit so that we can point the failing bot at this commit and observe errors
associated with sys::Process::getPageSize().

2 years ago[MCJIT] Mark test-global-ctors as UNSUPPORTED on Darwin, rather than XFAIL.
Lang Hames [Sun, 26 Sep 2021 22:10:33 +0000 (15:10 -0700)]
[MCJIT] Mark test-global-ctors as UNSUPPORTED on Darwin, rather than XFAIL.

MachO doesn't have a '.text.startup' -- this is just plain unsupported.

2 years ago[libc][NFC] Make strchr and strrchr more consistent
Michael Jones [Mon, 27 Sep 2021 20:23:53 +0000 (20:23 +0000)]
[libc][NFC] Make strchr and strrchr more consistent

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D110581

2 years agoImprove the effectiveness of BDCE's debug info salvaging
Adrian Prantl [Mon, 27 Sep 2021 17:51:04 +0000 (10:51 -0700)]
Improve the effectiveness of BDCE's debug info salvaging

This patch improves the effectiveness of BDCE's debug info salvaging
by processing the instructions in reverse order and delaying
dropAllReferences until after debug info salvaging. This allows
salvaging of entire chains of deleted instructions!

Previously we would remove all references from an instruction, which
would make it impossible to use that instruction to salvage a later
instruction in the instruction stream, because its operands were
already removed.

Differential Revision: https://reviews.llvm.org/D110568

2 years agoImprove the effectiveness of ADCE's debug info salvaging
Adrian Prantl [Sat, 25 Sep 2021 00:16:59 +0000 (17:16 -0700)]
Improve the effectiveness of ADCE's debug info salvaging

This patch improves the effectiveness of ADCE's debug info salvaging
by processing the instructions in reverse order and delaying
dropAllReferences until after debug info salvaging. This allows
salvaging of entire chains of deleted instructions!

Previously we would remove all references from an instruction, which
would make it impossible to use that instruction to salvage a later
instruction in the instruction stream, because its operands were
already removed.

Differential Revision: https://reviews.llvm.org/D110462

2 years agoAdd salvageDebugInfo support for truncating/extending ptr/int conversions.
Adrian Prantl [Fri, 24 Sep 2021 23:35:04 +0000 (16:35 -0700)]
Add salvageDebugInfo support for truncating/extending ptr/int conversions.

This patch enables debug info salvaging for truncating/extending ptr
int conversions. The testcase uncovered a bug in adce, which is
addressed separately.

rdar://80227769

Differential Revision: https://reviews.llvm.org/D110461

2 years ago[TargetLibraryInfo] Pick new/delete calls by target
Paul Robinson [Fri, 24 Sep 2021 13:10:02 +0000 (06:10 -0700)]
[TargetLibraryInfo] Pick new/delete calls by target

There are two sets of new/delete functions, one with Windows/MSVC
mangling and one with Itanium mangling. Mark one set or the other
as unavailable depending on the target.

Split the test malloc-free-delete.ll into three parts: malloc-free.dll
for the C API tests, new-delete-itanium.ll and new-delete-msvc.ll for
the target-specific new/delete tests.

Differential Revision: https://reviews.llvm.org/D110419

2 years ago[CostModel][X86] Add SSE2/AVX1/AVX512BW test coverage for i16 interleaved load/store
Simon Pilgrim [Tue, 28 Sep 2021 16:59:30 +0000 (17:59 +0100)]
[CostModel][X86] Add SSE2/AVX1/AVX512BW test coverage for i16 interleaved load/store

2 years agoDiagnose -Wunused-value based on CFG reachability
Yuanfang Chen [Thu, 24 Jun 2021 06:46:42 +0000 (23:46 -0700)]
Diagnose -Wunused-value based on CFG reachability

(This relands 59337263ab45d7657e and makes sure comma operator
 diagnostics are suppressed in a SFINAE context.)

While at it, add the diagnosis message "left operand of comma operator has no effect" (used by GCC) for comma operator.

This also makes Clang diagnose in the constant evaluation context which aligns with GCC/MSVC behavior. (https://godbolt.org/z/7zxb8Tx96)

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D103938

2 years ago[llvm-objdump] Fix -R display and support ET_EXEC
Fangrui Song [Tue, 28 Sep 2021 16:58:27 +0000 (09:58 -0700)]
[llvm-objdump] Fix -R display and support ET_EXEC

* Add a newline before `DYNAMIC RELOCATION RECORDS` (see D101796)
* Add the missing `OFFSET TYPE VALUE` line
* Align columns

Note: llvm-readobj/ELFDumper.cpp `loadDynamicTable` has sophisticated PT_DYNAMIC
code which is unavailable in llvm-objdump.

Reviewed By: jhenderson, Higuoxing

Differential Revision: https://reviews.llvm.org/D110595

2 years ago[InstCombine] Fold ptrtoint(gep i8 null, x) -> x
Alex Richardson [Tue, 28 Sep 2021 15:06:35 +0000 (16:06 +0100)]
[InstCombine] Fold ptrtoint(gep i8 null, x) -> x

This commit is the InstCombine follow-up to the previous constant-folding
change that enables noticeable optimizations for CHERI-enabled targets.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D110247

2 years ago[ConstantFolding] Fold ptrtoint(gep i8 null, x) -> x
Alex Richardson [Tue, 28 Sep 2021 14:32:18 +0000 (15:32 +0100)]
[ConstantFolding] Fold ptrtoint(gep i8 null, x) -> x

I was looking at some missed optimizations in CHERI-enabled targets and
noticed that we weren't removing vtable indirection for calls via known
pointers-to-members. The underlying reason for this is that we represent
pointers-to-function-members as {i8 addrspace(200)*, i64} and generate the
constant offsets using (gep i8 null, <index>). We use a constant GEP here
since inttoptr should be avoided for CHERI capabilities. The pointer-to-member
call uses ptrtoint to extract the index, and due to this missing fold we can't
infer the actual value loaded from the vtable.
This is the initial constant folding change for this pattern, I will add
an InstCombine fold as a follow-up.

We could fold all inbounds GEP to null (and therefore the ptrtoint to
zero) since zero is the only valid offset for an inbounds GEP. If the
offset is not zero, that GEP is poison and therefore returning 0 is valid
(https://alive2.llvm.org/ce/z/Gzb5iH). However, Clang currently generates
inbounds GEPs on NULL for hand-written offsetof() expressions, so this
could lead to miscompilations.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D110245

2 years ago[InstCombine][ConstantFold] Baseline tests for ptrtoint(gep null, x)
Alex Richardson [Tue, 28 Sep 2021 14:27:58 +0000 (15:27 +0100)]
[InstCombine][ConstantFold] Baseline tests for ptrtoint(gep null, x)

Differential Revision: https://reviews.llvm.org/D110244

2 years ago[NFC][clang] Add a CHECK lines to tests checking offsetof-like expressions
Alex Richardson [Wed, 22 Sep 2021 09:09:17 +0000 (10:09 +0100)]
[NFC][clang] Add a CHECK lines to tests checking offsetof-like expressions

I am looking at constant-folding changes that could affect these tests, so
check that it emits the expected global value instead of just checking
that it doesn't crash.

2 years ago[NFC] Add a comment to member-function-pointer-calls.cpp
Alex Richardson [Wed, 22 Sep 2021 09:48:22 +0000 (10:48 +0100)]
[NFC] Add a comment to member-function-pointer-calls.cpp

Looking at this test I did not see why MinGW was using a different command
line until I looked at the git history. Add a comment explaining what this
RUN line is actually testing. Also add two more RUN lines to show that
indirectly passed member pointers don't inhibit the optimization.

2 years agoDrop REQUIRES: arm-registered-target from an IR-only test
Alex Richardson [Wed, 22 Sep 2021 10:29:35 +0000 (11:29 +0100)]
Drop REQUIRES: arm-registered-target from an IR-only test

This works just fine even if the Arm backend is not built.

2 years ago[UpdateTestChecks][NFC] Drop a python2 workaround
Alex Richardson [Fri, 24 Sep 2021 13:15:22 +0000 (14:15 +0100)]
[UpdateTestChecks][NFC] Drop a python2 workaround

2 years agoFix incorrect GEP bitwidth in areNonOverlapSameBaseLoadAndStore()
Alex Richardson [Tue, 28 Sep 2021 14:10:39 +0000 (15:10 +0100)]
Fix incorrect GEP bitwidth in areNonOverlapSameBaseLoadAndStore()

When using a datalayout that has pointer index width != pointer size this
code triggers an assertion in Value::stripAndAccumulateConstantOffsets().
I encountered this this while compiling FreeBSD for CHERI-RISC-V.
Also update LoadsTest.cpp to use a DataLayout with index width != pointer
width to ensure this case is tested.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D110406

2 years ago[update_llc_test_checks.py] Fix MIPS ASM regex for functions with EH
Alex Richardson [Tue, 28 Sep 2021 14:10:07 +0000 (15:10 +0100)]
[update_llc_test_checks.py] Fix MIPS ASM regex for functions with EH

On MIPS, functions with exception handling code emits an additional
temporary label at the start of the function (due to UseAssignmentForEHBegin):

    _Z8do_catchv:                           # @_Z8do_catchv
    .Ltmp3:
    .set .Lfunc_begin0, .Ltmp3
    .cfi_startproc
    .cfi_personality 128, DW.ref.__gxx_personality_v0
    .cfi_lsda 0, .Lexception0
    .frame $c11,48,$c17
    .mask  0x00000000,0
    .fmask 0x00000000,0
    .set noreorder
    .set nomacro
    .set noat
    # %bb.0:                                # %entry

The `[^:]*` regex was terminating the search after .Ltmp<N>: and therefore
not detecting functions with exception handling.

Reviewed By: atanasyan, MaskRay

Differential Revision: https://reviews.llvm.org/D100027

2 years ago[update_llc_test_checks] Baseline test for D100027
Alex Richardson [Tue, 28 Sep 2021 14:09:51 +0000 (15:09 +0100)]
[update_llc_test_checks] Baseline test for D100027

Show that we fail to generate CHECK lines for MIPS64 functions with EH.

Differential Revision: https://reviews.llvm.org/D110408

2 years ago[libc++] [compare] Rip out more vestiges of *_equality. NFCI.
Arthur O'Dwyer [Mon, 27 Sep 2021 05:10:52 +0000 (01:10 -0400)]
[libc++] [compare] Rip out more vestiges of *_equality. NFCI.

There's really no reason to even have two different enums here,
but *definitely* we shouldn't have *three*, and they don't need
so many synonymous enumerator values.

Differential Revision: https://reviews.llvm.org/D110516

2 years ago[X86][Costmodel] Load/store i16 Stride=6 VF=16 interleaving costs
Roman Lebedev [Tue, 28 Sep 2021 16:15:08 +0000 (19:15 +0300)]
[X86][Costmodel] Load/store i16 Stride=6 VF=16 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For this tuple, measuring becomes problematic since there's a lot of spilling going on,
but apparently all these memory ops do not affect worst-case estimate at all here.

For load we have:
https://godbolt.org/z/5qGb9odP6 - for intels `Block RThroughput: <=106.0`; for ryzens, `Block RThroughput: <=34.8`
So pick cost of `106`.

For store we have:
https://godbolt.org/z/KrWcv4Ph7 - for intels `Block RThroughput: =58.0`; for ryzens, `Block RThroughput: <=20.5`
So pick cost of `58`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110593

2 years ago[X86][Costmodel] Load/store i16 Stride=6 VF=8 interleaving costs
Roman Lebedev [Tue, 28 Sep 2021 16:15:07 +0000 (19:15 +0300)]
[X86][Costmodel] Load/store i16 Stride=6 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/3Tc5s897j - for intels `Block RThroughput: =39.0`; for ryzens, `Block RThroughput: <=13.5`
So pick cost of `39`.

For store we have:
https://godbolt.org/z/fo1h9E67e - for intels `Block RThroughput: =21.0`; for ryzens, `Block RThroughput: <=12.0`
So pick cost of `21`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110592

2 years ago[X86][Costmodel] Load/store i16 Stride=6 VF=4 interleaving costs
Roman Lebedev [Tue, 28 Sep 2021 16:15:01 +0000 (19:15 +0300)]
[X86][Costmodel] Load/store i16 Stride=6 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/1Wcaf9c7T - for intels `Block RThroughput: =9.0`; for ryzens, `Block RThroughput: <=4.5`
So pick cost of `9`.

For store we have:
https://godbolt.org/z/1Wcaf9c7T - for intels `Block RThroughput: =15.0`; for ryzens, `Block RThroughput: <=6.0`
So pick cost of `15`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110591

2 years ago[X86][Costmodel] Load/store i16 Stride=6 VF=2 interleaving costs
Roman Lebedev [Tue, 28 Sep 2021 16:14:56 +0000 (19:14 +0300)]
[X86][Costmodel] Load/store i16 Stride=6 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/bhscej4WM - for intels `Block RThroughput: =13.0`; for ryzens, `Block RThroughput: <=7.0`
So pick cost of `13`.

For store we have:
https://godbolt.org/z/Yf4Pfnxbq - for intels `Block RThroughput: =10.0`; for ryzens, `Block RThroughput: <=3.5`
So pick cost of `10`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110590

2 years ago[llvm-profgen][CSSPGO] On-demand function size computation for preinliner
wlei [Sat, 25 Sep 2021 01:16:36 +0000 (18:16 -0700)]
[llvm-profgen][CSSPGO] On-demand function size computation for preinliner

Similar to https://reviews.llvm.org/D110465, we can compute function size on-demand for the functions that's hit by samples.

Here we leverage the raw range samples' address to compute a set of sample hit function. Then `BinarySizeContextTracker` just works on those function range for the size.

Reviewed By: hoy

Differential Revision: https://reviews.llvm.org/D110466

2 years ago[llvm-profgen] On-demand symbolization
wlei [Sat, 25 Sep 2021 00:06:39 +0000 (17:06 -0700)]
[llvm-profgen] On-demand symbolization

Previously we do symbolization for all the functions and actually we only need the symbols that's hit by the samples.

This can significantly speed up the time for large size binary.

Optimization for per-inliner will come along with next patch.

Reviewed By: hoy, wenlei

Differential Revision: https://reviews.llvm.org/D110465

2 years ago[PowerPC] FP compare and test XL compat builtins.
Quinn Pham [Wed, 8 Sep 2021 13:39:28 +0000 (08:39 -0500)]
[PowerPC] FP compare and test XL compat builtins.

This patch is in a series of patches to provide builtins for
compatability with the XL compiler. This patch adds builtins for compare
exponent and test data class operations on floating point values.

Reviewed By: #powerpc, lei

Differential Revision: https://reviews.llvm.org/D109437

2 years ago[SystemZ] Remove redundant declaration SystemZMnemonicSpellCheck (NFC)
Kazu Hirata [Tue, 28 Sep 2021 15:38:05 +0000 (08:38 -0700)]
[SystemZ] Remove redundant declaration SystemZMnemonicSpellCheck (NFC)

Note that SystemZMnemonicSpellCheck is defined in
SystemZGenAsmMatcher.inc, which SystemZAsmParser.cpp includes.

Identified with readability-redundant-declaration.

2 years agoRevert "[CMake] Enable LLVM_ENABLE_PER_TARGET_RUNTIME_DIR by default on Linux"
Roman Lebedev [Tue, 28 Sep 2021 15:23:17 +0000 (18:23 +0300)]
Revert "[CMake] Enable LLVM_ENABLE_PER_TARGET_RUNTIME_DIR by default on Linux"

See original review https://reviews.llvm.org/D107799

This reverts commit f9dbca68d48e705f6d45df8f58d6b2ee88bce76c.

2 years agotsan: print a meaningful frame for stack races
Dmitry Vyukov [Mon, 27 Sep 2021 12:07:28 +0000 (14:07 +0200)]
tsan: print a meaningful frame for stack races

Depends on D110631.

Differential Revision: https://reviews.llvm.org/D110632

2 years agotsan: fix tls_race3 test on darwin
Dmitry Vyukov [Tue, 28 Sep 2021 14:59:45 +0000 (16:59 +0200)]
tsan: fix tls_race3 test on darwin

Darwin also needs to use __tsan_tls_initialization
to pass the test.

Differential Revision: https://reviews.llvm.org/D110631

2 years ago[fir][NFC] Rename operand of EmboxOp
Valentin Clement [Tue, 28 Sep 2021 15:00:27 +0000 (17:00 +0200)]
[fir][NFC] Rename operand of EmboxOp

Rename `lenParams` to `typeparams` to be in sync with fir-dev.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110628

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2 years ago[lldb] [unittests] Fix building the FreeBSD arm64 Register Context test
Andrew Turner [Fri, 17 Sep 2021 09:01:44 +0000 (09:01 +0000)]
[lldb] [unittests] Fix building the FreeBSD arm64 Register Context test

Differential Revision: https://reviews.llvm.org/D110545

2 years agotsan: fix cur_thread alignment
Dmitry Vyukov [Tue, 28 Sep 2021 14:43:28 +0000 (16:43 +0200)]
tsan: fix cur_thread alignment

Commit 354ded67b3 ("tsan: align ThreadState to cache line")
did an incomplete thing. It marked ThreadState as cache line
aligned, but the thread local ThreadState instance is declared
as an aligned char array with hard-coded 64-byte alignment.
On PowerPC cache line size is 128 bytes, so the hard-coded
64-byte alignment is not enough.
Use cache line alignment consistently.

Differential Revision: https://reviews.llvm.org/D110629

2 years ago[lldb] [DynamicRegisterInfo] Refactor SetRegisterInfo()
Michał Górny [Tue, 28 Sep 2021 10:04:15 +0000 (12:04 +0200)]
[lldb] [DynamicRegisterInfo] Refactor SetRegisterInfo()

Move the "slice" and "composite" handling into separate methods to avoid
if/else hell.  Use more LLVM types whenever possible.  Replace printf()s
with llvm::Error combined with LLDB logging.

Differential Revision: https://reviews.llvm.org/D110619

2 years ago[ARM] Delay reverting WLS in arm-block-placement
David Green [Tue, 28 Sep 2021 14:38:29 +0000 (15:38 +0100)]
[ARM] Delay reverting WLS in arm-block-placement

As we have to split blocks, we may be left in an invalid loop state
after a WLS is reverted to a DLS. Instead remember the WLS that could
not be fixed and revert them after finishing processing all other loops.

Differential Revision: https://reviews.llvm.org/D110567

2 years agoFix missing return from 9324cc2ca951fe5fe11c85470cb08e699c59499c
Erich Keane [Tue, 28 Sep 2021 14:30:06 +0000 (07:30 -0700)]
Fix missing return from 9324cc2ca951fe5fe11c85470cb08e699c59499c

No idea how my local machine missed this, but I saw no warning for it,
it seems to have been lost in some level of translating this back for
upstreaming.

2 years agoRecommit "[AArch64] Split bitmask immediate of bitwise AND operation"
Jingu Kang [Tue, 28 Sep 2021 12:31:00 +0000 (13:31 +0100)]
Recommit "[AArch64] Split bitmask immediate of bitwise AND operation"

This reverts the revert commit f85d8a5bed95cc17a452b6b63b9866fbf181d94d
with bug fixes.

Original message:

    MOVi32imm + ANDWrr ==> ANDWri + ANDWri
    MOVi64imm + ANDXrr ==> ANDXri + ANDXri

    The mov pseudo instruction could be expanded to multiple mov instructions later.
    In this case, try to split the constant operand of mov instruction into two
    bitmask immediates. It makes only two AND instructions intead of multiple
    mov + and instructions.

    Added a peephole optimization pass on MIR level to implement it.

    Differential Revision: https://reviews.llvm.org/D109963

2 years ago[SLP]Improve vectorization of phi nodes by trying wider vectors.
Alexey Bataev [Wed, 25 Aug 2021 22:38:36 +0000 (15:38 -0700)]
[SLP]Improve vectorization of phi nodes by trying wider vectors.

Try to improve vectorization of the PHI nodes by trying to vectorize
similar instructions at the size of the widest possible vectors, then
aggregating with compatible type PHIs and trying to vectoriza again and
only if this failed, try smaller sizes of the vector factors for
compatible PHI nodes. This restores performance of several benchmarks
after tuning of the fp/int conversion instructions costs.

Differential Revision: https://reviews.llvm.org/D108740

2 years ago[LoopFlatten] Updating Phi nodes after IV widening
Sjoerd Meijer [Tue, 28 Sep 2021 14:06:22 +0000 (15:06 +0100)]
[LoopFlatten] Updating Phi nodes after IV widening

In rG6a076fa9539e, a problem with updating the old/narrow phi nodes after IV
widening was introduced. If after widening of the IV the transformation is
*not* applied, the narrow phi node was incorrectly modified, which should only
happen if flattening happens. This can be seen in the added test widen-iv2.ll,
which incorrectly had 1 incoming value, but should have its original 2 incoming
values, which is now restored.

Differential Revision: https://reviews.llvm.org/D110234

2 years agoRefine the constraint for isInlineBuiltinDeclaration
serge-sans-paille [Tue, 28 Sep 2021 13:54:43 +0000 (15:54 +0200)]
Refine the constraint for isInlineBuiltinDeclaration

Require it to be always_inline, to more closely match how _FORITFY_SOURCE
behaves.

This avoids generation of `.inline` suffixed functions - these should always be
inlined.

2 years ago[InstCombine] reduce code for swapped predicate; NFC
Sanjay Patel [Tue, 28 Sep 2021 13:59:57 +0000 (09:59 -0400)]
[InstCombine] reduce code for swapped predicate; NFC

2 years ago[InstCombine] add tests for icmp-gep; NFC
Sanjay Patel [Tue, 28 Sep 2021 13:56:28 +0000 (09:56 -0400)]
[InstCombine] add tests for icmp-gep; NFC

We need more coverage for commuted and (un)signed preds to
verify that things behave as expected here. Currently, we
do not transform signed preds or non-inbounds geps.

2 years ago[ARM] Skip debug info in recomputeVPTBlockMask
David Green [Tue, 28 Sep 2021 13:58:13 +0000 (14:58 +0100)]
[ARM] Skip debug info in recomputeVPTBlockMask

The ARMLowOverheadLoops pass recalculates VPT block masks when it
converts VCMP's inside VPT blocks into VPT's. The function to do so
doesn't seem to handle debug info though, leading to invalid block
creation or asserts at compile time. Make sure the function skips any
debug info between the MVE instructions it inspects.

Differential Revision: https://reviews.llvm.org/D110564

2 years agoChange __builtin_sycl_unique_stable_name to just use an Itanium mangling
Erich Keane [Wed, 22 Sep 2021 19:24:53 +0000 (12:24 -0700)]
Change __builtin_sycl_unique_stable_name to just use an Itanium mangling

After significant problems in our downstream with the previous
implementation, the SYCL standard has opted to make using macros/etc to
change kernel-naming-lambdas in any way UB (even passively). As a
result, we are able to just emit the itanium mangling.

However, this DOES require a little work in the CXXABI, as the microsoft
and itanium mangler use different numbering schemes for lambdas.  This
patch adds a pair of mangling contexts that use the normal 'itanium'
mangling strategy to fill in the "DeviceManglingNumber" used previously
by CUDA.

Differential Revision: https://reviews.llvm.org/D110281

2 years ago[InstCombine] add/move tests for icmp with gep operand(s); NFC
Sanjay Patel [Tue, 28 Sep 2021 13:23:50 +0000 (09:23 -0400)]
[InstCombine] add/move tests for icmp with gep operand(s); NFC

2 years ago[Analysis] Be defensive when matching size_t in lib call signatures
Bjorn Pettersson [Mon, 27 Sep 2021 12:12:13 +0000 (14:12 +0200)]
[Analysis] Be defensive when matching size_t in lib call signatures

When TargetLibraryInfoImpl::isValidProtoForLibFunc is checking
function signatures to detect lib calls it may check that a parameter
or return value matches with the "size_t" type. For this to work it
has to derive the IR type matching with "size_t". Depending on if
a DataLayout is provided or not, this has been done in two different
way. Either a more strict check being based on IntPtrType (which is
given by the DataLayout) or a more relaxed check assuming that any
integer type matches with "size_t".

Given that the stricter approach exist it seems like we do not want
to trigger rewrites etc if we aren't sure that a function calls
actually match with the library function. Therefore it was questioned
why we actually have the more relaxed approach when not being able
to derive an IR type for "size_t". This patch will take a more
defensive approach, requiring that a DataLayout is passed to
isValidProtoForLibFunc.

Differential Revision: https://reviews.llvm.org/D110584

2 years ago[Analysis] Add FIXME:s related to size_t type checks
Bjorn Pettersson [Mon, 27 Sep 2021 11:54:32 +0000 (13:54 +0200)]
[Analysis] Add FIXME:s related to size_t type checks

Differential Revision: https://reviews.llvm.org/D110583

2 years ago[IR] Change the default value of InstertElement to poison (1/4)
hyeongyu kim [Sun, 26 Sep 2021 16:07:49 +0000 (01:07 +0900)]
[IR] Change the default value of InstertElement to poison (1/4)

This patch is for fixing potential insertElement-related bugs like D93818.
```
V = UndefValue::get(VecTy);
for(...)
  V = Builder.CreateInsertElementy(V, Elt, Idx);
=>
V = PoisonValue::get(VecTy);
for(...)
  V = Builder.CreateInsertElementy(V, Elt, Idx);
```
Like above, this patch changes the placeholder V to poison.
The patch will be separated into several commits.

Reviewed By: aqjune

Differential Revision: https://reviews.llvm.org/D110311

2 years ago[SLP]No need to schedule/check parent for extract{element/value} instruction.
Alexey Bataev [Wed, 25 Aug 2021 14:27:03 +0000 (07:27 -0700)]
[SLP]No need to schedule/check parent for extract{element/value} instruction.

The instruction extractelement/extractvalue are not required to
be scheduled since they only depend on the source vector/aggregate (with
constant indices), smae applies to the parent basic block checks.
Improves compile time and saves scheduling budget.

Differential Revision: https://reviews.llvm.org/D108703

2 years agoUpdate the message for template-template param keyword for C++17
Erich Keane [Mon, 27 Sep 2021 20:16:03 +0000 (13:16 -0700)]
Update the message for template-template param keyword for C++17

C++17 permits using 'typename' or 'class' for a template template
parameter, but the error message in the parser only refers to 'class'.
This patch, in C++17 or newer modes, adds "or 'template'" to the
diagnostic.

2 years ago[lldb/test] Remove a check from TestLoadAfterAttach
Pavel Labath [Tue, 28 Sep 2021 12:44:42 +0000 (14:44 +0200)]
[lldb/test] Remove a check from TestLoadAfterAttach

The two module retrieval methods (qXfer:libraries-svr4 and manual list
traversal) differ in how the handle the
manually-added-but-not-yet-loaded modules. The svr4 path will remove it,
while the manual one will keep in the list.

It's likely the two paths need ought to be synchronized, but right now,
this distinction is not relevant for the test.

2 years agoRecommit "[Test] Add more tests with cycled phis"
Max Kazantsev [Tue, 28 Sep 2021 12:33:02 +0000 (19:33 +0700)]
Recommit "[Test] Add more tests with cycled phis"

2 years agoReland "[flang] GET_COMMAND_ARGUMENT runtime implementation"
Diana Picus [Tue, 28 Sep 2021 12:17:34 +0000 (12:17 +0000)]
Reland "[flang] GET_COMMAND_ARGUMENT runtime implementation"

Recommit https://reviews.llvm.org/D109813 and
https://reviews.llvm.org/D109814.

This implements the second and final entry point for GET_COMMAND_ARGUMENT,
handling the VALUE, STATUS and ERRMSG parameters.

It has a small fix in that we're now using memcpy instead of strncpy
(which was a bad idea to begin with, since we're not actually interested
in a string copy).

2 years agoRevert "[Test] Add more tests with cycled phis"
Max Kazantsev [Tue, 28 Sep 2021 12:32:26 +0000 (19:32 +0700)]
Revert "[Test] Add more tests with cycled phis"

This reverts commit 7128a545b3baa62c1164843103fb08daeba5cd9d.

Need to regenerate tests after rebase.

2 years agoRevert "[AArch64] Split bitmask immediate of bitwise AND operation"
Jingu Kang [Tue, 28 Sep 2021 12:27:13 +0000 (13:27 +0100)]
Revert "[AArch64] Split bitmask immediate of bitwise AND operation"

This reverts commit 864b206796ae8aa7f35f830655337751dbd9176c.

Reverting due to error on buildbots.

2 years ago[CMake] Add detection for the mold linker in AddLLVM.cmake.
Frederic Cambus [Tue, 28 Sep 2021 12:15:31 +0000 (17:45 +0530)]
[CMake] Add detection for the mold linker in AddLLVM.cmake.

mold says it is compatible with GNU ld and gold linkers:

```
$ mold -v
mold 0.9.5 (compatible with GNU ld and GNU gold)
```

And thus it currently gets detected as Gold.

With the following diff, CMake now correctly reports the linker name, and mold keeps being identified as Gold internally for now.

Reviewed By: ldionne, MaskRay

Differential Revision: https://reviews.llvm.org/D110035

2 years ago[lldb/test] Add ability to specify environment when spawning processes
Pavel Labath [Mon, 27 Sep 2021 12:12:29 +0000 (14:12 +0200)]
[lldb/test] Add ability to specify environment when spawning processes

We only had that ability for regular debugger launches. This meant that
it was not possible to use the normal dlopen patterns in attach tests.
This fixes that.