Chris Forbes [Fri, 21 Feb 2014 19:51:41 +0000 (08:51 +1300)]
i965: refactor format munging for separate stencil
We will need this for munging the view's format.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Tue, 21 Jan 2014 09:47:26 +0000 (22:47 +1300)]
i965: Include #slices in miptree debug
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Fri, 24 Jan 2014 21:36:04 +0000 (10:36 +1300)]
mesa: Adjust _MaxLevel computation to account for views
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Mon, 10 Mar 2014 08:36:22 +0000 (21:36 +1300)]
mesa: Prefer non-swizzled formats for most sized internalformats
These formats can be cast to others (with different component types or
sizes) via ARB_texture_view or ARB_shader_image_load_store. We want
them to be laid out consistently so that we can just reinterpret the
memory with a different format.
In V1, this was done conditionally on a 'prefer_no_swizzle' flag which
was set in TexStorage/TextureView paths, but we need the same behavior
for ARB_shader_image_load_store (which also works with images created
via TexImage, so we don't want it to be conditional.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 29 Mar 2014 05:27:42 +0000 (18:27 +1300)]
i965: Render R8G8B8X8 as R8G8B8A8
The sampler can handle R8G8B8X8 (and substitute 1.0 for the fourth
component) but we can't use it as a render target.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 14 Dec 2013 04:40:03 +0000 (17:40 +1300)]
i965: Pretend we don't support BRW_SURFACEFORMAT_R16G16B16_FLOAT for textures.
None of the other 3-component 16bpc formats are directly supported, so
they get promoted to XRGB equivalents. *Not* promoting RGB16F the same
way makes texture views much more fiddly -- we don't want to have to do
crazy copying behind the scenes.
(with my other master + my experimental ARB_texture_view support) fixes
the piglit test: `spec/ARB_texture_view/view compare 48bit formats`
No regressions in gpu.tests on Haswell.
V4: Don't alter the formats table -- just don't match it to a mesa_format. [Kenneth]
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 15 Mar 2014 08:50:28 +0000 (21:50 +1300)]
i965: Enable R10G10B10A2_UNORM format
This is supported by all generations, and is required for memory layout
consistency for texture_view.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Mon, 10 Mar 2014 09:00:44 +0000 (22:00 +1300)]
i965: Enable R8G8B8A8_UNORM_SRGB format
Now this is the preferred format for GL_SRGB8_ALPHA8.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sat, 29 Mar 2014 04:29:37 +0000 (17:29 +1300)]
swrast: Add support for fetching from MESA_FORMAT_R10G10B10A2_UNORM
V4: Fix rebase conflicts with Brian's renaming of the texfetch
functions.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Acked-by: Eric Anholt <eric@anholt.net>
Chris Forbes [Sun, 16 Mar 2014 19:03:38 +0000 (08:03 +1300)]
mesa: fix packing of float texels to GL_SHORT/GL_BYTE
Previously, we would unpack the texels to floats using *_TO_FLOAT_TEX,
and then pack them into the desired format using FLOAT_TO_*. Unfortunately,
this isn't quite the inverse operation, and so some texel values would
end up off-by-one.
This fixes the GL_RGB8_SNORM and GL_RGB16_SNORM subcases in piglit's
arb_texture_view-format-consistency-get test on i965. The similar 1-, 2-
and 4-component cases already worked because they took the memcpy path
rather than repacking.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Eric Anholt <eric@anholt.net>
Michel Dänzer [Wed, 9 Apr 2014 06:38:21 +0000 (15:38 +0900)]
r600g: Don't leak bytecode on shader compile failure
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74868
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov [Mon, 7 Apr 2014 14:24:46 +0000 (15:24 +0100)]
build: force .so extension for the gallium dri modules
While linux uses .so as a default extension for shared libraries that is
not the case for other platforms. The loader in libGL (and others) assumes
that the dri module will always have a .so extension, thus it will fail
to load on the affected platforms.
Spotted-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Jon TURNEY [Wed, 9 Apr 2014 20:07:06 +0000 (21:07 +0100)]
Partially revert bba9c28 "configure: use LIB_EXT rather than hardcoded .so"
Filenames passed to dlopen() don't need to use the platform's default extension
for shared libraries.
Using the '.so' extension when dlopen()ing DRI drivers is hardcoded into mesa
and the X server, so it should be hardcoded here in the Makefile as well.
A similar fix is probably also needed for gallium DRI drivers.
(Consider that if we were starting from scratch, perhaps we would use a custom
extension like .dri instead)
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Mon, 7 Apr 2014 12:17:01 +0000 (13:17 +0100)]
Partially revert "st/xa: Fix advertized version number and try to avoid future discrepancies"
This reverts commit
61bedc3d6b08943f015f9d590c07a6af36c2a92c.
As the header is the one defining the API/ABI and is distributed
during installation, we should be using it rather than re-defining
the XA version in configure.ac.
Bump the version in the header to 2.2.0, to reflect what was the
original intent of commit
42158926c6d7d3ddbe61b9a04d60544ff1b50a96.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Emil Velikov [Sun, 16 Mar 2014 02:56:18 +0000 (02:56 +0000)]
glx: drop obsolete _XUnlock_Mutex in __glXInitialize error path
With commit
1f1928db001(glx: Drop _Xglobal_lock while we create and
initialize glx display) we've split the big _Xglobal_lock handling in
a more fine grained manner.
Unfortunatelly we forgot to drop the unlock_mutex on the error paths,
leading to undefined behaviour as the mutex is already unlocked.
Cc: Kristian Høgsberg <krh@bitplanet.net>
Cc: "9.2 10.0 10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Rob Clark [Wed, 9 Apr 2014 20:33:23 +0000 (16:33 -0400)]
freedreno/a3xx: assert() -> debug_assert()
We hit this assert with some piglit tests. Which appears to be a bug
outside of freedreno. Previously we were relying on assert() being
redefined to debug_assert() so that we didn't crash in release builds.
Somehow that stopped working. So just use debug_assert() directly.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Brian Paul [Wed, 9 Apr 2014 17:35:54 +0000 (11:35 -0600)]
svga: move LIST_INITHEAD(dirty_buffers) earlier in svga_context_create()
Fixes a crash in svga_context_flush_buffers() if we use the 'draw' module
for AA lines (when the device doesn't support that feature). We need to
initialize this list before we setup the swtnl pieces.
Found/fixed by Charmaine Lee.
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Kenneth Graunke [Tue, 8 Apr 2014 20:25:27 +0000 (13:25 -0700)]
i965: Stop advertising GL_MESA_ycbcr_texture.
The "new" fragment shader backend has never supported the necessary
color conversion code for this to work. We began using the new backend
in Mesa 7.10 for GLSL (commit
a81d423d93f22a948f3aa4bf73, October 2010),
and for ARB_fragment_program in Mesa 9.1 (commit
97615b2d8c7c3cea6fd3a4,
August 2012).
I haven't heard any complaints, so I don't think anyone will miss this
feature. I believe mplayer used it at one point, but these days
defaults to other paths anyway.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <idr@freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Wed, 9 Apr 2014 13:54:20 +0000 (09:54 -0400)]
freedreno/a3xx/compiler: add CEIL
fixes piglit glsl-fs-ceil
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 9 Apr 2014 13:01:32 +0000 (09:01 -0400)]
freedreno/a3xx/compiler: fix neg mov's
create_mov() was fixed up to handle neg/abs properly for interal mov's,
using absneg.f, but forgot to fix it for TGSI MOV's. The problem with
using add.f to handle negated mov's is that we can only take a single
const reg src. So:
MOV TEMP[n], -CONST[m]
would turn into:
add.f Rdst, (neg)CONST[m], 0.0
which would not work. Anyways, just remove the extra code and always
use create_mov() which DTRT.
This fixes piglit vs-op-neg-int test.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Marek Olšák [Sat, 22 Mar 2014 16:36:15 +0000 (17:36 +0100)]
radeonsi: allow fast color clear and Hyper-Z with 1D-tiled surfaces on CIK
This depends on my kernel fix. Hyper-Z is still disabled by default.
Marek Olšák [Wed, 12 Feb 2014 14:13:30 +0000 (15:13 +0100)]
r600g,radeonsi: add a bunch of useful queries for the HUD
Marek Olšák [Mon, 10 Feb 2014 00:25:54 +0000 (01:25 +0100)]
r600g,radeonsi: set correct initial domain for shared resources
Marek Olšák [Fri, 4 Apr 2014 17:36:30 +0000 (19:36 +0200)]
gallium/radeon: fix warnings
Iago Toral Quiroga [Tue, 8 Apr 2014 11:01:20 +0000 (13:01 +0200)]
tnl: Merge _tnl_vbo_draw_prims() into _tnl_draw_prims().
This should help prevent situations where we render without proper index
bounds. For example: https://bugs.freedesktop.org/show_bug.cgi?id=59455
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Topi Pohjolainen [Sat, 22 Feb 2014 09:05:27 +0000 (11:05 +0200)]
i965: Remove unused sampler key fields
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Tue, 8 Apr 2014 20:10:45 +0000 (14:10 -0600)]
mesa: move declaration before code in etc2_unpack_rgb8()
To fix MSVC build since
cb4ad1368551b.
Kenneth Graunke [Thu, 13 Mar 2014 09:28:14 +0000 (02:28 -0700)]
i965: Delete "fast color clear unsupported" performance warning.
Applications frequently clear to colors other than 0.0 or 1.0, which
prevents us from doing fast color clears. In that case, we issue this
performance warning on basically every glClear call, resulting in so
much spam that it's nearly impossible to see any other messages.
Plus, I don't think it's useful. We aren't suggesting a better way to
do what the application developers want---we're just telling them it
would be faster to do something they don't want.
Driver developers have no control over the clear color, so this message
is totally useless to them.
A better alternative to get this sort of information is to use
INTEL_DEBUG=blorp, which tells you whether color clears were fast,
simd16 repdata, or slow.
v2: Rebase on has_color_component changes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Rob Clark [Tue, 8 Apr 2014 18:14:43 +0000 (14:14 -0400)]
freedreno/a3xx: deal with optimized tex instructions
Keep track of whether we actually have any sam instructions in the
resulting shader, rather than using TGSI SAMP declarations. If the sam
instruction is optimized out, because the result is not used, we don't
want to emit texture state, etc. In fact emitting sampler state and/or
setting PIXLODENABLE bit when there are no texture fetches seems to
cause lockup.
In theory this should never happen for a "normal" shader, unless the
state tracker is wonky. But it is a very real possibility for binning
pass shaders.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Courtney Goeltzenleuchter [Tue, 8 Apr 2014 15:10:09 +0000 (09:10 -0600)]
mesa: add bounds checking to eliminate buffer overrun
Decompressing ETC2 textures was causing intermitent segfault
by copying resulting 4x4 texel block to the destination texture
regardless of the size of the destination texture. Issue found
via application crash in GLBenchmark 3.0's Manhattan test.
v2: add more detail comment. Compute limit outside inner loops.
v3: add bugzilla reference
v4: Correct cc syntax in commit log
v5: really grab the right patch
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74988
Cc: "9.2 10.0 10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> [v1, suggested v2-3]
Leo Liu [Tue, 8 Apr 2014 14:57:54 +0000 (10:57 -0400)]
st/omx/enc: cleanup omx/vid_enc.c
cleanup by moving each step into a separate function
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Christian König [Tue, 8 Apr 2014 14:57:53 +0000 (10:57 -0400)]
st/omx/enc: allocate input buffer private on demand
v2: move allocation to a function as first step
to clean vid_enc_EncodeFrame
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Brian Paul [Thu, 3 Apr 2014 14:45:42 +0000 (08:45 -0600)]
svga: replace sampler assertion with conditional
For TEX instructions, the set of samplers and sampler views should
be consistent. The XA state tracker sometimes passes an inconsistent
set of samplers and sampler views. Rather than assert and die, issue
a warning.
v2: add debugging code to detect inconsistent state.
v3: also check for null sampler in svga_state_tss.c
Cc: "10.0" "10.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Chia-I Wu [Mon, 7 Apr 2014 04:31:14 +0000 (12:31 +0800)]
i965/vec4: fix record clearing in copy propagation
Given
mov vgrf7, vgrf9.xyxz
add vgrf9.xyz, vgrf4.xyzw, vgrf5.xyzw
add vgrf10.x, vgrf6.xyzw, vgrf7.wwww
the last instruction would be wrongly changed to
add vgrf10.x, vgrf6.xyzw, vgrf9.zzzz
during copy propagation.
The issue is that when deciding if a record should be cleared, the old code
checked for
inst->dst.writemask & (1 << ch)
instead of
inst->dst.writemask & (1 << BRW_GET_SWZ(src->swizzle, ch))
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76749
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Cc: Jordan Justen <jljusten@gmail.com>
Cc: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romainck <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Cc: "10.1" <mesa-stable@freedesktop.org>
Eric Anholt [Mon, 7 Apr 2014 18:40:39 +0000 (11:40 -0700)]
i965/vec4: Add a test for copy propagation behavior.
I thought I was seeing a bug in the code while reviewing, but it's not
there.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Tue, 25 Mar 2014 23:46:12 +0000 (16:46 -0700)]
i965/fs: Track whether we're doing dual source in a more obvious way.
I'm going to be turning dual_src_output into an array in a moment.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 31 Mar 2014 23:52:56 +0000 (16:52 -0700)]
i965/fs: Add a couple more global special regs to special[]
Nothing bad came of this because they weren't used after visitor running,
but leaving them in a bad state seems like a recipe for pain later.
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 25 Mar 2014 23:43:00 +0000 (16:43 -0700)]
i965/fs: Handle arrays of special regs more cleanly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 26 Mar 2014 17:06:12 +0000 (10:06 -0700)]
i965/fs: Fix dump_instructions() on uniforms.
All of a vec4 uniform was being printed as "u0"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 26 Mar 2014 17:06:53 +0000 (10:06 -0700)]
i965/fs: Fix vgrf0 live interval when no interpolation was done.
When you've got a simple solid-color shader that doesn't generate
pixel_x/y interpolation, we were deciding that the first vgrf was both the
undefined pixel_x and pixel_y, and extending its live interval to avoid
the stride problem. That tricked other optimization that tries to see if
a particular instruction is the last use of a variable.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 25 Mar 2014 19:44:01 +0000 (12:44 -0700)]
i965: Drop pointless check for variable declarations in splitting.
We're walking the whole instruction stream, so we know the declaration
will be found.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 25 Mar 2014 19:31:22 +0000 (12:31 -0700)]
i965: Remove stale comment.
We stopped doing variable index lowering for uniforms in
a64c1eb9b110f29b8abf803a8256306702629bdc, 5 months after the comment was
added.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 25 Mar 2014 19:28:57 +0000 (12:28 -0700)]
glsl: Move tree grafting's debug output to stderr.
The rest of our compiler dumps are there, now.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 6 Mar 2014 01:05:54 +0000 (17:05 -0800)]
glsl: Skip making a temporary for assignments when we don't need one.
While we wish our optimization passes could identify all the cases where
we can coalesce our variables, we miss out on a lot of opportunities.
total instructions in shared programs: 1673849 -> 1673166 (-0.04%)
instructions in affected programs: 299521 -> 298838 (-0.23%)
GAINED: 7
LOST: 0
Note that many programs are "hurt". The notable ones are where we produce
unrolling in cases we didn't before (presumably just because of the lower
instruction count). But there are also some cases where pushing things
right into the variables prevents copy propagation and tree grafting,
since we don't split our variable usage webs apart.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Tue, 8 Apr 2014 07:27:18 +0000 (09:27 +0200)]
i915: Fix build error.
is_power_of_two() is now provided by mesa so its definition must be removed
from the i915 driver code.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Mon, 7 Apr 2014 06:28:02 +0000 (23:28 -0700)]
glsl: Pass ctx->Const.NativeIntegers to do_algebraic.
The next patch will introduce an optimization that only works when
integers are not represented as floating point values.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 06:25:00 +0000 (23:25 -0700)]
glsl: Pass ctx->Const.NativeIntegers to do_common_optimization().
The next few patches will introduce an optimization that only works when
integers are not represented as floating point values.
v2: Re-word-wrap a line, as requested by Ian Romanick.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 05:45:43 +0000 (22:45 -0700)]
glsl: Validate that base types match for a number of binops.
The IR is not supposed to support implicit type conversions; we just
failed to validate it.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 05:41:34 +0000 (22:41 -0700)]
glsl: Fix lack of i2u in lower_ubo_reference.
ir_binop_ubo_load takes unsigned integer operands. However, the array
index used to compute these offsets may be a signed integer. (For
example, see Piglit's spec/glsl-1.40/uniform_buffer/fs-bvec-array).
For some reason, we were missing an ir_binop_i2u cast, and ir_validator
was failing to catch that.
Without this change, ir_builder's type inference code broke for me when
writing a new optimization pass.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 01:38:46 +0000 (18:38 -0700)]
i965/fs: Skip emitting MACH/MOV for small integers.
The vector backend already implemented this optimization, but
surprisingly, we never bothered to implement it in the scalar backend.
In addition to saving two instructions, this eliminates a use of the
accumulator as an explicit source, which is unsupported in SIMD16 mode
on Gen7+, which could help us gain SIMD16 programs.
Cuts 19.23% of the instructions in dolphin/efb2ram.shader_test.
v2: Rebase on is_16bit_integer_constant -> is_uint16_constant rename.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 01:34:59 +0000 (18:34 -0700)]
glsl: Make is_16bit_constant from i965 an ir_constant method.
The i965 MUL instruction doesn't natively support 32-bit by 32-bit
integer multiplication; additional instructions (MACH/MOV) are required.
However, we can avoid those if we know one of the operands can be
represented in 16 bits or less. The vector backend's is_16bit_constant
static helper function checks for this.
We want to be able to use it in the scalar backend as well, which means
moving the function to a more generally-usable location. Since it isn't
i965 specific, I decided to make it an ir_constant method, in case it
ends up being useful to other people as well.
v2: Rename from is_16bit_integer_constant to is_uint16_constant, as
suggested by Ilia Mirkin. Update comments to clarify that it does
apply to both int and uint types, as long as the value is
non-negative and fits in 16-bits.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 00:29:48 +0000 (17:29 -0700)]
mesa: Move is_power_of_two() function from brw_context.h to macros.h.
This makes the function available from core Mesa code, including the
GLSL compiler.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Apr 2014 00:16:28 +0000 (17:16 -0700)]
i965: Fix "SIMD16 unsupported" messages via KHR_debug.
Performance warnings are logged via KHR_debug in addition to when the
INTEL_DEBUG=perf environment variable is set. Without this, messages in
debug contexts would have "(null)" for the reason.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Tue, 18 Mar 2014 03:17:47 +0000 (20:17 -0700)]
i965: Fix missing dirty bits in the gen8_sbe_state atom.
These are clearly needed---the comments in the function are even present
for each one of them. I originally had two separate state atoms for
3DSTATE_SBE and 3DSTATE_SBE_SWIZ. When I combined the functions, I must
have forgotten to add the atoms for 3DSTATE_SBE_SWIZ.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 18 Mar 2014 03:05:13 +0000 (20:05 -0700)]
i965: Drop BRW_NEW_RASTERIZER_DISCARD flag from Broadwell SOL atom.
Nothing actually uses this---we handle rasterizer discard in the
clipper in order for statistics counters to work.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Tue, 18 Mar 2014 03:03:43 +0000 (20:03 -0700)]
i965: Use the correct program when uploading Broadwell SOL state.
This is the equivalent of commit
43e77215b13b2f86e461cd8a62b542f.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Thomas Hellstrom [Mon, 7 Apr 2014 20:42:25 +0000 (13:42 -0700)]
st/xa: Make sure unused samplers are set to NULL
renderer_copy_prepare was setting the first sampler but never telling
the cso code how many samplers were actually used. Fix this.
Cc: "10.1" <mesa-stable@freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Thomas Hellstrom [Mon, 7 Apr 2014 09:37:39 +0000 (02:37 -0700)]
st/xa: Bind destination before setting new state
Binding a new destination may cause the svga driver to emit draw calls
while propagating the surface. Make sure this doesn't happen in the middle
of sampler state setup where state may be incosistent.
In practice, surface propagation should never happen here and even if it did,
it wouldn't be a valid reason for the svga driver to emit partially set up
state, but to avoid future uncertainties, make sure this doesn't happen
anyway.
Found while auditing the state tracker for inconsistent sampler state /
sampler view setup.
Cc: "10.1" <mesa-stable@freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
Eric Anholt [Mon, 7 Apr 2014 21:34:49 +0000 (14:34 -0700)]
glapi: Fix libglapi build.
This line appears to have been accidentally dropped from the last commit,
and the resulting libglapi was missing symbols.
Matt Turner [Mon, 11 Nov 2013 03:01:58 +0000 (19:01 -0800)]
glapi/build: Add headers to distribution.
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Fri, 22 Feb 2013 02:57:25 +0000 (18:57 -0800)]
glapi/gen: Ship more Python files
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Fri, 22 Feb 2013 02:23:18 +0000 (18:23 -0800)]
glapi/gen: Ship XML and Python files
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Fri, 22 Feb 2013 02:16:42 +0000 (18:16 -0800)]
glapi/gen: Add missing XML files to API_XML
Also (re)move XML files from COMMON to API_XML.
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Mon, 11 Nov 2013 02:06:41 +0000 (18:06 -0800)]
src/build: Add getopt to distribution.
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Mon, 11 Nov 2013 02:04:08 +0000 (18:04 -0800)]
gbm/build: Add headers to distribution.
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Mon, 11 Nov 2013 01:57:19 +0000 (17:57 -0800)]
egl/build: Sort egl sources alphabetically.
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Mon, 11 Nov 2013 01:54:36 +0000 (17:54 -0800)]
egl/build: Remove unused -DXF86VIDMODE.
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Mon, 11 Nov 2013 01:52:56 +0000 (17:52 -0800)]
egl/build: Include headers and XML in distribution.
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Mon, 11 Nov 2013 01:37:54 +0000 (17:37 -0800)]
egl/build: Drop two unnecessary Makefiles.
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Matt Turner [Thu, 27 Mar 2014 18:35:49 +0000 (11:35 -0700)]
i965/fs: Remove left-over 'removed' variable.
I think this was used for coalescing out partly dead large virtual
registers, but the patch that enabled that caused regressions and didn't
make it upstream.
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Thu, 27 Mar 2014 17:15:19 +0000 (10:15 -0700)]
i965/fs: Check for interference after finding all channels.
It's more likely that we won't find writes to all channels than one will
interfere, and calculating interference is more expensive. This change
will also help prepare for coalescing load_payload instructions'
operands.
Also update the live intervals for all channels, and not just the last
that we saw.
Reviewed-by: Eric Anholt <eric@anholt.net>
Jordan Justen [Thu, 3 Apr 2014 18:30:41 +0000 (11:30 -0700)]
i965: initialize more device info fields for Cherryview
The intent in
9b6b084eb7b10d006b44e3cd22585fc3e39e0c00 was
for urb .size and .min_vs_entries fields to use the values
from the GEN8_FEATURES macro.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Sat, 5 Apr 2014 15:53:02 +0000 (09:53 -0600)]
swrast: reindent s_texfetch_temp.h, remove trailing whitespace
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 5 Apr 2014 15:53:01 +0000 (09:53 -0600)]
swrast: remove out of date comments in s_texfetch_tmp.h
The comments were out of date and redundant (the functions are
pretty much self-explanatory).
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 5 Apr 2014 15:53:01 +0000 (09:53 -0600)]
swrast: rename texture fetch functions (pt. 7)
sed commands:
s/f_z24_s8/S8_UINT_Z24_UNORM/g
s/f_s8_z24/Z24_UNORM_S8_UINT/g
s/f_z16/Z_UNORM16/g
s/f_z32/Z_UNORM32/g
s/z32f_x24s8/Z32_FLOAT_S8X24_UINT/g
s/f_ycbcr_rev/YCBCR_REV/g
s/f_ycbcr/YCBCR/g
s/dudv8/DUDV8/g
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 5 Apr 2014 15:53:01 +0000 (09:53 -0600)]
swrast: rename texture fetch functions (pt. 6)
sed commands:
s/rgb9_e5/R9G9B9E5_FLOAT/g
s/r11_g11_b10f/R11G11B10_FLOAT/g
s/f_alpha_f16/A_FLOAT16/g
s/f_alpha_f32/A_FLOAT32/g
s/f_luminance_f16/L_FLOAT16/g
s/f_luminance_f32/L_FLOAT32/g
s/f_luminance_alpha_f16/LA_FLOAT16/g
s/f_luminance_alpha_f32/LA_FLOAT32/g
s/f_intensity_f16/I_FLOAT16/g
s/f_intensity_f32/I_FLOAT32/g
s/f_r_f16/R_FLOAT16/g
s/f_r_f32/R_FLOAT32/g
s/f_rg_f16/RG_FLOAT16/g
s/f_rg_f32/RG_FLOAT32/g
s/f_rgb_f16/RGB_FLOAT16/g
s/f_rgb_f32/RGB_FLOAT32/g
s/f_rgba_f16/RGBA_FLOAT16/g
s/f_rgba_f32/RGBA_FLOAT32/g
s/xbgr16161616_float/RGBX_FLOAT16/g
s/xbgr32323232_float/RGBX_FLOAT32/g
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 5 Apr 2014 15:53:01 +0000 (09:53 -0600)]
swrast: rename texture fetch functions (pt. 5)
sed commands:
s/srgba8/A8B8G8R8_SRGB/g
s/sargb8/B8G8R8A8_SRGB/g
s/sabgr8/R8G8B8A8_SRGB/g
s/sxbgr8/R8G8B8X8_SRGB/g
s/sla8/L8A8_SRGB/g
s/sl8/L_SRGB8/g
s/srgb8/BGR_SRGB8/g
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 5 Apr 2014 15:53:01 +0000 (09:53 -0600)]
swrast: rename texture fetch functions (pt. 4)
sed commands:
s/signed_rg1616/R16G16_SNORM/g
s/signed_rg88_rev/R8G8_SNORM/g
s/signed_al88/L8A8_SNORM/g
s/signed_a8/A_SNORM8/g
s/signed_a16/A_SNORM16/g
s/signed_l8/L_SNORM8/g
s/signed_l16/L_SNORM16/g
s/signed_i8/I_SNORM8/g
s/signed_i16/I_SNORM16/g
s/signed_r8/R_SNORM8/g
s/signed_r16/R_SNORM16/g
s/signed_al1616/LA_SNORM16/g
s/signed_rgb_16/RGB_SNORM16/g
s/signed_rgba_16/RGBA_SNORM16/g
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 5 Apr 2014 15:53:01 +0000 (09:53 -0600)]
swrast: rename texture fetch functions (pt. 3)
Rename functions to match format names.
sed commands:
s/f_rg1616_rev/G16R16_UNORM/g
s/f_rg1616/R16G16_UNORM/g
s/f_argb2101010/B10G10R10A2_UNORM/g
s/f_a8/A_UNORM8/g
s/f_a16/A_UNORM16/g
s/f_i8/I_UNORM8/g
s/f_i16/I_UNORM16/g
s/f_r8/R_UNORM8/g
s/f_r16/R_UNORM16/g
s/f_rgb888/BGR_UNORM8/g
s/f_bgr888/RGB_UNORM8/g
s/f_l8/L_UNORM8/g
s/f_l16/L_UNORM16/g
s/xbgr16161616_unorm/RGBX_UNORM16/g
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 5 Apr 2014 15:53:01 +0000 (09:53 -0600)]
swrast: rename texture fetch functions (pt. 2)
Rename functions to match format names.
sed commands:
s/f_al1616_rev/A16L16_UNORM/g
s/f_al1616/L16A16_UNORM/g
s/f_rgb565_rev/R5G6B5_UNORM/g
s/f_rgb565/B5G6R5_UNORM/g
s/f_argb4444_rev/A4R4G4B4_UNORM/g
s/f_argb4444/B4G4R4A4_UNORM/g
s/f_rgba5551/A1B5G5R5_UNORM/g
s/f_argb1555_rev/A1R5G5B5_UNORM/g
s/f_al88_rev/A8L8_UNORM/g
s/f_al88/L8A8_UNORM/g
s/f_gr88/R8G8_UNORM/g
s/f_rg88/G8R8_UNORM/g
s/f_al44/L4A4_UNORM/g
s/f_rgb332/B2G3R3_UNORM/g
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 5 Apr 2014 15:53:01 +0000 (09:53 -0600)]
swrast: rename texture fetch functions (pt. 1)
Rename functions to match format names.
sed commands:
s/signed_rgba8888_rev/R8G8B8A8_SNORM/g
s/signed_rgba8888/A8B8G8R8_SNORM/g
s/f_rgba8888_rev/R8G8B8A_UNORM/g
s/f_rgba8888/A8B8G8R8_UNORM/g
s/f_rgbx8888_rev/R8G8B8X8_UNORM/g
s/f_rgbx8888/X8B8G8R8_UNORM/g
s/f_argb8888_rev/A8R8G8B8_UNORM/g
s/f_argb8888/B8G8R8A8_UNORM/g
s/f_xrgb8888_rev/X8R8G8B8_UNORM/g
s/f_xrgb8888/B8G8R8X8_UNORM/g
s/signed_rgbx8888/X8B8G8R8_SNORM/g
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Sat, 5 Apr 2014 15:53:01 +0000 (09:53 -0600)]
mesa: rename stencil/Z functions in format_unpack.c
So the function names match the format names.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Ilia Mirkin [Mon, 7 Apr 2014 12:42:59 +0000 (08:42 -0400)]
nouveau: fix firmware check on nvd7/nvd9
The kernel driver expects the class to be based on chipset generation
rather than VP generation. Make sure to pass 90b1 for NVDX chipsets
instead of 95b1.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77102
Fixes:
40dd777b33073
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.1 10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@ubunutu.com>
Thomas Hellstrom [Mon, 7 Apr 2014 07:56:42 +0000 (00:56 -0700)]
winsys/svga: Fix prime surface references also for guest-backed surfaces
Implement guest-backed surface sharing using prime fds. Previously only
legacy surfaces could use this functionality. Also use the vmwgfx 2.6
single-ioctl prime fd reference if available.
Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Thomas Hellstrom [Mon, 7 Apr 2014 06:33:19 +0000 (23:33 -0700)]
winsys/svga: Update the vmwgfx_drm.h header to latest version from kernel
Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Ilia Mirkin [Fri, 4 Apr 2014 05:18:22 +0000 (01:18 -0400)]
docs: mark ARB_texture_gather as done on nvc0
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 4 Apr 2014 05:11:23 +0000 (07:11 +0200)]
nvc0: add support for texture gather
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Thu, 3 Apr 2014 13:44:53 +0000 (09:44 -0400)]
docs: mark ARB_texture_query_lod as done for nv50, nvc0
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Thu, 3 Apr 2014 13:43:40 +0000 (09:43 -0400)]
nvc0: enable texture query lod
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Wed, 26 Feb 2014 04:13:19 +0000 (23:13 -0500)]
nv50: enable texture query lod
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Dave Airlie [Tue, 25 Feb 2014 04:42:04 +0000 (14:42 +1000)]
st/mesa: add support for ARB_texture_query_lod
Add support for the LODQ texture instruction.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Dave Airlie [Tue, 11 Feb 2014 03:26:08 +0000 (13:26 +1000)]
gallium: add support for LODQ opcodes.
This opcode provide support for GL_ARB_texture_query_lod,
Signed-off-by: Dave Airlie <airlied@redhat.com>
[imirkin: rebase, docs update]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Matt Turner [Sun, 2 Mar 2014 17:02:17 +0000 (09:02 -0800)]
i965/vec4: Allow constant propagation into dot product.
total instructions in shared programs: 1667088 -> 1667055 (-0.00%)
instructions in affected programs: 3362 -> 3329 (-0.98%)
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Sat, 29 Mar 2014 19:31:24 +0000 (12:31 -0700)]
glsl: Optimize (x + y cmp 0) into (x cmp -y).
Cuts a small handful of instructions in Serious Sam 3:
instructions in affected programs: 4692 -> 4666 (-0.55%)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Thu, 27 Mar 2014 17:25:57 +0000 (10:25 -0700)]
i965/fs: Split out can_coalesce_vars() function.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Thu, 27 Mar 2014 16:40:58 +0000 (09:40 -0700)]
i965/fs: Split out is_coalesce_candidate() function.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Sat, 8 Feb 2014 02:17:03 +0000 (18:17 -0800)]
i965/fs: Split fs_visitor::register_coalesce() into its own file.
The function has gotten large, and brw_fs.cpp is the largest source file
in the driver.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Thu, 27 Mar 2014 16:40:30 +0000 (09:40 -0700)]
i965/fs: Mark appropriate fs_inst members as const.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Thu, 27 Feb 2014 23:44:45 +0000 (15:44 -0800)]
i965: Mark is_tex() and friends as const.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Matt Turner [Thu, 3 Apr 2014 20:57:44 +0000 (13:57 -0700)]
i965/fs: Don't propagate saturation modifiers if there are source modifiers.
Which would lead to translating
mad vgrf9:F, vgrf3:F, u0:F, vgrf6:F
mov.sat vgrf7:F, -vgrf9:F
into
mad.sat vgrf9:F, vgrf3:F, u0:F, vgrf6:F
mov vgrf7:F, -vgrf9:F
Fixes some lighting effects in Dota2.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76749
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>