Vitaly Buka [Wed, 26 Apr 2023 23:58:37 +0000 (16:58 -0700)]
[NFC][sanitizer] Fix typo
Vitaly Buka [Wed, 26 Apr 2023 23:57:13 +0000 (16:57 -0700)]
[test][HWASAN] XFAIL broken test on aarch64
Richard Smith [Wed, 26 Apr 2023 23:53:34 +0000 (16:53 -0700)]
Pass the found declaration to DiagnoseUseOfDecl.
Don't pass in the resolved declaration, because that might be an
inheriting constructor declaration, which should never be used directly
and for which constraint satisfaction checking doesn't work.
Fixes #62361.
Michael Maitland [Mon, 24 Apr 2023 14:53:56 +0000 (07:53 -0700)]
[llvm-mca][RISCV] Fix checking if data valid in createInstrument
Fixes createInstrument to return instrument when LMUL data is valid, and
return nullptr when LMUL data is not valid for RISCV target.
Differential Revision: https://reviews.llvm.org/D149068
Vitaly Buka [Wed, 26 Apr 2023 23:48:38 +0000 (16:48 -0700)]
[test][HWASAN] Suppress memory leak in getpass
Reported after D149234.
Vitaly Buka [Wed, 26 Apr 2023 23:38:24 +0000 (16:38 -0700)]
Revert "[test][HWASAN] Suppress memory leak in getpass"
Does not fix the leak.
This reverts commit
1533478615e998192e227bded9d0e9029474936b.
Henry Yu [Wed, 26 Apr 2023 23:43:48 +0000 (16:43 -0700)]
[FuzzMutate] Skip EHPad during mutation and avoid replacing callee with pointer when sinking
This patch addresses 2 problems:
- In `ShuffleBlockStrategy`, when `BB` is an EHPad, `BB.getFirstInsertionPt()` will return `BB.end()`, which cannot be dereferenced and will cause crash in following loop.
- In `isCompatibleReplacement`, a call instruction's callee might be replaced by a pointer, causing 2 subproblems:
- we cannot guarantee that the pointer is a function pointer (even if it is, we cannot guarantee it matches the signature).
- after such a replacement, `getCalledFunction` will from then on return `nullptr` (since it's indirect call) which causes Segmentation Fault in the lines below.
This patch fixes the first problem by checking if a block to be mutated is an EHPad in base class `IRMutationStrategy` and skipping mutating it if so.
This patch fixes the second problem by avoiding replacing callee with pointer and adding a null check for indirect calls.
Reviewed By: Peter
Differential Revision: https://reviews.llvm.org/D148853
Matt Arsenault [Sat, 29 Oct 2022 20:01:58 +0000 (13:01 -0700)]
VE: Register null MCTargetStreamer
Matt Arsenault [Sun, 20 Nov 2022 16:33:14 +0000 (08:33 -0800)]
HIP: Directly call fma builtins
Shubham Sandeep Rastogi [Wed, 5 Apr 2023 16:05:06 +0000 (09:05 -0700)]
Emit unwind information in .debug_frame section when .cfi_sections .debug_frame intrinsic is used
The .cfi_sections .debug_frame intrinsic is used to emit .debug_frame
section. This directive tells the assembler to write out a section of
debug frame data. AArch64 is a platform where eh_frame is not needed for
unwind information. Unfortunately, that means that even when the
.cfi_sections .debug_frame intrinsic is used, the compiler skips
emitting the CIE's and FDE's in the debug_frame section. This patch
address that issue by making sure that the emission of CIE's and FDE's
are only skipped if the unwind information does not require a
debug_frame section and is a platform where the eh_frame can be skipped.
Differential Revision: https://reviews.llvm.org/D147980
Shubham Sandeep Rastogi [Thu, 6 Apr 2023 21:30:27 +0000 (14:30 -0700)]
Add tests to verify behavior of .cfi_sections .debug_frame intrinsic.
There was some lacking test coverage for checking when the
.cfi_sections .debug_frame intrinsic is emitted. On x86_64,
with -fno-exceptions there is no .cfi_sections .debug_frame intrinsic
emitted because there is an unwind table attribute.
On AArch64, with -fno-exceptions, there is no unwind table attribute, so
the .cfi_sections .debug_frame intrinsic is emitted correctly.
Alternatively, with -fexceptions, both AArch64 and x86_64 emit an unwind
table and therefore do not emit a .cfi_sections .debug_frame intrinsic
All this work was done in addition to https://reviews.llvm.org/D139663
patch.
Differential Revision: https://reviews.llvm.org/D147747
Vitaly Buka [Wed, 26 Apr 2023 23:11:30 +0000 (16:11 -0700)]
[test][HWASAN] Suppress memory leak in getpass
Reported after D149234.
Vitaly Buka [Wed, 26 Apr 2023 23:10:30 +0000 (16:10 -0700)]
[test][sanitizer] Reformat the test
Siva Chandra Reddy [Wed, 26 Apr 2023 22:11:31 +0000 (22:11 +0000)]
[libc] Add a new target named LibcHermeticTestMain.
The existing LibcTestMain has been renamed to LibcUnitTestMain.
Hermetic tests are linked to LibcHermeticTestMain and unit tests are
linked to LibcUnitTestMain.
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D149303
Alex Langford [Wed, 26 Apr 2023 22:01:12 +0000 (15:01 -0700)]
[lldb] Change return type of FileSpec::GetFileNameExtension
These don't really need to be in ConstStrings. It's nice that comparing
ConstStrings is fast (just a pointer comparison) but the cost of
creating the ConstString usually already includes the cost of doing a
StringRef comparison anyway, so this is just extra work and extra memory
consumption for basically no benefit.
Differential Revision: https://reviews.llvm.org/D149300
Brad Smith [Wed, 26 Apr 2023 22:53:52 +0000 (18:53 -0400)]
[SPARC][MC] Fix encoding of backwards BPr branches
Make sure that the upper bits of the offset is placed in bits 20-21 of the
instruction word.
This fixes the encoding of backwards (negative offset) BPr branches.
(Previously, the upper two bits of the offset would overwrite parts of the rs1
field, causing it to branch on the wrong register, with the wrong offset)
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D144012
Brad Smith [Wed, 26 Apr 2023 22:50:49 +0000 (18:50 -0400)]
[SPARC] Lower BR_CC to BPr on 64-bit target whenever possible
On 64-bit target, when doing i64 BR_CC where one of the comparison operands is a
constant zero, try to fold the compare and BPcc into a BPr instruction.
For all integers, EQ and NE comparison are available, additionally for signed
integers, GT, GE, LT, and LE is also available.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D142461
Fabian Mora [Wed, 26 Apr 2023 22:52:37 +0000 (17:52 -0500)]
[mlir][GPUDialect] Implement memory attributions for LaunchOp
Currently memory attributions are not supported for gpu::LaunchOp, this patch implements memory attributions for gpu::LaunchOp and modifies the KernelOutlining pass to make the attributions available in GPUFuncOp.
Reviewed By: makslevental
Differential Revision: https://reviews.llvm.org/D147809
max [Wed, 26 Apr 2023 20:27:07 +0000 (15:27 -0500)]
[MLIR][python bindings] Add some AttrBuilder and port _exts to use them.
Differential Revision: https://reviews.llvm.org/D149287
Jason Molenda [Wed, 26 Apr 2023 22:44:39 +0000 (15:44 -0700)]
Fix CI failure - this depended on constants only defined on arm64 macs
Congcong Cai [Mon, 24 Apr 2023 22:30:58 +0000 (00:30 +0200)]
[Sema]Select correct lexical context during template instantiate
This patch wants to fix inline friend decl like
```
template <class F1> int foo(F1 X);
template <int A1> struct A {
template <class F1> friend int foo(F1 X) { return A1; }
};
template struct A<1>;
int a = foo(1.0);
```
Differential Revision: https://reviews.llvm.org/D149009
Vitaly Buka [Sun, 23 Apr 2023 07:03:58 +0000 (00:03 -0700)]
[NFC][HWASAN] Move getUARTag into the Entry
Reviewed By: kstoimenov, eugenis
Differential Revision: https://reviews.llvm.org/D149221
Vitaly Buka [Sun, 23 Apr 2023 06:40:50 +0000 (23:40 -0700)]
[HWASAN] Remove UAR tag branch !ClUARRetagToZero
This is leftover from older version of HWASAN.
The current HWASAN assumes that the new stack
frames are tagged with zeroes, which make getNextTagWithCall
or StackTag ^ TagMaskByte unusable.
Reviewed By: kstoimenov, eugenis
Differential Revision: https://reviews.llvm.org/D149220
Joseph Huber [Wed, 26 Apr 2023 22:07:47 +0000 (17:07 -0500)]
[libc][fix] Also remove the headers for the other flags
Summary:
This patch makes this only apply to the GPU build. This should be
handled more intelligently in the future so it's common between all of t
hem.
Jonas Devlieghere [Wed, 26 Apr 2023 22:00:57 +0000 (15:00 -0700)]
[lldb] `or` -> `||` in SBDefines.h
Address Dave's post-commit review feedback from
https://reviews.llvm.org/D147736#inline-1441914
Joseph Huber [Wed, 26 Apr 2023 21:58:08 +0000 (16:58 -0500)]
[libc][fix] Only add the hermetic test flags in GPU mode
Summary:
This is a little broken, what we really need is a separate target to use
with the hermetic tests, but this is a stop-gap to get the bots green
again.
Alex Langford [Wed, 26 Apr 2023 17:54:02 +0000 (10:54 -0700)]
[lldb] Remove finding .Bundle directories in PlatformDarwinKernel
Jason isn't sure what this is used for and isn't aware of a .Bundle
suffix related to kernel debugging. Let's remove it.
Differential Revision: https://reviews.llvm.org/D149284
Joseph Huber [Wed, 26 Apr 2023 02:34:59 +0000 (21:34 -0500)]
[libc] Partially implement `atexit` on the GPU
The `atexit` function controls registering functions to call at the end
of the program. This is difficult to do in general on the GPU because of
the lack of a real mutex implementation. We primarily provide this for
testing where we can explicitly restrict how the `atexit` registration
functions are called. So we simply create a passthrough Mutex to get
past the usage of it as per @sivachandra's suggestion.
Depends on D149225
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D149226
Joseph Huber [Wed, 26 Apr 2023 02:32:22 +0000 (21:32 -0500)]
[libc] Correctly pass 'CXX_STANDARD' to the packaged GPU build
We need to perform the GPU build separately. The `CXX_STANDARD` option
was not being passed properly.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D149225
Joseph Huber [Wed, 26 Apr 2023 00:03:43 +0000 (19:03 -0500)]
[libc] Enable the GPU build to build the UnitTest library
The previous patch in D149216 allows us to use the internal `<stdlib.h>`
include for the GPU build. However, we currently don't provide the
memory functions so the header wasn't resolving them. This patch adds
these as entrypoints. They don't cause any entrypoints to be emitted
because they are not implemented, but they provide it in the header so
that we can rely on the test's implementation of them.
Depends on D149216
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D149217
Joseph Huber [Tue, 25 Apr 2023 23:29:35 +0000 (18:29 -0500)]
[libc] Add path to include generated headers for hermetic tests
The generated header files live in the build directory's include path.
When targeting a hermetic build we want to make sure we only use headers
generated by the project itself if availible.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D149216
Leonard Chan [Wed, 26 Apr 2023 21:48:37 +0000 (21:48 +0000)]
[hwasan] Do not memset allocation if it comes from the secondary allocator
The secondary allocator calls mmap which should return zero-inited pages, so we
don't need to explicitly memset it with zeros. This is similar to what asan's
calloc does.
Differential Revision: https://reviews.llvm.org/D149285
Michael Jones [Mon, 27 Mar 2023 22:14:17 +0000 (15:14 -0700)]
[libc][bazel] add file printf targets and support
This patch adds targets for printf and fprintf to the bazel build.
Additionally, it adds support for the build system to specify where
files should be written for testing purposes. This was necessary to
enable the fprintf test under bazel.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D147008
Matt Arsenault [Fri, 23 Dec 2022 23:33:34 +0000 (18:33 -0500)]
AMDGPU: Remove invalid testcase for enqueue kernel
The call didn't have the right calling convention, but calls to
kernels are supposed to be illegal anyway.
David Green [Wed, 26 Apr 2023 21:12:00 +0000 (22:12 +0100)]
[AArch64][SVE] Generate smull/umull instead of sve v2i64 mul
A neon smull/umull should be preferred over a sve v2i64 mul with two extends.
It will be both less instructions and a lower cost multiply instruction.
Differential Revision: https://reviews.llvm.org/D148248
Vitaly Buka [Wed, 26 Apr 2023 21:01:18 +0000 (14:01 -0700)]
[test][HWASAN] Add hwasan-aliasing
Some tests of D149234 deppend on
aliasing mode.
Jan Sjodin [Wed, 26 Apr 2023 20:39:14 +0000 (16:39 -0400)]
[OpenMP][Flang][MLIR] Add lowering of TargetOp for host codegen to LLVM-IR
Fix uninitialied value use introduced in
d3f9388ffb889d2ef512a17b9c4d37d09f03c693
Craig Topper [Wed, 26 Apr 2023 20:35:20 +0000 (13:35 -0700)]
[RISCV] Remove CSR names that are not in Privileged Specification 1.12.
These are from the N extension (User-Level Interrupts) which did
not make it into 1.12 of the Privileged Specification.
D117653 also tried to remove some of these, but it was never reviewed.
Reviewed By: jrtc27
Differential Revision: https://reviews.llvm.org/D149278
Fangrui Song [Wed, 26 Apr 2023 20:18:55 +0000 (13:18 -0700)]
[ELF] Add --remap-inputs= and --remap-inputs-file=
--remap-inputs-file= can be specified multiple times, each naming a
remap file that contains `from-glob=to-file` lines or `#`-led comments.
('=' is used a separator a la -fdebug-prefix-map=)
--remap-inputs-file= can be used to:
* replace an input file. E.g. `"*/libz.so=exp/libz.so"` can replace a resolved
`-lz` without updating the input file list or (if used) a response file.
When debugging an application where a bug is isolated to one single
input file, this option gives a convenient way to test fixes.
* remove an input file with `/dev/null` (changed to `NUL` on Windows), e.g.
`"a.o=/dev/null"`. A build system may add unneeded dependencies.
This option gives a convenient way to test the result removing some inputs.
`--remap-inputs=a.o=aa.o` can be specified to provide one pattern without using
an extra file.
(bash/zsh process substitution is handy for specifying a pattern without using
a remap file, e.g. `--remap-inputs-file=<(printf 'a.o=aa.o')`, but it may be
unavailable in some systems. An extra file can be inconvenient for a build
system.)
Exact patterns are tested before wildcard patterns. In case of a tie, the first
patterns wins. This is an implementation detail that users should not rely on.
Co-authored-by: Marco Elver <elver@google.com>
Link: https://discourse.llvm.org/t/rfc-support-exclude-inputs/70070
Reviewed By: melver, peter.smith
Differential Revision: https://reviews.llvm.org/D148859
LLVM GN Syncbot [Wed, 26 Apr 2023 20:11:45 +0000 (20:11 +0000)]
[gn build] Port
244560329603
Nikolas Klauser [Fri, 21 Apr 2023 03:48:10 +0000 (05:48 +0200)]
[libc++][PSTL] Integrate the headers and add a CI job
Reviewed By: ldionne, #libc
Spies: libcxx-commits, arichardson
Differential Revision: https://reviews.llvm.org/D141780
Patrick McCormick [Wed, 26 Apr 2023 19:49:58 +0000 (13:49 -0600)]
[flang] Raise configure-time error when LLVM_ENABLE_EH is set
flang cannot be built with exceptions enabled. Doing so results in a link-time
error.
This addresses issue #59353 [https://github.com/llvm/llvm-project/issues/59353]
Differential Revision: https://reviews.llvm.org/D146173
Jason Molenda [Wed, 26 Apr 2023 20:04:38 +0000 (13:04 -0700)]
Fix off-by-one error in armv7 mach-o corefile register context
The sanity check on the size of the register context we found in
the corefile was off by one, so lldb would not add the register
contents. Add a test case to ensure it doesn't regress.
Differential Revision: https://reviews.llvm.org/D149224
rdar://
108306070
Vitaly Buka [Mon, 24 Apr 2023 04:43:32 +0000 (21:43 -0700)]
[test][HWASAN] Regenerate some HWASAN tests
Example of the command used to update tests:
```
ninja -C <build_dir> opt && llvm/utils/update_test_checks.py \
--opt-binary <build_dir>/bin/opt llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
```
Reviewed By: kstoimenov
Differential Revision: https://reviews.llvm.org/D149219
Vitaly Buka [Wed, 26 Apr 2023 06:15:34 +0000 (23:15 -0700)]
[HWASAN] Run sanitizer_common tests
ninja check-sanitizer will run tests with hwasan as well
Reviewed By: kstoimenov
Differential Revision: https://reviews.llvm.org/D149234
Vitaly Buka [Wed, 26 Apr 2023 06:15:34 +0000 (23:15 -0700)]
[test][HWASAN] Add XFAILs for missing hwasan features
Reviewed By: thurston
Differential Revision: https://reviews.llvm.org/D149271
Alex Langford [Wed, 26 Apr 2023 19:38:53 +0000 (12:38 -0700)]
[lldb] Skip Watchpoint/ExpressionLanguage.test on Windows
This test fails on the aarch64-windows bots unfortunately. Mark as
unsupported.
Context: https://lab.llvm.org/buildbot/#/builders/219/builds/2389
Aaron Ballman [Wed, 26 Apr 2023 19:29:02 +0000 (15:29 -0400)]
Fix Clang sphinx bot
Addresses the issue found in:
https://lab.llvm.org/buildbot/#/builders/92/builds/43413
ipriyanshi1708 [Wed, 26 Apr 2023 19:18:40 +0000 (15:18 -0400)]
Fix the diagnostic about attribute placement for scoped enumerations
Fixed the error message for attribute placement. Earlier it was showing
'place it after "enum"' but it should be 'place it after "enum class"'
which I have fixed in this patch.
Fixes https://github.com/llvm/llvm-project/issues/61660
Differential Revision: https://reviews.llvm.org/D147989
max [Wed, 26 Apr 2023 14:55:27 +0000 (09:55 -0500)]
[MLIR][python bindings] Reimplement `replace_all_uses_with` on `PyValue`
Differential Revision: https://reviews.llvm.org/D149261
Zarko Todorovski [Wed, 26 Apr 2023 17:43:12 +0000 (13:43 -0400)]
[Clang][AIX] Add back error for -fprofile-sample-generate/use on AIX
D148177 also removed the error for sampling based profiling which is not currently
supported on AIX. Adding that error back.
Reviewed By: qiongsiwu1
Differential Revision: https://reviews.llvm.org/D148960
Florian Hahn [Wed, 26 Apr 2023 18:51:34 +0000 (19:51 +0100)]
[LV] Add extra uniformity tests with LSHR and AND.
Extra tests for D148841 based on the tests added in
95539186c82604f783.
do [Wed, 26 Apr 2023 18:02:52 +0000 (14:02 -0400)]
{Flang][OpenMP] Add support for ior, ieor, and iand reduction in worksharing-loop
Adds support for .ior., .ieor., and .iand. reductions.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D148994
Craig Topper [Wed, 26 Apr 2023 18:24:35 +0000 (11:24 -0700)]
[RISCV] Fix spelling 'Floating Pont' -> 'Floating Point'. NFC
Mingming Liu [Wed, 26 Apr 2023 17:55:43 +0000 (10:55 -0700)]
[NFC][Clang]Remove a reference on argument since 'Name' is not modified'
Reviewed By: nickdesaulniers
Differential Revision: https://reviews.llvm.org/D149274
Aaron Ballman [Wed, 26 Apr 2023 18:17:13 +0000 (14:17 -0400)]
Remove the empty analysis diagnostics file
This file hasn't had any diagnostics in it since 2012, so I think we're
safe to remove this file.
Craig Topper [Wed, 26 Apr 2023 18:00:54 +0000 (11:00 -0700)]
[RISCV] Add version of generateImmOutOfRangeError that takes an SMLoc.
Have the ErrorInfo version call it after looking up ErrorInfo in
the Operands.
Use the new function in a few places that don't have ErrorInfo and
were also generating out of range messages.
Kirill Stoimenov [Mon, 24 Apr 2023 19:25:45 +0000 (19:25 +0000)]
[HWASAN] Fix TLS + signal handling related crash
When a signal is raised before HWASAN has a chance to initialize it's TLS entry the program crashes. This only happens when hwasan-with-tls is true, which is default value. This patch fixes the problem by disabling signals during thread initialization time.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D149085
Emilio Cota [Wed, 26 Apr 2023 17:47:00 +0000 (13:47 -0400)]
[bazel][mlir] fix for
d3f9388ff
Craig Topper [Wed, 26 Apr 2023 17:41:57 +0000 (10:41 -0700)]
[RISCV][CSKY][Loong] Pass Twine by const reference instead of by value. NFC
I think RISCV was the original here and the CSKY and Loong copied it.
Matt Arsenault [Mon, 10 Apr 2023 23:35:19 +0000 (19:35 -0400)]
InstCombine: Use computeKnownFPClass in is.fpclass combines and pass AC
The various isKnownNever* calls can be merged into one. This also introduces
the new ability to remove zero/sub/normal checks. Also start passing the
AssumptionCache arguments.
Alex Brachet [Wed, 26 Apr 2023 16:54:38 +0000 (16:54 +0000)]
[llvm-gsymutil] Switch to OptTable
Differential Revision: https://reviews.llvm.org/D148775
Slava Zakharin [Tue, 25 Apr 2023 23:59:46 +0000 (16:59 -0700)]
[flang] Restore stack after allocas created by TargetRewrite.
This resolves issues with running out of stack on examples like
https://fortran-lang.discourse.group/t/modern-fortran-sample-code/2019/18
reported by @clementval.
When target rewrite creates alloca(s) around a call, we need to insert
stacksave/stackrestore to free the allocated stack. Better performant
code may be achieved by placing the alloca(s) outside of loops,
but the placement has to behave correctly with regards to OpenMP/OpenACC/etc.
dialect operations that have special representation for "private"
objects. This is a concervative fix for correctness issue.
Differential Revision: https://reviews.llvm.org/D149222
Alex Langford [Mon, 24 Apr 2023 23:58:18 +0000 (16:58 -0700)]
[lldb] Add support for specifying language when setting watchpoint by expression
This is useful in contexts where you have multiple languages in play:
You may be stopped in a frame for language A, but want to set a watchpoint
with an expression using language B. The current way to do this is to
use the setting `target.language` while setting the watchpoint and
unset it after the watchpoint is set, but that's kind of clunky and
somewhat error-prone. This should add a better way to do this.
rdar://
108202559
Differential Revision: https://reviews.llvm.org/D149111
Craig Topper [Wed, 26 Apr 2023 17:11:14 +0000 (10:11 -0700)]
[RISCV] Make Zicntr and Zihpm imply Zicsr.
Zicntr and Zihpm are names for groups of CSRs so they should imply
that CSRs exist.
Reviewed By: asb, kito-cheng
Differential Revision: https://reviews.llvm.org/D148962
Craig Topper [Wed, 26 Apr 2023 17:11:07 +0000 (10:11 -0700)]
[RISCV] Accept zicntr and zihpm command line options
This change adds the definition of the two extensions, but does not either a) make any register definitions conditional on them or b) enabled the extensions by default.
This is somewhat analogous to https://reviews.llvm.org/D143953, but with some key differences. The best discussion I can find on status is here: https://github.com/riscv/riscv-profiles/issues/43. These were removed between document version 2.1 and 2.2, but were not defined as new extensions in 2.2. That addition came later - in March 2022.
According to https://drive.google.com/file/d/1qa57pePesOiDOrNzxuuGFhCL4Rbi9AYB/view these were ratified in March 2023.
Reviewed By: asb, reames
Differential Revision: https://reviews.llvm.org/D144215
Matt Arsenault [Tue, 11 Apr 2023 20:08:42 +0000 (16:08 -0400)]
AMDGPU: Reduce number of calls to computeKnownFPClass and pass all arguments
Makes assumes work for this case.
Jan Sjodin [Mon, 3 Apr 2023 14:46:21 +0000 (10:46 -0400)]
[OpenMP][Flang][MLIR] Add lowering of TargetOp for host codegen to LLVM-IR
This patch adds lowering of TargetOps for the host. The lowering outlines the
target region function and uses the OpenMPIRBuilder support functions to emit
the function and call. Code generation for offloading will be done in later
patches.
Reviewed By: kiranchandramohan, jdoerfert, agozillon
Differential Revision: https://reviews.llvm.org/D147172
Matt Arsenault [Mon, 10 Apr 2023 13:24:51 +0000 (09:24 -0400)]
ValueTracking: Add baseline computeKnownFPClass tests for minimum/maximum
Matt Arsenault [Tue, 25 Apr 2023 16:16:21 +0000 (12:16 -0400)]
ValueTracking: Fix computeKnownFPClass handling for copysign
We need to expand the set of possible classes to the opposite
sign for the first operand if we don't know the sign of the second
operand.
Mingming Liu [Sun, 23 Apr 2023 19:23:33 +0000 (12:23 -0700)]
[InlineAsm][AArch64]Add backend support for flag output parameters
- The set of flag is from https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Flag-Output-Operands
Before:
- ARM64 GCC supports flag output constraints, while Clang doesn't parse condition code, as shown in https://gcc.godbolt.org/z/7jzMEK796
- LLVM ISel won't lower them either (as shown in https://gcc.godbolt.org/z/Pv4PPf56c)
After:
- Given flag output constraints in LLVM IR, condition code is parsed and flag output is lowered to 'cset'.
- Clang parse is not added in this patch.
Differential Revision: https://reviews.llvm.org/D149032
Jay Foad [Wed, 26 Apr 2023 16:09:12 +0000 (17:09 +0100)]
[AMDGPU] Add GFX11 ds_min_f32 / ds_max_f32 tests
Paul Robinson [Wed, 26 Apr 2023 15:55:51 +0000 (08:55 -0700)]
[Headers] Revise conditional for rdrand64_step
Downstream doc tooling doesn't like an #if between the doc and the
function prototype. This change also guarantees that the prototype
stays the same for 32/64 bit users.
Paul Kirth [Mon, 24 Apr 2023 21:03:21 +0000 (21:03 +0000)]
[RISCV] Make SCS prologue interrupt safe on RISC-V
Prior to this patch the SCS prologue used the following instruction
sequence.
```
s[w|d] ra, 0(gp)
addi gp, gp, [4|8]
```
The problem with this sequence is that an interrupt occurring between the
store and the increment could clobber the value just written to the SCS.
https://reviews.llvm.org/D84414#inline-813203 pointed out a similar
issues that could have affected the epilogue.
This patch changes the instruction sequence in the prologue to:
```
addi gp, gp, [4|8]
s[w|d] ra, -[4|8](gp)
```
The downside to this is that there is now a data dependency between the
add and the store.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D149099
Slava Zakharin [Wed, 26 Apr 2023 05:03:57 +0000 (22:03 -0700)]
[flang] Recognize unused dummy arguments during lowering with HLFIR.
So far we've relied on AllocaOp to represent the dummy arguments
not declared for the current entry. With HLFIR we have to account
for hlfir::DeclareOp.
Differential Revision: https://reviews.llvm.org/D149231
Teresa Johnson [Wed, 26 Apr 2023 13:35:12 +0000 (06:35 -0700)]
[IR] Add interface to remove a CallBase string function attribute
Adds an interface to remove a string function attribute attached to a
CallBase, and a corresponding unittest.
This was extracted from D141077, and will be used by a follow on patch
that removes memprof attributes when needed.
Reviewed By: snehasish
Differential Revision: https://reviews.llvm.org/D149192
Joseph Huber [Tue, 25 Apr 2023 21:23:07 +0000 (16:23 -0500)]
[libc][Docs] Begin improving documentation for the GPU libc
This patch updates some of the documentation for the GPU libc project.
There is a lot of work still to be done, but this sets the general
outline.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D149194
Sam McCall [Fri, 21 Apr 2023 19:03:43 +0000 (21:03 +0200)]
[dataflow] HTMLLogger - show the value of the current expr
Differential Revision: https://reviews.llvm.org/D148949
Mehdi Amini [Wed, 26 Apr 2023 05:21:34 +0000 (22:21 -0700)]
Make debug counters available in non-assert builds as well
Differential Revision: https://reviews.llvm.org/D149232
Paul Robinson [Tue, 25 Apr 2023 21:28:42 +0000 (14:28 -0700)]
[Headers][doc] Add "gather" intrinsic descriptions to avx2intrin.h
Differential Revision: https://reviews.llvm.org/D149205
Shivam Gupta [Wed, 26 Apr 2023 12:15:27 +0000 (17:45 +0530)]
[clang-rename] Exit gracefully when no input provided
clang-rename on a non existing file segfaults
Command to run -
$ clang-rename -offset=0 -new-name=plop asdasd
Error while processing llvm-project/asdasd.
clang-rename: llvm-project/llvm/include/llvm/Support/ErrorOr.h:237:
llvm::ErrorOr<T>::storage_type* llvm::ErrorOr<T>::getStorage()
[with T = const clang::FileEntry*; llvm::ErrorOr<T>::storage_type = const clang::FileEntry*]:
Assertion `!HasError && "Cannot get value when an error exists!"' failed.
[1] 827497 IOT instruction clang-rename -offset=0 -new-name=plop asdasd
This fixes https://github.com/llvm/llvm-project/issues/36471.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D148439
NAKAMURA Takumi [Thu, 9 Mar 2023 00:09:47 +0000 (09:09 +0900)]
TableGen: Replace `IntrinsicEmitter::ComputeFixedEncoding()` and cleanup
Depends on D146915
Differential Revision: https://reviews.llvm.org/D145937
NAKAMURA Takumi [Wed, 8 Mar 2023 23:38:52 +0000 (08:38 +0900)]
TableGen: Implement TypeSig generator in `Intrinsics.td`
This commit doesn't replace `IntrinsicEmitter::ComputeFixedEncoding()`,
but compares outputs to it, to make sure implementation correct.
Depends on D145871, D145872, D145874, and D146914
Differential Revision: https://reviews.llvm.org/D146915
NAKAMURA Takumi [Sat, 11 Mar 2023 18:46:58 +0000 (03:46 +0900)]
TableGen: Prune convertInitListSlice and VarListElementInit
They were dedicated to constant version of list slice.
Depends on D147401
Differential Revision: https://reviews.llvm.org/D145872
NAKAMURA Takumi [Sat, 4 Mar 2023 10:53:52 +0000 (19:53 +0900)]
TableGen: Let expressions available to list subscriptions and list slices
This enables indexing in `!foreach` and permutation with `list[permlist]`.
Enhancements in syntax:
- `list<int>` is applicable as a slice element.
- `list[int,]` is evaluated as not `ElemType` but `list<ElemType>`
with a single element.
Part of D145872
FIXME: I didn't apply new semantics to BitSlice.
NAKAMURA Takumi [Wed, 26 Apr 2023 13:36:40 +0000 (22:36 +0900)]
Reformat
NAKAMURA Takumi [Sat, 1 Apr 2023 22:43:18 +0000 (07:43 +0900)]
Add failure testcases as llvm/test/TableGen/ListSlices-fail.td
Differential Revision: https://reviews.llvm.org/D147401
NAKAMURA Takumi [Wed, 26 Apr 2023 13:53:57 +0000 (22:53 +0900)]
TableGen/ProgRef.rst: Fix copypasto in the description of `!range`
Joe Nash [Tue, 25 Apr 2023 19:24:35 +0000 (15:24 -0400)]
[AMDGPU] Delete test for illegal v_cndmask_b16_dpp
There are no VOP2 or VOP2 with dpp forms of v_cndmask_b16. Delete the
test. NFC.
Reviewed By: critson
Differential Revision: https://reviews.llvm.org/D149184
Victor Perez [Wed, 26 Apr 2023 08:58:13 +0000 (09:58 +0100)]
[mlir][llvm] Use cached constants when importing landingpad instructions
Not using cached constants when importing instructions may lead to
undesired results, as breaking dominance rules in the translated MLIR
module.
Signed-off-by: Victor Perez <victor.perez@codeplay.com>
Differential Revision: https://reviews.llvm.org/D149247
Janek van Oirschot [Wed, 26 Apr 2023 13:05:06 +0000 (14:05 +0100)]
[AMDGPU] Fix negative offset values interpretation in getMemOperandsWithOffset for DS
The offset values may result in an erroneous scheduling of a load before write for a memory location if the offset values are represented as negative values in MIR, despite actually being unsigned values. This representation in MIR happens as SelectionDAG::getConstant could go through APInt to represent the encoding which assumes the MSB of the encoding as a sign-bit, regardless of whether it is supposed to be a signed value. The 8-bit negative (interpreted) value gets cast to an unsigned 32 bit value in getMemOperandsWithOffset used for comparisons in areMemAccessesTriviallyDisjoint eventually leading to an erroneous schedule in the machine scheduler.
Reviewed By: arsenm, foad
Differential Revision: https://reviews.llvm.org/D149080
Donát Nagy [Fri, 14 Apr 2023 10:31:06 +0000 (12:31 +0200)]
[analyzer] Fix comparison logic in ArrayBoundCheckerV2
The prototype checker alpha.security.ArrayBoundV2 performs two
comparisons to check that in an expression like Array[Index]
0 <= Index < length(Array)
holds. These comparisons are handled by almost identical logic: the
inequality is first rearranged by getSimplifiedOffsets(), then evaluated
with evalBinOpNN().
However the simplification used "naive" elementary mathematical
schematics, but evalBinOpNN() performed the signed -> unsigned
conversions described in the C/C++ standards, and this confusion led to
wildly inaccurate results: false positives from the lower bound check
and false negatives from the upper bound check.
This commit eliminates the code duplication by moving the comparison
logic into a separate function, then adds an explicit check to this
unified code path, which handles the problematic case separately.
In addition to this, the commit also cleans up a testcase that was
demonstrating the presence of this problem. Note that while that
testcase was failing with an overflow error, its actual problem was in
the underflow handler logic:
(0) The testcase introduces a five-element array "char a[5]" and an
unknown argument "size_t len"; then evaluates "a[len+1]".
(1) The underflow check tries to determine whether "len+1 < 0" holds.
(2) This inequality is rearranged to "len < -1".
(3) evalBinOpNN() evaluates this with the schematics of C/C++ and
converts -1 to the size_t value SIZE_MAX.
(4) The engine concludes that len == SIZE_MAX, because otherwise we'd
have an underflow here.
(5) The overflow check tries to determine whether "len+1 >= 5".
(6) This inequality is rearranged to "len >= 4".
(7) The engine substitutes len == SIZE_MAX and reports that we have
an overflow.
Differential Revision: https://reviews.llvm.org/D135375
Jordan Rupprecht [Wed, 26 Apr 2023 12:28:15 +0000 (05:28 -0700)]
[NFC] Wrap entire debug logging loop in LLVM_DEBUG
Felipe de Azevedo Piovezan [Tue, 25 Apr 2023 19:06:10 +0000 (15:06 -0400)]
[DebugLocEntry][nfc] Remove redundant cast
A cast from DIExpression->DIExpression is not needed.
Differential Revision: https://reviews.llvm.org/D149178
Alexey Lapshin [Tue, 18 Apr 2023 18:22:55 +0000 (20:22 +0200)]
[Support][Parallel] Add sequential mode to TaskGroup::spawn().
This patch allows to specify that some part of tasks should be
done in sequential order. It makes it possible to not use
condition operator for separating sequential tasks:
TaskGroup tg;
for () {
if(condition) ==> tg.spawn([](){fn();}, condition)
fn();
else
tg.spawn([](){fn();});
}
It also prevents execution on main thread. Which allows adding
checks for getThreadIndex() function discussed in D142318.
The patch also replaces std::stack with std::deque in the
ThreadPoolExecutor to have natural execution order in case
(parallel::strategy.ThreadsRequested == 1).
Differential Revision: https://reviews.llvm.org/D148728
Felipe de Azevedo Piovezan [Tue, 25 Apr 2023 15:08:13 +0000 (11:08 -0400)]
[LangRef] Improve wording DW_OP_LLVM_entry_value
This commit simplifies the text of DW_OP_LLVM_entry_value by making it
terser, replacing a verbose example with a more concrete one, providing
an explicit conclusion on the meaning of N=1, and by transforming the
description of which passes generate this op into a list (which enables
future expansion of this list).
Differential Revision: https://reviews.llvm.org/D149177
Ivan Kosarev [Wed, 26 Apr 2023 11:21:50 +0000 (12:21 +0100)]
[AMDGPU][Disassembler] Fix a spurious error message in an instruction comment.
The patch prevents pollution of instruction comments with error messages
generated during unsuccessful decoding attempts.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D149049
Ivan Kosarev [Mon, 24 Apr 2023 09:16:29 +0000 (10:16 +0100)]
[AMDGPU][Disassembler] Pre-commit a test on an error message generated in an instruction comment.
Simon Pilgrim [Wed, 26 Apr 2023 11:32:57 +0000 (12:32 +0100)]
[X86] Handle multiple use freeze(undef) in LowerAVXCONCAT_VECTORS as zero vectors
Replacement for D144903
If we're concatenating freeze(undef) subvector ops with multiple uses then we can't treat them as a wider freeze(undef), but we can replace them with a zero subvector, which is cheap on AVX
Differential Revision: https://reviews.llvm.org/D149249
Dmitry Makogon [Wed, 26 Apr 2023 11:20:14 +0000 (18:20 +0700)]
[Test] Add test showing bug in SCEV::getBackedgeTakenInfo (NFC)
Test for https://github.com/llvm/llvm-project/issues/62380/.