platform/upstream/gcc.git
2 years agoRISC-V: Minimal support of bitmanip extension
Kito Cheng [Mon, 23 Aug 2021 03:19:52 +0000 (11:19 +0800)]
RISC-V: Minimal support of bitmanip extension

2021-10-25  Kito Cheng  <kito.cheng@sifive.com>

gcc/ChangeLog:

* common/config/riscv/riscv-common.c (riscv_ext_version_table):
Add zba, zbb, zbc and zbs.
(riscv_ext_flag_table): Ditto.
* config/riscv/riscv-opts.h (MASK_ZBA): New.
(MASK_ZBB): Ditto.
(MASK_ZBC): Ditto.
(MASK_ZBS): Ditto.
(TARGET_ZBA): Ditto.
(TARGET_ZBB): Ditto.
(TARGET_ZBC): Ditto.
(TARGET_ZBS): Ditto.
* config/riscv/riscv.opt (riscv_zb_subext): New.

2 years agoSimplify (_Float16) sqrtf((float) a) to .SQRT(a) when a is a _Float16 value.
liuhongt [Mon, 25 Oct 2021 02:51:33 +0000 (10:51 +0800)]
Simplify (_Float16) sqrtf((float) a) to .SQRT(a) when a is a _Float16 value.

Similar for sqrt/sqrtl.

gcc/ChangeLog:

PR target/102464
* match.pd: Simplify (_Float16) sqrtf((float) a) to .SQRT(a)
when direct_internal_fn_supported_p, similar for sqrt/sqrtl.

gcc/testsuite/ChangeLog:

PR target/102464
* gcc.target/i386/pr102464-sqrtph.c: New test.
* gcc.target/i386/pr102464-sqrtsh.c: New test.

2 years agotree-optimization/102920 - fix PHI VN with undefined args
Richard Biener [Mon, 25 Oct 2021 07:33:15 +0000 (09:33 +0200)]
tree-optimization/102920 - fix PHI VN with undefined args

This fixes a latent issue exposed by now allowing VN_TOP in PHI
arguments.  We may only use optimistic equality when merging values on
different edges, not when merging values on the same edge - in particular
we may not choose the undef value on any edge when there's a not undef
value as well.

2021-10-25  Richard Biener  <rguenther@suse.de>

PR tree-optimization/102920
* tree-ssa-sccvn.h (expressions_equal_p): Add argument
controlling VN_TOP matching behavior.
* tree-ssa-sccvn.c (expressions_equal_p): Likewise.
(vn_phi_eq): Do not optimistically match VN_TOP.

* gcc.dg/torture/pr102920.c: New testcase.

2 years agoCombine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combine FADD(A, FMUL(B, C)...
konglin1 [Tue, 19 Oct 2021 01:35:30 +0000 (09:35 +0800)]
Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combine FADD(A, FMUL(B, C)) to FMA(B, C, A).

This patch is to support transform in fast-math something like
_mm512_add_ph(x1, _mm512_fmadd_pch(a, b, _mm512_setzero_ph())) to
 _mm512_fmadd_pch(a, b, x1).

And support transform _mm512_add_ph(x1, _mm512_fmul_pch(a, b))
to _mm512_fmadd_pch(a, b, x1).

gcc/ChangeLog:

* config/i386/sse.md (fma_<mode>_fadd_fmul): Add new
define_insn_and_split.
(fma_<mode>_fadd_fcmul):Likewise
(fma_<complexopname>_<mode>_fma_zero):Likewise

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx512fp16-complex-fma.c: New test.

2 years agoDaily bump.
GCC Administrator [Mon, 25 Oct 2021 00:16:18 +0000 (00:16 +0000)]
Daily bump.

2 years agoRevise -mdisable-fpregs option and add new -msoft-mult option
John David Anglin [Sun, 24 Oct 2021 17:49:38 +0000 (17:49 +0000)]
Revise -mdisable-fpregs option and add new -msoft-mult option

The behavior of the -mdisable-fpregs is confusing in that it doesn't
disable the use of the floating-point registers in all situations.
The -msoft-float disables the use of the floating-point registers in
all situations.  The Linux kernel only needs to disable use of the
xmpyu instruction to avoid using the floating-point registers.

This change revises the -mdisable-fpregs option to disable the use of
the floating-point registers in all situations.  It is now equivalent
to the -msoft-float option.  A new -msoft-mult option is added to
disable use of the xmpyu instruction.  The libgcc library can be
compiled with the -msoft-mult option to avoid using hardware integer
multiplication.

2021-10-24  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

* config/pa/pa-d.c (pa_d_handle_target_float_abi): Don't check
TARGET_DISABLE_FPREGS.
* config/pa/pa.c (fix_range): Use MASK_SOFT_FLOAT instead of
MASK_DISABLE_FPREGS.
(hppa_rtx_costs): Don't check TARGET_DISABLE_FPREGS.  Adjust
cost of hardware integer multiplication.
(pa_conditional_register_usage): Don't check TARGET_DISABLE_FPREGS.
* config/pa/pa.h (INT14_OK_STRICT): Likewise.
* config/pa/pa.md: Don't check TARGET_DISABLE_FPREGS. Check
TARGET_SOFT_FLOAT in patterns that use xmpyu instruction.
* config/pa/pa.opt (mdisable-fpregs): Change target mask to
SOFT_FLOAT.  Revise comment.
(msoft-float): New option.

2 years agoDon't use 'G' constraint in integer move patterns
John David Anglin [Sun, 24 Oct 2021 16:38:58 +0000 (16:38 +0000)]
Don't use 'G' constraint in integer move patterns

The 'G' constraint only matches a float zero.

2021-10-24  John David Anglin  <danglin@gcc.gnu.org>

gcc/ChangeLog:

* config/pa/pa.md: Don't use 'G' constraint in integer move patterns.

2 years ago[Committed] Correct testcase gcc.target/bfin/20090914-3.c
Roger Sayle [Sun, 24 Oct 2021 13:30:10 +0000 (14:30 +0100)]
[Committed] Correct testcase gcc.target/bfin/20090914-3.c

This patch cures the testsuite failure of bfin/20090914-3.c, which
currently FAILs on bfin-elf with "(test for excess errors)" due to:
20090914-3.c:3:1: warning: return type defaults to 'int' [-Wimplicit-int]
which is obviously not what this code was intended to test.  Fixed by
turning the code into a function returning the final "fract32" result,
as simply specifying an "int" return type for main, results in the
entire function being optimized away, as the result is unused.

2021-10-24  Roger Sayle  <roger@nextmovesoftware.com>

gcc/testsuite/ChangeLog
* gcc.target/bfin/20090914-3.c: Tweak test case.

2 years agodoc: Remove details around Itanium on GNU/Linux and Windows
Gerald Pfeifer [Sun, 24 Oct 2021 09:19:08 +0000 (11:19 +0200)]
doc: Remove details around Itanium on GNU/Linux and Windows

gcc:
* doc/install.texi (Specific): Remove obsolete details
around GNU/Linux on Itanium.
(Specific): Remove reference to Windows for Itanium.

2 years agoDaily bump.
GCC Administrator [Sun, 24 Oct 2021 00:16:25 +0000 (00:16 +0000)]
Daily bump.

2 years agoconfig/i386: Commentary typo fix
Bernhard Reutner-Fischer [Thu, 22 Apr 2021 19:47:20 +0000 (21:47 +0200)]
config/i386: Commentary typo fix

gcc/ChangeLog:

* config/i386/x86-tune-sched-bd.c (dispatch_group): Commentary
typo fix.

2 years agocleanup compute_points_to_sets
Jan Hubicka [Sat, 23 Oct 2021 15:44:32 +0000 (17:44 +0200)]
cleanup compute_points_to_sets

gcc/ChangeLog:

* tree-ssa-structalias.c (compute_points_to_sets): Cleanup.

2 years agoMove bind-c-intent-out-2.f90 to gfortran.dg/ubsan
H.J. Lu [Sat, 23 Oct 2021 12:40:09 +0000 (05:40 -0700)]
Move bind-c-intent-out-2.f90 to gfortran.dg/ubsan

Move bind-c-intent-out-2.f90 to gfortran.dg/ubsan for -fsanitize=undefined.

PR fortran/9262
* gfortran.dg/bind-c-intent-out-2.f90: Moved to ...
* gfortran.dg/ubsan/bind-c-intent-out-2.f90

2 years agox86_64: Add insn patterns for V1TI mode logic operations.
Roger Sayle [Sat, 23 Oct 2021 09:06:06 +0000 (10:06 +0100)]
x86_64: Add insn patterns for V1TI mode logic operations.

On x86_64, V1TI mode holds a 128-bit integer value in a (vector) SSE
register (where regular TI mode uses a pair of 64-bit general purpose
scalar registers).  This patch improves the implementation of AND, IOR,
XOR and NOT on these values.

The benefit is demonstrated by the following simple test program:

typedef unsigned __int128 v1ti __attribute__ ((__vector_size__ (16)));
v1ti and(v1ti x, v1ti y) { return x & y; }
v1ti ior(v1ti x, v1ti y) { return x | y; }
v1ti xor(v1ti x, v1ti y) { return x ^ y; }
v1ti not(v1ti x) { return ~x; }

For which GCC currently generates the rather large:

and:    movdqa  %xmm0, %xmm2
        movq    %xmm1, %rdx
        movq    %xmm0, %rax
        andq    %rdx, %rax
        movhlps %xmm2, %xmm3
        movhlps %xmm1, %xmm4
        movq    %rax, %xmm0
        movq    %xmm4, %rdx
        movq    %xmm3, %rax
        andq    %rdx, %rax
        movq    %rax, %xmm5
        punpcklqdq      %xmm5, %xmm0
        ret

ior: movdqa  %xmm0, %xmm2
        movq    %xmm1, %rdx
        movq    %xmm0, %rax
        orq     %rdx, %rax
        movhlps %xmm2, %xmm3
        movhlps %xmm1, %xmm4
        movq    %rax, %xmm0
        movq    %xmm4, %rdx
        movq    %xmm3, %rax
        orq     %rdx, %rax
        movq    %rax, %xmm5
        punpcklqdq      %xmm5, %xmm0
        ret

xor: movdqa  %xmm0, %xmm2
        movq    %xmm1, %rdx
        movq    %xmm0, %rax
        xorq    %rdx, %rax
        movhlps %xmm2, %xmm3
        movhlps %xmm1, %xmm4
        movq    %rax, %xmm0
        movq    %xmm4, %rdx
        movq    %xmm3, %rax
        xorq    %rdx, %rax
        movq    %rax, %xmm5
        punpcklqdq      %xmm5, %xmm0
        ret

not: movdqa  %xmm0, %xmm1
        movq    %xmm0, %rax
        notq    %rax
        movhlps %xmm1, %xmm2
        movq    %rax, %xmm0
        movq    %xmm2, %rax
        notq    %rax
        movq    %rax, %xmm3
        punpcklqdq      %xmm3, %xmm0
        ret

with this patch we now generate the much more efficient:

and: pand    %xmm1, %xmm0
        ret

ior: por     %xmm1, %xmm0
        ret

xor: pxor    %xmm1, %xmm0
        ret

not: pcmpeqd %xmm1, %xmm1
        pxor    %xmm1, %xmm0
        ret

For my first few attempts at this patch I tried adding V1TI to the
existing VI and VI12_AVX_512F mode iterators, but these then have
dependencies on other iterators (and attributes), and so on until
everything ties itself into a knot, as V1TI mode isn't really a
first-class vector mode on x86_64.  Hence I ultimately opted to use
simple stand-alone patterns (as used by the existing TF mode support).

2021-10-23  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* config/i386/sse.md (<any_logic>v1ti3): New define_insn to
implement V1TImode AND, IOR and XOR on TARGET_SSE2 (and above).
(one_cmplv1ti2): New define expand.

gcc/testsuite/ChangeLog
* gcc.target/i386/sse2-v1ti-logic.c: New test case.
* gcc.target/i386/sse2-v1ti-logic-2.c: New test case.

2 years agoAdd testcase for PR fortran/95196
Sandra Loosemore [Sat, 23 Oct 2021 00:22:00 +0000 (17:22 -0700)]
Add testcase for PR fortran/95196

2021-10-22  José Rui Faustino de Sousa  <jrfsousa@gmail.com>
    Sandra Loosemore  <sandra@codesourcery.com>

gcc/testsuite/

PR fortran/95196
* gfortran.dg/PR95196.f90: New.

2 years agoDaily bump.
GCC Administrator [Sat, 23 Oct 2021 00:16:26 +0000 (00:16 +0000)]
Daily bump.

2 years agoAdd install-dvi Makefile targets.
Eric Gallager [Fri, 22 Oct 2021 22:24:15 +0000 (15:24 -0700)]
Add install-dvi Makefile targets.

Closes #102663

ChangeLog:

PR other/102663
* Makefile.def: Handle install-dvi target.
* Makefile.tpl: Likewise.
* Makefile.in: Regenerate.

c++tools/ChangeLog:

PR other/102663
* Makefile.in: Add dummy install-dvi target.

gcc/ChangeLog:

PR other/102663
* Makefile.in: Handle dvidir and install-dvi target.
* configure: Regenerate.
* configure.ac: Add install-dvi to target_list.

gcc/ada/ChangeLog:

PR other/102663
* gcc-interface/Make-lang.in: Allow dvi-formatted
documentation to be installed.

gcc/c/ChangeLog:

PR other/102663
* Make-lang.in: Add dummy c.install-dvi target.

gcc/cp/ChangeLog:

PR other/102663
* Make-lang.in: Add dummy c++.install-dvi target.

gcc/d/ChangeLog:

PR other/102663
* Make-lang.in: Allow dvi-formatted documentation
to be installed.

gcc/fortran/ChangeLog:

PR other/102663
* Make-lang.in: Allow dvi-formatted documentation
to be installed.

gcc/lto/ChangeLog:

PR other/102663
* Make-lang.in: Add dummy lto.install-dvi target.

gcc/objc/ChangeLog:

PR other/102663
* Make-lang.in: Add dummy objc.install-dvi target.

gcc/objcp/ChangeLog:

PR other/102663
* Make-lang.in: Add dummy objc++.install-dvi target.

gnattools/ChangeLog:

PR other/102663
* Makefile.in: Add dummy install-dvi target.

libada/ChangeLog:

PR other/102663
* Makefile.in: Add dummy install-dvi target.

libcpp/ChangeLog:

PR other/102663
* Makefile.in: Add dummy install-dvi target.

libdecnumber/ChangeLog:

PR other/102663
* Makefile.in: Add dummy install-dvi target.

libiberty/ChangeLog:

PR other/102663
* Makefile.in: Allow dvi-formatted documentation
to be installed.

2 years agodoc: Convert mingw-w64.org links to https
Gerald Pfeifer [Fri, 22 Oct 2021 22:10:58 +0000 (00:10 +0200)]
doc: Convert mingw-w64.org links to https

gcc:
* doc/install.texi (Binaries): Convert mingw-w64.org to https.
(Specific): Ditto.

2 years agolibstdc++: Constrain std::make_any [PR102894]
Jonathan Wakely [Fri, 22 Oct 2021 21:55:00 +0000 (22:55 +0100)]
libstdc++: Constrain std::make_any [PR102894]

std::make_any should be constrained so it can only be called if the
construction of the return value would be valid.

libstdc++-v3/ChangeLog:

PR libstdc++/102894
* include/std/any (make_any): Add SFINAE constraint.
* testsuite/20_util/any/102894.cc: New test.

2 years agoFortran: Change XFAIL to PASS
Tobias Burnus [Fri, 22 Oct 2021 22:04:43 +0000 (00:04 +0200)]
Fortran: Change XFAIL to PASS

Replace dg-excess-errors by dg-error/warning and dg-prune-output for
more fine-grained output handling and to avoid XPASS.

gcc/testsuite/ChangeLog:

* gfortran.dg/associate_3.f03: Replace dg-excess-errors by
other dg-* to change XFAIL to PASS.
* gfortran.dg/binding_label_tests_4.f03: Likewise.
* gfortran.dg/block_4.f08: Likewise.
* gfortran.dg/charlen_04.f90: Likewise.
* gfortran.dg/charlen_05.f90: Likewise.
* gfortran.dg/charlen_06.f90: Likewise.
* gfortran.dg/charlen_13.f90: Likewise.
* gfortran.dg/coarray_9.f90: Likewise.
* gfortran.dg/coarray_collectives_3.f90: Likewise.
* gfortran.dg/data_invalid.f90: Likewise.
* gfortran.dg/do_4.f: Likewise.
* gfortran.dg/dollar_sym_1.f90: Likewise.
* gfortran.dg/dollar_sym_3.f: Likewise.
* gfortran.dg/fmt_tab_1.f90: Likewise.
* gfortran.dg/fmt_tab_2.f90: Likewise.
* gfortran.dg/forall_16.f90: Likewise.
* gfortran.dg/g77/970125-0.f: Likewise.
* gfortran.dg/gomp/unexpected-end.f90: Likewise.
* gfortran.dg/interface_operator_1.f90: Likewise.
* gfortran.dg/interface_operator_2.f90: Likewise.
* gfortran.dg/line_length_4.f90: Likewise.
* gfortran.dg/line_length_5.f90: Likewise.
* gfortran.dg/line_length_6.f90: Likewise.
* gfortran.dg/line_length_8.f90: Likewise.
* gfortran.dg/line_length_9.f90: Likewise.
* gfortran.dg/pr65045.f90: Likewise.
* gfortran.dg/pr69497.f90: Likewise.
* gfortran.dg/submodule_21.f08: Likewise.
* gfortran.dg/tab_continuation.f: Likewise.
* gfortran.dg/typebound_proc_2.f90: Likewise.
* gfortran.dg/warnings_are_errors_1.f90: Likewise.

2 years agoFortran: Avoid running into assert with -fcheck= + UBSAN
Tobias Burnus [Fri, 22 Oct 2021 21:23:06 +0000 (23:23 +0200)]
Fortran: Avoid running into assert with -fcheck= + UBSAN

PR fortran/92621
gcc/fortran/
* trans-expr.c (gfc_trans_assignment_1): Add STRIP_NOPS.

gcc/testsuite/
* gfortran.dg/bind-c-intent-out-2.f90: New test.

2 years agoor1k: Update FPU to specify detect tininess before rounding
Stafford Horne [Thu, 21 Oct 2021 13:11:27 +0000 (22:11 +0900)]
or1k: Update FPU to specify detect tininess before rounding

This was not defined in the spec and not consistent in the
implementation causing incosistent behavior.  After review we have
updated the CPU implementations and proposed the spec be updated to
specific that FPU tininess checks check for tininess before roudning.

Architecture change draft:

https://openrisc.io/proposals/p18-fpu-tininess

libgcc/ChangeLog:

* config/or1k/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING):
Change to 0.

2 years agoHandle jobserver file descriptors in btest.
Martin Liska [Fri, 22 Oct 2021 08:12:56 +0000 (10:12 +0200)]
Handle jobserver file descriptors in btest.

PR testsuite/102742

libbacktrace/ChangeLog:

* btest.c (MIN_DESCRIPTOR): New.
(MAX_DESCRIPTOR): Likewise.
(check_available_files): Likewise.
(check_open_files): Check only file descriptors that
were not available at the entry.
(main): Call check_available_files.

2 years agoAdd testcase for PR fortran/94289
Sandra Loosemore [Fri, 22 Oct 2021 18:08:19 +0000 (11:08 -0700)]
Add testcase for PR fortran/94289

2021-10-22  José Rui Faustino de Sousa  <jrfsousa@gmail.com>
    Sandra Loosemore  <sandra@codesourcery.com>

gcc/testsuite/

PR fortran/94289
* gfortran.dg/PR94289.f90: New.

2 years agoAdd testcase for PR fortran/100906
Sandra Loosemore [Fri, 22 Oct 2021 02:17:50 +0000 (19:17 -0700)]
Add testcase for PR fortran/100906

2021-10-21  José Rui Faustino de Sousa  <jrfsousa@gmail.com>
    Sandra Loosemore  <sandra@codesourcery.com>

gcc/testsuite/

PR fortran/100906
* gfortran.dg/PR100906.f90: New.
* gfortran.dg/PR100906.c: New.

2 years agotree-optimization/102893 - properly DCE empty loops inside infinite loops
Richard Biener [Fri, 22 Oct 2021 10:45:32 +0000 (12:45 +0200)]
tree-optimization/102893 - properly DCE empty loops inside infinite loops

The following fixes the test for an exit edge I put in place for
the fix for PR45178 where I somehow misunderstood how the cyclic
list works.

2021-10-22  Richard Biener  <rguenther@suse.de>

PR tree-optimization/102893
* tree-ssa-dce.c (find_obviously_necessary_stmts): Fix the
test for an exit edge.

* gcc.dg/tree-ssa/ssa-dce-9.c: New testcase.

2 years agoDisregard incoming equivalences to a path when defining a new one.
Aldy Hernandez [Tue, 19 Oct 2021 18:57:49 +0000 (20:57 +0200)]
Disregard incoming equivalences to a path when defining a new one.

The equivalence oracle creates a new equiv set at each def point,
killing any incoming equivalences, however in the path sensitive
oracle we create brand new equivalences at each PHI:

   BB4:

   BB8:
      x_5 = PHI <y_8(4)>

Here we note that x_5 == y_8 at the end of the path.

The current code is intersecting this new equivalence with previously
known equivalences coming into the path.  This is incorrect, as this
is a new definition.  This patch kills any known equivalence before we
register a new one.

This hasn't caused problems so far, but upcoming changes to the
pipeline has us threading more aggressively and triggering corner
cases where this causes incorrect code.

I have tested this patch with the usual regstrap cycle.  I have also
hacked a compiler comparing the old and new behavior to see if we were
previously threading paths where the decision was made due to invalid
equivalences.  Luckily, there were no such paths, but there were 22
paths in a set of .ii files where disregarding incoming relations
allowed us to thread the path.  This is a miniscule improvement,
but we moved a handful of thredable paths earlier in the pipeline,
which is always good.

Tested on x86-64 Linux.

Co-authored-by: Andrew MacLeod <amacleod@redhat.com>
gcc/ChangeLog:

* gimple-range-path.cc (path_range_query::compute_phi_relations):
Kill any global relations we may know before registering a new
one.
* value-relation.cc (path_oracle::killing_def): New.
* value-relation.h (path_oracle::killing_def): New.

2 years agobootstrap/102681 - properly CSE PHIs with default def args
Richard Biener [Fri, 22 Oct 2021 08:32:36 +0000 (10:32 +0200)]
bootstrap/102681 - properly CSE PHIs with default def args

The PR shows that we fail to CSE PHIs containing (different)
default definitions due to the fact on how we now handle
on-demand build of VN_INFO.  The following fixes this in the
same way the PHI visitation code does.

On gcc.dg/ubsan/pr81981.c this causes one expected warning to be
elided since the uninit pass sees the change

   <bb 4> [local count: 1073741824]:
   # u$0_2 = PHI <u$0_5(D)(3), i_3(D)(5)>
-  # cstore_11 = PHI <t$0_6(D)(3), i_3(D)(5)>
   v = u$0_2;
-  return cstore_11;
+  return u$0_2;

and thus only one of the conditionally uninitialized uses (the
other became dead).  I have XFAILed the missing diagnostic,
I don't see a way to preserve that.

2021-10-22  Richard Biener  <rguenther@suse.de>

PR bootstrap/102681
* tree-ssa-sccvn.c (vn_phi_insert): For undefined SSA args
record VN_TOP.
(vn_phi_lookup): Likewise.

* gcc.dg/tree-ssa/ssa-fre-97.c: New testcase.
* gcc.dg/ubsan/pr81981.c: XFAIL one case.

2 years agoDaily bump.
GCC Administrator [Fri, 22 Oct 2021 00:16:31 +0000 (00:16 +0000)]
Daily bump.

2 years agolibstdc++: Improve generated man pages for libstdc++
Jonathan Wakely [Thu, 21 Oct 2021 11:26:18 +0000 (12:26 +0100)]
libstdc++: Improve generated man pages for libstdc++

The man pages generated by Doxygen show internal header files, not the
standard headers that users actually care about. The run_doxygen script
uses the doc/doxygen/stdheader.cc program to address that, but it
doesn't work. It only tries to fix headers with underscores in the
names, which doesn't work for <bits/align.h> or <bits/fsteam.tcc>.  It
isn't prepared for the strings like "bits/stl_set\&.h" that are produced
by Doxygen. It doesn't know about many headers that have been added
since it was written. And the run_doxygen script fails to use its output
correctly to modify the man pages. Additionally, run_doxygen doesn't
know about new nested namespaces like std::filesystem and std::ranges.

This change rewrites the stdheader.cc program to do a better job of
finding the right header. The run_doxygen script now uses the just-built
compiler to build stdheader.cc and actually uses its output. And the
script now knows about other nested namespaces.

The stdheader.cc program might be unnecessary if we consistently used
@headername tags in the Doxygen comments, but we don't (and probably
never will).

A problem that remains after this change is that all the free function
defined in namespace std get dumped into a single man page for std(3),
without detailed descriptions. We don't even install that std(3) page,
but remove it before installation. That means only classes are
documented in man pages (including many internal ones that should not be
publicly documented such as _Deque_base and _Tuple_impl).

libstdc++-v3/ChangeLog:

* doc/doxygen/stdheader.cc: Refactor. Use C++23. Add new
headers.
* scripts/run_doxygen: Fix post-processing of #include
directives in man pages. Use new xg++ to compile helper program.

2 years agolibstdc++: Add Doxygen comments to contents of <functional>
Jonathan Wakely [Thu, 21 Oct 2021 16:44:47 +0000 (17:44 +0100)]
libstdc++: Add Doxygen comments to contents of <functional>

libstdc++-v3/ChangeLog:

* include/bits/mofunc_impl.h: Add doxygen comments.
* include/std/functional: Likewise.

2 years agolibstdc++: Suppress Doxygen docs for more implementation details
Jonathan Wakely [Thu, 21 Oct 2021 16:43:34 +0000 (17:43 +0100)]
libstdc++: Suppress Doxygen docs for more implementation details

libstdc++-v3/ChangeLog:

* include/bits/alloc_traits.h: Suppress doxygen documentation.
* include/bits/allocated_ptr.h: Likewise.
* include/bits/enable_special_members.h: Likewise.
* include/bits/hashtable.h: Likewise.
* include/bits/hashtable_policy.h: Likewise.
* include/bits/uses_allocator.h: Likewise.
* include/bits/node_handle.h: Document node handles and suppress
documentation for protected members.
* include/std/any: Suppress documentation for implementation
details.

2 years agolibcody: Avoid double-free
Jonathan Wakely [Thu, 21 Oct 2021 13:17:43 +0000 (14:17 +0100)]
libcody: Avoid double-free

If the listen call fails then 'goto fail' will jump to that label and
use freeaddrinfo again. Set the pointer to null to prevent that.

libcody/ChangeLog:

* netserver.cc (ListenInet6): Set pointer to null after
deallocation.

2 years agox86: Document -fcf-protection requires i686 or newer
H.J. Lu [Thu, 21 Oct 2021 16:45:14 +0000 (09:45 -0700)]
x86: Document -fcf-protection requires i686 or newer

PR target/98667
* doc/invoke.texi: Document -fcf-protection requires i686 or
new.

2 years agotestsuite: Adjust pr22076.c to avoid compile-time optimization [PR102840]
Uros Bizjak [Thu, 21 Oct 2021 18:57:38 +0000 (20:57 +0200)]
testsuite: Adjust pr22076.c to avoid compile-time optimization [PR102840]

2021-10-21  Uroš Bizjak  <ubizjak@gmail.com>

PR testsuite/102840

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr22076.c: Adjust to avoid compile time optimization.

2 years agolibstdc++: missing constexpr for __[nm]iter_base [PR102358]
Patrick Palka [Thu, 21 Oct 2021 16:13:35 +0000 (12:13 -0400)]
libstdc++: missing constexpr for __[nm]iter_base [PR102358]

PR libstdc++/102358

libstdc++-v3/ChangeLog:

* include/bits/stl_iterator.h (__niter_base): Make constexpr
for C++20.
(__miter_base): Likewise.
* testsuite/25_algorithms/move/constexpr.cc: New test.

2 years agoFix again PR middle-end/102764
Eric Botcazou [Thu, 21 Oct 2021 15:57:55 +0000 (17:57 +0200)]
Fix again PR middle-end/102764

gcc/
PR middle-end/102764
* cfgexpand.c (expand_gimple_basic_block): Robustify latest change.

2 years agolibstdc++: Implement P2432R1 changes for views::istream
Patrick Palka [Thu, 21 Oct 2021 15:55:19 +0000 (11:55 -0400)]
libstdc++: Implement P2432R1 changes for views::istream

libstdc++-v3/ChangeLog:

* include/std/ranges (istream_view): Replace this function
template with an alias template as per P2432R1.
(wistream_view): Define as per P2432R1.
(views::_Istream, views::istream): Likewise.
* testsuite/std/ranges/istream_view.cc (test07): New test.

2 years agolibstdc++: Implement P1739R4 changes to views::take/drop/counted
Patrick Palka [Thu, 21 Oct 2021 15:55:16 +0000 (11:55 -0400)]
libstdc++: Implement P1739R4 changes to views::take/drop/counted

This implements P1739R4 along with the resolution for LWG 3407 which
corrects the paper's wording.

libstdc++-v3/ChangeLog:

* include/bits/ranges_util.h (views::_Drop): Forward declare.
(subrange): Befriend views::_Drop.
(subrange::_S_store_size): Declare constexpr instead of just
const, remove obsolete comment.
* include/std/ranges (views::__detail::__is_empty_view): Define.
(views::__detail::__is_basic_string_view): Likewise.
(views::__detail::__is_subrange): Likewise.
(views::__detail::__is_iota_view): Likewise.
(views::__detail::__can_take_view): Rename template parm _Tp to _Dp.
(views::_Take): Rename template parm _Tp to _Dp, make it non-deducible
and fix it to range_difference_t<_Range>.  Implement P1739R4 and
LWG 3407 changes.
(views::__detail::__can_drop_view): Rename template parm _Tp to _Dp.
(views::_Drop): As with views::_Take.
(views::_Counted): Implement P1739R4 changes.
* include/std/span (__detail::__is_std_span): Rename to ...
(__detail::__is_span): ... this and turn it into a variable
template.
(__detail::__is_std_array): Turn it into a variable template.
(span::span): Adjust uses of __is_std_span and __is_std_array
accordingly.
* testsuite/std/ranges/adaptors/p1739.cc: New test.

2 years agoaarch64: Remove redundant struct type definitions in arm_neon.h
Jonathan Wright [Fri, 15 Oct 2021 15:50:57 +0000 (16:50 +0100)]
aarch64: Remove redundant struct type definitions in arm_neon.h

These vector type definitions are an artifact from the initial commit
that added the AArch64 port.

gcc/ChangeLog:

2021-10-15  Jonathan Wright  <jonathan.wright@arm.com>

* config/aarch64/arm_neon.h (__STRUCTN): Delete function
macro and all invocations.

2 years agoAdjust testcase for 128/256 bit HF vector load/store
Hongyu Wang [Thu, 21 Oct 2021 13:29:50 +0000 (21:29 +0800)]
Adjust testcase for 128/256 bit HF vector load/store

The HF vector move have been updated to align with HI vector,
adjust according testcase for _Float16 vector load and store.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx512fp16-13.c: Adjust scan-assembler for
xmm/ymm load/store.

2 years agoSplit --param=evrp-mode into evrp-mode and ranger-debug.
Andrew MacLeod [Tue, 19 Oct 2021 18:09:51 +0000 (14:09 -0400)]
Split --param=evrp-mode into evrp-mode and ranger-debug.

With Ranger being used in more than EVRP, the debug output should no longer
be tied up with the EVRP mode flag.

* doc/invoke.texi (ranger-debug): Document.
* flag-types.h (enum ranger_debug): New.
(enum evrp_mode): Remove debug values.
* gimple-range-cache.cc (DEBUG_RANGE_CACHE): Use new debug flag.
* gimple-range-gori.cc (gori_compute::gori_compute): Ditto.
* gimple-range.cc (gimple_ranger::gimple_ranger): Ditto.
* gimple-ssa-evrp.c (hybrid_folder::choose_value): Ditto.
(execute_early_vrp): Use evrp-mode directly.
* params.opt (enum evrp_mode): Remove debug values.
(ranger-debug): New.
(ranger-logical-depth): Relocate to be in alphabetical order.

2 years agoAdd --param=vrp1-mode and --param=vrp2-mode.
Andrew MacLeod [Fri, 15 Oct 2021 16:06:27 +0000 (12:06 -0400)]
Add --param=vrp1-mode and --param=vrp2-mode.

Add 2 new params to select between VRP and RANGER to be used for each pass.

* doc/invoke.texi: (vrp1-mode, vrp2-mode): Document.
* flag-types.h: (enum vrp_mode): New.
* params.opt: (vrp1-mode, vrp2-mode): New.
* tree-vrp.c (vrp_pass_num): New.
(pass_vrp::pass_vrp): Set pass number.
(pass_vrp::execute): Choose which VRP mode to execute.

2 years agoMove ranger only VRP folder to tree-vrp.
Andrew MacLeod [Fri, 15 Oct 2021 16:26:13 +0000 (12:26 -0400)]
Move ranger only VRP folder to tree-vrp.

Consolidate the RVRP folder into a single "execute_vrp" routine that mimics
the format used by the vrp1 and vrp2 passes.  Relocate into the tree-vrp file.

* gimple-ssa-evrp.c (class rvrp_folder): Move to tree-vrp.c.
(execute_early_vrp): For ranger only mode, invoke ranger_vrp.
* tree-vrp.c (class rvrp_folder): Relocate here.
(execute_ranger_vrp): New.
* tree-vrp.h (execute_ranger_vrp): Export.

2 years agooptions: Fix variable tracking option processing.
Martin Liska [Thu, 14 Oct 2021 12:57:18 +0000 (14:57 +0200)]
options: Fix variable tracking option processing.

PR debug/102585
PR bootstrap/102766

gcc/ChangeLog:

* opts.c (finish_options): Process flag_var_tracking* options
here as they can be adjusted by optimize attribute.
Process also flag_syntax_only and flag_gtoggle.
* toplev.c (process_options): Remove it here.
* common.opt: Make debug_nonbind_markers_p as PerFunction
attribute as it depends on optimization level.

gcc/testsuite/ChangeLog:

* gcc.dg/pr102585.c: New test.

2 years agosra: Fix corner case of total scalarization with virtual inheritance (PR 102505)
Martin Jambor [Thu, 21 Oct 2021 12:26:45 +0000 (14:26 +0200)]
sra: Fix corner case of total scalarization with virtual inheritance (PR 102505)

PR 102505 is a situation where of SRA takes its initial top-level
access size from a get_ref_base_and_extent called on a COMPONENT_REF,
and thus derived frm the FIELD_DECL, which however does not include a
virtual base.  Total scalarization then goes on traversing the type,
which however has virtual base past the non-virtual bits, tricking SRA
to create sub-accesses outside of the supposedly encompassing
accesses, which in turn triggers the verifier within the pass.

The patch below fixes that by failing total scalarization when this
situation is detected.

gcc/ChangeLog:

2021-10-20  Martin Jambor  <mjambor@suse.cz>

PR tree-optimization/102505
* tree-sra.c (totally_scalarize_subtree): Check that the
encountered field fits within the acces we would like to put it
in.

gcc/testsuite/ChangeLog:

2021-10-20  Martin Jambor  <mjambor@suse.cz>

PR tree-optimization/102505
* g++.dg/torture/pr102505.C: New test.

2 years agoRevert the avoid threading circular paths commit.
Aldy Hernandez [Thu, 21 Oct 2021 11:18:49 +0000 (13:18 +0200)]
Revert the avoid threading circular paths commit.

I've tested this patch on the wrong tree, and picked up the test changes
in a pending patch, without which this patch is no longer obvious.
Plus, it causes a regression in an invalid test I've recommended we remove.

I'm reverting this patch until the dependencies are reviewed.

Sorry for the noise.

gcc/ChangeLog:

* tree-ssa-threadbackward.c
(back_threader::maybe_register_path): Remove circular paths check.

2 years agoMove the initial debug_hooks setting
Richard Biener [Thu, 21 Oct 2021 10:12:00 +0000 (12:12 +0200)]
Move the initial debug_hooks setting

I just realized that when I moved the langhook call I failed to
move the initial debug_hooks setting whose comment mentions the
langhook as reason.

2021-10-21  Richard Biener  <rguenther@suse.de>

* toplev.c (process_options): Move the initial debug_hooks
setting ...
(toplev::main): ... before the call of the post_options
langhook.

2 years agotree-optimization/102847 - adjust VMAT_INVARIANT load costing
Richard Biener [Thu, 21 Oct 2021 10:10:20 +0000 (12:10 +0200)]
tree-optimization/102847 - adjust VMAT_INVARIANT load costing

This adds the missing scalar load cost in the prologue.

2021-10-21  Richard Biener  <rguenther@suse.de>

PR tree-optimization/102847
* tree-vect-stmts.c (vect_model_load_cost): Add the scalar
load cost in the prologue for VMAT_INVARIANT.

2 years agotree-optimization/102847 - properly cost VMAT_INVARIANT loads
Richard Biener [Thu, 21 Oct 2021 08:24:03 +0000 (10:24 +0200)]
tree-optimization/102847 - properly cost VMAT_INVARIANT loads

The following adds proper costing of VMAT_INVARIANT loads, avoiding
to ask the target about the cost of an unsupported vector load cost
which we won't emit anyway.

2021-10-21  Richard Biener  <rguenther@suse.de>

PR tree-optimization/102847
* tree-vect-stmts.c (vect_model_load_cost): Explicitely
handle VMAT_INVARIANT as a splat in the prologue.

2 years agotestsuite: Fix up gfortran.dg/gomp/strictly*.f90 testcases
Jakub Jelinek [Thu, 21 Oct 2021 09:12:55 +0000 (11:12 +0200)]
testsuite: Fix up gfortran.dg/gomp/strictly*.f90 testcases

While these testcases are dg-do compile only, I think it is better not to
give users bad examples and avoid unnecessary data races in testcases (unless
it is exactly what we want to test).  Perhaps one day we'll do some analysis
and warn about data races...

2021-10-21  Jakub Jelinek  <jakub@redhat.com>

* gfortran.dg/gomp/strictly-structured-block-1.f90: Use call do_work
instead of x = x + 1 in places where the latter could be a data race.
* gfortran.dg/gomp/strictly-structured-block-2.f90: Likewise.
* gfortran.dg/gomp/strictly-structured-block-3.f90: Likewise.

2 years agoi386: Fix wrong codegen for V8HF move without TARGET_AVX512F
Hongyu Wang [Wed, 20 Oct 2021 05:13:39 +0000 (13:13 +0800)]
i386: Fix wrong codegen for V8HF move without TARGET_AVX512F

Since _Float16 type is enabled under sse2 target, returning
V8HFmode vector without AVX512F target would generate wrong
vmovdqa64 instruction. Adjust ix86_get_ssemov to avoid this.

gcc/ChangeLog:
PR target/102812
* config/i386/i386.c (ix86_get_ssemov): Adjust HFmode vector
move to use the same logic as HImode.

gcc/testsuite/ChangeLog:
PR target/102812
* gcc.target/i386/pr102812.c: New test.

2 years agoRemove restriction of SLP vectorizing internal function calls
Richard Biener [Thu, 21 Oct 2021 07:36:28 +0000 (09:36 +0200)]
Remove restriction of SLP vectorizing internal function calls

We already checked for unsupported internal throwing calls,
general nothrow is not required.

2021-10-21  Richard Biener  <rguenther@suse.de>

* tree-vect-slp.c (vect_build_slp_tree_1): Remove
superfluous gimple_call_nothrow_p check.

2 years agoopenmp: For default(none) ignore variables created by ubsan_create_data [PR64888]
Jakub Jelinek [Thu, 21 Oct 2021 08:27:44 +0000 (10:27 +0200)]
openmp: For default(none) ignore variables created by ubsan_create_data [PR64888]

We weren't ignoring the ubsan variables created by c-ubsan.c before gimplification
(others are added later).  One way to fix this would be to introduce further
UBSAN_ internal functions and lower it later (sanopt pass) like other ifns,
this patch instead recognizes those magic vars by name/name of type and DECL_ARTIFICIAL
and TYPE_ARTIFICIAL.

2021-10-21  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/64888
gcc/c-family/
* c-omp.c (c_omp_predefined_variable): Return true also for
ubsan_create_data created artificial variables.
gcc/testsuite/
* c-c++-common/ubsan/pr64888.c: New test.

2 years agoImprove maybe_remove_writeonly_store to do a simple DCE for defining statement
Andrew Pinski [Sat, 16 Oct 2021 04:14:57 +0000 (04:14 +0000)]
Improve maybe_remove_writeonly_store to do a simple DCE for defining statement

Instead of putting a full blow DCE after execute_fixup_cfg, it makes sense
to try to remove the defining statement for the store that is being removed.
Using simple_dce_from_worklist makes this easier, just mark the ssa_name on
the rhs side of the store (if it was one) in a bitmap and then call
simple_dce_from_worklist at the end.

gcc.dg/pr36902.c needed to be changed such that the static array was no
longer a static array but a global array.  This is because this new dce
will remove the load as it is dead. I also filed PR 102864 for the warning
on dead loads.

gcc/ChangeLog:

* tree-cfg.c (maybe_remove_writeonly_store): Add dce_ssa_names argument.
Mark the ssa-name of the rhs as one to be removed.
(execute_fixup_cfg): Update call to maybe_remove_writeonly_store.
Call simple_dce_from_worklist at the end to a simple dce.

gcc/testsuite/ChangeLog:

* gcc.dg/pr36902.c: Move buf to be a non-static variable.

2 years agoFactor out removal of write only stores from execute_fixup_cfg
Andrew Pinski [Sat, 16 Oct 2021 03:09:05 +0000 (03:09 +0000)]
Factor out removal of write only stores from execute_fixup_cfg

To make it easier to fix PR 102703, factoring this code out
to its own function makes it easier to read and less indentions
too.

gcc/ChangeLog:

* tree-cfg.c (maybe_remove_writeonly_store): New function
factored out from ...
(execute_fixup_cfg): Here. Call maybe_remove_writeonly_store.

2 years agoRemove outdated comment about execute_fixup_cfg
Andrew Pinski [Sat, 16 Oct 2021 02:48:06 +0000 (02:48 +0000)]
Remove outdated comment about execute_fixup_cfg

The comment about execute_fixup_cfg not being able to
run as a standalone pass is not true for a long time
now.  It has been a standalone pass for a while now.

gcc/ChangeLog:

* tree-cfg.c (execute_fixup_cfg): Remove comment
about standalone pass.

2 years agoAdd dump prints when execute_fixup_cfg removes a write only var store.
Andrew Pinski [Sat, 16 Oct 2021 02:30:55 +0000 (02:30 +0000)]
Add dump prints when execute_fixup_cfg removes a write only var store.

While debugging PR 102703, I found it was hard to figure out where
the store was being removed as there was no pass which was outputting
why the store was removed.
This adds to execute_fixup_cfg the output.
Also note most of removals happen when execute_fixup_cfg is called
from the inliner.

gcc/ChangeLog:

* tree-cfg.c (execute_fixup_cfg): Output when the statement
is removed when it is a write only var.

2 years agoAvoid threading circular paths.
Aldy Hernandez [Wed, 20 Oct 2021 16:52:45 +0000 (18:52 +0200)]
Avoid threading circular paths.

The backward threader keeps a hash of visited blocks to avoid crossing
the same block twice.  Interestingly, we haven't been checking it for
the final block out of the path.  This may be inherited from the old
code, as it was simple enough that it didn't matter.  With the
upcoming changes enabling the fully resolving threader, it gets
tripped often enough to cause wrong code to be generated.

Tested on x86-64 Linux.

gcc/ChangeLog:

* tree-ssa-threadbackward.c (back_threader::maybe_register_path):
Avoid threading circular paths.

2 years agotestsuite/102861 - adjust gcc.dg/vect/bb-slp-16.c change
Richard Biener [Thu, 21 Oct 2021 08:00:27 +0000 (10:00 +0200)]
testsuite/102861 - adjust gcc.dg/vect/bb-slp-16.c change

This reverts the bogus previous change causing runtime failures
and instead realizes that we now have the loop condition
if-converted and the BB vectorization opportunity realized during
the loop vectorization pass.

2021-10-21  Richard Biener  <rguenther@suse.de>

PR testsuite/102861
* gcc.dg/vect/bb-slp-16.c: Revert previous change, scan
the vect dump instead.

2 years agoopenmp: Fortran strictly-structured blocks support
Chung-Lin Tang [Thu, 21 Oct 2021 06:56:20 +0000 (14:56 +0800)]
openmp: Fortran strictly-structured blocks support

This implements strictly-structured blocks support for Fortran, as specified in
OpenMP 5.2. This now allows using a Fortran BLOCK construct as the body of most
OpenMP constructs, with a "!$omp end ..." ending directive optional for that
form.

gcc/fortran/ChangeLog:

* decl.c (gfc_match_end): Add COMP_OMP_STRICTLY_STRUCTURED_BLOCK case
together with COMP_BLOCK.
* parse.c (parse_omp_structured_block): Change return type to
'gfc_statement', add handling for strictly-structured block case, adjust
recursive calls to parse_omp_structured_block.
(parse_executable): Adjust calls to parse_omp_structured_block.
* parse.h (enum gfc_compile_state): Add
COMP_OMP_STRICTLY_STRUCTURED_BLOCK.
* trans-openmp.c (gfc_trans_omp_workshare): Add EXEC_BLOCK case
handling.

gcc/testsuite/ChangeLog:

* gfortran.dg/gomp/cancel-1.f90: Adjust testcase.
* gfortran.dg/gomp/nesting-3.f90: Adjust testcase.
* gfortran.dg/gomp/strictly-structured-block-1.f90: New test.
* gfortran.dg/gomp/strictly-structured-block-2.f90: New test.
* gfortran.dg/gomp/strictly-structured-block-3.f90: New test.

libgomp/ChangeLog:

* libgomp.texi (Support of strictly structured blocks in Fortran):
Adjust to 'Y'.
* testsuite/libgomp.fortran/task-reduction-16.f90: Adjust testcase.

2 years agoFortran: Fixes and additional tests for shape/ubound/size [PR94070]
Sandra Loosemore [Wed, 20 Oct 2021 04:11:15 +0000 (21:11 -0700)]
Fortran: Fixes and additional tests for shape/ubound/size [PR94070]

This patch reimplements the SHAPE intrinsic to be inlined similarly to
LBOUND and UBOUND, instead of as a library call, to avoid an
unnecessary array copy.  Various bugs are also fixed.

gcc/fortran/
PR fortran/94070

* expr.c (gfc_simplify_expr): Handle GFC_ISYM_SHAPE along with
GFC_ISYM_LBOUND and GFC_ISYM_UBOUND.
* trans-array.c (gfc_conv_ss_startstride): Likewise.
(set_loop_bounds): Likewise.
* trans-intrinsic.c (gfc_trans_intrinsic_bound): Extend to
handle SHAPE.  Correct logic for zero-size special cases and
detecting assumed-rank arrays associated with an assumed-size
argument.
(gfc_conv_intrinsic_shape): Deleted.
(gfc_conv_intrinsic_function): Handle GFC_ISYM_SHAPE like
GFC_ISYM_LBOUND and GFC_ISYM_UBOUND.
(gfc_add_intrinsic_ss_code): Likewise.
(gfc_walk_intrinsic_bound): Likewise.

gcc/testsuite/
PR fortran/94070

* gfortran.dg/c-interop/shape-bindc.f90: New test.
* gfortran.dg/c-interop/shape-poly.f90: New test.
* gfortran.dg/c-interop/size-bindc.f90: New test.
* gfortran.dg/c-interop/size-poly.f90: New test.
* gfortran.dg/c-interop/ubound-bindc.f90: New test.
* gfortran.dg/c-interop/ubound-poly.f90: New test.

2 years agolibstdc++: Implement LWG 3595 changes to common_iterator
Patrick Palka [Thu, 21 Oct 2021 01:43:42 +0000 (21:43 -0400)]
libstdc++: Implement LWG 3595 changes to common_iterator

libstdc++-v3/ChangeLog:

* include/bits/stl_iterator.h (common_iterator::__arrow_proxy):
Make fully constexpr as per LWG 3595.
(common_iterator::__postfix_proxy): Likewise.

2 years agolibstdc++: Implement LWG 3590-3592 changes to split_view/lazy_split_view
Patrick Palka [Thu, 21 Oct 2021 01:34:23 +0000 (21:34 -0400)]
libstdc++: Implement LWG 3590-3592 changes to split_view/lazy_split_view

libstdc++-v3/ChangeLog:

* include/std/ranges (lazy_split_view::base): Add forward_range
constraint as per LWG 3591.
(lazy_split_view::begin, lazy_split_view::end): Also check
simpleness of _Pattern as per LWG 3592.
(split_view::base): Relax copyable constraint as per LWG 3590.

2 years agolibstdc++: Implement LWG 3535 changes to ranges::join_view
Patrick Palka [Thu, 21 Oct 2021 01:34:21 +0000 (21:34 -0400)]
libstdc++: Implement LWG 3535 changes to ranges::join_view

libstdc++-v3/ChangeLog:

* include/std/ranges (join_view::__iter_cat::_S_iter_cat): Adjust
criteria for returning bidirectional_iterator_tag as per LWG 3535.
(join_view::_Iterator::_S_iter_concept): Likewise.

2 years agolibstdc++: Implement LWG 3481 change to ranges::viewable_range
Patrick Palka [Thu, 21 Oct 2021 01:34:18 +0000 (21:34 -0400)]
libstdc++: Implement LWG 3481 change to ranges::viewable_range

libstdc++-v3/ChangeLog:

* include/bits/ranges_base.h (viewable_range): Adjust as per
LWG 3481.
* testsuite/std/ranges/adaptors/all.cc (test07): New test.

2 years agolibstdc++: Remove constraints from std::optional monadic ops [PR102863]
Jonathan Wakely [Thu, 21 Oct 2021 00:19:45 +0000 (01:19 +0100)]
libstdc++: Remove constraints from std::optional monadic ops [PR102863]

The constraints on transform and and_then can cause errors when checking
satisfaction. The constraints that were present in R6 of the paper were
moved for he final F8 revision, and so should have been included in the
implementation.

libstdc++-v3/ChangeLog:

PR libstdc++/102863
* include/std/optional (optional::and_then, optional::transform):
Remove requires-clause.
* testsuite/20_util/optional/monadic/and_then.cc: Check
overload resolution doesn't cause errors.
* testsuite/20_util/optional/monadic/transform.cc: Likewise.

2 years agoDaily bump.
GCC Administrator [Thu, 21 Oct 2021 00:16:29 +0000 (00:16 +0000)]
Daily bump.

2 years agoc++: tweak parsing of invalid types
Jason Merrill [Mon, 18 Oct 2021 20:12:15 +0000 (16:12 -0400)]
c++: tweak parsing of invalid types

cp_parser_parse_and_diagnose_invalid_type_name is called during declaration
parsing, so it should pass 'true' for the declarator_p argument.  But that
caused a diagnostic regression on template/pr84789.C due to undesired lookup
in dependent scopes.  To fix that, cp_parser_nested_name_specifier_opt needs
to respect the value of check_dependency_p.

This patch avoids a regression from Andrew Sharp's WIP patch for PR70417.

It would make more sense to test only check_dependency_p, not declarator_p,
but removing the declarator_p condition turns out to reveal complicated
interactions of cp_parser_constructor_declarator_p and caching of
nested-name-specifiers and template-ids that I've already spent too much
time trying to sort out.

gcc/cp/ChangeLog:

* parser.c (cp_parser_parse_and_diagnose_invalid_type_name):
Pass true for declarator_p.
(cp_parser_nested_name_specifier_opt): Only look through
TYPENAME_TYPE if check_dependency_p is false.

2 years agocalls.c: Remove some dead code and target hooks
Alex Coplan [Wed, 20 Oct 2021 20:02:52 +0000 (21:02 +0100)]
calls.c: Remove some dead code and target hooks

Looking at calls.c:initialize_argument_information, I spotted some dead
code that seems to have been left behind from when MPX support was
removed.

This change removes that code as well as the associated target hooks
(which appear to be unused).

gcc/ChangeLog:

* calls.c (initialize_argument_information): Remove some dead
code, remove handling for function_arg returning const_int.
* doc/tm.texi: Delete documentation for unused target hooks.
* doc/tm.texi.in: Likewise.
* target.def (load_bounds_for_arg): Delete.
(store_bounds_for_arg): Delete.
(load_returned_bounds): Delete.
(store_returned_bounds): Delete.
* targhooks.c (default_load_bounds_for_arg): Delete.
(default_store_bounds_for_arg): Delete.
(default_load_returned_bounds): Delete.
(default_store_returned_bounds): Delete.
* targhooks.h (default_load_bounds_for_arg): Delete.
(default_store_bounds_for_arg): Delete.
(default_load_returned_bounds): Delete.
(default_store_returned_bounds): Delete.

2 years agolibstdc++: Add missing test for std::optional::transform(F&&)
Jonathan Wakely [Wed, 20 Oct 2021 19:12:28 +0000 (20:12 +0100)]
libstdc++: Add missing test for std::optional::transform(F&&)

The test_copy_elision() function was supposed to ensure that the result
is constructed directly in the std::optional, without early temporary
materialization. But I forgot to write the test.

libstdc++-v3/ChangeLog:

* testsuite/20_util/optional/monadic/transform.cc: Check that
an rvalue result is not materialized too soon.

2 years agodoc: Fix documentation around 'asm' keyword in C++
Jonathan Wakely [Wed, 20 Oct 2021 18:41:49 +0000 (19:41 +0100)]
doc: Fix documentation around 'asm' keyword in C++

The documentation on asm statements suggests asm is always a GNU
extension, but it's been part of ISO C++ since the first standard.

The documentation of -fno-asm is wrong for C++ as it states that it only
affects typeof, but actually it affects typeof and asm (despite asm
being part of ISO C++).

gcc/ChangeLog:

* doc/extend.texi (Basic Asm): Clarify that asm is not an
extension in C++.
* doc/invoke.texi (-fno-asm): Fix description for C++.

2 years agodoc: Remove broken link to old.html docs
Jonathan Wakely [Wed, 20 Oct 2021 18:39:15 +0000 (19:39 +0100)]
doc: Remove broken link to old.html docs

The target of this link was removed in r12-1061.

gcc/ChangeLog:

* doc/install.texi: Remove link to old.html

2 years agoAArch64: Combine cmeq 0 + not into cmtst
Tamar Christina [Wed, 20 Oct 2021 16:11:52 +0000 (17:11 +0100)]
AArch64: Combine cmeq 0 + not into cmtst

This turns a bitwise inverse of an equality comparison with 0 into a compare of
bitwise nonzero (cmtst).

We already have one pattern for cmsts, this adds an additional one which does
not require an additional bitwise and.

i.e.

#include <arm_neon.h>

uint8x8_t bar(int16x8_t abs_row0, int16x8_t row0) {
  uint16x8_t row0_diff =
    vreinterpretq_u16_s16(veorq_s16(abs_row0, vshrq_n_s16(row0, 15)));
  uint8x8_t abs_row0_gt0 =
    vmovn_u16(vcgtq_u16(vreinterpretq_u16_s16(abs_row0), vdupq_n_u16(0)));
  return abs_row0_gt0;
}

now generates:

bar:
        cmtst   v0.8h, v0.8h, v0.8h
        xtn     v0.8b, v0.8h
        ret

instead of:

bar:
        cmeq    v0.8h, v0.8h, #0
        not     v0.16b, v0.16b
        xtn     v0.8b, v0.8h
        ret

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md (*aarch64_cmtst_same_<mode>): New.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/mvn-cmeq0-1.c: New test.

2 years agoAArch64: Add pattern xtn+xtn2 to uzp1
Tamar Christina [Wed, 20 Oct 2021 16:10:25 +0000 (17:10 +0100)]
AArch64: Add pattern xtn+xtn2 to uzp1

This turns truncate operations with a hi/lo pair into a single permute of half
the bit size of the input and just ignoring the top bits (which are truncated
out).

i.e.

void d2 (short * restrict a, int *b, int n)
{
    for (int i = 0; i < n; i++)
      a[i] = b[i];
}

now generates:

.L4:
        ldp     q0, q1, [x3]
        add     x3, x3, 32
        uzp1    v0.8h, v0.8h, v1.8h
        str     q0, [x5], 16
        cmp     x4, x3
        bne     .L4

instead of

.L4:
        ldp     q0, q1, [x3]
        add     x3, x3, 32
        xtn     v0.4h, v0.4s
        xtn2    v0.8h, v1.4s
        str     q0, [x5], 16
        cmp     x4, x3
        bne     .L4

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md (*aarch64_narrow_trunc<mode>): New.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/narrow_high_combine.c: Update case.
* gcc.target/aarch64/xtn-combine-1.c: New test.
* gcc.target/aarch64/xtn-combine-2.c: New test.
* gcc.target/aarch64/xtn-combine-3.c: New test.
* gcc.target/aarch64/xtn-combine-4.c: New test.
* gcc.target/aarch64/xtn-combine-5.c: New test.
* gcc.target/aarch64/xtn-combine-6.c: New test.

2 years agoAArch64: Add pattern for sshr to cmlt
Tamar Christina [Wed, 20 Oct 2021 16:09:00 +0000 (17:09 +0100)]
AArch64: Add pattern for sshr to cmlt

This optimizes signed right shift by BITSIZE-1 into a cmlt operation which is
more optimal because generally compares have a higher throughput than shifts.

On AArch64 the result of the shift would have been either -1 or 0 which is the
results of the compare.

i.e.

void e (int * restrict a, int *b, int n)
{
    for (int i = 0; i < n; i++)
      b[i] = a[i] >> 31;
}

now generates:

.L4:
        ldr     q0, [x0, x3]
        cmlt    v0.4s, v0.4s, #0
        str     q0, [x1, x3]
        add     x3, x3, 16
        cmp     x4, x3
        bne     .L4

instead of:

.L4:
        ldr     q0, [x0, x3]
        sshr    v0.4s, v0.4s, 31
        str     q0, [x1, x3]
        add     x3, x3, 16
        cmp     x4, x3
        bne     .L4

Thanks,
Tamar

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md (aarch64_simd_ashr<mode>): Add case cmp
case.
* config/aarch64/constraints.md (D1): New.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/shl-combine-2.c: New test.
* gcc.target/aarch64/shl-combine-3.c: New test.
* gcc.target/aarch64/shl-combine-4.c: New test.
* gcc.target/aarch64/shl-combine-5.c: New test.

2 years agoAArch64: Add combine patterns for narrowing shift of half top bits (shuffle)
Tamar Christina [Wed, 20 Oct 2021 16:07:54 +0000 (17:07 +0100)]
AArch64: Add combine patterns for narrowing shift of half top bits (shuffle)

When doing a (narrowing) right shift by half the width of the original type then
we are essentially shuffling the top bits from the first number down.

If we have a hi/lo pair we can just use a single shuffle instead of needing two
shifts.

i.e.

typedef short int16_t;
typedef unsigned short uint16_t;

void foo (uint16_t * restrict a, int16_t * restrict d, int n)
{
    for( int i = 0; i < n; i++ )
      d[i] = (a[i] * a[i]) >> 16;
}

now generates:

.L4:
        ldr     q0, [x0, x3]
        umull   v1.4s, v0.4h, v0.4h
        umull2  v0.4s, v0.8h, v0.8h
        uzp2    v0.8h, v1.8h, v0.8h
        str     q0, [x1, x3]
        add     x3, x3, 16
        cmp     x4, x3
        bne     .L4

instead of

.L4:
        ldr     q0, [x0, x3]
        umull   v1.4s, v0.4h, v0.4h
        umull2  v0.4s, v0.8h, v0.8h
        sshr    v1.4s, v1.4s, 16
        sshr    v0.4s, v0.4s, 16
        xtn     v1.4h, v1.4s
        xtn2    v1.8h, v0.4s
        str     q1, [x1, x3]
        add     x3, x3, 16
        cmp     x4, x3
        bne     .L4

Thanks,
Tamar

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md
(*aarch64_<srn_op>topbits_shuffle<mode>_le): New.
(*aarch64_topbits_shuffle<mode>_le): New.
(*aarch64_<srn_op>topbits_shuffle<mode>_be): New.
(*aarch64_topbits_shuffle<mode>_be): New.
* config/aarch64/predicates.md
(aarch64_simd_shift_imm_vec_exact_top): New.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/shrn-combine-10.c: New test.
* gcc.target/aarch64/shrn-combine-5.c: New test.
* gcc.target/aarch64/shrn-combine-6.c: New test.
* gcc.target/aarch64/shrn-combine-7.c: New test.
* gcc.target/aarch64/shrn-combine-8.c: New test.
* gcc.target/aarch64/shrn-combine-9.c: New test.

2 years agoaarch64: Add combine patterns for right shift and narrow
Tamar Christina [Wed, 20 Oct 2021 16:06:31 +0000 (17:06 +0100)]
aarch64: Add combine patterns for right shift and narrow

This adds a simple pattern for combining right shifts and narrows into
shifted narrows.

i.e.

typedef short int16_t;
typedef unsigned short uint16_t;

void foo (uint16_t * restrict a, int16_t * restrict d, int n)
{
    for( int i = 0; i < n; i++ )
      d[i] = (a[i] * a[i]) >> 10;
}

now generates:

.L4:
        ldr     q0, [x0, x3]
        umull   v1.4s, v0.4h, v0.4h
        umull2  v0.4s, v0.8h, v0.8h
        shrn    v1.4h, v1.4s, 10
        shrn2   v1.8h, v0.4s, 10
        str     q1, [x1, x3]
        add     x3, x3, 16
        cmp     x4, x3
        bne     .L4

instead of:

.L4:
        ldr     q0, [x0, x3]
        umull   v1.4s, v0.4h, v0.4h
        umull2  v0.4s, v0.8h, v0.8h
        sshr    v1.4s, v1.4s, 10
        sshr    v0.4s, v0.4s, 10
        xtn     v1.4h, v1.4s
        xtn2    v1.8h, v0.4s
        str     q1, [x1, x3]
        add     x3, x3, 16
        cmp     x4, x3
        bne     .L4

Thanks,
Tamar

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>_vect,
*aarch64_<srn_op>shrn<mode>2_vect_le,
*aarch64_<srn_op>shrn<mode>2_vect_be): New.
* config/aarch64/iterators.md (srn_op): New.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/shrn-combine-1.c: New test.
* gcc.target/aarch64/shrn-combine-2.c: New test.
* gcc.target/aarch64/shrn-combine-3.c: New test.
* gcc.target/aarch64/shrn-combine-4.c: New test.

2 years agoopenmp: in_reduction support for Fortran
Chung-Lin Tang [Wed, 20 Oct 2021 15:25:02 +0000 (23:25 +0800)]
openmp: in_reduction support for Fortran

This patch implements support for the in_reduction clause for Fortran.
It also includes more completion of the taskgroup construct inside the
Fortran front-end, thus allowing task_reduction to work for task and
target constructs.

gcc/fortran/ChangeLog:

* openmp.c (gfc_match_omp_clause_reduction): Add 'openmp_target' default
false parameter. Add 'always,tofrom' map for OMP_LIST_IN_REDUCTION case.
(gfc_match_omp_clauses): Add 'openmp_target' default false parameter,
adjust call to gfc_match_omp_clause_reduction.
(match_omp): Adjust call to gfc_match_omp_clauses
* trans-openmp.c (gfc_trans_omp_taskgroup): Add call to
gfc_match_omp_clause, create and return block.

gcc/ChangeLog:

* omp-low.c (omp_copy_decl_2): For !ctx, use record_vars to add new copy
as local variable.
(scan_sharing_clauses): Place copy of OMP_CLAUSE_IN_REDUCTION decl in
ctx->outer instead of ctx.

gcc/testsuite/ChangeLog:

* gfortran.dg/gomp/reduction4.f90: Adjust omp target in_reduction' scan
pattern.

libgomp/ChangeLog:

* testsuite/libgomp.fortran/target-in-reduction-1.f90: New test.
* testsuite/libgomp.fortran/target-in-reduction-2.f90: New test.

2 years agolibffi: Update ChangeLog.libffi for libffi 3.4.2
H.J. Lu [Wed, 20 Oct 2021 12:46:15 +0000 (05:46 -0700)]
libffi: Update ChangeLog.libffi for libffi 3.4.2

* ChangeLog.libffi: Copied from ChangeLog.old in libffi 3.4.2.

2 years agoRevert "target: support spaces in target attribute."
Martin Liska [Wed, 20 Oct 2021 12:49:35 +0000 (14:49 +0200)]
Revert "target: support spaces in target attribute."

This reverts commit df592811f950301ed3b10a08e476dad0f2eff26a.

2 years agoRevert "target: Support whitespaces in target attr/pragma."
Martin Liska [Wed, 20 Oct 2021 12:49:12 +0000 (14:49 +0200)]
Revert "target: Support whitespaces in target attr/pragma."

This reverts commit 6b34f5c5ec75823d656b6882f12d46248402a2aa.

2 years agolibffi: Add LOCAL_PATCHES
H.J. Lu [Mon, 30 Aug 2021 23:25:58 +0000 (16:25 -0700)]
libffi: Add LOCAL_PATCHES

* LOCAL_PATCHES: New file.

2 years agoAArch64: Tune case-values-threshold
Wilco Dijkstra [Wed, 20 Oct 2021 12:16:54 +0000 (13:16 +0100)]
AArch64: Tune case-values-threshold

Tune the case-values-threshold setting for modern cores.  A value of 11 improves
SPECINT2017 by 0.2% and reduces codesize by 0.04%.  With -Os use value 8 which
reduces codesize by 0.07%.

2021-10-18  Wilco Dijkstra  <wdijkstr@arm.com>

gcc/
* config/aarch64/aarch64.c (aarch64_case_values_threshold):
Change to 8 with -Os, 11 otherwise.

2 years agoAArch64: Enable fast shifts on Neoverse V1/N2
Wilco Dijkstra [Wed, 20 Oct 2021 12:12:32 +0000 (13:12 +0100)]
AArch64: Enable fast shifts on Neoverse V1/N2

Enable the fast shift feature in Neoverse V1 and N2 tunings as well.

2021-10-20  Wilco Dijkstra  <wdijkstr@arm.com>

gcc/
* config/aarch64/aarch64.c (neoversev1_tunings):
Enable AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND.
(neoversen2_tunings): Likewise.

2 years agoAArch64: Add support for __builtin_roundeven[f] (PR100966)
Wilco Dijkstra [Wed, 20 Oct 2021 12:09:30 +0000 (13:09 +0100)]
AArch64: Add support for __builtin_roundeven[f] (PR100966)

Enable __builtin_roundeven[f] by changing existing frintn to roundeven.

2021-10-20  Wilco Dijkstra  <wdijkstr@arm.com>

gcc/
PR target/100966
* config/aarch64/aarch64.md (frint_pattern): Update comment.
* config/aarch64/aarch64-simd-builtins.def: Change frintn to roundeven.
* config/aarch64/arm_fp16.h: Change frintn to roundeven.
* config/aarch64/arm_neon.h: Likewise.
* config/aarch64/iterators.md (frint_pattern): Use roundeven for FRINTN.

gcc/testsuite/
PR target/100966
* gcc.target/aarch64/frint.x: Add roundeven tests.
* gcc.target/aarch64/frint_double.c: Likewise.
* gcc.target/aarch64/frint_float.c: Likewise.

2 years agolibffi: Integrate testsuite with GCC testsuite
H.J. Lu [Mon, 30 Aug 2021 21:31:46 +0000 (14:31 -0700)]
libffi: Integrate testsuite with GCC testsuite

* testsuite/lib/libffi.exp (load_gcc_lib): Load library from GCC
testsuite.
Load target-supports.exp and target-supports-dg.exp.
(libffi-init): Use libraries in GCC build tree.
(libffi_target_compile): Link with -shared-libgcc -lstdc++ for
C++ sources.

2 years agolibffi: Integrate build with GCC
H.J. Lu [Mon, 30 Aug 2021 21:31:19 +0000 (14:31 -0700)]
libffi: Integrate build with GCC

1. Integrate with GCC build.
2. Disable static trampolines by default.
3. Support multilib.

* Makefile.am (AUTOMAKE_OPTIONS): Add info-in-builddir.
(ACLOCAL_AMFLAGS): Set to -I .. -I ../config.
(SUBDIRS): Don't add doc.
(TEXINFO_TEX): New.
(MAKEINFOFLAGS): Likewise.
(info_TEXINFOS): Likewise.
(STAMP_GENINSRC): Likewise.
(STAMP_BUILD_INFO): Likewise.
(all-local): Likewise.
(stamp-geninsrc): Likewise.
(doc/libffi.info): Likewise.
(stamp-build-info:): Likewise.
(CLEANFILES): Likewise.
(MAINTAINERCLEANFILES): Likewise.
(AM_MAKEFLAGS): Likewise.
(all-recursive): Likewise.
(install-recursive): Likewise.
(mostlyclean-recursive): Likewise.
(clean-recursive): Likewise.
(distclean-recursive): Likewise.
(maintainer-clean-recursive): Likewise.
(LTLDFLAGS): Replace libtool-ldflags with ../libtool-ldflags.
(AM_CFLAGS): Add -g -fexceptions.
(libffi.map-sun): Replace make_sunver.pl with
../contrib/make_sunver.pl.
(dist-hook): Removed.
Include $(top_srcdir)/../multilib.am.
* configure.ac: Add AM_ENABLE_MULTILIB.
Remove the frv*-elf check.
(AX_ENABLE_BUILDDIR): Removed.
(AM_INIT_AUTOMAKE): Add [no-dist].
Add --enable-generated-files-in-srcdir.
(C_CONFIG_MACRO_DIR): Removed.
(AX_COMPILER_VENDOR): Likewise.
(AX_CC_MAXOPT): Likewise.
(AX_CFLAGS_WARN_ALL): Likewise.
Remove the GCC check.
(SYMBOL_UNDERSCORE): Removed.
(AX_CHECK_COMPILE_FLAG): Likewise.
Remove --disable-docs.
(ACX_CHECK_PROG_VER): Check makeinfo.
(BUILD_DOCS): Updated.
(exec-static-tramp): Don't enable use of static exec trampolines
by default.
Remove --disable-multi-os-directory.
(GCC_WITH_TOOLEXECLIBDIR): New.
Support cross host.
Support --enable-multilib.
* include/Makefile.am (nodist_include_HEADERS): Removed.
(gcc_version): New.
(toollibffidir): Likewise.
(toollibffi_HEADERS): Likewise.
* Makefile.in: Regenerate.
(GCC_BASE_VER): New.
(AC_CONFIG_FILES): Remove doc/Makefile.
(AC_CONFIG_LINKS): New.
* aclocal.m4: Likewise.
* configure: Likewise.
* fficonfig.h.in: Likewise.
* mdate-sh: Likewise.
* include/Makefile.in: Likewise.
* man/Makefile.in: Likewise.
* testsuite/Makefile.in: Likewise.

2 years agolibffi: Sync with libffi 3.4.2
H.J. Lu [Tue, 31 Aug 2021 14:14:47 +0000 (07:14 -0700)]
libffi: Sync with libffi 3.4.2

Merged commit: f9ea41683444ebe11cfa45b05223899764df28fb

2 years agolibffi: Add HOWTO_MERGE, autogen.sh and merge.sh
H.J. Lu [Mon, 30 Aug 2021 21:36:52 +0000 (14:36 -0700)]
libffi: Add HOWTO_MERGE, autogen.sh and merge.sh

Add scripts for syncing with libffi upstream:

1. Clone libffi repo.
2. Checkout the specific commit.
3. Remove the unused files.
4. Add new files and remove old files if needed.

* HOWTO_MERGE: New file.
* autogen.sh: Likewise.
* merge.sh: Likewise.

2 years agoRename asm_out_file function arguments.
Martin Liska [Wed, 15 Sep 2021 13:49:02 +0000 (15:49 +0200)]
Rename asm_out_file function arguments.

As preparation for a new global object that will encapsulate
asm_out_file, we would need to live with a macro that will
define asm_out_file as casm->out_file and thus the name
can't be used in function arguments.

gcc/ChangeLog:

* config/arm/arm.c (arm_unwind_emit_sequence): Do not declare
already declared global variable.
(arm_unwind_emit_set): Use out_file as function argument.
(arm_unwind_emit): Likewise.
* config/darwin.c (machopic_output_data_section_indirection): Likewise.
(machopic_output_stub_indirection): Likewise.
(machopic_output_indirection): Likewise.
(machopic_finish): Likewise.
* config/i386/i386.c (ix86_asm_output_function_label): Likewise.
* config/i386/winnt.c (i386_pe_seh_unwind_emit): Likewise.
* config/ia64/ia64.c (process_epilogue): Likewise.
(process_cfa_adjust_cfa): Likewise.
(process_cfa_register): Likewise.
(process_cfa_offset): Likewise.
(ia64_asm_unwind_emit): Likewise.
* config/s390/s390.c (s390_asm_output_function_label): Likewise.

2 years agogcc-changelog: Add libffi/ to ignored_prefixes
H.J. Lu [Tue, 19 Oct 2021 23:19:44 +0000 (16:19 -0700)]
gcc-changelog: Add libffi/ to ignored_prefixes

Add libffi/ to ignored_prefixes for syncing with libffi upstream:

commit c095f8f2e6f26bfc2ff8e3276c6af23ab153f5ff
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Tue Aug 31 07:14:47 2021 -0700

    libffi: Sync with libffi 3.4.2

    Merged commit: f9ea41683444ebe11cfa45b05223899764df28fb

to avoid

remote: *** The following commit was rejected by your hooks.commit-extra-checker script (status: 1)
remote: *** commit: c095f8f2e6f26bfc2ff8e3276c6af23ab153f5ff
remote: *** ChangeLog format failed:
remote: *** ERR: cannot find a ChangeLog location in message
remote: ***
remote: *** Please see: https://gcc.gnu.org/codingconventions.html#ChangeLogs
remote: ***
remote: error: hook declined to update refs/heads/master

* gcc-changelog/git_commit.py (ignored_prefixes): Add libffi/.

2 years ago[Patch][GCC][AArch64] - Lower store and load neon builtins to gimple
Andre Simoes Dias Vieira [Wed, 20 Oct 2021 12:19:10 +0000 (13:19 +0100)]
[Patch][GCC][AArch64] - Lower store and load neon builtins to gimple

20-10-2021  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Jirui Wu  <jirui.wu@arm.com>
gcc/ChangeLog:

* config/aarch64/aarch64-builtins.c
(aarch64_general_gimple_fold_builtin):
lower vld1 and vst1 variants of the neon builtins
* config/aarch64/aarch64-protos.h:
(aarch64_general_gimple_fold_builtin): Add gsi parameter.
* config/aarch64/aarch64.c (aarch64_general_gimple_fold_builtin):
Likwise.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/fmla_intrinsic_1.c: prevent over optimization.
* gcc.target/aarch64/fmls_intrinsic_1.c: Likewise.
* gcc.target/aarch64/fmul_intrinsic_1.c: Likewise.
* gcc.target/aarch64/mla_intrinsic_1.c: Likewise.
* gcc.target/aarch64/mls_intrinsic_1.c: Likewise.
* gcc.target/aarch64/mul_intrinsic_1.c: Likewise.
* gcc.target/aarch64/simd/vmul_elem_1.c: Likewise.
* gcc.target/aarch64/vclz.c: Likewise.
* gcc.target/aarch64/vneg_s.c: Likewise.

2 years ago[Patch][GCC][middle-end] - Generate FRINTZ for (double)(int) under -ffast-math on...
Andre Simoes Dias Vieira [Wed, 20 Oct 2021 12:12:09 +0000 (13:12 +0100)]
[Patch][GCC][middle-end] - Generate FRINTZ for (double)(int) under -ffast-math on aarch64

20-10-2021  Andre Vieira  <andre.simoesdiasvieira@arm.com>
    Jirui Wu  <jirui.wu@arm.com>
gcc/ChangeLog:

* match.pd: Generate IFN_TRUNC.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/merge_trunc1.c: New test.

2 years agotree-optimization/102853 - avoid trapping types in split_constant_offset
Richard Biener [Wed, 20 Oct 2021 10:54:59 +0000 (12:54 +0200)]
tree-optimization/102853 - avoid trapping types in split_constant_offset

This avoids running into the assert in compute_distributive_range when
starting the analysis with operations in a trapping type.

2021-10-20  Richard Biener  <rguenther@suse.de>

PR tree-optimization/102853
* tree-data-ref.c (split_constant_offset_1): Bail out
immediately if the expression traps on overflow.

2 years agoRemove unused back_threader destructor.
Aldy Hernandez [Wed, 20 Oct 2021 05:15:17 +0000 (07:15 +0200)]
Remove unused back_threader destructor.

Tested on x86-64 Linux.

gcc/ChangeLog:

* tree-ssa-threadbackward.c (back_threader::~back_threader): Remove.

2 years agoRemove superflous debugging messages from the threading registry.
Aldy Hernandez [Tue, 19 Oct 2021 08:26:47 +0000 (10:26 +0200)]
Remove superflous debugging messages from the threading registry.

These are some random obvious cleanups to the threading dumps, since
it seems I'm not the only one looking at dumps these days.

The "just threaded" debugging message is redundant since there's
already an equivalent "Registering jump thread" message.

The "about to thread" message is actually confusing, because the source
block doesn't match the IL, since the CFG update is mid-flight.

Tested on x86-64 Linux.

gcc/ChangeLog:

* tree-ssa-threadupdate.c (back_jt_path_registry::adjust_paths_after_duplication):
Remove superflous debugging message.
(back_jt_path_registry::duplicate_thread_path): Same.

2 years ago[Ada] Remove unnecessary call to No_Uint_To_0
Bob Duff [Sat, 16 Oct 2021 19:30:45 +0000 (15:30 -0400)]
[Ada] Remove unnecessary call to No_Uint_To_0

gcc/ada/

* gcc-interface/decl.c (gnat_to_gnu_entity): Remove unnecessary
call to No_Uint_To_0.

2 years ago[Ada] Never treat intrinsic subprograms as nested
Richard Kenner [Thu, 14 Oct 2021 19:31:38 +0000 (15:31 -0400)]
[Ada] Never treat intrinsic subprograms as nested

gcc/ada/

* exp_unst.adb (Visit_Node, when N_Subprogram_Call): Never treat
instrinsic subprograms as nested.

2 years ago[Ada] Proof of the runtime support for attribute 'Width
Yannick Moy [Mon, 30 Aug 2021 14:33:00 +0000 (16:33 +0200)]
[Ada] Proof of the runtime support for attribute 'Width

gcc/ada/

* libgnat/s-widlllu.ads: Mark in SPARK.
* libgnat/s-widllu.ads: Likewise.
* libgnat/s-widuns.ads: Likewise.
* libgnat/s-widthu.adb: Add ghost code and a
pseudo-postcondition.