Adam Nemet [Sat, 27 May 2017 04:05:52 +0000 (04:05 +0000)]
Rearrange Dom unittest to accommodate multiple tests
I've taken the approach from the LoopInfo test:
* Rather than running in the pass manager just build the analyses manually
* Split out the common parts (makeLLVMModule, runWithDomTree) into helpers
Differential Revision: https://reviews.llvm.org/D33617
llvm-svn: 304061
Adam Nemet [Sat, 27 May 2017 04:05:50 +0000 (04:05 +0000)]
clang-format DomTree unittest
llvm-svn: 304060
Matthias Braun [Sat, 27 May 2017 03:38:02 +0000 (03:38 +0000)]
AArch64/PEI: Do not add reserved regs to liveins
We do not track liveness for reserved registers. It is unnecessary to
add them to block livein lists.
llvm-svn: 304059
Keno Fischer [Sat, 27 May 2017 03:22:55 +0000 (03:22 +0000)]
[SCEVExpander] Try harder to avoid introducing inttoptr
Summary:
This fixes introduction of an incorrect inttoptr/ptrtoint pair in
the included test case which makes use of non-integral pointers. I
suspect there are more cases like this left, but this takes care of
the one I was seeing at the moment.
Reviewers: sanjoy
Subscribers: mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D33129
llvm-svn: 304058
Eric Fiselier [Sat, 27 May 2017 03:04:51 +0000 (03:04 +0000)]
Revert "[coroutines] Support "coroutines" feature in module map requires clause"
This reverts commit r304054.
llvm-svn: 304057
George Rokos [Sat, 27 May 2017 03:03:13 +0000 (03:03 +0000)]
[OpenMP] Create COMDAT group for OpenMP offload registration code to avoid multiple copies
Thanks to Sergey Dmitriev for submitting the patch.
Differential Revision: https://reviews.llvm.org/D33509
llvm-svn: 304056
Matthias Braun [Sat, 27 May 2017 02:50:50 +0000 (02:50 +0000)]
ScheduleDAGInstrs: Fix fixupKills()
Rewrite fixupKills() to use the LivePhysRegs class. Simplifies the code
and fixes a bug where the CSR registers in return blocks where missed
leading to invalid kill flags. Also remove the unnecessary rule that we
wouldn't set kill flags on tied operands.
No tests as I have an upcoming commit improving MachineVerifier checks
to catch these cases in multiple existing lit tests.
llvm-svn: 304055
Eric Fiselier [Sat, 27 May 2017 02:46:17 +0000 (02:46 +0000)]
[coroutines] Support "coroutines" feature in module map requires clause
Summary: In order for libc++ to add `<experimental/coroutine>` to its module map, there has to be a feature that can be used to detect if coroutines support is enabled in Clang.
Reviewers: rsmith
Reviewed By: rsmith
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D33538
llvm-svn: 304054
Erik Pilkington [Sat, 27 May 2017 01:48:34 +0000 (01:48 +0000)]
[Demangler] copy changes made in libcxxabi's r303718 to ItaniumDemangle
llvm-svn: 304053
Quentin Colombet [Sat, 27 May 2017 01:34:07 +0000 (01:34 +0000)]
[AArch64][GlobalISel] Add the Localizer pass for the O0 pipeline
This should fix most of the issue we have right now with constants being
spilled all over the place.
llvm-svn: 304052
Quentin Colombet [Sat, 27 May 2017 01:34:00 +0000 (01:34 +0000)]
[GlobalISel] Add a localizer pass for target to use
This reverts commit r299287 plus clean-ups.
The localizer pass is a helper pass that could be run at O0 in the GISel
pipeline to work around the deficiency of the fast register allocator.
It basically shortens the live-ranges of the constants so that the
allocator does not spill all over the place.
Long term fix would be to make the greedy allocator fast.
llvm-svn: 304051
Wei Mi [Sat, 27 May 2017 00:54:19 +0000 (00:54 +0000)]
[GVN] Recommit the patch "Add phi-translate support in scalarpre".
The recommit is to fix a bug about ExtractValue and InsertValue ops. For those
ops, some varargs inside GVN::Expression are not value numbers but raw index
numbers. It is wrong to do phi-translate for raw index numbers, and the fix is
to stop doing that.
Right now scalarpre doesn't have phi-translate support, so it will miss some
simple pre opportunities. Like the following testcase, current scalarpre cannot
recognize the last "a * b" is fully redundent because a and b used by the last
"a * b" expr are both defined by phis.
long a[100], b[100], g1, g2, g3;
__attribute__((pure)) long goo();
void foo(long a, long b, long c, long d) {
g1 = a * b;
if (__builtin_expect(g2 > 3, 0)) {
a = c;
b = d;
g2 = a * b;
}
g3 = a * b; // fully redundant.
}
The patch adds phi-translate support in scalarpre. This is only a temporary
solution before the newpre based on newgvn is available.
Differential Revision: https://reviews.llvm.org/D32252
llvm-svn: 304050
Matthias Braun [Sat, 27 May 2017 00:53:48 +0000 (00:53 +0000)]
BranchRelaxation: computeLiveIns() after creating new block
One case in BranchRelaxation did not compute liveins after creating a
new block. This is catched by existing tests with an upcoming commit
that will improve MachineVerifier checking of livein lists.
llvm-svn: 304049
Matthias Braun [Fri, 26 May 2017 23:48:59 +0000 (23:48 +0000)]
AArch64: Fix cmpxchg O0 expansion
- Rewrite livein calculation to use the computeLiveIns() helper
function. This is slightly less efficient but easier to reason about
and doesn't unnecessarily add pristine and reserved registers[1]
- Zero the status register at the beginning of the loop to make sure it
has a defined value.
- Remove kill flags of values that need to stay alive throughout the loop.
[1] An upcoming commit of mine will tighten the MachineVerifier to catch
these.
llvm-svn: 304048
Bob Haarman [Fri, 26 May 2017 23:46:20 +0000 (23:46 +0000)]
[llvm-pdbdump] pdb2yaml: add an -all option to dump everything we can
Reviewers: amccarth, rnk, zturner
Reviewed By: zturner
Subscribers: fhahn, llvm-commits
Differential Revision: https://reviews.llvm.org/D33613
llvm-svn: 304047
Peter Collingbourne [Fri, 26 May 2017 23:21:40 +0000 (23:21 +0000)]
Bitcode: Remove some dead code. Spotted by Teresa.
Differential Revision: https://reviews.llvm.org/D33609
llvm-svn: 304046
Alex Shlyapnikov [Fri, 26 May 2017 23:14:06 +0000 (23:14 +0000)]
[asan] Enable back halt_on_error-torture.cc disabled on PowerPC.
Summary:
D33521 addressed a memory ordering issue in BlockingMutex, which seems
to be the cause of a flakiness of a few ASan tests on PowerPC.
Reviewers: eugenis
Subscribers: kubamracek, nemanjai, llvm-commits
Differential Revision: https://reviews.llvm.org/D33611
llvm-svn: 304045
Craig Topper [Fri, 26 May 2017 22:42:34 +0000 (22:42 +0000)]
[InstSimplify] Push commuted op checks for and/or of icmp further down to avoid duplicate work
Previously, we called simplifyPossiblyCastedAndOrOfICmps twice with the operands commuted, but the call to simplifyAndOrOfICmpsWithConstants further down already handles commuting and doesn't need to be called both ways.
This patch pushes double calls further down to just the individual routines that need to be called twice.
Differential Revision: https://reviews.llvm.org/D33603
llvm-svn: 304044
Alexei Starovoitov [Fri, 26 May 2017 22:32:41 +0000 (22:32 +0000)]
[bpf] disallow global_addr+off folding
Wrong assembly code is generated for a simple program with
clang. If clang only produces IR and llc is used
for IR lowering and optimization, correct assembly
code is generated.
The main reason is that clang feeds default Reloc::Static
to llvm and llc feeds no RelocMode to llvm, where
for llc case, BPF backend picks up Reloc::PIC_ mode.
This leads different IR lowering behavior and clang
permits global_addr+off folding while llc doesn't.
This patch introduces isOffsetFoldingLegal function into
BPF backend and the function always return false.
This will make clang and llc behave the same for
the lowering.
Bug https://bugs.llvm.org//show_bug.cgi?id=33183
has more detailed explanation.
Signed-off-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 304043
David Blaikie [Fri, 26 May 2017 22:11:18 +0000 (22:11 +0000)]
Fix test broken by r304020
It's a workaround because the test was flakey passing to begin with, but
it looks like (going off commit history) it really did want to test in
the presence of debug info, so keep that behavior (by adding something
to the CU so it's not dropped) & restore the flakey pass in the process.
(added a FIXME in case someone else decides to look at it later)
llvm-svn: 304042
Davide Italiano [Fri, 26 May 2017 21:56:19 +0000 (21:56 +0000)]
[Mips] Placate GCC's -Wmisleading-indentation. NFCI.
llvm-svn: 304041
Davide Italiano [Fri, 26 May 2017 21:56:14 +0000 (21:56 +0000)]
[lib/LTO] Don't reinvent the code for switching linkage.
Differential Revision: https://reviews.llvm.org/D33582
llvm-svn: 304040
Vitaly Buka [Fri, 26 May 2017 21:51:26 +0000 (21:51 +0000)]
[compiler-rt] Don't reset non-default user handler if allow_user_segv_handler is true.
Reviewers: eugenis, kcc
Subscribers: kubamracek, llvm-commits
Differential Revision: https://reviews.llvm.org/D32457
llvm-svn: 304039
Matthias Braun [Fri, 26 May 2017 21:51:00 +0000 (21:51 +0000)]
LivePhysRegs: Rework constructor + documentation; NFC
- Take reference instead of pointer to a TRI that cannot be nullptr.
- Improve documentation comments.
llvm-svn: 304038
Matthias Braun [Fri, 26 May 2017 21:50:54 +0000 (21:50 +0000)]
LivePhysRegs: Doxygen cleanup; NFC
- Remove unnecessary \brief
- @p -> \p
- Add \file and /// to introduction
llvm-svn: 304037
Matthias Braun [Fri, 26 May 2017 21:50:51 +0000 (21:50 +0000)]
LivePhysRegs: Add default for removeRegsInMask(Clobbers); NFC
llvm-svn: 304036
Matthias Braun [Fri, 26 May 2017 21:50:48 +0000 (21:50 +0000)]
MachineVerifier: Remove unused set; NFC
llvm-svn: 304035
Sumanth Gundapaneni [Fri, 26 May 2017 21:09:54 +0000 (21:09 +0000)]
[Hexagon] Cleanup of unused function isCalleeSaveReg (NFC)
llvm-svn: 304034
Konstantin Zhuravlyov [Fri, 26 May 2017 21:08:20 +0000 (21:08 +0000)]
Resubmit r303861.
[AMDGPU] add __builtin_amdgcn_s_getpc
Patch by Tim Corringham
llvm-svn: 304033
Vitaly Buka [Fri, 26 May 2017 20:50:49 +0000 (20:50 +0000)]
allow_user_segv_handler was already removed
New default behavior matches previous allow_user_segv_handler=1
llvm-svn: 304032
Konstantin Zhuravlyov [Fri, 26 May 2017 20:38:26 +0000 (20:38 +0000)]
Resubmit r303859 with test fixed.
[AMDGPU] add intrinsic for s_getpc
Summary: The s_getpc instruction is exposed as intrinsic llvm.amdgcn.s.getpc.
Patch by Tim Corringham
llvm-svn: 304031
Benjamin Kramer [Fri, 26 May 2017 20:14:12 +0000 (20:14 +0000)]
Remove unused diagnostics. NFC.
llvm-svn: 304030
Benjamin Kramer [Fri, 26 May 2017 20:09:00 +0000 (20:09 +0000)]
Make helper functions static. NFC.
llvm-svn: 304029
Benjamin Kramer [Fri, 26 May 2017 20:08:24 +0000 (20:08 +0000)]
Make helper functions static. NFC.
llvm-svn: 304028
Frederich Munch [Fri, 26 May 2017 19:43:23 +0000 (19:43 +0000)]
Fix the ManagedStatic list ordering when using DynamicLibrary::addPermanentLibrary.
Summary:
r295737 included a fix for leaking libraries loaded via. DynamicLibrary::addPermanentLibrary.
This created a problem where static constructors in a library could insert llvm::ManagedStatic objects before DynamicLibrary would register it's own ManagedStatic, meaning a crash could occur at shutdown.
r301562 exasperated this problem by cleaning up the DynamicLibrary ManagedStatic during llvm_shutdown.
Reviewers: v.g.vassilev, lhames, efriedma
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33581
llvm-svn: 304027
Martell Malone [Fri, 26 May 2017 19:39:39 +0000 (19:39 +0000)]
[libcxxabi] iconv is not needed for mingw-w64
llvm-svn: 304026
Petr Hosek [Fri, 26 May 2017 19:25:32 +0000 (19:25 +0000)]
[scan-build] Patch to scan-build tool to support "--target=<value>" flag
The scan-build script provided by clang can be used to detect defects in
code in the compile time. However, we discovered that the
"--target=<value>" flag in clang is not properly handled by this script,
which results in failures when analyzing projects that have used this
flag in their makefile.
This single line of change allows scan-build script to properly handle
the "--target=<value>" flag.
Patch by Haowei Wu
Differential Revision: https://reviews.llvm.org/D33263
llvm-svn: 304025
Petr Hosek [Fri, 26 May 2017 19:12:38 +0000 (19:12 +0000)]
[lld][ELF]Add option to make .dynamic read only
The .dynamic section of an ELF almost doesn't need to be written to with
the exception of the DT_DEBUG entry. For several reasons having a read
only .dynamic section would be useful. This change adds the -z keyword
"rodynamic" which forces .dynamic to be read-only. In this case DT_DEBUG
will not be emited.
Patch by Jake Ehrlich
Differential Revision: https://reviews.llvm.org/D33251
llvm-svn: 304024
Craig Topper [Fri, 26 May 2017 19:04:02 +0000 (19:04 +0000)]
[InstSimplify] Move a variable declaration to make simplifyAndOfICmps look more like simplifyOrOfICmps. NFC
llvm-svn: 304023
Craig Topper [Fri, 26 May 2017 19:03:59 +0000 (19:03 +0000)]
[InstSimplify] Use commutable matchers to shorten some code
This code was replicated two additional times to handle commuted cases, but I think a commutable matcher can take care of it.
Differential Revision: https://reviews.llvm.org/D33585
llvm-svn: 304022
Craig Topper [Fri, 26 May 2017 19:03:53 +0000 (19:03 +0000)]
[InstSimplify] Use m_APInt instead of m_ConstantInt in ((V + N) & C1) | (V & C2) handling in order to support splat vectors.
The tests here are have operands commuted to provide more coverage. I also commuted one of the instructions in the scalar tests so the 4 tests cover the 4 commuted variations
Differential Revision: https://reviews.llvm.org/D33599
llvm-svn: 304021
David Blaikie [Fri, 26 May 2017 18:52:56 +0000 (18:52 +0000)]
DebugInfo: Do not emit empty CUs
Consistent with GCC and addresses a shortcoming with ThinLTO where many
imported CUs may end up being empty (because the functions imported from
them either ended up not being used (and were then discarded, since
they're imported as available_externally) or optimized away entirely).
Test cases previously testing empty CUs (either intentionally, or
because they didn't need anything more complicated) had a trivial 'int'
or similar basic type added to their retained types list.
This is a first order approximation - a deeper implementation could do
things like:
1) Be more lazy about construction of the CU - for example if two CUs
containing a single identical retained type are linked together, with
this change one of the two CUs will be produced but empty (since a
duplicate type won't be produced).
2) Go further and invert all the CU links the same way the subprogram
link is inverted - keep named CU lists of retained types, macros, etc,
and have those link back to the CU. Then if they're emitted, the CU is
emitted, but never otherwise - this would allow the metadata itself to
be dropped earlier too, though it seems unlikely that's an important
optimization as there shouldn't be many CUs relative to the number of
other entities.
llvm-svn: 304020
Peter Collingbourne [Fri, 26 May 2017 18:27:13 +0000 (18:27 +0000)]
PMB: Run the whole-program-devirt pass during LTO at --lto-O0.
The whole-program-devirt pass needs to run at -O0 because only it
knows about the llvm.type.checked.load intrinsic: it needs to both
lower the intrinsic itself and handle it in the summary.
Differential Revision: https://reviews.llvm.org/D33571
llvm-svn: 304019
Craig Topper [Fri, 26 May 2017 18:23:57 +0000 (18:23 +0000)]
[InstCombine] Pass the DominatorTree, AssumptionCache, and context instruction to a few calls to isKnownPositive, isKnownNegative, and isKnownNonZero
Every other place in InstCombine that uses these methods in ValueTracking already pass this information. This makes the remaining sites consistent.
Differential Revision: https://reviews.llvm.org/D33567
llvm-svn: 304018
Arnold Schwaighofer [Fri, 26 May 2017 18:11:54 +0000 (18:11 +0000)]
CodeGen: Define Swift's legal vector types for AArch64, ARM
rdar://
32401301
llvm-svn: 304017
George Rimar [Fri, 26 May 2017 18:07:25 +0000 (18:07 +0000)]
[ELF] - Attemp to fix bot
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/8549/steps/build_Lld/logs/stdio
llvm-svn: 304016
Dmitry Preobrazhensky [Fri, 26 May 2017 18:01:29 +0000 (18:01 +0000)]
[AMDGPU][MC][GFX9] Corrected encoding of flat_scratch* for SDWA opcodes
See bug 33171: https://bugs.llvm.org/show_bug.cgi?id=33171
Reviewers: Sam Kolton
Differential Revision: https://reviews.llvm.org/D33553
llvm-svn: 304015
Rafael Espindola [Fri, 26 May 2017 17:48:27 +0000 (17:48 +0000)]
Avoid a couple uses of OutputSections.
After fabricateDefaultCommands we can look at the script commands.
llvm-svn: 304014
Reid Kleckner [Fri, 26 May 2017 17:48:01 +0000 (17:48 +0000)]
Only define __SIZEOF_FLOAT128__ on x86 as intended in r304012
GCC only defines it on x86.
llvm-svn: 304013
Reid Kleckner [Fri, 26 May 2017 17:38:15 +0000 (17:38 +0000)]
Enable __float128 for mingw for GCC compatibility and define __SIZEOF_FLOAT128__ on x86
GCC defines __FLOAT128__ on Power and __SIZEOF_FLOAT128__ on x86. We're
just following the inconsistency for now so users have some way to test.
Effectively merges this patch as requested by Martell Malone:
https://github.com/Alexpux/MINGW-packages/blob/master/mingw-w64-clang/0107-enable-__float128-for-X86-MinGW.patch
llvm-svn: 304012
George Rimar [Fri, 26 May 2017 17:36:23 +0000 (17:36 +0000)]
Revert r304002 "[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC"
Revert it again. Now another bot unhappy: http://lab.llvm.org:8011/builders/clang-s390x-linux/builds/8750
llvm-svn: 304011
Renato Golin [Fri, 26 May 2017 17:31:33 +0000 (17:31 +0000)]
[LSAN-ARM] Marking new test unsupported on ARMHF due to bot failures
The test was meant for Darwin anyway, so I'm not even sure it's supposed
to run on Linux. If it was, then we need time to investigate, but since
the test is new, there's no point in reverting the whole patch because
of it.
llvm-svn: 304010
Rafael Espindola [Fri, 26 May 2017 17:28:17 +0000 (17:28 +0000)]
Avoid using EhFrameHdr->Sections.
This is a necessary step for moving clearOutputSections earlier.
llvm-svn: 304009
Rafael Espindola [Fri, 26 May 2017 17:23:25 +0000 (17:23 +0000)]
Order writable executable sections before writable ones.
On SPARC, .plt is both writeable and executable. The current way
sections are sorted means that lld puts it after .data/.bss. but it
really needs to be close to .test to make sure branches into .plt
don't overflow. I'd argue that because .bss is supposed to come last
on all architectures, we should change the default sort order such
that writable and executable sections come before sections that are
just writeable. read-only executable sections should still come after
sections that are just read-only of course. This diff makes this
change.
llvm-svn: 304008
Tobias Grosser [Fri, 26 May 2017 17:22:03 +0000 (17:22 +0000)]
[ScopInfo] Translate mapToDimension to isl C++ [NFC]
llvm-svn: 304007
Reid Kleckner [Fri, 26 May 2017 17:11:10 +0000 (17:11 +0000)]
Update MS mangling EBNF, NFC
llvm-svn: 304006
Roger Ferrer Ibanez [Fri, 26 May 2017 17:08:49 +0000 (17:08 +0000)]
Revert "Export the required symbol from DynamicLibraryTests"
This breaks sanitizer-x86_64-linux-fast buildbot.
llvm-svn: 304005
David Blaikie [Fri, 26 May 2017 17:05:15 +0000 (17:05 +0000)]
DebugInfo: Don't include locations for debug-having code inlined into nodebug functions
This produced 'strange' DWARF anyway - the CU would have no ranges (or
at least not a range including the inlined code) nor any subprogram or
inlined_subroutine - yet the line table would have entries for these
instructions.
(this actually becomes more relevant with changes coming after this,
where a CU without any contents will be omitted entirely - so there
would be no line table to put this on anyway)
llvm-svn: 304004
Tom Stellard [Fri, 26 May 2017 16:40:03 +0000 (16:40 +0000)]
AMDGPU/GlobalISel: Mark 32-bit float constants as legal
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D33212
llvm-svn: 304003
George Rimar [Fri, 26 May 2017 16:26:18 +0000 (16:26 +0000)]
[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC
This change is intended to use for LLD in D33183.
Problem we have in LLD when building .gdb_index is that we need to know section which address range belongs to.
Previously it was solved on LLD side by providing fake section addresses with use of llvm::LoadedObjectInfo
interface. We assigned file offsets as addressed. Then after obtaining ranges lists, for each range we had to find section ID's.
That not only was slow, but also complicated implementation and was the reason of incorrect behavior when
sections share the same offsets, like D33176 shows.
This patch makes DWARF parsers to return section index as well. That solves problem mentioned above.
Differential revision: https://reviews.llvm.org/D33184
llvm-svn: 304002
Matthias Braun [Fri, 26 May 2017 16:23:08 +0000 (16:23 +0000)]
LivePhysRegs: Fix addLiveOutsNoPristines() for return blocks past PEI
Re-commit r303938 and r303954 with a fix for addLiveIns(): the internal
addPristines() function must be called on an empty set or it may
accidentally reset saved registers.
- addLiveOutsNoPristines() needs to add callee saved registers that are
actually saved and restored somewhere to the set (they are not
pristine).
- Cleanup/rewrite the code for addLiveOuts()/addLiveOutsNoPristines().
This fixes the problem from D32156.
Differential Revision: https://reviews.llvm.org/D32464
llvm-svn: 304001
Aaron Ballman [Fri, 26 May 2017 15:55:52 +0000 (15:55 +0000)]
Adding a const overload of DesignatedInitExpr::getDesignator().
llvm-svn: 304000
Sam Kolton [Fri, 26 May 2017 15:52:00 +0000 (15:52 +0000)]
[AMDGPU] SDWA: add disassembler support for GFX9
Summary: Added decoder methods and tests
Reviewers: vpykhtin, artem.tamazov, dp
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye
Differential Revision: https://reviews.llvm.org/D33545
llvm-svn: 303999
Kostya Kortchinsky [Fri, 26 May 2017 15:39:22 +0000 (15:39 +0000)]
[scudo] Check the return values of the pthread_* functions
Summary:
Currently we are not enforcing the success of `pthread_once`, and
`pthread_setspecific`. Errors could lead to harder to debug issues later in
the thread's life. This adds checks for a 0 return value for both.
If `pthread_setspecific` fails in the teardown path, opt for an immediate
teardown as opposed to a fatal failure.
Reviewers: alekseyshl, kcc
Reviewed By: alekseyshl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D33555
llvm-svn: 303998
Sanjay Patel [Fri, 26 May 2017 15:33:18 +0000 (15:33 +0000)]
[DAGCombiner] use narrow vector ops to eliminate concat/extract (PR32790)
In the best case:
extract (binop (concat X1, X2), (concat Y1, Y2)), N --> binop XN, YN
...we kill all of the extract/concat and just have narrow binops remaining.
If only one of the binop operands is amenable, this transform is still
worthwhile because we kill some of the extract/concat.
Optional bitcasting makes the code more complicated, but there doesn't
seem to be a way to avoid that.
The TODO about extending to more than bitwise logic is there because we really
will regress several x86 tests including madd, psad, and even a plain
integer-multiply-by-2 or shift-left-by-1. I don't think there's anything
fundamentally wrong with this patch that would cause those regressions; those
folds are just missing or brittle.
If we extend to more binops, I found that this patch will fire on at least one
non-x86 regression test. There's an ARM NEON test in
test/CodeGen/ARM/coalesce-subregs.ll with a pattern like:
t5: v2f32 = vector_shuffle<0,3> t2, t4
t6: v1i64 = bitcast t5
t8: v1i64 = BUILD_VECTOR Constant:i64<0>
t9: v2i64 = concat_vectors t6, t8
t10: v4f32 = bitcast t9
t12: v4f32 = fmul t11, t10
t13: v2i64 = bitcast t12
t16: v1i64 = extract_subvector t13, Constant:i32<0>
There was no functional change in the codegen from this transform from what I
could see though.
For the x86 test changes:
1. PR32790() is the closest call. We don't reduce the AVX1 instruction count in that case,
but we improve throughput. Also, on a core like Jaguar that double-pumps 256-bit ops,
there's an unseen win because two 128-bit ops have the same cost as the wider 256-bit op.
SSE/AVX2/AXV512 are not affected which is expected because only AVX1 has the extract/concat
ops to match the pattern.
2. do_not_use_256bit_op() is the best case. Everyone wins by avoiding the concat/extract.
Related bug for IR filed as: https://bugs.llvm.org/show_bug.cgi?id=33026
3. The SSE diffs in vector-trunc-math.ll are just scheduling/RA, so nothing real AFAICT.
4. The AVX1 diffs in vector-tzcnt-256.ll are all the same pattern: we reduced the instruction
count by one in each case by eliminating two insert/extract while adding one narrower logic op.
https://bugs.llvm.org/show_bug.cgi?id=32790
Differential Revision: https://reviews.llvm.org/D33137
llvm-svn: 303997
Renato Golin [Fri, 26 May 2017 15:32:45 +0000 (15:32 +0000)]
Revert "[OpenCL] An error shall occur if any scalar operand has greater rank than the type of the vector element"
This reverts commit r303986 as it broke all ARM and AArch64 buildbots...
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-39vma/builds/7007
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-quick/builds/6705
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15/builds/7509
etc.
llvm-svn: 303996
Alex Shlyapnikov [Fri, 26 May 2017 14:49:42 +0000 (14:49 +0000)]
[asan] Enable back some ASan tests disabled on PowerPC.
Summary:
D33521 addressed a memory ordering issue in BlockingMutex, which seems
to be the cause of a flakiness of a few ASan tests on PowerPC.
Reviewers: eugenis
Subscribers: kubamracek, nemanjai, llvm-commits
Differential Revision: https://reviews.llvm.org/D33569
llvm-svn: 303995
Nirav Dave [Fri, 26 May 2017 14:37:27 +0000 (14:37 +0000)]
[DAG] Move legal type checks in store merge to be checked only
on non-legal cases. NFC.
llvm-svn: 303994
Ilya Biryukov [Fri, 26 May 2017 14:34:34 +0000 (14:34 +0000)]
[clangd] Attempt to fix tests failing on Windows
llvm-svn: 303993
Ravitheja Addepally [Fri, 26 May 2017 14:26:14 +0000 (14:26 +0000)]
Fixing Memory Leak
llvm-svn: 303991
John Brawn [Fri, 26 May 2017 13:59:12 +0000 (13:59 +0000)]
[ARM] Fix lowering of misaligned memcpy/memset
Currently getOptimalMemOpType returns i32 for large enough sizes without
checking for alignment, leading to poor code generation when misaligned accesses
aren't permitted as we generate a word store then later split it up into byte
stores. This means we inadvertantly go over the MaxStoresPerMemcpy limit and for
memset we splat the memset value into a word then immediately split it up
again.
Fix this by leaving it up to FindOptimalMemOpLowering to figure out which type
to use, but also fix a bug there where it wasn't correctly checking if
misaligned memory accesses are allowed.
Differential Revision: https://reviews.llvm.org/D33442
llvm-svn: 303990
Amaury Sechet [Fri, 26 May 2017 13:56:54 +0000 (13:56 +0000)]
nits in wide-integer-cmp.ll . NFC
llvm-svn: 303989
Pavel Labath [Fri, 26 May 2017 13:53:39 +0000 (13:53 +0000)]
Fix 32-bit builds
r303972 used GetValueForKeyAsInteger with mismatched types (e.g.
instantiating with uint64_t, but passing a size_t argument), which
manifested itself on 32-bit architectures.
The intended usage of these functions was to not specify the type
explicitly, and let the compiler figure that out, so switch to that kind
of usage instead.
llvm-svn: 303988
John Brawn [Fri, 26 May 2017 13:52:36 +0000 (13:52 +0000)]
[ARM] Add tests for 6-M memcpy/memset code generation
Differential Revision: https://reviews.llvm.org/D33495
llvm-svn: 303987
Egor Churaev [Fri, 26 May 2017 13:30:26 +0000 (13:30 +0000)]
[OpenCL] An error shall occur if any scalar operand has greater rank than the type of the vector element
Reviewers: Anastasia
Reviewed By: Anastasia
Subscribers: cfe-commits, bader, yaxunl
Differential Revision: https://reviews.llvm.org/D33353
llvm-svn: 303986
Andrew V. Tischenko [Fri, 26 May 2017 13:23:34 +0000 (13:23 +0000)]
The fix for PR22004: X86AsmParser.cpp asserts: OperandStack.size() > 1 && "Too few operands."
llvm-svn: 303985
George Rimar [Fri, 26 May 2017 13:20:09 +0000 (13:20 +0000)]
Revert "[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC"
Broked BB again:
TEST 'LLVM :: DebugInfo/X86/dbg-value-regmask-clobber.ll' FAILED
...
LLVM ERROR: Section was outside of section table.
llvm-svn: 303984
George Rimar [Fri, 26 May 2017 13:13:50 +0000 (13:13 +0000)]
Recommit r303978 "[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC"
With fix of test compilation.
Initial commit message:
This change is intended to use for LLD in D33183.
Problem we have in LLD when building .gdb_index is that we need to know section
which address range belongs to.
Previously it was solved on LLD side by providing fake section addresses
with use of llvm::LoadedObjectInfo interface. We assigned file offsets as addressed.
Then after obtaining ranges lists, for each range we had to find section ID's.
That not only was slow, but also complicated implementation and was the reason
of incorrect behavior when
sections share the same offsets, like D33176 shows.
This patch makes DWARF parsers to return section index as well.
That solves problem mentioned above.
Differential revision: https://reviews.llvm.org/D33184
llvm-svn: 303983
Siddharth Bhat [Fri, 26 May 2017 12:56:35 +0000 (12:56 +0000)]
[Docs] Fix exception name being caught in case ReadTheDocs does not exist.
The exception is `ImportError`, not `ModuleNotFoundError`.
llvm-svn: 303982
George Rimar [Fri, 26 May 2017 12:53:41 +0000 (12:53 +0000)]
Revert r303978 "[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC"
It failed BB.
llvm-svn: 303981
Nirav Dave [Fri, 26 May 2017 12:53:10 +0000 (12:53 +0000)]
Fix signedness of constant. NFC.
llvm-svn: 303980
Roger Ferrer Ibanez [Fri, 26 May 2017 12:51:12 +0000 (12:51 +0000)]
Export the required symbol from DynamicLibraryTests
Running unittests/Support/DynamicLibrary/DynamicLibraryTests fails when LLVM is
configured with LLVM_EXPORT_SYMBOLS_FOR_PLUGINS=ON, because the test's version
script only contains symbols extracted from the static libraries, that the test
links with, but not those from the main object/executable itself. The patch
explicitly exports the one symbol needed by the test.
This change fixes https://bugs.llvm.org/show_bug.cgi?id=32893
Patch authored by Momchil Velikov.
Differential Revision: https://reviews.llvm.org/D33490
llvm-svn: 303979
George Rimar [Fri, 26 May 2017 12:46:41 +0000 (12:46 +0000)]
[DWARF] - Make collectAddressRanges() return section index in addition to Low/High PC
This change is intended to use for LLD in D33183.
Problem we have in LLD when building .gdb_index is that we need to know section
which address range belongs to.
Previously it was solved on LLD side by providing fake section addresses
with use of llvm::LoadedObjectInfo interface. We assigned file offsets as addressed.
Then after obtaining ranges lists, for each range we had to find section ID's.
That not only was slow, but also complicated implementation and was the reason
of incorrect behavior when
sections share the same offsets, like D33176 shows.
This patch makes DWARF parsers to return section index as well.
That solves problem mentioned above.
Differential revision: https://reviews.llvm.org/D33184
llvm-svn: 303978
Ilya Biryukov [Fri, 26 May 2017 12:26:51 +0000 (12:26 +0000)]
[clangd] Allow to use vfs::FileSystem for file accesses.
Summary:
Custom vfs::FileSystem is currently used for unit tests.
This revision depends on https://reviews.llvm.org/D33397.
Reviewers: bkramer, krasimir
Reviewed By: bkramer, krasimir
Subscribers: klimek, cfe-commits, mgorny
Differential Revision: https://reviews.llvm.org/D33416
llvm-svn: 303977
George Rimar [Fri, 26 May 2017 12:16:39 +0000 (12:16 +0000)]
[ELF] - Follow up for r303975. NFCi.
Restore bitwise-or order and fix warning
(was changed by mistake during resolve of conflicts).
llvm-svn: 303976
George Rimar [Fri, 26 May 2017 12:09:26 +0000 (12:09 +0000)]
[ELF] - Do not produce duplicate values in .gdb_index's constant pool area.
I found this when builded llc binary using gcc 5.4.1 + LLD.
gcc produces duplicate entries in .debug_gnu_pubtypes section, ex:
UnifyFunctionExitNodes.cpp.o has:
0x0000ac07 EXTERNAL TYPE "std::success_type<void*>"
0x0000ac07 EXTERNAL TYPE "std::success_type<void*>"
clang produces single entry here:
0x0000d291 EXTERNAL TYPE "std::__success_type<void *>"
If we link output from gcc with LLD, that would produce excessive duplicate
entries in .gdb_index constant pool area. That does not seem affect gdb work,
but makes .gdb_index larger than it can be.
I also checked that gold filters out such duplicates too. Patch fixes it.
Differential revision: https://reviews.llvm.org/D32647
llvm-svn: 303975
Daniel Jasper [Fri, 26 May 2017 12:07:12 +0000 (12:07 +0000)]
Remove unnecessary double-assignment triggering -Wsequence-point.
llvm-svn: 303974
George Rimar [Fri, 26 May 2017 12:01:40 +0000 (12:01 +0000)]
[ELF] - Simplify implementation of constant pool when building .gdb_index
https://sourceware.org/gdb/onlinedocs/gdb/Index-Section-Format.html says:
"A CU vector in the constant pool is a sequence of offset_type values.
The first value is the number of CU indices in the vector.
Each subsequent value is the index and symbol attributes of a CU in the CU list."
Previously we keeped 2 values until the end, what was useless.
Initially was a part of D32647, though it is possible to split out.
Patch do that.
Differential revision: https://reviews.llvm.org/D33551
llvm-svn: 303973
Ravitheja Addepally [Fri, 26 May 2017 11:46:27 +0000 (11:46 +0000)]
Implementation of remote packets for Trace data.
Summary:
The changes consist of new packets for trace manipulation and
trace collection. The new packets are also documented. The packets
are capable of providing custom trace specific parameters to start
tracing and also retrieve such configuration from the server.
Reviewers: clayborg, lldb-commits, tberghammer, labath, zturner
Reviewed By: clayborg, labath
Subscribers: krytarowski, lldb-commits
Differential Revision: https://reviews.llvm.org/D32585
llvm-svn: 303972
Max Kazantsev [Fri, 26 May 2017 06:47:04 +0000 (06:47 +0000)]
Re-enable "[SCEV] Do not fold dominated SCEVUnknown into AddRecExpr start"
The patch rL303730 was reverted because test lsr-expand-quadratic.ll failed on
many non-X86 configs with this patch. The reason of this is that the patch
makes a correctless fix that changes optimizer's behavior for this test.
Without the change, LSR was making an overconfident simplification basing on a
wrong SCEV. Apparently it did not need the IV analysis to do this. With the
change, it chose a different way to simplify (that wasn't so confident), and
this way required the IV analysis. Now, following the right execution path,
LSR tries to make a transformation relying on IV Users analysis. This analysis
is target-dependent due to this code:
// LSR is not APInt clean, do not touch integers bigger than 64-bits.
// Also avoid creating IVs of non-native types. For example, we don't want a
// 64-bit IV in 32-bit code just because the loop has one 64-bit cast.
uint64_t Width = SE->getTypeSizeInBits(I->getType());
if (Width > 64 || !DL.isLegalInteger(Width))
return false;
To make a proper transformation in this test case, the type i32 needs to be
legal for the specified data layout. When the test runs on some non-X86
configuration (e.g. pure ARM 64), opt gets confused by the specified target
and does not use it, rejecting the specified data layout as well. Instead,
it uses some default layout that does not treat i32 as a legal type
(currently the layout that is used when it is not specified does not have
legal types at all). As result, the transformation we expect to happen does
not happen for this test.
This re-enabling patch does not have any source code changes compared to the
original patch rL303730. The only difference is that the failing test is
moved to X86 directory and now has requirement of running on x86 only to comply
with the specified target triple and data layout.
Differential Revision: https://reviews.llvm.org/D33543
llvm-svn: 303971
Matthias Braun [Fri, 26 May 2017 06:32:31 +0000 (06:32 +0000)]
LivePhysRegs: Skip reserved regs in computeLiveIns; NFCI
Re-commit r303937 + r303949 as they were not the cause for the build
failures.
We do not track liveness of reserved registers so adding them to the
liveins list in computeLiveIns() was completely unnecessary.
llvm-svn: 303970
Wei Mi [Fri, 26 May 2017 05:42:50 +0000 (05:42 +0000)]
Revert rL303923 since it broke the sanitizer bootstrap build bot.
llvm-svn: 303969
Craig Topper [Fri, 26 May 2017 05:16:22 +0000 (05:16 +0000)]
[InstSimplify] Use APInt::isMask isntead of manually implementing it. NFC
llvm-svn: 303968
Craig Topper [Fri, 26 May 2017 05:16:20 +0000 (05:16 +0000)]
[InstSimplify] Use m_ConstantInt matchers to short some code. NFC
llvm-svn: 303967
Eric Fiselier [Fri, 26 May 2017 04:09:38 +0000 (04:09 +0000)]
Workaround debug info bug in Clangs coroutine implementation
llvm-svn: 303966
Ed Maste [Fri, 26 May 2017 03:15:46 +0000 (03:15 +0000)]
FreeBSD ProcessMonitor: map TRAP_CAP to a trace trap
In the absense of a more specific handler for TRAP_CAP (generated by
ENOTCAPABLE or ECAPMODE while in capability mode) treat it as a trace
trap. Obtained from FreeBSD r318884.
We should later add an option to have LLDB control the trapcap procctl
(as with ASLR), as well as report a specific stop reason. For now this
change eliminates an assertion failure from LLDB.
llvm-svn: 303965
Chandler Carruth [Fri, 26 May 2017 03:10:00 +0000 (03:10 +0000)]
[IR] Add an iterator and range accessor for the PHI nodes of a basic
block.
This allows writing much more natural and readable range based for loops
directly over the PHI nodes. It also takes advantage of the same tricks
for terminating the sequence as the hand coded versions.
I've replaced one example of this mostly to showcase the difference and
I've added a unit test to make sure the facilities really work the way
they're intended. I want to use this inside of SimpleLoopUnswitch but it
seems generally nice.
Differential Revision: https://reviews.llvm.org/D33533
llvm-svn: 303964
Eric Fiselier [Fri, 26 May 2017 03:02:54 +0000 (03:02 +0000)]
Get <experimental/coroutine> working in C++03.
Clang supports coroutines in all dialects; Therefore libc++ should too,
otherwise the Clang extension is unusable.
I'm not convinced extending support to C++03 is a feasible long term
plan, since as the library grows to offer things like generators it
will be come increasingly difficult to limit the implementation to C++03.
However for the time being supporting C++03 isn't a big deal.
llvm-svn: 303963
George Burgess IV [Fri, 26 May 2017 02:56:51 +0000 (02:56 +0000)]
[docs] Point coroutine link to an actual document
Unsure if there's a better document, but what we had before led to a
404. :)
llvm-svn: 303962
Rui Ueyama [Fri, 26 May 2017 02:27:19 +0000 (02:27 +0000)]
Rearrange code for the sake of readability. NFC.
llvm-svn: 303961