Kenneth Graunke [Thu, 24 Sep 2020 15:46:31 +0000 (08:46 -0700)]
Revert "nir: replace lower_ffma and fuse_ffma with has_ffma"
This reverts commit
939ddf3f67de2ed1700c093e60cf95c1b72ff20b.
Intel has a separate pass for fusing FFMAs selectively. We split
these flags in commit
1b72c31e1f1947123d8c236b56e230f030f60cf9 and
the reasoning still stands. The patch being reverted was just a
cleanup, so there should be no issue with reverting it.
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6849>
Jonathan Marek [Wed, 23 Sep 2020 17:16:35 +0000 (13:16 -0400)]
radv: use syncobj for wsi fence
Note: this also fixes vk_object_base_init() not being called for the wsi
fences, now that it goes through radv_CreateFence().
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6846>
Jonathan Marek [Wed, 23 Sep 2020 16:46:46 +0000 (12:46 -0400)]
radv: fix incorrect ResetFences path for WSI fence
Looks like this path is meant for RADV_FENCE_WINSYS type fences.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6846>
Pierre-Eric Pelloux-Prayer [Mon, 27 Jul 2020 10:24:27 +0000 (12:24 +0200)]
amd/tmz: move uses_secure_bos to radeon_winsys
This allows to inline radeon_uses_secure_bos calls and reduce CPU overhead.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Fri, 24 Jul 2020 14:04:14 +0000 (16:04 +0200)]
radeonsi/tmz: add workaround for mpv/vaapi subtitles
Subtitles are rendering with an upload through a staging texture.
So the sequence is:
1. draw video (with a secure cs)
2. copy staging texture to the real texture (via si_resource_copy_region) in
a non-secure cs.
3. draw video (with a secure cs)
Step 2 and 3 both generates a flush with RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION.
These flushes are executed quite late: right before doing the draw/dispatch,
so maybe the issue here is the handling of dependencies.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 14:52:35 +0000 (16:52 +0200)]
radeonsi/tmz: add a tmz variant for sctx::eop_bug_scratch
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 15:11:12 +0000 (17:11 +0200)]
radeonsi: disable primitive discard if tmz is in use
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 14:54:08 +0000 (16:54 +0200)]
radeonsi/tmz: add tmz variant for sctx::tess_rings
tess_rings must be encrypted when used in a secure job so this commit
introduces a tess_rings_tmz resource.
The cs_preamble_state doesn't contain the tess_rings address anymore since
it can change. The tess_rings related registers go in a separate preamble.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 14:53:30 +0000 (16:53 +0200)]
radeonsi/tmz: add tmz variant of sctx::wait_mem_scratch
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 14:46:40 +0000 (16:46 +0200)]
radeonsi/tmz: fail si_texture_transfer_map if tex is encrypted
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 13:05:27 +0000 (15:05 +0200)]
amd/winsys: add RADEON_FLUSH_TOGGLE_SECURE_SUBMISSION
Instead of exposing a cs_set_secure() callback that always needs a call
to si_flush_gfx_cs before a switch, this commit introduces a new
flag to switch between secure and non-secure on submissions.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 08:51:56 +0000 (10:51 +0200)]
radeonsi/tmz: allow secure job if the app made a tmz allocation
This commit makes TMZ always allowed instead of being either off or forced-on
with AMD_DEBUG=tmz.
With this change:
- secure job can be used as soon as the application made a tmz allocation. Driver
internal allocations are not enough to enable secure jobs (if tmz is supported
and enabled by the kernel)
- AMD_DEBUG=tmz forces all scanout/depth/stencil buffers to be allocated as TMZ.
This is useful to test app thats don't explicitely support protected content.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Mon, 27 Jul 2020 17:27:53 +0000 (19:27 +0200)]
ac/gpu_info: add detection of TMZ support
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Wed, 19 Aug 2020 08:23:53 +0000 (10:23 +0200)]
amd: add AMDGPU_IDS_FLAGS_TMZ definition to amdgpu_drm.h
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 08:29:14 +0000 (10:29 +0200)]
radeonsi: introduce SI_RESOURCE_FLAG_INTERNAL / RADEON_FLAG_DRIVER_INTERNAL
Tag allocations as driver internal.
Some of these allocations will need to be doubled to handle TMZ (one secure bo,
one normal bo) but these allocations shouldn't switch the winsys in "the app
is using TMZ".
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 10:40:21 +0000 (12:40 +0200)]
radeonsi/tmz: allocate depth/stencil buffers as encrypted
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 07:41:40 +0000 (09:41 +0200)]
radeonsi/tmz: add safety assert when tmz is enabled
This commit adds asserts verifying the following conditions when
using a secure job:
- fb textures are encrypted (both colors and depth/stencil buffers)
- all writeable bo are encrypted
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Wed, 23 Sep 2020 13:15:41 +0000 (15:15 +0200)]
radeonsi/tmz: use secure job if using an encrypted z/s buffer
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Pierre-Eric Pelloux-Prayer [Thu, 23 Jul 2020 07:32:39 +0000 (09:32 +0200)]
radeonsi/tmz: use secure job if framebuffer has dcc
Fixes a hang with DCC.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6049>
Jonathan Marek [Fri, 11 Sep 2020 02:51:53 +0000 (22:51 -0400)]
turnip: rework fences to use syncobjs
Fences are now just a syncobj, which makes our life easier.
The next step will be to fill out ImportFenceFdKHR()/GetFenceFdKHR().
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
Jonathan Marek [Fri, 11 Sep 2020 03:37:09 +0000 (23:37 -0400)]
turnip: require syncobj support
Note: this means turnip requires kernel 5.8 (or older with syncobj patch).
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
Jonathan Marek [Fri, 11 Sep 2020 03:32:31 +0000 (23:32 -0400)]
turnip: add a fd field to tu_device
Avoid the extra indirect for this commonly used field.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
Jonathan Marek [Thu, 10 Sep 2020 19:48:02 +0000 (15:48 -0400)]
turnip: delete unused tu_fence_signal function
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6683>
Erik Faye-Lund [Tue, 22 Sep 2020 10:18:30 +0000 (12:18 +0200)]
mesa: handle GL_FRONT after translating to it
Without this, we end up throwing errors on code along these lines when
rendering using single-buffering:
GLint att;
glGetIntegerv(GL_READ_BUFFER, &att);
glGetFramebufferAttachmentParameteriv(GL_READ_FRAMEBUFFER, att, ...);
This is because we internally translate GL_BACK (which is what
glGetIntegerv returned) to GL_FRONT, which we don't handle in the
Desktop GL case. So let's start handling it.
This fixes the GLTF-GL33.gtf21.GL2FixedTests.buffer_color.blend_color
test for me.
Fixes:
e6ca6e587e7 ("mesa: Handle pbuffers in desktop GL framebuffer attachment queries")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6815>
Samuel Pitoiset [Wed, 23 Sep 2020 08:07:58 +0000 (10:07 +0200)]
ci: adjust RadeonSI rules
src/amd/vulkan is specific to RADV and shouldn't trigger RadeonSI CI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6839>
Jonathan Marek [Mon, 14 Sep 2020 00:45:47 +0000 (20:45 -0400)]
vulkan/wsi/display: add option for display fence to signal syncobj
To avoid having a separate "wsi_fence" path in the driver, make it so wsi
fences can signal a syncobj.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6707>
Marek Olšák [Sat, 19 Sep 2020 10:48:19 +0000 (06:48 -0400)]
radeonsi: always inline draw-related functions that have only one use
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
Marek Olšák [Wed, 26 Aug 2020 05:17:19 +0000 (01:17 -0400)]
radeonsi: lift the conditional for skipping si_upload_vertex_buffer_descriptors
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
Marek Olšák [Sat, 19 Sep 2020 09:36:09 +0000 (05:36 -0400)]
radeonsi: add unlikely statements into si_draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
Marek Olšák [Wed, 26 Aug 2020 05:02:46 +0000 (01:02 -0400)]
radeonsi: move si_upload_vertex_buffer_descriptors into si_state_draw.c
It will be inlined there.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
Marek Olšák [Sat, 19 Sep 2020 08:28:55 +0000 (04:28 -0400)]
radeonsi: reorganize the code around the gfx9 scissor bug
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
Marek Olšák [Sat, 19 Sep 2020 08:00:14 +0000 (04:00 -0400)]
radeonsi: don't call emit_cache_flush after uploading bindless descriptors
The next draw call will do it.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
Marek Olšák [Sat, 19 Sep 2020 09:29:37 +0000 (05:29 -0400)]
radeonsi: move a displaced comment in si_draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
Marek Olšák [Sat, 19 Sep 2020 08:05:22 +0000 (04:05 -0400)]
radeonsi: call si_upload_graphics_shader_descriptors before the big conditional
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
Marek Olšák [Sat, 19 Sep 2020 17:56:20 +0000 (13:56 -0400)]
radeonsi: use optimal order of operations when setting up a compute dispatch
The order is:
- set registers
- flush caches
- set render condition
- prefetch the shader
- set registers that may be read from memory (indirect draw)
- dispatch
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6786>
Icecream95 [Wed, 23 Sep 2020 07:09:23 +0000 (19:09 +1200)]
panfrost: Remove redundant casts of viewport position
The position is already converted to int when clamping to framebuffer
size.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6840>
Icecream95 [Wed, 23 Sep 2020 09:35:03 +0000 (21:35 +1200)]
panfrost: Handle non-positive viewport positions
It's possible for viewport positions to be negative, so add a lower
bound of zero and avoid wraparound when maximum values are zero.
Fixes the menu blur effect in the OpenGL 3.3 render of GZDoom.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6840>
Icecream95 [Sun, 20 Sep 2020 03:30:45 +0000 (15:30 +1200)]
panfrost: Clamp uniform buffer size
Issue (57) for the ARB_uniform_buffer_object spec states:
"The uniform buffer could be larger than the amount of uniform
block(s) data inside it."
This means we need to clamp the uniform buffer size in case it is
bigger than what hardware supports.
Fixes the OpenGL 3.3 renderer of GZDoom.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6835>
Marek Olšák [Thu, 17 Sep 2020 06:02:43 +0000 (02:02 -0400)]
nir: replace lower_ffma and fuse_ffma with has_ffma
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
Marek Olšák [Thu, 17 Sep 2020 02:06:22 +0000 (22:06 -0400)]
radeonsi: fuse or lower ffma optimally on all chips
LLVM is going to support the legacy instructions soon.
This change switches FMA to MAD for gfx10.
54793 shaders in 33659 tests
Totals:
SGPRS: 2632554 -> 2629570 (-0.11 %)
VGPRS: 1536364 -> 1535312 (-0.07 %)
Spilled SGPRs: 3602 -> 3562 (-1.11 %)
Spilled VGPRs: 44 -> 40 (-9.09 %)
Private memory VGPRs: 256 -> 256 (0.00 %)
Scratch size: 312 -> 308 (-1.28 %) dwords per thread
Code Size:
55422660 ->
55345408 (-0.14 %) bytes
Max Waves: 963983 -> 964200 (0.02 %)
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
Marek Olšák [Thu, 17 Sep 2020 01:48:18 +0000 (21:48 -0400)]
nir: split lower_ffma into lower_ffma16/32/64
AMD wants different behavior for each bit size
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
Marek Olšák [Thu, 17 Sep 2020 01:48:18 +0000 (21:48 -0400)]
nir: split fuse_ffma into fuse_ffma16/32/64
AMD wants different behavior for each bit size
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
Pierre-Eric Pelloux-Prayer [Fri, 18 Sep 2020 10:25:16 +0000 (12:25 +0200)]
radeonsi: force linear for textures with height=1 (gfx6-8)
addrlib will force it only for level = 0, so force it when we create
a height=1/multi-level texture.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2250
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6775>
Marek Olšák [Tue, 22 Sep 2020 17:13:05 +0000 (13:13 -0400)]
radeonsi: add a tweak for PS wave CU utilization for gfx10.3
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
Marek Olšák [Tue, 22 Sep 2020 12:59:56 +0000 (08:59 -0400)]
radeonsi: break a binning batch on a new PS if bins can use multiple state sets
ported from PAL
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
Marek Olšák [Tue, 22 Sep 2020 12:55:50 +0000 (08:55 -0400)]
radeonsi: move binning parameters into si_screen
it will be used in the next commit
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
Marek Olšák [Tue, 22 Sep 2020 12:46:22 +0000 (08:46 -0400)]
radeonsi: set KEEP_TOGETHER_ENABLE if needed
ported from PAL
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6822>
Alyssa Rosenzweig [Sun, 20 Sep 2020 20:26:14 +0000 (16:26 -0400)]
pan/bi: Remove old register mode definitions
Now replaced by canonical equivalents.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sun, 20 Sep 2020 20:24:04 +0000 (16:24 -0400)]
pan/bi: Use canonical register packing
This better matches the hardware behaviour and will allow us to
implement write masks down the line.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sun, 20 Sep 2020 19:34:38 +0000 (15:34 -0400)]
pan/bi: Rename port -> slot
To match the canonical naming convention.
$ sed -i -e 's/\([_ \.>"!]\)[pP]ort\([ ,'"'"'_0123s\(\[]\)/\1slot\2/g' *.c *.h
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sun, 20 Sep 2020 13:53:14 +0000 (09:53 -0400)]
pan/bi: Decode all 32-bit register modes
There's actually more than 16 of them, disambiguated by `r2 == r3` and
`first?` as conditions for another "fun" encoding. The extra space
allows for writing half-registers.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sun, 20 Sep 2020 13:29:08 +0000 (09:29 -0400)]
pan/bi: Pass 'first' through disassembler
Required to decode the registers of the first instruction of a clause
correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sun, 20 Sep 2020 13:22:20 +0000 (09:22 -0400)]
pan/bi: Add bifrost_reg_mode enum
This generalizes the previous control field, adding in the full set of
enums required for 16-bit writemasks.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sat, 19 Sep 2020 20:28:27 +0000 (16:28 -0400)]
pan/bi: Disassemble PC-relative addresses
Apply whatever modifier we computed and symbolically work out the
behaviour of the hardware. This involves some pretty gnarly primitives
(e.g. 28-bit sign extensions) but seems to works ok.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sat, 19 Sep 2020 20:06:22 +0000 (16:06 -0400)]
pan/bi: Decode M values in disasm
This is rather complicated and mostly unused in real world code but
correct handling is required to disassemble branchy code.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sat, 19 Sep 2020 19:20:42 +0000 (15:20 -0400)]
pan/bi: Track M values of disassembled constants
We'll want to route these values from the clause itself to the source
dump in order to disassemble modified embedded constants.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sat, 19 Sep 2020 19:04:02 +0000 (15:04 -0400)]
pan/bi: Inline dump_instr
Tuple dumping is trivial now that we autogenerate most of it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sat, 19 Sep 2020 18:52:51 +0000 (14:52 -0400)]
pan/bi: Annotate disassemble with format names
It's hard enough to keep this all straight as it is.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Alyssa Rosenzweig [Sat, 19 Sep 2020 18:53:15 +0000 (14:53 -0400)]
pan/bi: Annotate stop bit (canonically "Z-bit")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6793>
Samuel Pitoiset [Wed, 23 Sep 2020 07:04:39 +0000 (09:04 +0200)]
radv: add a tweak for PS wave CU utilization for gfx10.3
Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6838>
Samuel Pitoiset [Wed, 23 Sep 2020 07:00:24 +0000 (09:00 +0200)]
radv: set KEEP_TOGETHER_ENABLE if necessary on GFX10+
Ported from RadeonSI and PAL.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6838>
Rhys Perry [Fri, 18 Sep 2020 16:13:59 +0000 (17:13 +0100)]
radeonsi: don't use nir_opt_access
st/mesa already calls this and nir_opt_access should be run with
deref-based SSBO access.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6778>
Rhys Perry [Fri, 18 Sep 2020 16:12:29 +0000 (17:12 +0100)]
st/nir: call nir_opt_access before gl_nir_lower_buffers
This pass should be run with deref-based SSBO access.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6778>
Bas Nieuwenhuizen [Wed, 23 Sep 2020 00:37:19 +0000 (02:37 +0200)]
radv: Add VK_FORMAT_E5B9G9R9_UFLOAT_PACK32 rendering support.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6831>
Bas Nieuwenhuizen [Wed, 23 Sep 2020 00:31:45 +0000 (02:31 +0200)]
radv: Simplify radv_is_hw_resolve_pipeline.
We have the bounds so all the format checking is not needed.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6831>
Bas Nieuwenhuizen [Wed, 23 Sep 2020 00:20:09 +0000 (02:20 +0200)]
radv: Disable NGG on APUs.
Syncing from Radeonsi.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6828>
Erico Nunes [Sun, 13 Sep 2020 22:29:03 +0000 (00:29 +0200)]
lima: add natively supported vertex buffer formats
Add natively supported vertex buffer formats. If formats are not listed
here as natively supported, mesa triggers a buffer format translation
routine per draw call which can be expensive.
This helps improve performance in some applications.
The 32-bit integer formats were found by trial and error with a script
and checked in particular with piglit test gl-2.0-vertexattribpointer.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6714>
Samuel Pitoiset [Tue, 22 Sep 2020 06:46:54 +0000 (08:46 +0200)]
radv: advertise VK_KHR_copy_commands2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
Samuel Pitoiset [Tue, 22 Sep 2020 08:40:51 +0000 (10:40 +0200)]
radv: add support for CmdResolveImage2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
Samuel Pitoiset [Tue, 22 Sep 2020 09:24:22 +0000 (11:24 +0200)]
radv: cleanup selecting the hardware resolve path
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
Samuel Pitoiset [Tue, 22 Sep 2020 07:15:20 +0000 (09:15 +0200)]
radv: add support for CmdCopyImageToBuffer2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
Samuel Pitoiset [Tue, 22 Sep 2020 07:06:17 +0000 (09:06 +0200)]
radv: add support for CmdCopyImage2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
Samuel Pitoiset [Tue, 22 Sep 2020 07:02:12 +0000 (09:02 +0200)]
radv: add support for CmdCopyBufferToImage2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
Samuel Pitoiset [Tue, 22 Sep 2020 06:55:38 +0000 (08:55 +0200)]
radv: add support for CmdCopyBuffer2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
Samuel Pitoiset [Tue, 22 Sep 2020 06:46:43 +0000 (08:46 +0200)]
radv: add support for CmdBlitImage2KHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
Samuel Pitoiset [Tue, 22 Sep 2020 09:13:29 +0000 (11:13 +0200)]
radv: add VK_KHR_copy_commands2 but leave it disabled
To declare new prototypes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
Samuel Pitoiset [Tue, 22 Sep 2020 14:59:33 +0000 (16:59 +0200)]
radv: bump the advertised patch version to 145
We have been keeping up with the spec updates. Same as ANV.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6818>
Samuel Pitoiset [Tue, 22 Sep 2020 14:58:43 +0000 (16:58 +0200)]
radv: remove useless assignment of MAX_API_VERSION
It's overwritten few lines below.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6818>
Erik Faye-Lund [Wed, 9 Sep 2020 13:07:54 +0000 (15:07 +0200)]
gallium/util: add blitter-support for stencil-fallback
This wires up the shader in the previous commit so we can blit without
having to reimplement the blitter in the D3D12 driver.
This isn't optimal, but it's reasonable enough, and this behavior is
rare.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6681>
Erik Faye-Lund [Wed, 9 Sep 2020 13:07:00 +0000 (15:07 +0200)]
gallium/util: add shader for stencil-blits
This shader is useful to replicate single bit from a stencil buffer even
when there's no support for PIPE_CAP_SHADER_STENCIL_EXPORT.
This is useful for the D3D12 driver, where the graphics pipeline is the
only way of writing to MSAA stencil-buffers, and not all drivers support
exporting the stencil-value from the shader.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6681>
Jesse Natalie [Wed, 9 Sep 2020 00:58:12 +0000 (17:58 -0700)]
nir_lower_system_values: Fix load_global_invocation_id to use base_work_group_id even with no base_global id
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6668>
Eric Anholt [Fri, 18 Sep 2020 17:42:52 +0000 (10:42 -0700)]
android: Disable trying to read/write to the disk cache.
We need the disk cache enabled in Android to get EGL_ANDROID_blob_cache's
callbacks called, but we don't actually want to store anything on disk.
Fixes "Failed to create //.cache for shader cache (Read-only file
system)---disabling." spam on init.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6762>
Eric Anholt [Mon, 21 Sep 2020 21:27:24 +0000 (14:27 -0700)]
mesa: Make the android_stub be a set of non-installed shared libraries.
Previously, we included the stubs in our driver binaries, so they didn't
call the actual system libraries for these functions. This was enough to
build-test the Android code in CI without even the NDK.
To make NDK-built Mesa drivers useful, we need to link against these
system libraries that aren't present in the NDK. Split the symbols to
separate non-installed shared libraries and link against those, so that
when you drop the resulting .so in your /vendor/lib64/hw/, it just works
out.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6805>
Marek Olšák [Mon, 27 Jul 2020 23:39:50 +0000 (19:39 -0400)]
amd: add VanGogh support
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6820>
Marek Olšák [Tue, 17 Sep 2019 01:41:08 +0000 (21:41 -0400)]
amd: add Dimgrey Cavefish support
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6820>
Marek Olšák [Tue, 22 Sep 2020 06:39:09 +0000 (02:39 -0400)]
radeonsi: remove KILL_PS_INF_INTERP/CLAMP_DIV_BY_ZERO, use screen::options
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6810>
Marek Olšák [Tue, 22 Sep 2020 06:35:53 +0000 (02:35 -0400)]
radeonsi: move debug options from si_disk_cache_create to si_get_ir_cache_key
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6810>
Marek Olšák [Sun, 19 Jul 2020 12:58:51 +0000 (08:58 -0400)]
radeonsi: set TRUNC_COORD=0 for Total War: WARHAMMER to fix it
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3233
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6810>
Michel Dänzer [Mon, 21 Sep 2020 17:27:51 +0000 (19:27 +0200)]
ci: Use ignore_scheduled_pipelines anchor in .radeonsi-rules
Without this, scheduled pipelines erroneously tried to create jobs using
this template, which can't work, because their dependency jobs don't
exist in scheduled pipelines. Unfortunately, this resulted in scheduled
pipelines not running silently, without any direct feedback about what's
wrong (see https://gitlab.com/gitlab-org/gitlab/-/issues/25490).
Fixes:
6c8b921572a5 "ci: Build kernels and rootfs for x86 devices"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6802>
Connor Abbott [Mon, 21 Sep 2020 12:04:27 +0000 (14:04 +0200)]
tu: Expose shaderStorageImage*WithoutFormat
We don't use the format anymore in the backend, except determining the
number of components, and we fallback to 4 there if it's not specified.
So we should be safe to enable this.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>
Connor Abbott [Mon, 21 Sep 2020 11:47:48 +0000 (13:47 +0200)]
ir3: Don't use the format to get the image type
Use the sampler type instead, which was recently plumbed through core
NIR, for load/store and the right type for atomics. This removes the
last hard dependency on the image format.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>
Connor Abbott [Mon, 21 Sep 2020 12:06:22 +0000 (14:06 +0200)]
tu: Expose shaderImageGatherExtended
This just allows textureGather() to have offsets, which we already
supported in ir3.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>
Connor Abbott [Mon, 21 Sep 2020 11:34:10 +0000 (13:34 +0200)]
tu: Expose shaderStorageImageExtendedFormats
We already supported all the formats on the list, so it's trivial to
enable.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6800>
Gert Wollny [Tue, 22 Sep 2020 07:22:20 +0000 (09:22 +0200)]
r600/sfn: Be a bit more verbose when logging skipped FS outputs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
Gert Wollny [Tue, 22 Sep 2020 07:21:53 +0000 (09:21 +0200)]
r600/sfn: Acquire the number of FS outputs and the write_all info early
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
Gert Wollny [Tue, 22 Sep 2020 07:20:41 +0000 (09:20 +0200)]
r600/sfn: Take dual source blending output indices into account
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
Gert Wollny [Tue, 22 Sep 2020 07:19:30 +0000 (09:19 +0200)]
r600/sfn: Handle number of color outputs taking dual source blending into account
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
Gert Wollny [Tue, 22 Sep 2020 07:16:23 +0000 (09:16 +0200)]
r600/sfn: Keep info about dual-source blend in FS
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
Gert Wollny [Tue, 22 Sep 2020 07:15:31 +0000 (09:15 +0200)]
r600/sfn: Sort the outputs of the FS according to data index
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
Gert Wollny [Tue, 22 Sep 2020 07:13:57 +0000 (09:13 +0200)]
r600: Add flag for dual-source blending to shader key
Otherwise the number of outputs and the output data index can't be
interpreted correctly.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6814>
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