turnip: Skip emitting empty CP_COND_REG_EXEC.

If we ended up emitting no code to be conditionally run, then drop the
whole conditional exec packet.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20994>

turnip: Track the first/last subpass an attachment is used in.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20994>

vulkan/util: Make multialloc succeed with 0 allocations.

I wanted to use it for the attachments and clear values of a
vkCmdBeginRenderPass(), but both can be 0 count.  In that case, we would
end up with vk_default_alloc(0,0) because nothing had set the alignment,
and assertion fail instead of allocating 0 bytes.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20994>

Revert "intel/fs: only avoid SIMD32 if strictly inferior in throughput"

This reverts commit 6b494745be0900a67004d6f3e4b730c3cd67da79.

The logic is not entirely correct: the comparison is between two
static-analysis estimates of a dynamic system with variables that aren't
captured by the shader source, so using ">" will always have greater potential
to cause regressions whenever the performance difference between the two builds
is something not captured by the static model, no matter how much the model is
improved.

Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9262
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24615>

iris: ensure stalling pipe control before fast clear

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 87149cc545 ("blorp: update and move fast clear PIPE_CONTROLs to drivers")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24718>

etnaviv: fix null pointer dereference

Fixes: 734b15186bf ("etnaviv: Stop passing around nir_dest")
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24717>

docs: upgrade bootstrap to 5.3.1

Bootstrap 5.3.1 is out, implementing the color fix we introduced to make
dark-mode more readable. So let's update to that, and drop our override.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24670>

nouveau: add exported GEM handles to the global list

Adding GEM handles to the global list is necessary to allow
maintaining a single reference count for handles that are shared
between multiple buffer objects.

Since exported handles can end up being shared with other buffer
objects, as in the case that drmPrimeHandleToFD() and gbm_bo_import()
are called externally to Mesa, they too must be added to the global
list.

Unfortunately, doing this properly requires a new libdrm API. Use
the best possible option for now.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9552

Signed-off-by: Dor Askayo <dor.askayo@gmail.com>
Acked-by: Karol Herbst <git@karolherbst.de>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24648>

nv50/ir: Remove few nvc0 specific defines from nv50-specific header.

Compile, and run-tested on nv92

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7259>

nv50: fix code uploads bigger than 0x10000 bytes

The hardware has a max limit on how much data we can upload in one go via
the 2D engine. Just split the uploads up.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9571
Acked-by: M Henning <drawoc@darkrefraction.com>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24706>

radeonsi: remove unused arg of get_tcs_tes_buffer_address

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Sigend-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: part mode standalone tcs support aco compile

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: add si_aco_build_shader_part

Now it only has tcs epilog build, will add more prolog/epilog to it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: change si_fill_aco_options args

Prepare to be shared with prolog/epilog generation which
does not have si_shader param.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: add si_get_tcs_epilog_args

For shared with aco tcs epilog creation.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: remove separate_prolog arg from prolog/epilog build

It's always true.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: extract si_llvm_build_shader_part

Prepare for aco code path.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: fill part mode tcs aco shader info

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: share si_get_tcs_out_patch_stride with aco

Move it out of llvm to be shared with aco.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: support upload multi part shader binary

Need to split shader binary into exec and data part, then combine
exec and data of all shader parts separately. So const data symbols
in code need to be relocated.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

radeonsi: add exec_size to shader binary

Used by aco binary to split exec code and const data when combine
multi part shader binary.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24443>

aco: use semantic location as io temp index

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

ac/nir/tess: move tess factor output out of control flow

For radeonsi aco compile which can't handle outputs without
nir_lower_io_to_temporaries().

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aco,radeonsi: save const addr to symbol

For radeonsi to relocation const data when combine multiple
shader parts to a single one. So the final shader binary will
begin with exec code of all parts then const data.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aco: skip scratch init when no scratch arg provide

epilog does not use scratch so has no scratch arg.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aco: don't emit s_endpgm for tcs with epilog

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aco: add tcs epilog generation for radeonsi

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aco: add pending_lds_access option for insert waitcnt

For tcs epilog to add p_barrier at the beginning to sync
main shader part tess factor LDS write.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aco: allow tcs with epilog to keep nir store output instruction

Used to same tess factor outputs.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aco: add tcs end regs for epilog usage

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aco: move jump to epilog out of ic_merged_wave_info

TCS may be wrapped with if/else when merged shader. Jump
to epilog or end with regs should not be inside it.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aco: add p_end_with_regs pseudo instruction

Used by radeonsi shader parts to pass args from one part to another.
It has variable number of operands to reserve fixed registers with
wanted value.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24442>

aux/trace: trace video_buffer method return vals

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>

aux/trace: unwrap refrence frames in picture_desc

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>

aux/trace: wrap video_codec & video_buffer

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>

aux/trace: add context video methods

Preliminary support without wrapping video_codec or video_buffer

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>

aux/trace: add screen video methods

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>

aux/trace: fix set_hw_atomic_buffers method name

Fixes: b2dc63ed8ce ("aux/trace: Add pipe_context::set_hw_atomic_buffers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>

aux/trace: move trace_sample_view logic

it's defined in tr_texture, so it makes sense and is more
re-usable to have it's logic there.
Also documented the magic number used for private refcounting

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>

aux/trace: deduplicate enum dump macro work

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>

aux/trace: skip multi-line comments in enums2names

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24482>

gallium/dri: fix dri2_from_names

`createImageFromNames` uses fourcc, not dri_image_formats

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8547
Fixes: 433ca3127a3 ("st/dri: replace format conversion functions with single mapping table")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24597>

intel/isl: Remove Wa_22011186057

This is a ADL-P workaround of a pre-production stepping, with RPL-P
already being sold we can remove this workaround.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24699>

intel/isl: Remove unknown workaround

The way this workaround is implemented, it is being applied to all
gfx 12 platforms(TGL, ADL, RKL, RPL, DG1, DG2 and MTL) but it was
supposed to be fixed in TGL B0.
Unfortunately I did not found any workaround number that would match it.

But as all released platforms don't ship to customers with revision == 0
this workaround was never being applied and can be safely removed.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24699>

nir: s/nir_instr_ssa_def/nir_instr_def/

Generated by sed:

    sed -i -e 's/nir_instr_ssa_def/nir_instr_def/g' src/**/*.h src/**/*.c src/**/*.cpp

Suggested-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24703>

nir: s/live_ssa_def/live_def/

Generated mostly with sed:

    sed -i -e 's/live_ssa_def/live_def/g' src/compiler/nir/nir.h src/compiler/nir/*.c

Plus three fixups in various Intel drivers.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24703>

nir s/nir_get_ssa_scalar/nir_get_scalar/

Generated with sed:

    sed -i -e 's/nir_get_ssa_scalar/nir_get_scalar/g' src/**/*.h src/**/*.c src/**/*.cpp

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24703>

nir: Rename nir_instr_type_ssa_undef to nir_instr_type_undef

We already renamed the type, we just need to rename the enum and the
casting helper functions.

Generated with sed:

    sed -i -e 's/nir_instr_type_ssa_undef/nir_instr_type_undef/g' src/**/*.h src/**/*.c src/**/*.cpp
    sed -i -e 's/nir_instr_as_ssa_undef/nir_instr_as_undef/g' src/**/*.h src/**/*.c src/**/*.cpp

and two tiny whitespace fixups in lima.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24703>

zink: use real A8_UNORM when possible

this is tricky because drivers are exposing their native support, but
that support may not fit the specific needs of the format

as such, (almost) every use of format where alpha emulation workarounds are
present now need to add a second layer of workarounds in order to handle
the case of possibly-genuine A8 (which might also be emulated A8 even if
the driver supports A8 for some things)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24685>

zink: use maintenance5

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24685>

zink: add maintenance extensions to profile

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24685>

zink: split create_ici to init and eval

no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24685>

zink: remove unused param from create_ici

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24685>

nir: Assert that nir_ssa_for_src components matches

In prep for removing the helper.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24654>

broadcom/compiler: Use nir_trim_vector explicitly

...when trying to ignore components. Trim functionality with nir_ssa_for_src is
deprecated.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24654>

lvp,nir/lower_input_attachments: Use nir_trim_vector

Make the trimming obvious. We will lock down ssa_for_src soon.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24654>

aux/trace: print bindless handles as pointers

this makes traces using bindless ops easier to read/diff

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24679>

panfrost: Pack stride at CSO create time on v9

Now that the stride is in the CSO, there's no merging needed at draw-time. The
whole descriptor could probably be uploaded at CSO create time but I didn't want
to deal with that right now, this isn't even my driver anymore I just like
deleting code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24680>

mesa: Enable ARB_texture_border_clamp in GL Core

According to the GL3 spec, only the `CLAMP` mode was deprecated,
the `CLAMP_TO_EDGE` and `CLAMP_TO_BORDER_ARB` are not, so this
extension should be advertised.

As a side note, Davinci Resolve uses a Core profile and tests for
that extension so it fixes an issue with that app.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24660>

zink: ci updates

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: remove pipe_stream_output from function params

this is no longer used at all

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: stop using pipe_stream_output

nir_xfb_info is much cleaner and simpler to use

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: delete all the extra gross xfb handling

xfb outputs should always be inlined into the base variables now,
so there's no need for anything further here

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: fix clip/cull dist xfb inlining

these are compact arrays which don't take up slots according to normal
array i/o sizing rules

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: delete lower_64bit_vertex_attribs pass

this is no longer useful

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: delete split_blocks pass

this is no longer useful

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

ntt: handle interp intrinsics as derefs

this fixes usage_mask gathering for fs inputs

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: stop lowering indirect derefs

this is no longer necessary

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: use lowered io (kinda) for i/o vars

this runs io lowering on shader create, which is a huge pita
and waste of time since it requires then re-creating all the deref io later,
but it also makes the variables simpler by eliminating struct awfulness
(which was already eliminated by the split_blocks pass, but who's keeping
track) and will enable future use of some bizarro inter-stage linker thing

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: add a mode param to find_var_with_location_frac

no functional changes

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

zink: move fragcolor lowering further along the compile process

no functional changes

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

nir/zink: fix gs emulation xfb_info sizing

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24634>

ci/freedreno: document another a530 flake batch

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24694>

aco: don't create sendmsg(dealloc_vgprs) if scratch is used

LLVM does something similar: https://reviews.llvm.org/D153295

fossil-db (gfx1100):
Totals from 21 (0.02% of 133461) affected shaders:
Instrs: 147428 -> 147396 (-0.02%)
CodeSize: 797188 -> 797060 (-0.02%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 2930317cea53 ("aco/gfx11: deallocate VGPRs at the end of the shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24669>

radv/rt: Rename traversal_shader to traversal_shader_addr

It's more in line with shader_addr and uniform_shader_addr as well as
the user data name.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23565>

radv/rt: Rename shader_pc and next_shader

The names basically had the same meaning. Changing them to
uniform_shader_addr and shader_addr makes it clear, that
uniform_shader_addr is the jump target and shader_addr is the next
shader executed by this invocation.

The next_ prefix is dropped since both are input and output variables.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23565>

egl: reenable partial redraw with a warning when using gallium hud

Partial revert of e516a0a94f ("egl: disable partial redraw when gallium
hud is active").

We shouldn't change the behavior of the application when the hud is
enabled, doing so could make it harder do diagnose issues. Instead, now
we warn and ask the user to manually disable the extension if he
considers it to be worth it.

Fixes: e516a0a94f ("egl: disable partial redraw when gallium hud is active")
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23456>

intel/decoder: Fix memory leak on error path

Fix defect reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable text_data going out of scope leaks the storage it points to.

Fixes: b4c8d2dc455 ("intel/decoder: Add intel_spec_load_common()")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24659>

driconf: add a workaround for Captain Lycop: Invasion of the Heters

CC: mesa-stable
Tested-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24639>

zink: drop CWE requirement for renderpass tracking with primgen queries

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24676>

zink: rip out some awkward parts of the old non-cwe path

this is no longer used

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24676>

zink: rework rast-discard for primgen queries

I originally used CWE for this case since it nicely avoids a lot of the
"complex" operations while still disabling most effects of a fragment shader

in theory, however, there are some cases where CWE isn't quite the same as actually
disabling the fs, so this adds a new rast-discard mode that can be used for
those cases

it can also be used instead of the dummy surface handling that was previously
used for drivers/hw that didn't support primitivesGeneratedQueryWithRasterizerDiscard,
which enables a bunch of gross conditionals to be simplified

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24676>

zink: unset primgen suspended flag when ending a primgen query

this otherwise could result in rast-discard being permanently enabled
in certain corner cases

Fixes: 7f956435a03 ("zink: rework xfb queries for drivers with poor primgen support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24676>

zink: require EDS1 for CWE usage

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24676>

zink: track start/stop of a couple query types

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24676>

gallivm: Drop the Vulkan YUV format hacks

Vulkan is now using the raw formats so we don't need this hack.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>

vulkan/format: Translate G8B8G8R8_422_UNORM and B8G8R8G8_422_UNORM properly

They were being translated to YUYV and UYVY formats which, in
PIPE_FORMAT parlance, are auto-converted formats, not raw data
formats.  Use the raw data formats like everything else.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>

vulkan/format: Use correct swizzle for 1-plane YCbCr formats

VK_FORMAT_G8B8G8R8_422_UNORM and VK_FORMAT_B8G8R8G8_422_UNORM already
place the luminance channel in the green component which is where we NIR
lowering code for ycbcr expects it.  Set an RGBA swizzle in the common
format table and make it the driver's responsibility to re-map the
formats as needed for their hardware.

The only Vulkan drivers affected by this change are the Intel drivers
and lavapipe.  None of NVK, RADV, and v3dv support these formats yet and
Turnip has its own lowering that doesn't rely on the YCbCr format table
in util/vk_format.c.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>

anv: Disable CCS_E for ISL_FORMAT_YCRCB_*

We're about to start using YCRCB_NORMAL and YCRCB_SWAPUV for 8-bit
interleaved YCbCr and, while ISL claims CCS_E support, it's not well
tested and we don't think it's working yet for all of ANV's use-cases.
Disable it for now in ANV and only for YUV formats.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>

blorp: Use R8G8_UINT for YCRCB_* formats with CCS

BLORP uses the get_ccs_compatible_copy_format() based on whether or not
ISL claims the format supports CCS_E, not whether or not CCS_E is used
on the image.  This is probably a good thing as it improves consistency.
However, it means that we need CCS-compatible formats for YCRCB_*
formats even if we never use them with CCS_E enabled.  In practice,
these do actually seem to work according to the Vulkan CTS but coverage
is likely far less than perfect.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>

gallivm: Support G8B8_G8R8_422_UNORM and B8G8_R8G8_422_UNORM

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>

util/format: Add G8B8_G8R8_422_UNORM and B8G8_R8G8_422_UNORM formats

These actually match the Vulkan format enums for single-plane YCbCr
formats, unlike the other PIPE_FORMAT_* enums which put luminance in the
red channel.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>

util/format: 8-bit interleaved YUV formats are UNORM

Without this, gallivm doesn't know what to do with the result data of a
texture fetch.  We have a bunch of gallivm code to handle these but, as
far as I can tell, none of it works properly without channel types.  The
YUYV texturing helpers all consume a 32-bit packed value, unpack it,
shuffle things as needed, and then re-pack into a 32-bit RGBA value,
trusting later code to unpack that as 8-bit UNORM.  For the raw formats,
this unpacking never happens.

What saves us is that I also don't think any of this code is ever used.
LLVMpipe supports the actual YUYV formats and we don't use the gallium
lowering pass which lowers to the raw formats.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>

intel/genxml: Update xml with gen_sort_tags.py output

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24605>

intel/genxml: Add final newline to output when saving xml

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24605>

intel/genxml: Don't rewrite sorted xml if the contents didn't change

Rework:
 * Make better use of pathlib. (Dylan)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24605>

intel/genxml: Move sorting & writing into GenXml class

Rework:
 * Use "all" in is_equivalent_xml() (Dylan)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24605>

panfrost/ci: updated CI expectations

These tests were crashing because of a pandecode bug that's now been fixed.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24144>

pan/decode: handle more than one panfrost_device

Before this commit, if an application tried to create more than one
panfrost_device, such as piglit's "ext_image_dma_buf_import" tests,
it would result in a crash when running with PAN_MESA_DEBUG=sync or
PAN_MESA_DEBUG=trace.

This commit fixes that by introducing a pandecode_context, which
encapsulates all the information that is being tracked, and thus
avoiding memory conflicts.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24144>

panfrost: fix invalid memory access in get_equation_str()

Fixes: f55efb4ae68 ("panfrost: Convert to PIPE_BLEND enums internally")
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24144>