Christophe Leroy [Wed, 13 May 2020 05:30:03 +0000 (05:30 +0000)]
MAINTAINERS: POWERPC MPC8XX: Update email address
Our email addresses have changed from @c-s.fr to @csgroup.eu
Update entry in MAINTAINERS
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Tom Rini [Wed, 15 Sep 2021 19:22:46 +0000 (15:22 -0400)]
Merge branch 'rpi-next' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Ivan's patch fixes a kernel warning when booting RPi2, as the firmware
already
provides a frambebuffer node.
Marek's patch fixes random crashes on 32 bit RPi4 with newer firmware.
My SMBIOS patchesfixes an issue that show up with
e4f8e543f1 ("smbios: Drop the unused Kconfig options").
Basically the SMBIOS table broke and wasn't readable anymore.
Ivan T. Ivanov [Tue, 10 Aug 2021 14:31:14 +0000 (16:31 +0200)]
rpi: Conditionally add simple-framebuffer node
It appears that RPi firmware has already added framebuffer
node under /chosen, at least on RPi 2 versions. So check
for this and don't add duplicate node.
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Marek Szyprowski [Thu, 17 Jun 2021 09:22:03 +0000 (11:22 +0200)]
ARM: bcm283x: change the virtual address of the XHCI PCI device base
Move the XHCI PCI device base up in the virtual address space. This fixes
initialization failure observed with newer Raspberry Pi firmware, later
than
63b1922311 ("firmware: arm_loader: Update armstubs with those from
PR 117). It looks that chosing 0xff800000 as the XHCI PCI device base
conflicts with the updated ARM/VideoCore firmware.
This also requires to reduce the size of the mapped PCI device region
from 8MiB to 4MiB to fit into 32bit address space. This is still enough
for the XHCI PCI device.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Tested-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Matthias Brugger [Mon, 12 Apr 2021 13:38:52 +0000 (15:38 +0200)]
configs: rpi: Enable SMBIOS sysinfo driver
Enable this driver to allow U-Boot to get SMBIOS table information from
a device tree node.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Acked-by: Fabian Vogt <fvogt@suse.com>
Matthias Brugger [Mon, 12 Apr 2021 13:38:51 +0000 (15:38 +0200)]
arm: dts: bcm283x: Add minimal smbios information
At present SMBIOS tables are empty, which breaks some use-cases that
rely on that. Add some minimal information to fulfill this.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Tom Rini [Tue, 14 Sep 2021 22:58:10 +0000 (18:58 -0400)]
Prepare v2021.10-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Sep 2021 22:48:05 +0000 (18:48 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Alexandru Gagniuc [Tue, 14 Sep 2021 20:53:33 +0000 (15:53 -0500)]
image: Avoid erroneous double byte-swap in CRC value
The hash algorithm selection was streamlined in commit
92055e138f28
("image: Drop if/elseif hash selection in calculate_hash()"). Said
commit kept the call to cpu_to_uimage() to convert the CRC to big
endian format.
This would have been correct when calling crc32_wd(). However, the
->hash_func_ws member of crc32 points to crc32_wd_buf(), which already
converts the CRC to big endian. On a little endian host, doing both
conversions results in a little-endian CRC. This is incorrect.
To remedy this, simply drop the call to cpu_to_uimage(), thus only
doing the byte-order conversion once.
Fixes:
92055e138f28 ("image: Drop if/elseif hash selection in
calculate_hash()")
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tom Rini [Tue, 14 Sep 2021 19:47:07 +0000 (15:47 -0400)]
Merge branch '2021-09-14-assorted-fixes'
- Assorted bugfixes
Alexandru Gagniuc [Wed, 18 Aug 2021 22:49:02 +0000 (17:49 -0500)]
image: rsa: Move padding_algos to linker lists
We are not guaranteed to have the padding_pkcs_15_verify symbol since
commit
92c960bc1d ("lib: rsa: Remove #ifdefs from rsa.h"), and
commit
61416fe9df ("Kconfig: FIT_SIGNATURE should not select RSA_VERIFY")
The padding_algos only make sense with RSA verification, which can now
be disabled in lieu of ECDSA. In fact this will lead to build failures
because of the missing symbol mentioned earlier.
To resolve this, move the padding_algos to a linker list, with
declarations moved to rsa_verify.c. This is consistent with commit
6909edb4ce ("image: rsa: Move verification algorithm to a linker list")
One could argue that the added #ifdef USE_HOSTCC is ugly, and should
be hidden within the U_BOOT_PADDING_ALGO() macro. However, this would
be inconsistent with the "cryptos" list. This logic for was not
previously explored:
Without knowledge of the U_BOOT_PADDING_ALGO() macro, its use is
similar to something being declared. However, should #ifndef
USE_HOSTCC be part of the macro, it would not be obvious that it
behaves differently on host code and target code. Having the #ifndef
outside the macro makes this obvious.
Also, the #ifdef is not always necessary. For example ecda-verify
makes use of U_BOOT_CRYPTO_ALGO() without any accompanying #ifdefs.
The fundamental issue is a lack of separation of host and target code
in rsa_verify. Therefore, the declaration of a padding algo with the
external #ifdef is more readable and consistent.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Yuan Fang [Wed, 8 Sep 2021 11:06:48 +0000 (19:06 +0800)]
pinctrl: fix typo
fix typo in pinctrl Kconfig file to avoid git commit failure on
some commit hooks check.
Signed-off-by: Yuan Fang <fangyuanseu@gmail.com>
Oleksandr Suvorov [Wed, 1 Sep 2021 13:05:08 +0000 (16:05 +0300)]
lib: fix typos in Kconfig
There are trivial typos in the Kconfig file. Fixed them.
Also, fixed grammar in the descriptions with typos.
Fixes:
d56b4b1974 ("configs: Migrate RBTREE, LZO, CMD_MTDPARTS, CMD_UBI and CMD_UBIFS")
Fixes:
7264f2928b ("spl: fit: Eanble GZIP support for image decompression")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Heinrich Schuchardt [Sat, 28 Aug 2021 10:13:05 +0000 (12:13 +0200)]
lib/rsa: don't use NULL as key_id
If keydir is not provided but name is we want to use name as key_id.
But with the current coding name is only used on its own if it is NULL
and keydir is provided which never occurs.
Fixes:
824ee745fbca ("lib/rsa: Use the 'keyfile' argument from mkimage")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 14 Sep 2021 01:03:36 +0000 (21:03 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
- a fix for U-Boot 2021.10 to bring back MMC boot on older boards.
Andre Przywara [Fri, 3 Sep 2021 15:49:16 +0000 (16:49 +0100)]
sunxi: mmc: A20: Fix MMC optimisation
Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the
FIFO is completely full: the level size reads as zero, but the FIFO_FULL
bit is set. We won't do a single iteration of the read loop in this
case, so will be stuck forever.
Check for this situation and use a safe minimal FIFO size instead when
we hit this case.
This fixes MMC boot on A20 devices after the MMC FIFO optimisation
(
9faae5457f52).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Mon, 13 Sep 2021 22:23:24 +0000 (18:23 -0400)]
Merge branch '2021-09-09-finish-pre-DM_PCI-removal'
- Finish removing the non-DM_PCI legacy code.
Simon Glass [Mon, 2 Aug 2021 00:54:44 +0000 (18:54 -0600)]
pci: Drop DM_PCI
This option has not effect now. Drop it, using PCI instead where needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 2 Aug 2021 00:54:43 +0000 (18:54 -0600)]
pci: Drop PCI_INDIRECT_BRIDGE
This does not work with driver model so can be removed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 2 Aug 2021 00:54:34 +0000 (18:54 -0600)]
net: Drop DM_PCI check from designware driver
We don't need this check anymore since when PCI is enabled, driver model
is always used.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 2 Aug 2021 00:54:25 +0000 (18:54 -0600)]
pci: acpi: Drop DM_PCI check from ahci
We don't need these checks anymore since when PCI is enabled, driver model
is always used.
Drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 2 Aug 2021 00:54:18 +0000 (18:54 -0600)]
pci: Drop DM_PCI check from fdtdec
We don't need this check anymore since when PCI is enabled, driver model
is always used.
Sadly this doesn't work with nds32 for some reason to do with the
toolchain. Add a work-around for that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 2 Aug 2021 00:54:16 +0000 (18:54 -0600)]
pci: Drop old code from header file
We don't need this code anymore since when PCI is enabled, driver model is
always used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 2 Aug 2021 00:54:15 +0000 (18:54 -0600)]
ppc: Remove UCP1020 board
This board has not been converted to CONFIG_DM_PCI by the deadline.
Remove it.
Note that we have to add CONFIG_SPIFLASH to scripts/config_whitelist.txt
because it's not really migrated at this point.
Acked-by: Michael Durrant <mdurrant@arcturusnetworks.com>
Acked-by: Oleksandr Zhadan <oleks@arcturusnetworks.com>
Acked-by: Oleksandr Zhadan and Michael Durrant <arcsupport@arcturusnetworks.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Handle CONFIG_SPIFLASH differently and delete Kconfig file]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Sep 2021 12:31:41 +0000 (08:31 -0400)]
Merge tag 'mmc-2021-9-13' of https://source.denx.de/u-boot/custodians/u-boot-mmc
Support using mmc command for enumerating mmc card in a given mode
Fix device_remove in mmc
Fix switch issue with send_status disabled
Drop 1ms delay in fsl_esdhc command sending
Revert "mmc: sdhci: set to INT_DATA_END when there are data"
Michael Walle [Fri, 10 Sep 2021 09:20:52 +0000 (11:20 +0200)]
mmc: fsl_esdhc: remove 1ms sleep in esdhc_send_cmd_common()
Since the beginning of this driver which was initially for the MPC8379
and MPC8536 SoCs, there is this spurious 1ms delay. According to the
comment it should actually be only 8 clock cycles. Esp. during EFI block
transfers, this 1ms add up to a significant delay and slows down EFI
boot.
I couldn't find any mention in the MPC8536 that there should be a delay
of 8 clock cycles between commands. The SD card specification mentions that
the clock has to be left enabled for 8 cycles after a command or
response. But I don't see how this delay will help with this.
Go ahead and just remove it. If there will ever be any regression we can
introduce a compile time flag, but for now I'd like to keep it simple.
In the split off imx driver this delay was also removed in commit
9098682200e6 ("mmc: fsl_esdhc_imx: remove the 1ms delay before sending
command").
Signed-off-by: Michael Walle <michael@walle.cc>
Tom Rini [Mon, 13 Sep 2021 00:33:21 +0000 (20:33 -0400)]
Merge tag 'efi-2021-10-rc4-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-10-rc4-2
Documentation:
* improve documentation of U-Boot for /config DT node
* integrate bloblist documentation
UEFI:
* correct usage of EFI_CALL()
* code tidy up
Tom Rini [Sat, 11 Sep 2021 12:15:56 +0000 (08:15 -0400)]
Merge branch '2021-09-10-assorted-TI-updates'
- A number of TI platform bugfixes
Heinrich Schuchardt [Thu, 9 Sep 2021 05:47:05 +0000 (07:47 +0200)]
efi_loader: simplify efi_watchdog_timer_notify()
We can call do_reset() directly without invoking the UEFI API.
This decreases the code size.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 9 Sep 2021 05:39:40 +0000 (07:39 +0200)]
efi_loader: eliminate EFI_CALL() in nvedit_efi.c
Reduce the code size by avoiding using the external UEFI API and using our
internal functions instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ilias Apalodimas [Wed, 8 Sep 2021 21:30:49 +0000 (00:30 +0300)]
efi_loader: Remove incorrect calls of EFI_CALL in TCG2
There is two unneeded EFI_CALL references in tcg2_measure_pe_image().
The first one in efi_search_protocol() and the second on in the device path
calculation. The second isn't even a function we should be calling, but a
pointer assignment, which happens to work with the existing macro.
While at it switch the malloc call to a calloc, remove the unnecessary cast
and get rid of an unneeded if statement before copying the device path
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 7 Sep 2021 06:56:47 +0000 (08:56 +0200)]
efi_loader: require CONFIG_BLK
The move to driver model should by now be completed. To be able to remove
pre-driver model code from our block IO code require CONFIG_BLK=y for UEFI
support.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Masahisa Kojima [Mon, 6 Sep 2021 03:04:12 +0000 (12:04 +0900)]
efi_loader: boot_service_capability_min should be capitalized
boot_service_capability_min is constant, it should be capitalized.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Thu, 9 Sep 2021 20:10:32 +0000 (14:10 -0600)]
doc: Complete the list of available runtime-config options
The current list is missing a few items. Add them.
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Thu, 9 Sep 2021 20:10:31 +0000 (14:10 -0600)]
doc: Tidy up the bindings for the config/ node
Sort these and add a type so it is clear how to set the value. Add a note
about usage to the top. Correct the 'no-keyboard' binding which is missing
a prefix.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Wed, 8 Sep 2021 13:33:52 +0000 (07:33 -0600)]
bloblist: Move to rST format
Move this documentation to the new format.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Oleksandr Suvorov [Thu, 9 Sep 2021 19:12:09 +0000 (22:12 +0300)]
doc: board: toradex: fix file names
Fix the documentation file names: s/apalix/apalis/.
Fixes:
e98ea49a0e ("toradex: MAINTAINERS: entries for new reST docs")
Fixes:
3730106cf0 ("doc: board: apalis-imx8x: add documentation")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Aswath Govindraju [Thu, 26 Aug 2021 15:58:59 +0000 (21:28 +0530)]
configs: j72*_evm: Define the buffer sizes for dfu
On J721e R5 SPL, dfu buffer for loading sysfw.itb image gets allocated
before DRAM gets initialized. So, the buffer gets allocated in MCU L3
RAM. The current buffer size to be allocated is 256KB and the available
total heap memory is 0x70000 (448KB). This leads to NOMEM errors during
allocation.
In other cases when constraints such as above are not present fix the size
of buffers to the sector size in OSPI for proper functioning.
Also, if CONFIG_SYS_DFU_DATA_BUF_SIZE is defined and
CONFIG_SYS_DFU_MAX_FILE_SIZE is not defined then the max file size for dfu
transfer is defined as CONFIG_SYS_DFU_DATA_BUF_SIZE.
Fix these by setting appropriate buffer sizes in their respective defconfig
files and defining the max file size as 8 MB which is the default dfu
buffer size.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Aswath Govindraju [Thu, 26 Aug 2021 15:58:58 +0000 (21:28 +0530)]
environment: ti: k3_dfu: Increase the size allocated for bootloader images in dfu_alt_info_ram
The size of u-boot.img is above 1MB and that of tispl.bin is close to 1MB,
in case of j721e. Therefore, increase the sizes allocated for tispl.bin and
u-boot.img to 2 MB and 4 MB respectively, in dfu_alt_info_ram environment
variable.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Aswath Govindraju [Thu, 26 Aug 2021 15:58:57 +0000 (21:28 +0530)]
arm: dts: k3-j721e-r5-*.dts: Fix clock-names property in the usb0 instance
In the cdns3 usb driver, the clock name looked for is ref. Therefore, fix
the clock-names property in usb0 instance for proper initialization of
cdns3 usb gadget driver.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Roger Quadros [Tue, 24 Aug 2021 11:07:27 +0000 (14:07 +0300)]
ARM: dts: Fix node status to "okay" on TI boards
As per Device Tree Specification [1], the status parameter of nodes can
be "okay", "disabled", etc. "ok" is not a valid parameter.
U-boot Driver Model does not recognize status="ok" either and treats
the node as disabled.
[1] https://github.com/devicetree-org/devicetree-specification/releases/tag/v0.3
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
Suman Anna [Sat, 14 Aug 2021 06:49:01 +0000 (01:49 -0500)]
tools: k3_fit_atf: Fix DM binary FIT load addresses
The DM binary runs on the MCU R5F Core0 after R5 SPL on J721E and J7200
SoCs. The binary is built alongside the TFA, OPTEE and A72 SPL binaries
and included in the tispl.bin FIT image. The R5 SPL loads the DM binary
at 0xA0000000 address, based on the value used in the FIT image build
script. The DM binary though is an ELF image and not a regular binary
file, and so is processed further to load the actual program segments
using the U-Boot's standard ELF loader library.
The DM binary does leverage a certain portion of DDR for its program
segments, and typically reserves 16 MB of DDR at 0xA0000000 with the
1st MB used for IPC between Linux and the remote processor, and
remaining memory for firmware segments. This can cause an incomplete
loading of the program segments if the DM binary is larger than 1 MB,
due to overlap of the initial loaded binary and the actual program
segments.
Fix this by using the address 0x89000000, which matches the current
"addr_mcur5f0_0load" env variable used by R5 SPL before the DM firmware
inclusion into the tispl.bin.
Fixes:
df5363a67f35 ("tools: k3_fit_atf: add DM binary to the FIT image")
Signed-off-by: Suman Anna <s-anna@ti.com>
Aswath Govindraju [Mon, 9 Aug 2021 17:02:23 +0000 (22:32 +0530)]
arm: dts: k3-am642-evm-u-boot: Add u-boot, dm-spl tag in the pinmux node of mmc1
Add u-boot,dm-spl tag in the pinmux device tree node, required for MMCSD1
subsystem.
Fixes:
b6059ddc45b9 ("arm: dts: k3-am642: Add r5 specific dt support")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Matwey V. Kornilov [Sat, 7 Aug 2021 11:17:38 +0000 (14:17 +0300)]
am33xx: Fix USB for am335x boards
USB nodes were mistakenly disabled in
commit
942853dd96df ("arm: dts: Resync BeagleBone device trees")
This commit is to fix the following issue:
starting USB...
No working controllers found
USB is stopped. Please issue 'usb start' first.
starting USB...
No working controllers found
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=
0782e8572ce43f521ed6ff15e4a7ab9aa5acdc85
Fixes:
942853dd96df ("arm: dts: Resync BeagleBone device trees")
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Paul Barker <paul.barker@sancloud.com>
Aswath Govindraju [Wed, 4 Aug 2021 13:12:46 +0000 (18:42 +0530)]
include: configs: am64x_evm: Add env variables for booting to kernel using USB MSC device
Add env variables for booting to kernel from USB MSC device. The second
partition in the USB MSC device needs to formatted as ext4 file system with
kernel and dtb images, present in the /boot folder.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Aswath Govindraju [Wed, 4 Aug 2021 13:12:45 +0000 (18:42 +0530)]
environment: ti: mmc.h: Make the finduuid generic for usage across different device types
Make finduuid generic by making it dependent on the boot variable. For
example, this can now be used for finding the uuid of partitions in usb
device too.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Aswath Govindraju [Wed, 4 Aug 2021 13:12:44 +0000 (18:42 +0530)]
board: ti: am64x: Add support for fixing dr_mode while booting from USB
Fix the dr_mode in the U-Boot device tree blob, by reading the mode field
from the USB Boot Configuration fields. The dr_mode will only be fixed when
booting from USB.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Derald D. Woods [Mon, 2 Aug 2021 03:46:19 +0000 (03:46 +0000)]
ARM: omap3: evm: Enable booting 'fitImage' with DEFAULT_FIT_TI_ARGS
This commit uses the existing DEFAULT_MMC_TI_ARGS and
DEFAULT_FIT_TI_ARGS defintions to replace the 'mmc*' environment
variables in the configuration. The check for the 'boot_fit' is handled
like the 'am335x_*' boards with 'CONFIG_BOOTCOMMAND'.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Tom Rini [Sat, 31 Jul 2021 23:21:58 +0000 (19:21 -0400)]
arm: am335x: Enable SPL_OF_CONTROL on some configs
Both am335x_boneblack_vboot and am335x_evm_spiboot require
SPL_OF_CONTROL to function but are currently missing this option. Add
it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 10 Sep 2021 12:24:19 +0000 (08:24 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: dts: Armada8k enable mdio (Sven)
- a37xx: pci: Fix / enhance error handling (Pali)
- mvebu: espressobin/turris_: Enable GPT partition support (Pali)
- mvebu: sata_mv: Probe all ports (Tony)
- a37xx: pci: Don't spam about PIO Response Status (Marek)
Ye Li [Tue, 17 Aug 2021 09:20:34 +0000 (17:20 +0800)]
mmc: fix device_remove when HS400_ES is enabled
HS400_ES is missed when down grade to HS mode during
device_remove the mmc device
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Ye Li [Tue, 17 Aug 2021 09:20:33 +0000 (17:20 +0800)]
mmc: fix switch issue with send_status disabled
When send_status is false or wait_dat0 is not supported, the switch
function should not send CMD13 but directly return.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Aswath Govindraju [Fri, 13 Aug 2021 17:34:42 +0000 (23:04 +0530)]
doc: usage: mmc: Document usage of speed mode in "mmc dev" and "mmc rescan"
Add documentation on the usage of "mmc dev" and "mmc rescan" commands to
set user defined speed modes.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Aswath Govindraju [Fri, 13 Aug 2021 17:34:41 +0000 (23:04 +0530)]
mmc: Add support for enumerating MMC card in a given mode using mmc command
Add support for enumerating MMC card in a given mode using mmc rescan and
mmc dev commands. The speed mode is provided as the last argument in these
commands and is indicated using the index from enum bus_mode in
include/mmc.h. A speed mode can be set only if it has already been enabled
in the device tree.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Yuezhang.Mo@sony.com [Wed, 17 Mar 2021 06:44:37 +0000 (06:44 +0000)]
Revert "mmc: sdhci: set to INT_DATA_END when there are data"
This reverts commit
17ea3c862865c0d704646f67dbf8412f9ff54f59.
In eMMC specification, for the response-with-busy(R1b, R5b)
command, the DAT0 will driven to LOW as BUSY status, and in
sdhci specification, the transfer complete bit should be wait
for BUSY status de-assert.
All response-with-busy commands don't contain data, the data
judgement is no need.
Signed-off-by: Yuezhang.Mo <Yuezhang.Mo@sony.com>
Reviewed-by: Andy Wu <Andy.Wu@sony.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Marek Behún [Tue, 7 Sep 2021 15:27:08 +0000 (17:27 +0200)]
arm: a37xx: pci: Don't spam about PIO Response Status
Use dev_dbg() instead of dev_err() in pcie_advk_check_pio_status().
For example CRS is not an error status, it just says that the request
should be retried.
Without this, U-Boot spams the terminal with
pcie_advk pcie@
d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x100000
pcie_advk pcie@
d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x108000
pcie_advk pcie@
d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x110000
pcie_advk pcie@
d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x120000
pcie_advk pcie@
d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x128000
pcie_advk pcie@
d0070000: Non-posted PIO Response Status: UR, 0xc80 @ 0x130000
...
when a device is not connected to a PCIe switch (Unsupported Request
from the switch).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tony Dinh [Mon, 6 Sep 2021 23:28:35 +0000 (16:28 -0700)]
arm: marvell: Dreamplug: fix typo in eth1 name
Ethernet 1 should be ethernet-controller@76000.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tony Dinh [Sun, 5 Sep 2021 21:48:25 +0000 (14:48 -0700)]
arm: mvebu : sata_mv should probe all ports
While a board could have multiple SATA ports, some of the ports might
not have a disk attached to them. So while probing for disks,
sata_mv_probe() should continue probing all ports, and skip one with
no disk attached.
Tests with:
- Seagate Goflex Net (Marvell Kirkwood 88F6281) out-of-tree u-boot.
- Zyxel NSA325 (Marvell Kirkwood 88F6282 out-of-tree u-boot.
Observation:
If a board has 2 or more SATA ports, and there is only one disk
attached to one of the ports, sata_mv_probe() does not return
a successful probe status. And if only one disk is attached to the
2nd port (i.e. port 1), it is not probed at all.
Patch Description:
Let sata_mv_probe() continues probing all ports, even if there
is error in probing a given port, and then return a successful
status if there is at least one port was probed successfully.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 2 Sep 2021 10:00:51 +0000 (12:00 +0200)]
arm: mvebu: a38x: Fix 5200000 baudrate
Fix baudrate value 5150000 which was added in commit
ead4864fa6cc ("arm:
mvebu: a38x: Define supported UART baudrates").
Exact value for divisor 3 with 250 MHz TCLK is 5208333 baudrate. In above
commit I incorrectly rounded it to 5150000 value due to testing with
USB-UART hw which incorrectly reported exact value and divisor configured
on other other end of UART link.
Fix this value to 520000 baudrate which is more close to the exact hardware
value and also has less fraction parts.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes:
ead4864fa6cc ("arm: mvebu: a38x: Define supported UART baudrates")
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 2 Sep 2021 08:46:37 +0000 (10:46 +0200)]
arm: mvebu: espressobin: Enable GPT partition support
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Thu, 2 Sep 2021 08:34:00 +0000 (10:34 +0200)]
arm: mvebu: turris_{omnia, mox}: GPT partition support
This allows U-Boot to access filesystems on GPT partitioned disks.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 27 Aug 2021 12:14:44 +0000 (14:14 +0200)]
arm: a37xx: pci: Implement re-issuing config requests on CRS response
According to PCIe base specification, if CRS Software Visibility is not
enabled, the Root Complex must re-issue the Configuration Request as a new
Request.
Normally this part of Root Complex is implemented in hardware but aardvark
is somehow special and does not implement it in hardware and expect that
handling of config requests are fully implemented in software.
This re-issuing functionality is required also because U-Boot does not
support CRS Software Visibility feature and therefore expects that Root
Complex re-issues requests as is specified in PCIe base specification.
Retry / re-issue config request up to the PIO_MAX_RETRIES, to prevent
infinite loop. After retry count exceed PIO_MAX_RETRIES, returns failure.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 27 Aug 2021 12:14:43 +0000 (14:14 +0200)]
arm: a37xx: pci: Disable returning CRS response
There was mistake in commit
4cd61c43fd51 ("arm: a37xx: pci: Fix handling
PIO config error responses"). U-Boot does not support handling of CRS
return value for PCI_VENDOR_ID config read request and also does not set
CRSSVE bit.
Therefore disable returning CRS response for now.
Signed-off-by: Pali Rohár <pali@kernel.org>
Fixes:
4cd61c43fd51 ("arm: a37xx: pci: Fix handling PIO config error responses")
Reviewed-by: Stefan Roese <sr@denx.de>
Sven Auhagen [Tue, 24 Aug 2021 08:14:25 +0000 (10:14 +0200)]
arm: mvebu: dts: Armada8k enable mdio
Since mvpp2 is using the new mdio driver and the cp110 has been
synced with the linux upstream, the mdio has to enabled in the
device tree file.
This is missing for some device tree files and therefore the
network cards do not come online.
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Tony Dinh [Thu, 12 Aug 2021 21:33:34 +0000 (14:33 -0700)]
arm: kirkwood: Sheevaplug: Update board maintainer
Change maintainer to me. Prafulla is no longer active in U-Boot community.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Lokesh Vutla [Fri, 3 Sep 2021 07:15:37 +0000 (12:45 +0530)]
MAINTAINERS: Update ARM TI entry
Move TI maintainership to Tom.
Updated with the following commands:
find ./ -name MAINTAINERS | xargs sed -i s/"Lokesh Vutla <lokeshvutla@ti.com>"/"Tom Rini <trini@konsulko.com>"/g
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 9 Sep 2021 14:57:34 +0000 (10:57 -0400)]
Kconfig: Drop duplicate 'select SHA512' instances
When dropping SHA512_ALGO in general, we didn't catch some cases where
an option was selecting both SHA512 and SHA512_ALGO and caused them to
select SHA512 twice. Kconfig doesn't complain, but this is still wrong
and should be corrected.
Fixes:
e60e44993120 ("lib: Drop SHA512_ALGO in lieu of SHA512")
Reported-by: Andreas Schwab <schwab@suse.de>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 9 Sep 2021 01:23:55 +0000 (21:23 -0400)]
Merge branch '2021-09-08-fix-FIT-hash-algos-in-SPL'
- Merge some fixes to how we enable hash algorithms for FIT images in
SPL. This fixes a few cases where we should have had some options
enabled, but did not. This also removes otherwise unused options in a
few other cases.
Alexandru Gagniuc [Fri, 3 Sep 2021 00:54:22 +0000 (19:54 -0500)]
image: Drop IMAGE_ENABLE_{MD5, CRC32} #defines
These are no longer used, so drop them.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Alexandru Gagniuc [Fri, 3 Sep 2021 00:54:21 +0000 (19:54 -0500)]
image: Drop if/elseif hash selection in calculate_hash()
calculate_hash() would try to select the appropriate hashing function
by a if/elseif contruct. But that is exactly why hash_lookup_algo()
exists, so use it instead.
This does mean that we now have to 'select HASH' to make sure we get
the hash_lookup_algo() symbol. However, the change makes sense because
even basic FITs will have to deal with "hash" nodes.
My only concern is that the 'select SPL_HASH' might cause some
platform to grow above its SPL size allowance
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Make FSL_CAAM be implied only on ARM && SPL]
Signed-off-by: Tom Rini <trini@konsulko.com>
Alexandru Gagniuc [Fri, 3 Sep 2021 00:54:20 +0000 (19:54 -0500)]
common: Move MD5 hash to hash_algo[] array.
MD5 is being called directly in some places, but it is not available
via hash_lookup_algo("md5"). This is inconsistent with other hasing
routines. To resolve this, add an "md5" entry to hash_algos[].
The #ifdef clause looks funnier than those for other entries. This is
because both MD5 and SPL_MD5 configs exist, whereas the other hashes
do not have "SPL_" entries. The long term plan is to get rid of the
ifdefs, so those should not be expected to survive much longer.
The md5 entry does not have .hash_init/update/finish members. That's
okay because hash_progressive_lookup_algo() will catch that, and
return -EPROTONOSUPPORT, while hash_lookup_algo() will return the
correct pointer.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Use CONFIG_IS_ENABLED not IS_ENABLED for MD5 check]
Signed-off-by: Tom Rini <trini@konsulko.com>
Alexandru Gagniuc [Fri, 3 Sep 2021 00:54:19 +0000 (19:54 -0500)]
common/spl: Drop [ST]PL_HASH_SUPPORT in favor of [ST]PL_HASH
All of these configs exist. Stick to using CONFIG_[ST]PL_HASH, and drop all
references to CONFIG_[ST]PL_HASH_SUPPORT. This means we need for
CHAIN_OF_TRUST to select SPL_HASH now.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Add TPL case, fix CHAIN_OF_TRUST, other tweaks]
Signed-off-by: Tom Rini <trini@konsulko.com>
Alexandru Gagniuc [Fri, 3 Sep 2021 00:54:18 +0000 (19:54 -0500)]
lib: Drop SHA512_ALGO in lieu of SHA512
SHA512_ALGO was used as a "either SHA512 or SHA384", although the
implementations of these two algorithms share a majority of code.
From a Kconfig interface perspective, it makes sense to present two
distinct options. This requires #ifdefing out the SHA512
implementation from sha512.c. The latter doesn't make any sense.
It's reasonable to say in Kconfig that SHA384 depends on SHA512, and
seems to be the more polite way to handle the selection.
Thus, automatically select SHA512 when SHA384 is enabled.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Alexandru Gagniuc [Fri, 3 Sep 2021 00:54:17 +0000 (19:54 -0500)]
common: Remove unused CONFIG_FIT_SHAxxx selectors
Originally CONFIG_FIT_SHAxxx enabled specific SHA algos for and only
for hash_calculate() in common/image-fit.c. However, since commit
14f061dcb1 ("image: Drop IMAGE_ENABLE_SHAxxx"),
the correct selector was changed to CONFIG_SHAxxx.
The extra "_FIT_" variants are neither used, nor needed. Remove them.
One defconfig disables FIT_SHA256, which is now changed to 'SHA256'.
CMD_MVEBU_BUBT needs to select select SHA256 to avoid undefined
references to "sha256_*()". bubt.c needs sha256, so this selection is
correct. It is not clear why this problem did not manifest before.
Note that SHA selection in SPL is broken for this exact reason. There
is no corresponding SPL_SHAxxx. Fixing this is is beyond the scope of
this change.
Also note that we make CONFIG_FIT now imply SHA256, to make up for
FIT_SHA256 previously being a default y option.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[trini: Add imply SHA256 to FIT]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 7 Sep 2021 11:58:56 +0000 (07:58 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
Zong Li [Wed, 1 Sep 2021 07:01:43 +0000 (15:01 +0800)]
riscv: lib: modify the indent
We usually use a space in function declaration, rather than a tab.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Zong Li [Wed, 1 Sep 2021 07:01:42 +0000 (15:01 +0800)]
board: sifive: use ccache driver instead of helper function
Invokes the common cache_init function to initialize ccache.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Zong Li [Wed, 1 Sep 2021 07:01:41 +0000 (15:01 +0800)]
riscv: lib: implement enable_caches for sifive cache
The enable_caches is a generic hook for architecture-implemented, we
define this function to enable composable cache of sifive platforms.
In sifive_cache, it invokes the generic cache_enable interface of cache
uclass to execute the relative implementation in SiFive ccache driver.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Zong Li [Wed, 1 Sep 2021 07:01:40 +0000 (15:01 +0800)]
common: board_r: support enable_caches for RISC-V
The enable_caches is a generic hook for architecture-implemented, we
leverage this function to enable caches for RISC-V
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Zong Li [Wed, 1 Sep 2021 07:01:39 +0000 (15:01 +0800)]
cache: add sifive composable cache driver
This driver is currently responsible for enabling all ccache ways.
Composable cache could be configure as RAM or cache, we will use it as
RAM at the beginning to put the u-boot SPL there. In u-boot proper
phrase, we will use the composable cache as cache, and try to enable the
cache ways.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Thomas Skibo [Sun, 15 Aug 2021 23:04:03 +0000 (16:04 -0700)]
riscv: Add missing sentinel in ocores_i2c.c
The ocores_i2c.c driver is missing a sentinel at the end of
the compatible strings list. This causes the "dm compat" command
to spew garbage.
Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Heinrich Schuchardt [Sat, 4 Sep 2021 08:36:49 +0000 (10:36 +0200)]
riscv: show code leading to exception
To make analyzing exceptions easier output the code that leads to it.
We already do the same on the ARM platform.
Here is an example:
=> exception ebreak
Unhandled exception: Breakpoint
EPC:
000000008ff5d50e RA:
000000008ff5d62c TVAL:
0000000000000000
EPC:
000000008020b50e RA:
000000008020b62c reloc adjusted
Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)
To disassemble the code we can use the decodecode script:
$ echo 'Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)' | \
CROSS_COMPILE=riscv64-linux-gnu- scripts/decodecode
Code: 2785 0693 07a0 dce3 fef6 47a5 d563 00e7 (9002)
All code
========
0: 2785 addiw a5,a5,1
2:
07a00693 li a3,122
6:
fef6dce3 bge a3,a5,0xfffffffffffffffe
a: 47a5 li a5,9
c:
00e7d563 bge a5,a4,0x16
10:* 9002 ebreak <-- trapping instruction
...
Code starting with the faulting instruction
===========================================
0: 9002 ebreak
...
As it is not always clear if the first 16 bits are at the start or in the
middle of a 32bit instruction it may become necessary to strip the first
u16 from the output before calling decodecode to get the correct
disassembled code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Heinrich Schuchardt [Sat, 4 Sep 2021 09:53:36 +0000 (11:53 +0200)]
configs: qemu-riscvXX_spl_defconfig enable CMD_SBI
Both for 64bit and 32bit at least on one board we should compile the sbi
command. Enabling it on QEMU will allow to write a test for it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Heinrich Schuchardt [Wed, 25 Aug 2021 16:21:57 +0000 (18:21 +0200)]
riscv: enable booting HiFive Unmatched from SATA
On the HiFive Unmatched a PCI to SATA adapter may be used to install a SATA
drive. Enable booting from it.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Tom Rini [Mon, 6 Sep 2021 14:31:56 +0000 (10:31 -0400)]
Merge tag 'u-boot-stm32-
20210906' of https://source.denx.de/u-boot/custodians/u-boot-stm
- fix EFI boot with OP-TEE for STM32MP15 boards
Patrice Chotard [Wed, 1 Sep 2021 07:56:02 +0000 (09:56 +0200)]
stm32mp: Fix board_get_usable_ram_top()
When booting in EFI, lib/efi_loader/efi_memory.c calls
board_get_usable_ram_top(0) which returns by default
gd->ram_base + gd->ram_size which is the top of DDR.
In case of OPTEE boot, the top of DDR is currently reserved by OPTEE,
board_get_usable_ram_top(0) must return an address outside OPTEE
reserved memory.
gd->ram_top matches this constraint as it has already been initialized
by substracting all DT reserved-memory (included OPTEE memory area).
Fixes:
92b611e8b003 ("stm32mp: correctly handle board_get_usable_ram_top(0)")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Sat, 4 Sep 2021 19:59:00 +0000 (15:59 -0400)]
Merge tag 'efi-2021-10-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-10-rc4
Documentation:
Remove invalid reference to configuration variable in UEFI doc
UEFI:
Parameter checks for the EFI_TCG2_PROTOCOL
Improve support of preseeding UEFI variables.
Correct the calculation of the size of loaded images.
Allow for UEFI images with zero VirtualSize
Masahisa Kojima [Fri, 3 Sep 2021 01:55:52 +0000 (10:55 +0900)]
efi_loader: fix efi_tcg2_hash_log_extend_event() parameter check
TCG EFI Protocol Specification defines that PCRIndex parameter
passed from caller must be 0 to 23.
TPM2_MAX_PCRS is currently used to check the range of PCRIndex,
but TPM2_MAX_PCRS is tpm2 device dependent and may have larger value.
This commit newly adds EFI_TCG2_MAX_PCR_INDEX macro, it is used to
check the range of PCRIndex parameter.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Masahisa Kojima [Fri, 3 Sep 2021 01:55:51 +0000 (10:55 +0900)]
efi_loader: fix boot_service_capability_min calculation
TCG EFI Protocol Specification requires to the input
ProtocolCapability.Size < size of the EFI_TCG2_BOOT_SERVICE_CAPABILITY
up to and including the vendor ID field.
Current implementation does different calculation, let's fix it.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Masahisa Kojima [Fri, 3 Sep 2021 01:55:50 +0000 (10:55 +0900)]
efi_loader: add missing parameter check for EFI_TCG2_PROTOCOL api
TCG EFI Protocol Specification defines the required parameter
checking and return value for each API.
This commit adds the missing parameter check and
fixes the wrong return value to comply the specification.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Thu, 2 Sep 2021 05:11:45 +0000 (07:11 +0200)]
efi_loader: correct determination of secure boot state
When U-Boot is started we have to use the existing variables to determine
in which secure boot state we are.
* If a platform key PK is present and DeployedMode=1, we are in deployed
mode.
* If no platform key PK is present and AuditMode=1, we are in audit mode.
* Otherwise if a platform key is present, we are in user mode.
* Otherwise if no platform key is present, we are in setup mode.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 26 Aug 2021 02:30:24 +0000 (04:30 +0200)]
efi_loader: efi_auth_var_type for AuditMode, DeployedMode
Writing variables AuditMode and DeployedMode serves to switch between
Secure Boot modes. Provide a separate value for these in efi_auth_var_type.
With this patch the variables will not be read from from file even if they
are marked as non-volatile by mistake.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Wed, 25 Aug 2021 17:13:24 +0000 (19:13 +0200)]
efi_loader: don't load signature database from file
The UEFI specification requires that the signature database may only be
stored in tamper-resistant storage. So these variable may not be read
from an unsigned file.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sun, 29 Aug 2021 09:52:44 +0000 (11:52 +0200)]
efi_loader: rounding of image size
We should not first allocate memory and then report a rounded up value as
image size. Instead first round up according to section allocation and then
allocate the memory.
Fixes:
82786754b9d2 ("efi_loader: ImageSize must be multiple of SectionAlignment")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Sun, 29 Aug 2021 09:52:44 +0000 (11:52 +0200)]
efi_loader: sections with zero VirtualSize
In a section header VirtualSize may be zero. This is for instance seen in
the .sbat section of shim. In this case use SizeOfRawData as section size.
Fixes:
9d30a941cce5 ("efi_loader: don't load beyond VirtualSize")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Asherah Connor <ashe@kivikakk.ee>
Michal Simek [Fri, 27 Aug 2021 10:41:38 +0000 (12:41 +0200)]
doc: Remove information about CAPSULE_FMP_HEADER
This Kconfig symbol was never added to U-Boot but it was mentioned in the
origin commit
c35df7c9e43e ("qemu: arm64: Add documentation for capsule
update"). That's why remove it from documentation to be accurate.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Fri, 3 Sep 2021 17:17:43 +0000 (13:17 -0400)]
Merge tag 'xilinx-for-v2021.10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.10-rc4
doc:
- Fix uefi documentation
spi:
- Fix gqspi driver for single configuration
Ashok Reddy Soma [Fri, 20 Aug 2021 13:43:17 +0000 (07:43 -0600)]
spi: zynqmp_gqspi: Fix dma alignment issue
DMA is aligned to ARCH_DMA_MINALIGN(64 bytes), but as per spec, alignment
required is 4bytes only. Change DMA alignment from ARCH_DMA_MINALIGN to
GQSPI_DMA_ALIGN. Remove alignment of data length in non-exponential case.
Some minor improvements in the initialization to initialize gen_fifo
threshold and disable qspi controller while setting config register.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ashok Reddy Soma [Fri, 20 Aug 2021 13:43:16 +0000 (07:43 -0600)]
spi: zynqmp_gqspi: Switch genfifo start to manual mode
Current implementation uses auto mode for starting generic FIFO.
The recommendation from IP designers is to use manual mode, hence
change to manual start mode.
In fill genfifo first write to genfio and then trigger manual start.
Also enable and check for genfifo empty interrupt status in place of
genfifo not full interrupt.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 27 Aug 2021 10:27:46 +0000 (12:27 +0200)]
doc: Remove information about CAPSULE_FMP_HEADER
This Kconfig symbol was never added to U-Boot but it was mentioned in the
origin commit
c35df7c9e43e ("qemu: arm64: Add documentation for capsule
update"). That's why remove it from documentation to be accurate.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>