Tom Rini [Fri, 14 Apr 2023 14:50:55 +0000 (10:50 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: Boot support for 4K Native disks (Pali)
- a38x: Perform DDR training sequence again for 2nd boot (Tony)
Tom Rini [Fri, 14 Apr 2023 14:50:04 +0000 (10:50 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
The biggest change is some refactoring of the H616 DRAM driver, which
allows better fine-tuning for each board, and is the base for pending
LPDDR3 and LPDDR4 support, needed by new boards. The sun8i-emac
Ethernet driver sees some refactoring that enables it for the Allwinner
D1 EMAC IP. The sunxi HDMI driver is now using more DT properties. Also
the early SPL code now supports some odd H616 SoC variant.
There are some more patches pending, that require the final review
touches and some testing, I will send a separate PR for them later.
The gitlab CI completed successfully, and I boot tested a few boards
with different SoCs, via FEL and SD card, into Linux.
Tony Dinh [Mon, 3 Apr 2023 04:42:33 +0000 (21:42 -0700)]
ddr: marvell: a38x: Perform DDR training sequence again for 2nd boot
- DDR Training sequence happens very fast. The speedup in boot time is
negligible by skipping the training sequence during 2nd boot or after.
So remove the check and skip.
- This change improves the robustness of DDR training. If u-boot crashed
during DDR training, the training could be left in a limbo state, where
the BootROM has recorded that it is already in a 2nd boot. The training
must be repeated in this scenario to get out of this limbo state, but due
to the check it cannot be performed.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 29 Mar 2023 19:25:58 +0000 (21:25 +0200)]
arm: mvebu: spl: Allow to build SATA kwbimage for 4K Native disks
Add a new config option CONFIG_MVEBU_SPL_SATA_BLKSZ for specifying block
size of SATA disk. This information is used during building of SATA
kwbimage and must be correctly set, otherwise BootROM does not load SPL.
For 4K Native disks CONFIG_MVEBU_SPL_SATA_BLKSZ must be set to 4096.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Martin Rowe <martin.p.rowe@gmail.com>
Pali Rohár [Wed, 29 Mar 2023 19:25:57 +0000 (21:25 +0200)]
tools: kwboot: Add support for parsing SATA images with non-512 block size
Currently kwboot expected that sector size for SATA image is always 512
bytes. If SATA image cannot be parsed with sector size of 512 bytes, try
larger sector sizes which are power of two and up to the 32 kB. Maximal
theoretical value is 32 kB because ATA IDENTIFY command returns sector size
as 16-bit number.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Wed, 29 Mar 2023 19:25:56 +0000 (21:25 +0200)]
tools: kwbimage: Add support for SATA images with non-512 byte block size
SATA kwbimage contains offsets in block size unit, not in bytes.
Until now kwbimage expected that SATA disk always have block size of 512
bytes. But there are 4K Native SATA disks with block size of 4096 bytes.
New SATA_BLKSZ command allows to specify different block size than 512
bytes and therefore allows to generate kwbimage for disks with different
block sizes.
This change add support for generating SATA images with different block
size. Also it add support for verifying and dumping such images.
Because block size itself is not stored in SATA kwbimage, image
verification is done by checking every possible block size (it is any
power of two value between 512 and 32 kB).
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Wed, 29 Mar 2023 19:25:55 +0000 (21:25 +0200)]
tools: kwbimage: Simplify align code
Replace repeated code patterns by generic code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Wed, 29 Mar 2023 19:25:54 +0000 (21:25 +0200)]
tools: imagetool: Extend print_header() by params argument
This allows image type print_header() callback to access struct
image_tool_params *params.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Tue, 11 Apr 2023 18:35:51 +0000 (20:35 +0200)]
cmd: mvebu/bubt: a38x: Do not hardcode SATA block size to 512
Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk. In case of error, fallback
back to 512 bytes.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Wed, 29 Mar 2023 19:25:52 +0000 (21:25 +0200)]
arm: mvebu: spl: Do not hardcode SATA block size to 512
Find SATA block device by blk_get_devnum_by_uclass_id() function and read
from it the real block size of the SATA disk.
Signed-off-by: Pali Rohár <pali@kernel.org>
Andre Przywara [Thu, 8 Dec 2022 20:38:54 +0000 (20:38 +0000)]
sunxi: A64: drop boot0 header reservation
In the early days of the Allwinner A64 U-Boot support, we relied on a
vendor provided "boot0" binary to perform the DRAM initialisation. This
replaced the SPL, and required to equip the U-Boot (proper) binary with
a vendor specific header to be recognised as a valid boot0 payload.
Fortunately these days are long gone (we gained SPL and DRAM support in
early 2017!), and we never needed to use that hack on any later 64-bit
Allwinner SoC.
Since this is highly obsolete by now, remove that option from the
defconfigs of all A64 boards. We leave the code still in here for now,
since some people expressed their interest in this.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Wed, 5 Apr 2023 20:30:11 +0000 (21:30 +0100)]
sunxi: arm64: boot0.h: runtime check for RVBAR address
Some SoCs of the H616 family use a die variant, that puts some CPU power
and reset control registers at a different address. There are examples
of two instances of the same board, using different die revisions of the
otherwise same H313 SoC. We need to write to a register in that block
*very* early in the SPL boot, to switch the core to AArch64.
Since the devices are otherwise indistinguishable, let the SPL code read
that die variant and use the respective RVBAR address based on that.
That is a bit tricky, since we need to do that in hand-coded AArch32
machine language, shared by all 64-bit SoCs. To avoid build dependencies
in this mess, we always provide two addresses to choose from, and just
give identical values for all other SoCs. This allows the same code to
run on all 64-bit SoCs, and controls this switch behaviour purely from
Kconfig.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Andre Przywara [Thu, 8 Dec 2022 20:33:57 +0000 (20:33 +0000)]
sunxi: boot0.h: allow RVBAR MMIO address customisation
To switch the ARMv8 Allwinner SoCs into the 64-bit AArch64 ISA, we need
to program the 64-bit start code address into an MMIO mapped register
that shadows the architectural RVBAR register.
This address is SoC specific, with just two versions out there so far.
Now a third address emerged, on a *variant* of an existing SoC (H616).
Change the boot0.h start code to make this address a Kconfig
selectable option, to allow easier maintenance.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:19 +0000 (10:21 +0200)]
sunxi: Add TPR2 parameter for H616 DRAM driver
It turns out that some H616 and related SoCs (like H313) need TPR2
parameter for proper working. Add it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:18 +0000 (10:21 +0200)]
sunxi: Parameterize some of H616 DDR3 timings
Currently twr2rd, trd2wr and twtp are constants, but according to
vendor driver they are calculated from other values. Do that here too,
in preparation for later introduction of new parameter.
While at it, introduce constant for t_wr_lat, which was incorrectly
calculated from tcl before.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:17 +0000 (10:21 +0200)]
sunxi: Parameterize "unknown feature" in H616 DRAM driver
Part of the code, previously known as "unknown feature", also doesn't
have constant values. They are derived from TPR0 parameter in vendor
DRAM code.
Let's move that code to separate function and introduce TPR0 parameter
here too, to ease adding new boards.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:16 +0000 (10:21 +0200)]
sunxi: Parameterize bit delay code in H616 DRAM driver
These values are highly board specific and thus make sense to add
parameter for them. To ease adding support for new boards, let's make
them same as in vendor DRAM settings.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:15 +0000 (10:21 +0200)]
sunxi: Make bit delay function in H616 DRAM code void
Mentioned function result is always true and result isn't checked
anyway. Let's make it void.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:14 +0000 (10:21 +0200)]
sunxi: Always configure ODT on H616 DRAM
Vendor H616 DRAM code always configure part which we call ODT
configuration. Let's reflect that here too.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:13 +0000 (10:21 +0200)]
sunxi: Convert H616 DRAM options to single setting
Vendor DRAM settings use TPR10 parameter to enable various features.
There are many mores features that just those that are currently
mentioned. Since new will be added later and most are not known, let's
reuse value from vendor DRAM driver as-is. This will also help adding
support for new boards.
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:12 +0000 (10:21 +0200)]
sunxi: parameterize H616 DRAM ODT values
While ODT values for same memory type are similar, they are not
necessary the same. Let's parameterize them and make parameter same as
in vendor DRAM settings. That way it will be easy to introduce new board
support.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:11 +0000 (10:21 +0200)]
sunxi: cosmetic: Fix H616 DRAM driver code style
Fix code style for pointer declaration. This is just cosmetic change to
avoid checkpatch errors in later commits.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Mon, 10 Apr 2023 08:21:10 +0000 (10:21 +0200)]
sunxi: Fix write to H616 DRAM CR register
Vendor DRAM code actually writes to whole CR register and not just sets
bit 31 in mctl_ctrl_init().
Just to be safe, do that here too.
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 23:50:19 +0000 (17:50 -0600)]
ARM: dts: sun6i: mixtile-loftq: Add USB1 VBUS regulator
This board is configured with CONFIG_USB1_VBUS_PIN="PH24", but no
regulator exists in its device tree. Add the regulator, so USB will
continue to work when the PHY driver switches to using the regulator
uclass instead of a GPIO.
Update the device tree here because it does not exist in Linux.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:06 +0000 (16:51 -0600)]
net: sun8i-emac: Remove the SoC variant ID
Now that all differences in functionality are covered by individual
flags, remove the enumeration of SoC variants.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:05 +0000 (16:51 -0600)]
net: sun8i-emac: Use common syscon setup for R40
While R40 puts the EMAC syscon register at a different address from
other variants, the relevant portion of the register's layout is the
same. Factor out the register offset so the same code can be shared
by all variants. This matches what the Linux driver does.
This change provides two benefits beyond the simplification:
- R40 boards now respect the RX delays from the devicetree
- This resolves a warning on architectures where readl/writel
expect the address to have a pointer type, not phys_addr_t.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:04 +0000 (16:51 -0600)]
net: sun8i-emac: Add a flag for the internal PHY switch
Describe this feature instead of using the SoC ID.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:03 +0000 (16:51 -0600)]
net: sun8i-emac: Add a flag for RMII support
Describe this feature instead of using the SoC ID.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Sun, 22 Jan 2023 22:51:02 +0000 (16:51 -0600)]
net: sun8i-emac: Add a structure for variant data
Currently, EMAC variants are distinguished by their identity, but this
gets unwieldy as more overlapping variants are added. Add a structure so
we can describe the individual feature differences between the variants.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Samuel Holland [Mon, 28 Nov 2022 07:02:28 +0000 (01:02 -0600)]
video: sunxi: dw-hdmi: Use DM for HVCC regulator
The HDMI PHY depends on the HVCC supply being enabled. So far we have
relied on it being enabled by an earlier firmware stage (SPL or TF-A).
Attempt to enable the regulator here, so we can remove that dependency.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Samuel Holland [Mon, 28 Nov 2022 07:02:27 +0000 (01:02 -0600)]
video: sunxi: dw-hdmi: Use DM for clock gates and resets
This abstracts away the CCU register layout, which is necessary for
supporting new SoCs like H6 with a reorganized CCU. One of the resets is
referenced from the PHY node instead of the controller node, so it will
have to wait until the PHY code is factored out to a separate driver.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Tom Rini [Tue, 11 Apr 2023 13:29:28 +0000 (09:29 -0400)]
Merge tag 'for-v2023-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2023-07-rc1
- designware_i2c: remove apparently redundant read of 'i2c, speeds' DT property
from Rasmus Villemoes
- fix: correct I2C deblock logic from Haibo Chen
- imx_lpi2c: Fix misuse the IS_ENABLED for DM clock from Ye Li
- m68k: convert to DM from Angelo Dureghello
Angelo Dureghello [Tue, 4 Apr 2023 22:59:28 +0000 (00:59 +0200)]
m68k: upgrading all boards to dm i2c
Upgrading all board configs where i2c is involved to DM i2c.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Angelo Dureghello [Tue, 4 Apr 2023 22:59:27 +0000 (00:59 +0200)]
m68k: dts: add i2c nodes
Add all the i2c nodes for each family, and add specific i2c
overwrites in the related board-specific dts.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Angelo Dureghello [Tue, 4 Apr 2023 22:59:26 +0000 (00:59 +0200)]
i2c: fsl_i2c: fix m68k transferts
This driver is actually used for powerpc and m68k/ColdFire.
On ColdFire SoC's, interrupt flag get not set if IIEN flag (mbcr bit6,
interrupt enabled) is not set appropriately before each transfert.
As a result, the transfert hangs forever waiting for IIEN.
This patch set IIEN before each transfert, while considering this fix
as not harming powerpc arch.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Angelo Dureghello [Tue, 4 Apr 2023 22:59:25 +0000 (00:59 +0200)]
m68k: mcf5441x: fix CONFIG_SYS_FSL_I2C definition
Fix CONFIG_SYS_FSL_I2C to correct name CONFIG_SYS_I2C_FSL.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Angelo Dureghello [Tue, 4 Apr 2023 22:59:24 +0000 (00:59 +0200)]
board: stmark2: add i2c0 pinmux pad configuration
Add CFG option to enable proper pinmux pad setting for i2c0.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Angelo Dureghello [Tue, 4 Apr 2023 22:59:23 +0000 (00:59 +0200)]
m68k: move CONFIG_SYS_I2C to CFG_ namespace
Move CONFIG_SYS_I2C_X to CFG_ namespace.
This is a preliminary step to move to dm i2c.
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Ye Li [Thu, 6 Apr 2023 10:26:35 +0000 (18:26 +0800)]
i2c: imx_lpi2c: Fix misuse the IS_ENABLED for DM clock
The IS_ENABLED, which does not consider SPL build, should be replaced
by CONFIG_IS_ENABLED.
For the case that we only enable DM CLK for u-boot but not in SPL, the
IS_ENABLED(CONFIG_CLK) still returns true, then cause clock failure.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Haibo Chen [Mon, 27 Mar 2023 11:21:43 +0000 (19:21 +0800)]
i2c: correct I2C deblock logic
Current code use dm_gpio_get_value() to get SDA and SCL value, and the
value depends on whether DTS file config the GPIO_ACTIVE_LOW. In ususal
case for i2c GPIO, DTS need to set GPIO_ACTIVE_LOW for SCL/SDA pins. So
here the logic is not correct.
And we must not use GPIOD_ACTIVE_LOW in client code include the
dm_gpio_set_dir_flags(), it is DTS's responsibility for this flag. So
remove GPIOD_ACTIVE_LOW here.
Fixes:
aa54192d4a87 ("dm: i2c: implement gpio-based I2C deblock")
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Alexander Kochetkov <al.kochet@gmail.com <mailto:al.kochet@gmail.com>>
Rasmus Villemoes [Fri, 24 Mar 2023 08:09:22 +0000 (09:09 +0100)]
i2c: designware_i2c: remove apparently redundant read of 'i2c, speeds' DT property
This code first figures out if there is an i2c,speeds property, if so
its size in u32s, and then reads the value into the local speeds[]
array. Both 'size' and 'speeds' are completely unused thereafter.
It's not at all clear what this is supposed to do. Of course, it could
be seen as a sanity check that the DT node does have an i2c,speeds
property with an appropriate number of elements, but for that one
wouldn't actually need to read it into speeds[]. Also, I can't find
anywhere else in the U-Boot code which makes use of values from that
property (this is is the only C code referencing "i2c,speeds"), so it
seems pointless to insist that it's there.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Tom Rini [Mon, 10 Apr 2023 12:32:11 +0000 (08:32 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-mmc
Pali Rohár [Wed, 22 Mar 2023 20:06:53 +0000 (21:06 +0100)]
cmd: mmc: Return CMD_RET_* from commands
Numeric return values may cause strange errors line:
exit not allowed from main input shell.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Sat, 11 Mar 2023 10:44:27 +0000 (11:44 +0100)]
mmc: Use EXT_CSD_EXTRACT_BOOT_PART() macro for extracting boot part
Mask macro PART_ACCESS_MASK filter out access bits of emmc register and
macro EXT_CSD_EXTRACT_BOOT_PART() extracts boot part bits of emmc register.
So use EXT_CSD_EXTRACT_BOOT_PART() when extracting boot partition.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Roese [Fri, 10 Feb 2023 12:23:52 +0000 (13:23 +0100)]
mmc: mv_sdhci: Depend on DM_MMC
All build targets using this driver already use DM_MMC. So let's depend
this driver on this Kconfig symbol and remove the non-DM driver part.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Stefan Roese [Fri, 10 Feb 2023 12:23:51 +0000 (13:23 +0100)]
mmc: mv_sdhci: Remove CONFIG_MMC_SDHCI_IO_ACCESSORS support
CONFIG_MMC_SDHCI_IO_ACCESSORS is not supported and/or used by this
driver so let's remove these unused parts completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Stefan Roese [Fri, 10 Feb 2023 12:23:50 +0000 (13:23 +0100)]
mmc: mv_sdhci: Simplify call to sdhci_mvebu_mbus_config()
This driver already depends on CONFIG_ARCH_MVEBU, so there is no need
to have some checks for this Kconfig symbol in the driver itself. Let's
remove these superfluous checks.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Loic Poulain [Thu, 26 Jan 2023 09:24:19 +0000 (10:24 +0100)]
test: dm: mmc: Check block erasing boundaries
Verify that erasing blocks does not impact adjacent ones.
- Write four blocks [0 1 2 3]
- Erase two blocks [ 1 2 ]
- Verify [0 1 2 3 ]
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Loic Poulain [Thu, 26 Jan 2023 09:24:18 +0000 (10:24 +0100)]
mmc: erase: Use TRIM erase when available
The default erase command applies on erase group unit, and
simply round down to erase group size. When the start block
is not aligned to erase group size (e.g. erasing partition)
it causes unwanted erasing of the previous blocks, part of
the same erase group (e.g. owned by other logical partition,
or by the partition table itself).
To prevent this issue, a simple solution is to use TRIM as
argument of the Erase command, which is usually supported
with eMMC > 4.0, and allow to apply erase operation to write
blocks instead of erase group
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Loic Poulain [Thu, 26 Jan 2023 09:24:17 +0000 (10:24 +0100)]
mmc: Check support for TRIM operations
When secure/insecure TRIM operations are supported.
When used as erase command argument it applies the
erase operation to write blocks instead of erase
groups.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Sun, 9 Apr 2023 15:08:39 +0000 (11:08 -0400)]
Merge tag 'efi-2023-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2023-07-rc1
Documentation:
* man-page for coninfo command
* documentation style
* switch settings for boot modes on AM62 SK
UEFI:
* avoid using deprecated HandleProtocol()
* set static attribute for non-exported functions and variables
Tom Rini [Sat, 8 Apr 2023 18:19:08 +0000 (14:19 -0400)]
Merge branch 'master_regulator/fixes' of https://source.denx.de/u-boot/custodians/u-boot-sh
- Fix usage of CONFIG_IS_ENABLED and DM_REGULATOR
Tom Rini [Sat, 8 Apr 2023 15:20:47 +0000 (11:20 -0400)]
Merge tag 'video-
20230407' of https://source.denx.de/u-boot/custodians/u-boot-video
- fix building sandbox without SDL
- improve tegra DC driver to work with panel ops and implement
native 180 degree panel rotation support
- add T30 support to tegra DC driver
- add DSI driver (based on mainline Linux one with minor
adjustments, only T30 tested)
- add get_display_timing ops to simple panel driver
- extend simple panel driver to use it for MIPI DSI panels
which do not require additional DSI commands for setup
Heinrich Schuchardt [Sat, 1 Apr 2023 10:20:34 +0000 (12:20 +0200)]
cmd: consider multiplexing in coninfo
If console multiplexing in enabled (CONFIG_CONSOLE_MUX=y), the output of
the coninfo command should show the file association (stdin, stderr,
stdout) for all devices not only the default ones.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 5 Apr 2023 12:15:19 +0000 (20:15 +0800)]
efi: loader: Make efi_runtime_mmio static
efi_runtime_mmio is only referenced in efi_boottime.c
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Bin Meng [Wed, 5 Apr 2023 12:15:18 +0000 (20:15 +0800)]
efi: loader: Make efi_mem static
efi_mem is only referenced in efi_memory.c
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Bin Meng [Wed, 5 Apr 2023 12:15:17 +0000 (20:15 +0800)]
efi: loader: Make efi_event_queue and efi_register_notify_events static
efi_event_queue and efi_register_notify_events are only referenced
in efi_boottime.c
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Bin Meng [Wed, 5 Apr 2023 12:15:16 +0000 (20:15 +0800)]
efi: selftest: Make load_file() and load_file2() static
load_file() and load_file2() are only referenced in
efi_selftest_load_file.c
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Bin Meng [Wed, 5 Apr 2023 12:15:15 +0000 (20:15 +0800)]
efi: selftest: Make record static
record is only referenced in efi_selftest_exitbootservices.c
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Heinrich Schuchardt [Tue, 4 Apr 2023 05:23:53 +0000 (07:23 +0200)]
efi_loader: avoid using HandleProtocol in initrddump.efi
HandleProtocol() is deprecated and leaves an OpenedProtocolInformation
behind. Use OpenProtocol(GET_PROTOCOL) instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Tue, 4 Apr 2023 05:17:48 +0000 (07:17 +0200)]
efi_loader: avoid using HandleProtocol in helloworld.efi
HandleProtocol() is deprecated and leaves an OpenedProtocolInformation
behind. Use OpenProtocol(GET_PROTOCOL) instead.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Heinrich Schuchardt [Sat, 1 Apr 2023 10:33:49 +0000 (12:33 +0200)]
doc: coninfo man-page
Provide a man-page for the coninfo command.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Fri, 7 Apr 2023 09:17:23 +0000 (11:17 +0200)]
doc: mention usage of .readthedocs.yml
Mention that HTML pages are published at https://u-boot.readthedocs.io/
and that the file .readthedocs.yml controls the build process.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Judith Mendez [Fri, 31 Mar 2023 20:36:15 +0000 (15:36 -0500)]
doc: ti: Add switch setting for boot modes on AM62 SK
List some common boot modes and their corresponding switch
settings for AM62 SK.
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Fri, 7 Apr 2023 09:28:00 +0000 (11:28 +0200)]
doc: describe our documentation style
Provide a reference document for the U-Boot documentation style.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 28 Feb 2023 01:55:23 +0000 (02:55 +0100)]
video: tl070wsh30: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 28 Feb 2023 01:55:22 +0000 (02:55 +0100)]
video: simple-panel: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 28 Feb 2023 01:55:21 +0000 (02:55 +0100)]
video: rm68200: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 28 Feb 2023 01:55:20 +0000 (02:55 +0100)]
video: otm8009a: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 28 Feb 2023 01:55:19 +0000 (02:55 +0100)]
mmc: npcm_sdhci: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 28 Feb 2023 01:55:18 +0000 (02:55 +0100)]
misc: ub251xb: Fix use of CONFIG_IS_ENABLED on DM_REGULATOR
The DM_REGULATOR symbol has SPL counterpart in:
drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 7 Apr 2023 19:55:50 +0000 (15:55 -0400)]
Merge branch 'master_sh/gen4/initial' of https://source.denx.de/u-boot/custodians/u-boot-sh
- Initial R-Car Generation 4 support
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:50 +0000 (11:11 +0300)]
simple_panel: support simple MIPI DSI panels
Re-use simple panel driver for MIPI DSI panels
which do not require additional DSI commands
for setup.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:49 +0000 (11:11 +0300)]
simple_panel: add support for get_display_timing
Some cases may require passing display timings from
panel driver. To handle such cases support parsing
device tree panel node for timing subnode.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Google Nexus 7 2012
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:48 +0000 (11:11 +0300)]
video: tegra20: add DSI controller driver
Adds support for both DSI outputs found on Tegra. Only very
minimal functionality is implemented, so advanced features
like ganged mode won't work. Driver is heavily based on
mainline Tegra DSI and re-uses much of its features.
Only T30 is supported for now but T20 support can be added
if any supported devices will be found.
Driver is wrapped as panel driver since Tegra DC driver supports
only panel drivers calls.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF600T T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:47 +0000 (11:11 +0300)]
video: tegra-dc: pass DC regmap to internal devices
Internal video devices like DSI and HDMI controllers
require sending commands into DC register field.
To make this available, lets create platform data,
which is restricted to pass DC regmap only to
pre-defined devices.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:46 +0000 (11:11 +0300)]
video: tegra-dc: add panel_set_backlight call
Tegra DC driver does not call panel_set_backlight, which can
result in absence of backlight on device. Fix this by calling
panel_set_backlight with BACKLIGHT_DEFAULT just after
panel_enable_backlight.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:45 +0000 (11:11 +0300)]
video: tegra-dc: add 180 degree panel rotation
Unlike 90 and 270 degree rotation, 180 degree rotation is more
common and does not require scaling. Implement it for correct
grouper support.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # Google Nexus 7 2012
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Google Nexus 7 2012
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:44 +0000 (11:11 +0300)]
video: tegra-dc: assign regmap directly
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:43 +0000 (11:11 +0300)]
video: tegra-dc: request timings from panel driver first
Check if panel driver has display timings and get those.
If panel driver does not pass timing, try to find timing
under rgb node for backwards compatibility.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:42 +0000 (11:11 +0300)]
video: tegra-dc: get clocks from device tree
DISP1 clock may use PLLP, PLLC and PLLD as parents.
Instead of hardcoding, lets pass clock and its
parent from device tree. Default parent is PLLP.
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Mon, 27 Mar 2023 08:11:41 +0000 (11:11 +0300)]
video: move tegra dc driver into own folder
Move tegra dc driver to tegra20 directory and also mention
T30 in description of the driver's config option.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
[agust: add commit description]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Marcel Ziswiler [Mon, 27 Mar 2023 08:11:40 +0000 (11:11 +0300)]
tegra: lcd: video: integrate display driver for t30
On popular request make the display driver from T20 work on T30 as
well. Turned out to be quite straight forward. However a few notes
about some things encountered during porting: Of course the T30 device
tree was completely missing host1x as well as PWM support but it turns
out this can simply be copied from T20. The only trouble compiling the
Tegra video driver for T30 had to do with some hard-coded PWM pin
muxing for T20 which is quite ugly anyway. On T30 this gets handled by
a board specific complete pin muxing table. The older Chromium U-Boot
2011.06 which to my knowledge was the only prior attempt at enabling a
display driver for T30 for whatever reason got some clocking stuff
mixed up. Turns out at least for a single display controller T20 and
T30 can be clocked quite similar. Enjoy.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Simon Glass [Fri, 17 Feb 2023 22:45:47 +0000 (15:45 -0700)]
sandbox: video: Fix building without SDL
This is currently broken. If SDL is not installed, SANDBOX_SDL becomes
false and build errors are generated, e.g.:
test/dm/video.c:424: undefined reference to `sandbox_sdl_set_bpp'
Fix it by making the function return an error in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Hai Pham [Tue, 28 Feb 2023 21:37:08 +0000 (22:37 +0100)]
ARM: renesas: Add R8A779G0 V4H White Hawk board code
Add board code for R8A779G0 V4H White Hawk board.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
Sort headers, use clrbits_le32(), use BIT macros where appropriate
Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
Hai Pham [Tue, 28 Feb 2023 21:37:07 +0000 (22:37 +0100)]
ARM: renesas: Add R8A779G0 V4H Kconfig entry and PRR ID
Add Kconfig entry and PRR ID to support R8A779G0 V4H SoC.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update commit message]
Tho Vu [Tue, 28 Feb 2023 21:37:06 +0000 (22:37 +0100)]
ARM: dts: renesas: Add R8A779G0 V4H White Hawk DTs
Add DTs for R8A779G0 V4H White Hawk CPU and BreakOut boards.
Based on Linux next
20230228 DTs up to
commit
058f4df42121 ("Add linux-next specific files for
20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next
20230228, update commit message
Rename DTs to match Linux, which has dash between white-hawk]
Hai Pham [Tue, 28 Feb 2023 21:37:05 +0000 (22:37 +0100)]
ARM: dts: renesas: Add R8A779G0 V4H DT extras
Add R8A779G0 V4H DT extras for U-Boot.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update compatible string to match latest upstream]
Phong Hoang [Tue, 28 Feb 2023 21:37:04 +0000 (22:37 +0100)]
ARM: dts: renesas: Add R8A779G0 V4H DT
Add initial DT support for R8A779G0 (R-Car V4H). Based on Linux next
commit
058f4df42121 ("Add linux-next specific files for
20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next
20230228, update commit message]
Hai Pham [Tue, 28 Feb 2023 21:37:03 +0000 (22:37 +0100)]
pinctrl: renesas: Add R8A779G0 V4H PFC tables
Add pinctrl tables for R8A779G0 V4H SoC.
Based on Linux next
20230228 PFC tables tables up to
commit
058f4df42121 ("Add linux-next specific files for
20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next
20230228, sort sh_pfc_pinconf_set voltage args]
Hai Pham [Tue, 28 Feb 2023 21:37:02 +0000 (22:37 +0100)]
clk: renesas: Add R8A779G0 V4H clock tables
Add clock tables for R8A779G0 V4H SoC from Linux next
commit
058f4df42121 ("Add linux-next specific files for
20230228")
There is an adjustment to the clock tables to make them easier suitable
for U-Boot, PLL2 is not treated as GEN4 PLL type PLL2_VAR, but rather a
plain PLL2. This should be sufficient until PLL2_VAR is implemented in
the clock core.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next
20230228 . Update from CLK to CPG core driver
Treat PLL2 as non-PLL2_VAR for now]
Tho Vu [Tue, 28 Feb 2023 21:37:01 +0000 (22:37 +0100)]
dt-bindings: clock: Add R8A779G0 V4H CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the
Renesas R-Car V4H (R8A779G0) SoC from Linux next
commit
058f4df42121 ("Add linux-next specific files for
20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next
20230228 state]
Tho Vu [Tue, 28 Feb 2023 21:37:00 +0000 (22:37 +0100)]
dt-bindings: power: Add R8A779G0 V4H SYSC power domain definitions
Add power domain indices for R-Car V4H (R8A779G0) from Linux next
commit
058f4df42121 ("Add linux-next specific files for
20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update to linux next
20230228 state]
Hai Pham [Tue, 28 Feb 2023 21:34:46 +0000 (22:34 +0100)]
ARM: renesas: Add R8A779F0 S4 Spider board code
Add board code for R8A779F0 S4 Spider board.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Synchronize configuration symbols which are now switched to Kconfig
Mallocate gd->bd->bi_boot_params, i.e. drop the assignment
Sort headers, use clrbits_le32(), use BIT macros where appropriate
Use CONFIG_SYS_CLK_FREQ for counter frequency instead of custom macro]
Hai Pham [Tue, 28 Feb 2023 21:34:45 +0000 (22:34 +0100)]
ARM: renesas: Add R8A779F0 S4 Kconfig entry and PRR ID
Add Kconfig entry and PRR ID to support R8A779F0 S4 SoC.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update commit message]
Hai Pham [Tue, 28 Feb 2023 21:34:44 +0000 (22:34 +0100)]
ARM: dts: renesas: Add R8A779F0 S4 Spider DTs
Add DTs for R8A779F0 S4 Spider CPU boards and Breakout boards.
Based on Linux next
20230228 DTs up to
commit
058f4df42121 ("Add linux-next specific files for
20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next
20230228, update commit message]
Hai Pham [Tue, 28 Feb 2023 21:34:43 +0000 (22:34 +0100)]
ARM: dts: renesas: Add R8A779F0 S4 DT extras
Add R8A779F0 S4 DT extras for U-Boot.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Update compatible string to match latest upstream]
Hai Pham [Tue, 28 Feb 2023 21:34:42 +0000 (22:34 +0100)]
ARM: dts: renesas: Add R8A779F0 S4 DT
Add initial DT for R8A779F0 S4 SoC. Based on Linux next
commit
058f4df42121 ("Add linux-next specific files for
20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Sync with Linux next
20230228, update commit message]
Hai Pham [Tue, 28 Feb 2023 21:34:41 +0000 (22:34 +0100)]
ARM: rmobile: Turn R-Car V3U into R-Car Gen4
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family [1]. Hence reflect this in related files, select appropriate
configuration options and split DT build into its own GEN4 entry.
[1] https://www.renesas.com/us/en/products/automotive-products/automotive-system-chips-socs/r-car-v3u-best-class-r-car-v3u-asil-d-system-chip-automated-driving
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Deduplicate DTC_FLAGS addition using RCAR_64 symbol
Update commit message]
LUU HOAI [Tue, 28 Feb 2023 21:34:40 +0000 (22:34 +0100)]
pinctrl: renesas: Add R8A779F0 S4 PFC tables
Add pinctrl tables for R8A779F0 S4 SoC.
Based on Linux next
20230228 PFC tables tables up to
commit
058f4df42121 ("Add linux-next specific files for
20230228")
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Use RCAR_64 Kconfig, sync with Linux next
20230228]