Bhupesh Sharma [Tue, 19 Jul 2022 20:50:57 +0000 (02:20 +0530)]
arm64: dts: qcom: qrb5165-rb5: Fix 'dtbs_check' error for lpg nodes
make dtbs_check currently reports the following warnings
with qrb5165-rb5 lpg nodes:
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts:
Warning (reg_format): /soc@0/spmi@c440000/pmic@5/lpg/led@1:reg:
property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm64/boot/dts/qcom/qrb5165-rb5.dts:
Warning (avoid_default_addr_size): /soc@0/spmi@c440000/pmic@5/lpg/led@1:
Relying on default #address-cells value
Fix the same.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220719205058.1004942-2-bhupesh.sharma@linaro.org
Bjorn Andersson [Sun, 17 Jul 2022 03:44:03 +0000 (20:44 -0700)]
arm64: dts: qcom: sdm845-db845c: Specify a i2c bus clocks
The kernel log contains complaints about i2c11 and i2c14 lacking
clock-frequency, specify a reasonable value to suppress this warning.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220717034403.2135027-4-bjorn.andersson@linaro.org
Bjorn Andersson [Sun, 17 Jul 2022 03:44:02 +0000 (20:44 -0700)]
arm64: dts: qcom: sdm845-db845c: Enable gpi_dma1
Enable gpi_dma1 so that i2c14 is able to find its DMA controller.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220717034403.2135027-3-bjorn.andersson@linaro.org
Bjorn Andersson [Sun, 17 Jul 2022 03:44:01 +0000 (20:44 -0700)]
arm64: dts: qcom: sdm845: Fill in GENI DMA references
The I2C and SPI might be configured in GPI DMA mode, fill in the
properties needed for this.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220717034403.2135027-2-bjorn.andersson@linaro.org
Kuogee Hsieh [Mon, 11 Jul 2022 16:23:23 +0000 (09:23 -0700)]
arm64: dts: qcom: sc7280: delete vdda-1p2 and vdda-0p9 from both dp and edp
Both vdda-1p2-supply and vdda-0p9-supply regulators are controlled
by dp combo phy. Therefore remove them from dp controller.
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1657556603-15024-1-git-send-email-quic_khsieh@quicinc.com
Steev Klimaszewski [Mon, 18 Jul 2022 23:01:08 +0000 (18:01 -0500)]
arm64: dts: sdm850: Remove unnecessary turbo-mode
qcom-cpufreq-hw finds turbo-mode in the LUT hardware tables
and slaps the flag on the last element, so there's no reason
to add it in the dts, so remove it.
Signed-off-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220718230109.8193-1-steev@kali.org
Steev Klimaszewski [Mon, 18 Jul 2022 22:57:14 +0000 (17:57 -0500)]
arm64: dts: qcom: sc8280xp: add missing 300MHz
When booting a Thinkpad x13s, we see the message
[ 0.997647] cpu cpu0: failed to update OPP for freq=300000
So, lets add in 300MHz to make it happy
Signed-off-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220718225714.8074-1-steev@kali.org
Johan Hovold [Fri, 15 Jul 2022 07:02:48 +0000 (09:02 +0200)]
arm64: dts: qcom: reorder USB interrupts
Three SoCs did not follow the interrupt order specified by the USB
controller binding.
While keeping the non-SuperSpeed interrupts together seems natural,
reorder the interrupts to match the binding.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
[bjorn: Omitted sdx65 part from this patch]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715070248.19078-5-johan+linaro@kernel.org
Johan Hovold [Fri, 15 Jul 2022 07:02:47 +0000 (09:02 +0200)]
arm64: dts: qcom: sc7280: reorder USB interrupts
Only one of the USB controllers supports SuperSpeed and have an SS PHY
wakeup interrupt.
Reorder the interrupts so that they match the updated binding which
specifically has the optional interrupt last.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715070248.19078-4-johan+linaro@kernel.org
Johan Hovold [Fri, 15 Jul 2022 07:02:46 +0000 (09:02 +0200)]
arm64: dts: qcom: sc8280xp: fix USB interrupts
The two single-port SC8280XP USB controllers do not have an hs_phy_irq
interrupt. Instead they have a pwr_event interrupt which is distinct
from the former and not yet supported by the driver.
Fix the USB node interrupt names so that they match the devicetree
binding.
Also fix the pwr_event interrupt of the second controller which should
be 811 as noticed by Andrew Halaney.
Fixes:
152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715070248.19078-3-johan+linaro@kernel.org
Johan Hovold [Fri, 15 Jul 2022 07:02:45 +0000 (09:02 +0200)]
arm64: dts: qcom: sc8280xp: fix USB clock order and naming
Fix the USB controller clock order and naming so that they match the
devicetree binding.
Note that the driver currently simply enables all clocks in the order
that they are specified in the devicetree. Reordering the clocks as per
the binding means that the only explicit ordering constraint found in
the vendor driver, that cfg_noc should be enabled before the core_clk,
is now honoured.
Fixes:
152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715070248.19078-2-johan+linaro@kernel.org
Johan Hovold [Fri, 15 Jul 2022 16:53:44 +0000 (18:53 +0200)]
arm64: dts: qcom: sc8280xp: fix usb_1 ssphy irq
Fix the usb_1 SS PHY interrupt, which was mistakingly replaced with one
of the usb_2 PHY interrupts.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220715165344.28822-1-johan+linaro@kernel.org
Manivannan Sadhasivam [Wed, 13 Jul 2022 14:34:29 +0000 (20:04 +0530)]
arm64: dts: qcom: sc8280xp: Fix PMU interrupt
PPI interrupt should be 7 for the PMU.
Cc: Johan Hovold <johan+linaro@kernel.org>
Fixes:
152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Reported-by: Steve Capper <Steve.Capper@arm.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220713143429.22624-1-manivannan.sadhasivam@linaro.org
Parikshit Pareek [Mon, 11 Jul 2022 17:41:33 +0000 (23:11 +0530)]
arm64: dts: qcom: sc8280xp: fix the smmu interrupt values
There has been wrong values introduced for context interrupt for
smu node apps_smmu. Fix those ones with due correction.
Fixes:
152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220711174133.28882-1-quic_ppareek@quicinc.com
Sumit Garg [Mon, 11 Jul 2022 08:30:38 +0000 (14:00 +0530)]
arm64: dts: qcom: qcs404: Fix incorrect USB2 PHYs assignment
Currently the DT for QCS404 SoC has setup for 2 USB2 PHYs with one each
assigned to USB3 controller and USB2 controller. This assignment is
incorrect which only works by luck: as when each USB HCI comes up it
configures the *other* controllers PHY which is enough to make them
happy. If, for any reason, we were to disable one of the controllers then
both would stop working.
This was a difficult inconsistency to be caught which was found while
trying to enable USB support in u-boot. So with all the required drivers
ported to u-boot, I couldn't get the same USB storage device enumerated
in u-boot which was being enumerated fine by the kernel.
The root cause of the problem came out to be that I wasn't enabling USB2
PHY: "usb2_phy_prim" in u-boot. Then I realised that via simply disabling
the same USB2 PHY currently assigned to USB2 host controller in the
kernel disabled enumeration for USB3 host controller as well.
So fix this inconsistency by correctly assigning USB2 PHYs.
Fixes:
9375e7d719b3 ("arm64: dts: qcom: qcs404: Add USB devices and PHYs")
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220711083038.1518529-1-sumit.garg@linaro.org
Dmitry Baryshkov [Sun, 10 Jul 2022 08:41:30 +0000 (11:41 +0300)]
arm64: dts: qcom: sc7280: drop unused clocks from eDP node
The eDP node includes two clocks which are used by the eDP PHY rather
than eDP controller itself. Drop these clocks to remove extra difference
between eDP and DP controllers.
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220710084133.30976-7-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Sun, 10 Jul 2022 08:41:29 +0000 (11:41 +0300)]
arm64: dts: qcom: sc7280: drop address/size-cells from eDP node
Drop #address/#size-cells from eDP device node. For eDP the panels are
not described directly under the controller node. They are either
present under aux-bus child node, or they are declared separately (e.g.
in a /soc node).
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220710084133.30976-6-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Sun, 10 Jul 2022 08:41:28 +0000 (11:41 +0300)]
arm64: dts: qcom: sc7280: drop #clock-cells from displayport-controller
Drop #clock-cells from DP device node. It is a leftover from the times
before splitting the deviice into controller and PHY devices. Now the
clocks are provided by the PHY, while the controller doesn't provide any
clocks.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220710084133.30976-5-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Sun, 10 Jul 2022 08:41:27 +0000 (11:41 +0300)]
arm64: dts: qcom: sc7280: split register block for DP controller
Follow the schema for the DP controller and declare 5 register regions
instead of using a single region for all the registers. Note, this
extends the dts by adding p1 region to the DP node (to be used for DP
MST).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220710084133.30976-4-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Sun, 10 Jul 2022 08:41:26 +0000 (11:41 +0300)]
arm64: dts: qcom: sc7180: drop #clock-cells from displayport-controller
Drop #clock-cells from DP device node. It is a leftover from the times
before splitting the device into controller and PHY devices. Now the
clocks are provided by the PHY, while the controller doesn't provide any
clocks.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220710084133.30976-3-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Sun, 10 Jul 2022 08:41:25 +0000 (11:41 +0300)]
arm64: dts: qcom: sc7180: split register block for DP controller
Follow the schema for the DP controller and declare 5 register regions
instead of using a single region for all the registers. Note, this
extends the dts by adding p1 region to the DP node (to be used for DP
MST).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220710084133.30976-2-dmitry.baryshkov@linaro.org
Srinivasa Rao Mandadapu [Thu, 7 Jul 2022 12:36:21 +0000 (18:06 +0530)]
arm64: dts: qcom: sc7280: Move wcd specific pin conf to common file
Move wcd specific pin conf to common file to support various
herbronie variant boards and to avoid duplicate nodes in dts files.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1657197381-1271-1-git-send-email-quic_srivasam@quicinc.com
Marijn Suijten [Sat, 7 May 2022 15:36:27 +0000 (17:36 +0200)]
arm64: dts: qcom: msm8998: Make regulator voltages multiple of step-size
These voltages are not a multiple of the given step-size 8000 (with base
voltage 1664000) in pm8998_pldo, resulting in PLDO regulators l18 and
l22 failing to validate and in turn not probing the rpm-pm8998-regulator
driver:
l18: unsupportable voltage constraints 2856000-2848000uV
qcom_rpm_smd_regulator rpm-glink:rpm-requests:pm8998-regulators: l18: devm_regulator_register() failed, ret=-22
Round the voltages down for the sake of erring on the safe side, leaving
a comment in place to document this discrepancy wrt downstream sources.
Fixes:
390883af89d2 ("arm64: dts: qcom: msm8998: Introduce support for Sony Yoshino platform")
Reported-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220507153627.1478268-1-marijn.suijten@somainline.org
Marijn Suijten [Sat, 7 May 2022 22:46:45 +0000 (00:46 +0200)]
arm64: dts: qcom: sm6350: Replace literal rpmhpd indices with constants
It seems the SM6350_CX definition was temporarily replaced with its
literal value 0 in
1797e1c9a95c ("arm64: dts: qcom: sm6350: Add SDHCI1/2
nodes") to prevent a dependency on the qcom-rpmpd.h header patch being
available prior to this DT patch being applied, similar to
c23f1b77358c
("arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX").
However, unlike the revert of that in the sm6125 tree the next merge
window around in
a90b8adfa2dd ("Revert "arm64: dts: qcom: sm6125: Avoid
using missing SM6125_VDDCX""), this has not yet happened for sm6350:
replace them back now that the definitions are definitely available.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220507224645.2238421-1-marijn.suijten@somainline.org
Robert Marko [Fri, 8 Jul 2022 13:38:46 +0000 (15:38 +0200)]
arm64: dts: qcom: ipq8074: add interrupt-parent to DTSI
Add interrupt-parent to the SoC DTSI to avoid duplicating it in each board
DTS file.
Remove interrupt-parent from existing board DTS files.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708133846.599735-2-robimarko@gmail.com
Robert Marko [Fri, 8 Jul 2022 13:38:45 +0000 (15:38 +0200)]
arm64: dts: qcom: ipq8074: add #size/address-cells to DTSI
Add #size-cells and #address-cells to the SoC DTSI to avoid duplicating
the same properties in board DTS files.
Remove the mentioned properties from current board DTS files.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708133846.599735-1-robimarko@gmail.com
Dmitry Baryshkov [Fri, 8 Jul 2022 09:16:56 +0000 (12:16 +0300)]
arm64: dts: qcom: sm8250: rename DPU device node
Rename DPU device node to display-controller@ae01000 to follow the
DPU schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708091656.2769390-3-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Fri, 8 Jul 2022 09:16:55 +0000 (12:16 +0300)]
arm64: dts: qcom: sc7180: rename DPU device node
Rename DPU device node to display-controller@ae01000 to follow the
DPU schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708091656.2769390-2-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Fri, 8 Jul 2022 09:16:54 +0000 (12:16 +0300)]
arm64: dts: qcom: sdm845: rename DPU device node
Rename DPU device node to display-controller@ae01000 to follow the
DPU schema.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708091656.2769390-1-dmitry.baryshkov@linaro.org
Robert Marko [Thu, 7 Jul 2022 17:37:33 +0000 (19:37 +0200)]
arm64: dts: qcom: ipq8074: add APCS node
APCS now has support for providing the APSS clocks as the child device
for IPQ8074.
So, add the required DT node for it as it will later be used as the CPU
clocksource.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Sorted node based on address]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707173733.404947-4-robimarko@gmail.com
Bjorn Andersson [Thu, 7 Jul 2022 16:08:58 +0000 (09:08 -0700)]
arm64: dts: qcom: sc8280xp: Add lost ranges for timer
The timer node needs ranges specified to map the 1-cell children to the
2-cell address range used in /soc. This addition never made it into the
patch that was posted and merged, so add it now.
Fixes:
152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20220707160858.3178771-1-bjorn.andersson@linaro.org
Johan Hovold [Fri, 8 Jul 2022 07:25:56 +0000 (09:25 +0200)]
arm64: dts: qcom: sc8280xp: fix DP PHY node unit addresses
Fix up the DP PHY node which had the wrong unit address.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708072556.4687-1-johan+linaro@kernel.org
Johan Hovold [Fri, 8 Jul 2022 07:23:58 +0000 (09:23 +0200)]
arm64: dts: qcom: sc8280xp: fix usb_0 HS PHY ref clock
Fix the usb_0 HS PHY reference clock which was mistakingly replaced with
the first usb_2 PHY clock.
Fixes:
152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220708072358.4583-1-johan+linaro@kernel.org
Johan Hovold [Thu, 7 Jul 2022 06:42:22 +0000 (08:42 +0200)]
arm64: dts: qcom: sc7280: fix PCIe clock reference
The recent commit that dropped the PCIe PHY clock index failed to update
the PCIe node reference.
Fixes:
531c738fb360 ("arm64: dts: qcom: sc7280: drop PCIe PHY clock index")
Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707064222.15717-1-johan+linaro@kernel.org
Mauro Carvalho Chehab [Sat, 2 Jul 2022 11:07:43 +0000 (12:07 +0100)]
docs: arm: index.rst: add google/chromebook-boot-flow
This document was added without placing it at arm book.
Fixes:
59228d3b9060 ("dt-bindings: Document how Chromebooks with depthcharge boot")
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/0ae8251f97c642cfd618f2e32eb1e66339e5dfde.1656759989.git.mchehab@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:32 +0000 (13:40 +0200)]
arm64: dts: qcom: msm8996: clean up PCIe PHY node
Clean up the PCIe PHY node by renaming the wrapper node and grouping the
child node properties.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-15-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:31 +0000 (13:40 +0200)]
arm64: dts: qcom: msm8996: use non-empty ranges for PCIe PHYs
Clean up the PCIe PHY nodes by using a non-empty ranges property.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-14-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:29 +0000 (13:40 +0200)]
arm64: dts: qcom: sm8450: drop UFS PHY clock-cells
The QMP UFS PHY provides more than one symbol clock and would need an
index to differentiate the clocks, but none of this is described by the
binding currently.
Drop the incorrect '#clock-cells' property for now.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-12-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:28 +0000 (13:40 +0200)]
arm64: dts: qcom: sm8250: drop UFS PHY clock-cells
The QMP UFS PHY provides more than one symbol clock and would need an
index to differentiate the clocks, but none of this is described by the
binding currently.
Drop the incorrect '#clock-cells' property for now.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-11-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:27 +0000 (13:40 +0200)]
arm64: dts: qcom: sc8280xp: drop UFS PHY clock-cells
The QMP UFS PHY provides more than one symbol clock and would need an
index to differentiate the clocks, but none of this is described by the
binding currently.
Drop the incorrect '#clock-cells' property for now.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-10-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:26 +0000 (13:40 +0200)]
arm64: dts: qcom: sm8450: drop USB PHY clock index
The QMP USB PHY provides a single clock so drop the redundant clock
index.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-9-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:25 +0000 (13:40 +0200)]
arm64: dts: qcom: sm8350: drop USB PHY clock index
The QMP USB PHY provides a single clock so drop the redundant clock
index.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-8-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:24 +0000 (13:40 +0200)]
arm64: dts: qcom: msm8998: drop USB PHY clock index
The QMP USB PHY provides a single clock so drop the redundant clock
index.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-7-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:22 +0000 (13:40 +0200)]
arm64: dts: qcom: ipq8074: drop USB PHY clock index
The QMP USB PHY provides a single clock so drop the redundant clock
index.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-5-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:21 +0000 (13:40 +0200)]
arm64: dts: qcom: ipq6018: drop USB PHY clock index
The QMP USB PHY provides a single clock so drop the redundant clock
index.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-4-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:20 +0000 (13:40 +0200)]
arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells
Add the missing '#clock-cells' properties to the PCIe QMP PHY nodes.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Fixes:
e53bdfc00977 ("arm64: dts: qcom: sm8250: Add PCIe support")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-3-johan+linaro@kernel.org
Johan Hovold [Tue, 5 Jul 2022 11:40:19 +0000 (13:40 +0200)]
arm64: dts: qcom: sc7280: drop PCIe PHY clock index
The QMP PCIe PHY provides a single clock so drop the redundant clock
index.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Fixes:
bd7d507935ca ("arm64: dts: qcom: sc7280: Add pcie clock support")
Fixes:
92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-2-johan+linaro@kernel.org
Douglas Anderson [Wed, 6 Jul 2022 21:47:33 +0000 (14:47 -0700)]
Revert "arm64: dts: qcom: Fix 'reg-names' for sdhci nodes"
This reverts commit
afcbe252e9c19161e4d4c95f33faaf592f1de086.
The commit in question caused my sc7280-herobrine-herobrine-r1 board
not to boot anymore. This shouldn't be too surprising since the driver
is relying on the name "cqhci".
The issue seems to be that someone decided to change the names of
things when the binding moved from .txt to .yaml. We should go back to
the names that the bindings have historically specified.
For some history, see commit
d3392339cae9 ("mmc: cqhci: Update cqhci
memory ioresource name") and commit
d79100c91ae5 ("dt-bindings: mmc:
sdhci-msm: Add CQE reg map").
Fixes:
afcbe252e9c1 ("arm64: dts: qcom: Fix 'reg-names' for sdhci nodes")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706144706.1.I48f35820bf3670d54940110462555c2d0a6d5eb2@changeid
Dmitry Baryshkov [Wed, 6 Jul 2022 14:54:09 +0000 (17:54 +0300)]
arm64: dts: qcom: sc7180-idp: add vdds supply to the DSI PHY
Add the (required) vdss-supply property to the DSI PHY node.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706145412.1566011-3-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Wed, 6 Jul 2022 14:54:08 +0000 (17:54 +0300)]
arm64: dts: qcom: sc7280: use constants for gpucc clocks and power-domains
To ease merging of bindings and dts files, the constants were replaced
with numeric values. Change them back to defined constants.
While we are at it, fix the indentation of these clocks properties to
follow established guidelines.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706145412.1566011-2-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Wed, 6 Jul 2022 14:54:07 +0000 (17:54 +0300)]
arm64: dts: qcom: msm8996: add missing DSI clock assignments
Add missing DSI clock assignments to properly use DSI PHY clocks as DSI
byte and pixel clock parents.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706145412.1566011-1-dmitry.baryshkov@linaro.org
Robert Marko [Mon, 4 Jul 2022 14:35:54 +0000 (16:35 +0200)]
arm64: dts: qcom: ipq8074: add reset to SDHCI
Add reset to SDHCI controller so it can be reset to avoid timeout issues
after software reset due to bootloader set configuration.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220704143554.1180927-2-robimarko@gmail.com
Krzysztof Kozlowski [Mon, 4 Jul 2022 12:17:30 +0000 (14:17 +0200)]
arm64: dts: qcom: sdm845: Add CPU BWMON
Add device node for CPU-memory BWMON device (bandwidth monitoring) on
SDM845 measuring bandwidth between CPU (gladiator_noc) and Last Level
Cache (memnoc). Usage of this BWMON allows to remove fixed bandwidth
votes from cpufreq (CPU nodes) thus achieve high memory throughput even
with lower CPU frequencies.
Co-developed-by: Thara Gopinath <thara.gopinath@gmail.com>
Signed-off-by: Thara Gopinath <thara.gopinath@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220704121730.127925-5-krzysztof.kozlowski@linaro.org
Robert Marko [Mon, 4 Jul 2022 11:33:18 +0000 (13:33 +0200)]
arm64: dts: qcom: ipq8074: move ARMv8 timer out of SoC node
The ARM timer is usually considered not part of SoC node, just like
other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning:
arch/arm64/boot/dts/qcom/ipq8072-ax9000.dtb: soc: timer: {'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 2, 3848], [1, 3, 3848], [1, 4, 3848], [1, 1, 3848]]} should not be valid under {'type': 'object'}
From schema: dtschema/schemas/simple-bus.yaml
Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[bjorn: Moved node after "soc" for alphabetical ordering]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220704113318.623102-1-robimarko@gmail.com
Kuogee Hsieh [Fri, 1 Jul 2022 15:47:16 +0000 (08:47 -0700)]
arm64: dta: qcom: sc7180: delete vdda-1p2 and vdda-0p9 from mdss_dp
Both vdda-1p2-supply and vdda-0p9-supply regulators are controlled
by dp combo phy. Therefore remove them from dp controller.
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1656690436-15221-1-git-send-email-quic_khsieh@quicinc.com
Abel Vesa [Thu, 30 Jun 2022 10:14:03 +0000 (13:14 +0300)]
arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI
Switch from the flat PC idle states of sdm845 to OSI hierarchical idle
states. The exceptions are the cheza plaftorms, which need to remain with
PC idle states. So in order allow all the other platforms to switch,
while cheza platforms to remain the same, replace the PC idle states with
the OSI ones in the main SDM845 dtsi, and then override the inherited OSI
states with PC ones, delete inherited psci cpus nodes, domain idle states
and power domain properties.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220630101403.1888541-1-abel.vesa@linaro.org
David Heidelberg [Sun, 26 Jun 2022 18:32:46 +0000 (20:32 +0200)]
arm64: dts: qcom: extend scm compatible strings
First device specific compatible, then general one.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220626183247.142776-2-david@ixit.cz
Anton Bambura [Sun, 26 Jun 2022 16:45:38 +0000 (12:45 -0400)]
arm64: dts: qcom: add device tree for LG G7 and LG V35
Adds initial support for the LG G7 (judyln) and
LG V35 (judyp) phones.
Currently supported features:
- Display via simplefb (panel driver is WIP)
- Keys
- Micro SD card
- Modem (not tested much, but initialises)
- UFS (crashes during intensive workloads, may need quirks)
- USB in peripheral mode
Notable missing features:
- Enabling WiFi causes a remoteproc crash, so it's disabled here.
Needs to be debugged - ideas welcome!
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Stefan Hansson <newbie13xd@gmail.com>
Tested-by: Gregari Ivanov <llamashere@posteo.de>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220626164536.16011-2-newbie13xd@gmail.com
Dmitry Baryshkov [Mon, 20 Jun 2022 07:19:36 +0000 (10:19 +0300)]
arm64: dts: qcom: msm8996: add xo clock source to rpmcc
Add XO clock source to the RPM clock controller.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220620071936.1558906-5-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Mon, 20 Jun 2022 07:19:35 +0000 (10:19 +0300)]
arm64: dts: qcom: msm8996: add GCC's optional clock sources
Add missing GCC clock sources. This includes PCIe and USB PIPE and UFS
symbol clocks.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220620071936.1558906-4-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Mon, 20 Jun 2022 07:19:34 +0000 (10:19 +0300)]
arm64: dts: qcom: msm8996: correct #clock-cells for QMP PHY nodes
The commit
82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells'
to QMP PHY child node") moved the '#clock-cells' properties to the child
nodes. However it missed the fact that the property must have been set
to <0> (as all pipe clocks use of_clk_hw_simple_get as the xlate
function. Also the mentioned commit didn't add '#clock-cells' properties
to second and third PCIe PHY nodes. Correct both these mistakes:
- Set '#clock-cells' to <0>,
- Add the property to pciephy_1 and pciephy_2 nodes.
Fixes:
82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220620071936.1558906-3-dmitry.baryshkov@linaro.org
Dylan Van Assche [Thu, 12 May 2022 05:44:39 +0000 (07:44 +0200)]
arm64: dts: qcom: sdm845-shift-axolotl: Enable pmi9889 LPG LED
Enables the RGB notification LED on the SHIFT 6mq (sdm845-shift-axolotl)
with the Qualcomm Light Pulse Generator bindings by Bjorn Andersson [1].
Patches are merged in for-next branch of linux-leds.
Tested these changes on the SHIFT 6mq.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds.git/commit/?h=for-next&id=
a8e53db46f19f67be6a26488aafb7d10c78e33bd
Signed-off-by: Dylan Van Assche <me@dylanvanassche.be>
Reviewed-by: Alexander Martinz <amartinz@shiftphones.com>
Tested-by: Alexander Martinz <amartinz@shiftphones.com>
Tested-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220512054439.13971-1-me@dylanvanassche.be
Marijn Suijten [Sun, 8 May 2022 10:03:35 +0000 (12:03 +0200)]
arm64: dts: qcom: sm6125: Add DLL/DDR configuration on SDHCI 1/2
These config values have been extracted from CodeLinaro's most recent
trinket/sm6125 tag:
https://git.codelinaro.org/clo/la/kernel/msm-4.14/-/blob/LA.UM.9.11.r1-05600-NICOBAR.QSSI12.0/arch/arm64/boot/dts/qcom/trinket.dtsi
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508100336.127176-3-marijn.suijten@somainline.org
Marijn Suijten [Sun, 8 May 2022 10:03:34 +0000 (12:03 +0200)]
arm64: dts: qcom: sm6125: Append -state suffix to pinctrl nodes
According to qcom,sm6125-pinctrl.yaml all nodes inside the tlmm must be
suffixed by -state:
qcom/sm6125-sony-xperia-seine-pdx201.dtb: pinctrl@500000: 'sdc2-off', 'sdc2-on' do not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
The label names have been updated to match, going from sdc2_state_X to
sdc2_X_state.
Fixes:
cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
Fixes:
82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508100336.127176-2-marijn.suijten@somainline.org
Marijn Suijten [Sun, 8 May 2022 10:03:33 +0000 (12:03 +0200)]
arm64: dts: qcom: sm6125: Move sdc2 pinctrl from seine-pdx201 to sm6125
Both the sdc2-on and sdc2-off pinctrl nodes are used by the
sdhci@4784000 node in sm6125.dtsi. Surprisingly sdc2-off is defined in
sm6125, yet its sdc2-on counterpart is only defined in board-specific DT
for the Sony Seine PDX201 board/device resulting in an "undefined label
&sdc2_state_on" error if sm6125.dtsi were included elsewhere.
This sm6125 base dtsi should not rely on externally defined labels; the
properties referencing it should then also be written externally.
Since the sdc2-on pin configuration is board-independent just like
sdc2-off, move it from seine-pdx201.dts into sm6125.dtsi.
The SDCard-detect pin (gpio98) is however board-specific, and remains as
an overwrite in seine-pdx201.dts for both the on and off state.
As a drive-by cleanup, reorder bias- and drive-strength properties.
Fixes:
cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
Fixes:
82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220508100336.127176-1-marijn.suijten@somainline.org
Bjorn Andersson [Thu, 5 May 2022 02:27:06 +0000 (19:27 -0700)]
arm64: dts: qcom: db820c: Add user LEDs
The db820c has 4 "user LEDs", all connected to the PMI8994. The first
three are connected to the three current sinks provided by the TRILED
and the fourth is connected to MPP2.
By utilizing the DTEST bus the MPP is fed the control signal from the
fourth LPG block, providing a consistent interface to the user.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Dylan Van Assche <me@dylanvanassche.be>
Link: https://lore.kernel.org/r/20220505022706.1692554-5-bjorn.andersson@linaro.org
Bjorn Andersson [Thu, 5 May 2022 02:27:05 +0000 (19:27 -0700)]
arm64: dts: qcom: pmi8994: Define MPP block
The pmi8994 has 4 multi-purpose-pins, add these to the definition.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Dylan Van Assche <me@dylanvanassche.be>
Link: https://lore.kernel.org/r/20220505022706.1692554-4-bjorn.andersson@linaro.org
Bjorn Andersson [Thu, 5 May 2022 02:27:04 +0000 (19:27 -0700)]
arm64: dts: qcom: sdm845: Enable user LEDs on DB845c
The DB845c has 4 "user LEDs", the last one is already supported as it's
just wired to a gpio. Now that the LPG binding is in place we can wire
up the other 3 LEDs as well.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Dylan Van Assche <me@dylanvanassche.be>
Link: https://lore.kernel.org/r/20220505022706.1692554-3-bjorn.andersson@linaro.org
Bjorn Andersson [Thu, 5 May 2022 02:27:03 +0000 (19:27 -0700)]
arm64: dts: qcom: Add LPG to pm8916, pm8994, pmi8994 and pmi8998
Add PWM/LPG nodes to the PMICs currently supported by the binding.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Reviewed-by: Dylan Van Assche <me@dylanvanassche.be>
Link: https://lore.kernel.org/r/20220505022706.1692554-2-bjorn.andersson@linaro.org
Robert Foss [Wed, 6 Jul 2022 15:28:30 +0000 (17:28 +0200)]
arm64: dts: qcom: sm8350: Replace integers with rpmpd defines
Replace &rpmhpd power domain integers with their respective defines
in order to improve legibility.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706152830.2021197-1-robert.foss@linaro.org
Robert Foss [Wed, 6 Jul 2022 15:43:37 +0000 (17:43 +0200)]
arm64: dts: qcom: sm8350: Add DISPCC node
Add the dispcc clock-controller DT node for sm8350.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-6-robert.foss@linaro.org
Bjorn Andersson [Wed, 6 Jul 2022 20:16:51 +0000 (15:16 -0500)]
Merge branch '
20220706154337.2026269-1-robert.foss@linaro.org' into arm64-for-5.20
Vladimir Zapolskiy [Fri, 1 Jul 2022 06:26:22 +0000 (09:26 +0300)]
arm64: dts: qcom: sm8450: Add description of camera clock controller
The change adds description of Qualcomm SM8450 camera clock controller.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062622.2757831-3-vladimir.zapolskiy@linaro.org
Bjorn Andersson [Wed, 6 Jul 2022 20:22:54 +0000 (15:22 -0500)]
Merge branch '
20220701062622.2757831-2-vladimir.zapolskiy@linaro.org' into arm64-for-5.20
Vladimir Zapolskiy [Fri, 1 Jul 2022 06:26:21 +0000 (09:26 +0300)]
dt-bindings: clock: add QCOM SM8450 camera clock bindings
The change adds device tree bindings for camera clock controller
found on SM8450 SoC.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220701062622.2757831-2-vladimir.zapolskiy@linaro.org
Jonathan Marek [Wed, 6 Jul 2022 15:43:35 +0000 (17:43 +0200)]
dt-bindings: clock: Add Qcom SM8350 DISPCC bindings
Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250
bindings. Update the documentation with the new compatible.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-4-robert.foss@linaro.org
Robert Foss [Wed, 6 Jul 2022 15:43:33 +0000 (17:43 +0200)]
dt-bindings: clock: Add Qcom SM8350 GPUCC bindings
Add device tree bindings for graphics clock controller for
Qualcomm Technology Inc's SM8350 SoCs.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmityr.baryshkov@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220706154337.2026269-2-robert.foss@linaro.org
Yassine Oudjana [Thu, 21 Oct 2021 13:25:23 +0000 (13:25 +0000)]
arm64: dts: qcom: msm8996: Add interconnect support
Add interconnect providers for the multiple NoCs available on the platform,
and assign interconnects used by some blocks.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211021132329.234942-6-y.oudjana@protonmail.com
Bjorn Andersson [Sun, 3 Jul 2022 03:03:46 +0000 (22:03 -0500)]
Merge tag 'qcom-arm64-fixes-for-5.19' into arm64-for-5.20
This merges the 'qcom-arm64-fixes-for-5.19' tag into arm64-for-5.20 to
handle the merge conflict related to the header file changes in
sc7180-trogdor.
Stephen Boyd [Mon, 27 Jun 2022 21:28:02 +0000 (14:28 -0700)]
arm64: dts: qcom: sc7180-trogdor: Split out keyboard node and describe detachables
Trogdor devices that have a detachable keyboard still have a
non-detachable keyboard input device present because we include the
cros-ec-keyboard.dtsi snippet in the top-level sc7180-trogdor.dtsi file
that every variant board includes. We do this because the
keyboard-controller node also provides some buttons like the power
button and volume buttons. Unfortunately, this means we register a
keyboard input device that doesn't do anything on boards with a
detachable keyboard.
Change the node's compatible on detachables to the newly introduced
"google,cros-ec-keyb-switches" compatible to indicate that there are
only switches and no keyboard to register. Similarly, move the keyboard
include that defines the keyboard-controller node out of
sc7180-trogdor.dtsi to boards that actually have a keyboard so that the
matrix properties are not defined on boards with the switches
compatible. Future boards can either use the include approach or the
node definition approach to describe a keyboard with possible switches
or just some switches.
Cc: Benson Leung <bleung@chromium.org>
Cc: Guenter Roeck <groeck@chromium.org>
Cc: Douglas Anderson <dianders@chromium.org>
Cc: Hsin-Yi Wang <hsinyi@chromium.org>
Cc: "Joseph S. Barrera III" <joebar@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220627212802.3593012-1-swboyd@chromium.org
Robert Marko [Tue, 21 Jun 2022 12:06:42 +0000 (14:06 +0200)]
arm64: dts: qcom: ipq8074: fix NAND node name
Per schema it should be nand-controller@79b0000 instead of nand@79b0000.
Fix it to match nand-controller.yaml requirements.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220621120642.518575-1-robimarko@gmail.com
Dmitry Baryshkov [Mon, 20 Jun 2022 01:05:19 +0000 (04:05 +0300)]
arm64: dts: qcom: msm8916: add xo clocks to rpmcc and a53pll
Both a53pll and rpmcc make use of xo as a clock parent. Add it to the
respective device nodes.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220620010519.1533364-1-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Fri, 17 Jun 2022 10:36:52 +0000 (13:36 +0300)]
arm64: dts: qcom: msm8996: add second DSI interface
Add device nodes for the DSI1, second DSI interface found on
MSM8996/APQ8096 platforms. For example on db820c it is routed to the
secondary HS expansion connector.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220617103652.606250-1-dmitry.baryshkov@linaro.org
Dmitry Baryshkov [Wed, 15 Jun 2022 13:59:35 +0000 (16:59 +0300)]
arm64: dts: qcom: add mdp_clk clock to the MDSS device
Add MDP_CLK ("core") clock to the mdss device to allow MDSS driver to
access HW_REV/etc registers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220615135935.87381-5-dmitry.baryshkov@linaro.org
Emma Anholt [Tue, 14 Jun 2022 23:01:36 +0000 (16:01 -0700)]
arm64: dts: qcom: sm8250: Enable per-process page tables.
This is an SMMU for the adreno gpu, and adding this compatible lets
the driver use per-fd page tables, which are required for security
between GPU clients.
Signed-off-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[bjorn: Move arm,smmu-500 last, per Dmitry's request]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220614230136.3726047-2-emma@anholt.net
Lin, Meng-Bo [Fri, 10 Jun 2022 17:54:09 +0000 (17:54 +0000)]
arm64: dts: qcom: msm8916-samsung-a2015: Add touchscreen pinctrl
A3, A5 and most of the Samsung phones with MSM8916 SoC use GPIO pin 13 for
touchscreen interrupts. Add touchscreen pinctrl to a2015 common dtsi.
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220610175332.104154-1-linmengbo0689@protonmail.com
Dmitry Baryshkov [Thu, 9 Jun 2022 12:23:50 +0000 (15:23 +0300)]
arm64: dts: qcom: msm8996: drop phy-names from HDMI device node
The HDMI driver doesn't use the phy-names to identify the PHY. Different
Qualcomm platforms have used different names for the PHY. So, we are
deprecating phy-names propertty of the HDMI device and dropping them
from existing DTs.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220609122350.3157529-15-dmitry.baryshkov@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 17:18:48 +0000 (19:18 +0200)]
arm64: dts: qcom: msm8994: add required ranges to OCMEM
The OCMEM bindings require ranges property.
Fixes:
9d511d0a7926 ("arm64: dts: qcom: msm8994: Add OCMEM node")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-14-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 17:18:47 +0000 (19:18 +0200)]
arm64: dts: qcom: sdm845: add dedicated IMEM and syscon compatibles
Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-13-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 17:18:46 +0000 (19:18 +0200)]
arm64: dts: qcom: sdm630: add dedicated IMEM and syscon compatibles
Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-12-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 17:18:45 +0000 (19:18 +0200)]
arm64: dts: qcom: sc7280: add simple-mfd to IMEM
The IMEM node has children (PIL) which should be instantiated with
simple-mfd.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-11-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 17:18:44 +0000 (19:18 +0200)]
arm64: dts: qcom: sc7180: add dedicated IMEM and syscon compatibles
Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-10-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 17:18:43 +0000 (19:18 +0200)]
arm64: dts: qcom: qcs404: add dedicated IMEM and syscon compatibles
Add proper compatibles to the IMEM device node:
1. syscon to allow accessing memory from other devices,
2. dedicated compatible as required for syscon and simple-mfd nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-9-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 17:18:42 +0000 (19:18 +0200)]
arm64: dts: qcom: use generic sram as name for imem and ocmem nodes
According to Devicetree specification, the device nodes should be
generic, reflecting the function of the device. The typical name for
memory regions is "sram".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607171848.535128-8-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 10:29:31 +0000 (12:29 +0200)]
arm64: dts: qcom: sdm845-db845c: add function and color to LED nodes
Add common LED properties - the function and color - to LED nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-10-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 10:29:30 +0000 (12:29 +0200)]
arm64: dts: qcom: sc7280-herobrine: add function to LED node
Add common LED property - the function - to LED node.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-9-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 10:29:29 +0000 (12:29 +0200)]
arm64: dts: qcom: sc7180-trogdor: add function to LED node
Add common LED property - the function - to LED node.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-8-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 10:29:28 +0000 (12:29 +0200)]
arm64: dts: qcom: qrb5165-rb5: add function and color to LED nodes
Add common LED properties - the function and color - to LED nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-7-krzysztof.kozlowski@linaro.org
Krzysztof Kozlowski [Tue, 7 Jun 2022 10:29:27 +0000 (12:29 +0200)]
arm64: dts: qcom: apq8016-sbc: add function and color to LED nodes
Add common LED properties - the function and color - to LED nodes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220607102931.102805-6-krzysztof.kozlowski@linaro.org
Vinod Koul [Mon, 6 Jun 2022 06:50:35 +0000 (12:20 +0530)]
arm64: dts: qcom: sm8250: Move qup-opp-table out of soc node
The soc node expects all the nodes to have unit addresses. The
qup-opp-table does not have that which causes warnings:
arch/arm64/boot/dts/qcom/sm8250.dtsi:916.32-933.5:
Warning (simple_bus_reg): /soc@0/qup-opp-table:
missing or empty reg/ranges property
Move the qup-opp-table out of soc node to fix these warnings
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
[bjorn: Rebased ontop of Krzysztof's node name update]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220606065035.553533-4-vkoul@kernel.org