Arnd Bergmann [Fri, 15 Feb 2019 14:51:42 +0000 (15:51 +0100)]
Merge tag 'tegra-for-5.1-arm64-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.1-rc1
This contains a couple of fixes to existing device trees, enables CPU
frequency scaling on various Tegra210 boards, enables the TCU as debug
serial port on Jetson Xavier, adds various improvements for SDMMC on
Tegra210, Tegra186 and Tegra194 boards and finally adds initial support
for the NVIDIA Shield TV.
* tag 'tegra-for-5.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (25 commits)
arm64: tegra: Update compatible for Tegra186 I2C
arm64: tegra: Update compatible for Tegra210 I2C
arm64: tegra: Support 200 MHz for SDMMC on Tegra194
arm64: tegra: Add CQE Support for SDMMC4
arm64: tegra: Add SDMMC auto-calibration settings
arm64: tegra: Mark TCU as primary serial port on Tegra194 P2888
arm64: tegra: Add nodes for TCU on Tegra194
arm64: tegra: Enable DFLL clock on Smaug
arm64: tegra: Add CPU power rail regulator on Smaug
arm64: tegra: Enable DFLL clock on Jetson TX1
arm64: tegra: Add pinmux for PWM-based DFLL support on P2597
arm64: tegra: Add CPU clocks on Tegra210
arm64: tegra: Add DFLL clock on Tegra210
arm64: tegra: p2771-0000: Use TEGRA186_ prefix for GPIO names
arm64: tegra: p3310: Use TEGRA186_ prefix for GPIO names
arm64: tegra: p2597: Sort nodes by unit-address
arm64: tegra: p2972: Sort nodes properly
arm64: tegra: Add regulators for Tegra210 Darcy
arm64: tegra: Add pinmux for Darcy board
arm64: tegra: Add gpio-keys nodes for Darcy
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:51:00 +0000 (15:51 +0100)]
Merge tag 'tegra-for-5.1-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.1-rc1
Contains a single patch that adds the "jedec,spi-nor" compatible string
where appropriate.
* tag 'tegra-for-5.1-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: add "jedec,spi-nor" flash compatible binding
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:49:56 +0000 (15:49 +0100)]
Merge tag 'tegra-for-5.1-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt
dt-bindings: tegra: Changes for v5.1-rc1
This contains device tree binding updates for CPU frequency scaling on
Tegra210, BPMP support on Tegra210 and support for NVIDIA Shield TV.
* tag 'tegra-for-5.1-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: cpufreq: tegra124: remove cpu_lp clock from required properties
dt-bindings: cpufreq: tegra124: remove vdd-cpu-supply from required properties
dt-bindings: clock: tegra124-dfll: add Tegra210 support
dt-bindings: clock: tegra124-dfll: Update DFLL binding for PWM regulator
dt-bindings: firmware: tegra186-bpmp: Remove name property
dt-bindings: firmware: Add bindings for Tegra210 BPMP
dt-bindings: tegra: Add Shield TV device tree binding documentation
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:45:54 +0000 (15:45 +0100)]
Merge tag 'renesas-arm-dt-for-v5.1' of git://git./linux/kernel/git/horms/renesas into arm/dt
Renesas ARM Based SoC DT Updates for v5.1
* R-Car H2 (r8a7790) based Stout board
- Convert to new LVDS DT bindings
* R-Car H1 (r8a7779) and M1A (r8a7778) SoCs
- Describe HSCIF0/1 devices in DT
* RZ/G1M (r8a7743) SoC
- Correct sort order of the RWDT node
- Remove aliases: should be defined in board rather than SoC DT if needed
- Remove generic compatible string from iic3: it is not compatible
* RZ/G1N (r8a7744) SoC
- Describe LVDS and DU devices in DT
- Correct sort order of VSP and MSIOF noces
* RZ/G1C (r8a7747) based iWave SBC
- Enable RTC
* RZ/A2M (r7s9210) SoC and EVB
- Initial support
* tag 'renesas-arm-dt-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: r8a7744: Add LVDS support
ARM: dts: r8a7744: Add DU support
ARM: dts: r7s9210-rza2mevb: Add support for RZ/A2M EVB
ARM: dts: r7s9210: Initial SoC device tree
ARM: dts: r8a7779: Add HSCIF0/1 device nodes
ARM: dts: r8a7778: Add HSCIF0/1 support
ARM: dts: r8a7743: Fix sorting of rwdt node
ARM: dts: r8a7743: Remove aliases from SoC dtsi
ARM: dts: r8a7743: Remove generic compatible string from iic3
ARM: dts: r8a7744: Fix sorting of vsp and msiof nodes
ARM: dts: iwg23s-sbc: Enable RTC
ARM: dts: stout: Convert to new LVDS DT bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:43:06 +0000 (15:43 +0100)]
Merge tag 'renesas-arm64-dt2-for-v5.1' of git://git./linux/kernel/git/horms/renesas into arm/dt
Second Round of Renesas ARM64 Based SoC DT Updates for v5.1
* R-Car Gen3 SoC based Salvator-X, Salvator-XS and ULCB boards
- Enable HS400 support for eMMC
* R-Car E3 (r7a77990) SoC
- Add OPPs table for cpu devices
* RZ/G2E (r8a774c0) SoC
- Describe TMU, CMT, SDHI devices in DT
- Describe pincontrol support for SCIF2 device in DT
- Add OPPs table for cpu devices
* RZ/G2E (r8a774c0) based EK874 board and CAT875 sub-board,
and CAT874 board
- Initial support
* tag 'renesas-arm64-dt2-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: renesas: cat875: Enable PCIe support
arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support
arm64: dts: renesas: r8a774c0: Add TMU device nodes
arm64: dts: renesas: r8a774c0: Add CMT device nodes
arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices
arm64: dts: renesas: r8a77990: Add OPPs table for cpu devices
arm64: dts: renesas: enable HS400 on R-Car Gen3
arm64: dts: renesas: cat875: Add ethernet support
arm64: dts: renesas: r8a774c0-cat874: Add uSD support
arm64: dts: renesas: r8a774c0-cat874: Add pincontrol support to scif2
arm64: dts: renesas: Add Si-Linux EK874 board support
arm64: dts: renesas: Add Si-Linux CAT874 board support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:42:14 +0000 (15:42 +0100)]
Merge tag 'sunxi-dt-for-5.1-2' of git://git./linux/kernel/git/sunxi/linux into arm/dt
Allwinner DT changes for 5.1, take 2
Our usual bunch of DT changes for the Allwinner arm SoCs:
- LCD support for the Q8 A13 tablets
- GMAC support for the A80
- PMIC power supplies for the A83t
* tag 'sunxi-dt-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: sun8i: a83t: Enable PMIC power supplies on various boards
ARM: dts: sun9i: cubieboard4: Enable GMAC
ARM: dts: sun9i: a80-optimus: Enable GMAC
ARM: dts: sun9i: Add A80 GMAC RGMII pinmux setting
ARM: dts: sun9i: Add A80 GMAC gigabit ethernet controller node
ARM: dts: sun9i: Add GMAC clock node
ARM: dts: sun9i: cubieboard4: Add GPIO pin-bank regulator supplies
ARM: dts: sun9i: a80-optimus: Add GPIO pin-bank regulator supplies
ARM: dts: sun9i: a80-optimus: Add node for AXP809's unused dc1sw regulator
ARM: dts: sun5i: q8-tablet: Use bananapi,s070wv20-ct16 panel compatible
ARM: dts: sun5i: q8-tablet: Add LCD Panel power supply
ARM: dts: sun5i: q8-tablet: Add LCD Panel enable GPIO
ARM: dts: sun5i: q8-tablet: Move panel properties to correct node level
ARM: dts: sun5i: Add backlight GPIO for reference design tablet
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:41:09 +0000 (15:41 +0100)]
Merge tag 'sunxi-dt64-for-5.1-2' of git://git./linux/kernel/git/sunxi/linux into arm/dt
Allwinner arm64 DT changes for 5.1, take 2
Our usual round of DT changes for the arm64 Allwinner SoCs:
- Enabling of the various power supplies on most a64 boards
- H6 SRAM controller support
- A64 CSI support
* tag 'sunxi-dt64-for-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: a64: Enable PMIC power supplies on various boards
arm64: dts: allwinner: a64: teres-i: enable power supplies
arm64: dts: allwinner: h6: Add support for the SRAM C1 section
dt-bindings: sram: sunxi: Add compatible for the H6 SRAM C1
arm64: dts: allwinner: a64: Add A64 CSI controller
arm64: dts: allwinner: h6: Move GIC device node fix base address ordering
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:39:41 +0000 (15:39 +0100)]
Merge tag 'sunxi-h3-h5-for-5.1' of git://git./linux/kernel/git/sunxi/linux into arm/dt
Allwinner H3 and H5 changes for 5.1
Our usual round of DT changes shared between arm and arm64.
We have a bunch of changes for board, improving the eMMC support on the H5
variant of the All-H3-CC, enabling HDMI and reworking the CSI driver.
* tag 'sunxi-h3-h5-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h5: libretech-all-h3-cc: Mark eMMC HS-DDR 3.3V capable
ARM: dts: sunxi: h3/h5: Drop A31 fallback compatible for CSI controller
ARM: dts: sun8i-h3: nanopi-m1-plus: enable HDMI
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:38:40 +0000 (15:38 +0100)]
Merge tag 'socfpga_dts_for_v5.1' of git://git./linux/kernel/git/dinguyen/linux into arm/dt
SoCFPGA DTS updates for v5.1
- Add SMMU node for Stratix10
- Add vendor prefix fo Novtech
- Add a new 96Boards Chameleon96 board that uses a Cyclone5 SoCFPGA
- Add missing reset properties for all IP on Cyclone5 and Arria10
* tag 'socfpga_dts_for_v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: update more missing reset properties
ARM: dts: socfpga: update missing reset property peripherals
ARM: dts: Add support for 96Boards Chameleon96 board
dt-bindings: vendor-prefixes: Add Novtech Vendor Prefix
arm64: dts: stratix10: Add Stratix10 SMMU support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:37:07 +0000 (15:37 +0100)]
Merge tag 'hisi-arm64-dt-for-5.1v2' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon SoCs DT updates for 5.1
* Hi6220 SoC and related boards:
- Add DMA entries to enable DMA for Bluetooth transfers
- Add power-on delay to make wifi stable
- Revert HS200 mode to avoid eMMC controller resets and block read failures
* Hi3660 SoC and related boards:
- Fix SD card detection via setting cd-gpios correctly
* Hi3798 SoC and related boards:
- Fix malformed SPDX license identifier
* tag 'hisi-arm64-dt-for-5.1v2' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hikey: Revert "Enable HS200 mode on eMMC"
arm64: dts: hikey: Give wifi some time after power-on
arm64: dts: hi3798cv200: fix malformed SPDX license identifier
arm64: dts: hikey960: fix SDcard detection
arm64: dts: hikey: Add DMA entries for Bluetooth UART
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:36:00 +0000 (15:36 +0100)]
Merge tag 'qcom-dts-for-5.1' of git://git./linux/kernel/git/agross/linux into arm/dt
Qualcomm Device Tree Changes for v5.1
* Fixup GIC IRQ flags and GSBI state on MSM8660
* Add USB OTG, gpio ranges, and Wifi support on MSM8974 Hammerhead
* Remove skeleton.dtsi on IPQ4019
* tag 'qcom-dts-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: ipq4019: Remove skeleton.dtsi
ARM: dts: qcom: msm8974-hammerhead: add USB OTG support
ARM: dts: qcom: msm8974: add gpio-ranges
ARM: dts: qcom: msm8974-hammerhead: add WiFi support
ARM: dts: msm8660: Fix up GIC IRQ flags
ARM: dts: msm8660: Mark two GSBI blocks "disabled"
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:30:49 +0000 (15:30 +0100)]
Merge tag 'qcom-arm64-for-5.1' of git://git./linux/kernel/git/agross/linux into arm/dt
Qualcomm ARM64 Updates for v5.1
* Add MSM8998 RPMCC, I2C, and USB related nodes
* Add MSM8996 rpmpd node
* Fix typo in MSM8996 pin definitions
* Disable MSM8996 VFE smmu to fix security violation
* Add I2C, SPI, rpmcc, uart, and WCN3990 wlan nodes on QCS404
* Enable SDCC1 HS400 support on QCS404
* Add a multitude of nodes on SDM845:
SD, UFS, USB, LPASS, SCM, QSPI, PDC, DPU, videocc, GPU, RPMh
bus interconnect, WCN3990 WLAN
* Add gpio ranges to SDM845 TLMM
* Fix regulator load on sdcard on MSM8998-mtp board
* tag 'qcom-arm64-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (41 commits)
arm64: dts: sdm845: Add interconnect provider DT nodes
arm64: dts: qcom: msm8996: Disabled VFE SMMU
arm64: dts: qcom: qcs404: Add rpmcc node
arm64: dts: qcom: msm8998: Add rpmcc node
arm64: dts: qcom: msm8998: Add USB-related nodes
arm64: dts: qcom: qcs404: Add QUP I2C and SPI nodes
arm64: dts: qcom: qcs404: Define remaining UARTs
arm64: dts: qcom: qcs404: Specify pinctrl state for UART
arm64: dts: qcom: sdm845: Fix lpasscc reg
arm64: dts: qcom: sdm845: Remove the duplicate header inclusion
arm64: dts: qcom: sdm845: Add reserve-memory nodes
arm64: dts: qcom: sdm845: Add gpio-ranges to TLMM node
arm64: dts: qcom: sdm845: Extend ranges and describe DMA space
arm64: dts: qcom: sdm845: Increase address and size cells for soc
arm64: dts: sdm845: Add rpmh powercontroller node
arm64: dts: msm8996: Add rpmpd device node
arm64: dts: sdm845: Add WCN3990 WLAN module device node
arm64: dts: qcom: sdm845: Add PDC Global reset driver node
arm64: dts: qcom: sdm845: Add SCM DT node
arm64: dts: qcom: sdm845: Fix pcs_misc region address for UNI PHY
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 14:29:18 +0000 (15:29 +0100)]
Merge tag 'lpc32xx-dt-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx into arm/dt
ARM: lpc32xx: devicetree updates for v5.1
Here are the changes for ARM NXP LPC32xx and ARM NXP LPC18xx/LPC43xx
devicetree files:
* added dts file for MYIR Tech MYD-LPC4357 development board,
* two missing properties are added to LPC32xx keypad controller device
tree node, this fixes a long-standing problem with its initialization,
* LPC32xx PL11x LCD controller device node got corrected properties,
which allows to use it with a new PL11x DRM driver,
* output voltage level on one of Phytec phyCORE-LPC3250 fixed regulators
is corrected, the fix is needed to remove duplicating platform data,
* Phytec phyCORE-LPC3250 board gets a description of a kit LCD panel,
this completes setup of CLCD device tree node for the board,
* added unit addresses to memory device nodes on EA and Phytec boards,
* fixes of ordinary warnings in dts formatting like leading zeroes,
unused address and size cell properties and so on.
* tag 'lpc32xx-dt-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx:
ARM: dts: lpc32xx: ea3250: beautify gpio keys children nodes
ARM: dts: lpc32xx: ea3250: add unit address to memory device node
ARM: dts: lpc32xx: phy3250: add unit address to memory device node
ARM: dts: lpc32xx: phy3250: setup LCD controller to panel interface
ARM: dts: lpc32xx: phy3250: remove regulators umbrella device node
ARM: dts: lpc32xx: phy3250: fix SD card regulator voltage
ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller clocks property
ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller variant
ARM: dts: lpc32xx: reparent keypad controller to SIC1
ARM: dts: lpc32xx: add required clocks property to keypad device node
ARM: dts: Add DT for MYIR Tech MYD-LPC4357 Development Board
ARM: dts: lpc32xx: Remove leading 0x and 0s from bindings notation
ARM: dts: lpc435x: remove address and size cells from gpio-keys-polled nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 13:56:22 +0000 (14:56 +0100)]
Merge tag 'arm-soc/for-5.1/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SoCs Device Tree updates
for 5.1, please pull the following:
- Stefan adds support for the Raspberry Pi 3 A+ by using the same
mechanism of creating a symbolic reference to the ARM 32-bit DTS file
* tag 'arm-soc/for-5.1/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: Add reference to RPi 3 A+
ARM: dts: add Raspberry Pi 3 A+
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 13:49:40 +0000 (14:49 +0100)]
Merge tag 'arm-soc/for-5.1/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree updates
for 5.1, please pull the following:
- Dan relicenses the Luxul DTS files to GPL 2.0+/MIT
- Hao adds support for the Phicomm K3 which is a BCM4709 SoC with dual
BCM4366 radio
- Stefan adds support for the Raspberry Pi A+: binding and DTS files. He
also provides a bunch of DTC warning fixes for the different RPi DTS(i)
files and adds support for missing GPIO lines on RPi 2/3
* tag 'arm-soc/for-5.1/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: bcm2835-rpi-zero-w: Drop unnecessary pinctrl
ARM: dts: bcm283x: Add missing GPIO line names
ARM: dts: bcm2837-rpi-3-b-plus: Clarify label for STATUS_LED
ARM: dts: bcm2837-rpi-3-b: Use consistent label for HDMI hotplug
ARM: dts: bcm2835: Fix labels for GPIO 0,1
ARM: dts: bcm2835-rpi: Drop unnecessary #address-cells/#size-cells
ARM: dts: bcm283x: Fix DTC warning for memory node
ARM: dts: add Raspberry Pi 3 A+
dt-bindings: bcm: Add Raspberry Pi 3 A+
ARM: dts: BCM5301X: Add basic DT for Phicomm K3
ARM: dts: BCM53573: Relicense Luxul files to the GPL 2.0+ / MIT
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 13:48:24 +0000 (14:48 +0100)]
Merge tag 'samsung-dt-5.1' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.1
1. Extend support for Aries family of mobile devices (e.g. Samsung
Galaxy S) based on S5Pv210 SoC: DRM Rotator, FIMD, PWM vibrator,
power off, touchscreen, Broadcom BCM4329 Bluetooth and cpufreq.
2. Remove hardcoded bootargs on Galaxy S family (proper support in
U-Boot).
3. Fix minor DTC warnings.
4. Fix Exynos4412 Odroid X2/U3 conflicting eMMC GPIO settings and regulator
properties.
5. Fix the eMMC RTSN pin breaking proper reboot on X2.
* tag 'samsung-dt-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Fix pinctrl definition for eMMC RTSN line on Odroid X2/U3
ARM: dts: exynos: Fix eMMC regulator properties on Odroid U3 boards
ARM: dts: exynos: Fix conflicting fixed-regulator GPIO flags and properties
ARM: dts: s3c2416: Fix xti node's missing reg property warning
ARM: dts: s5pv210: Fix onenand's unit address format warning
ARM: dts: s5pv210: Add DMC nodes
ARM: dts: s5pv210: Add support for more devices present on Aries
ARM: dts: s5pv210: Add reserved memory for MFC on Aries
ARM: dts: s5pv210: Remove hardcoded bootargs on Galaxy S and Fascinate 4G
ARM: dts: s5pv210: Use correct fimd variant
ARM: dts: s5pv210: Add node for exynos-rotator
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 13:47:25 +0000 (14:47 +0100)]
Merge tag 'stm32-dt-for-v5.1-1' of git://git./linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.1, round 1
Highlights:
----------
MPU part:
-Enable Digital Thermal Sensor (dts) on stm32mp157c-ed1 (and so ev1).
MCU part:
-Add SPI support on stm32f429 SOC (4 SPIs instances).
* tag 'stm32-dt-for-v5.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: Enable thermal sensor support on STM32MP157c-ed1
ARM: dts: stm32: add SPI support on STM32F429 SoC
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 13:36:29 +0000 (14:36 +0100)]
Merge tag 'v5.1-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards are the Rock Pi 4, NanoPC-T4 and NanoPi-M4, with the last
two being part of a family and sharing bigger parts of the devicetree.
rk3328 got sound-related upgrades and a wider patch drops mmc display-wp
fields from nodes which shouldn't use it.
* tag 'v5.1-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: clean up the abuse of disable-wp
arm64: dts: rockchip: 'Fix' nanopi4 uSD card detect
arm64: dts: rockchip: Add NanoPC-T4 IR receiver
arm64: dts: rockchip: Refine nanopi4 differences
arm64: dts: rockchip: Add DT for NanoPi M4
arm64: dts: rockchip: add ROCK Pi 4 DTS support
arm64: dts: rockchip: Add devicetree for NanoPC-T4
arm64: dts: rockchip: enable analog audio node for rock64
arm64: dts: rockchip: move rk3328 #sound-dai-cells to the soc dtsi
arm64: dts: rockchip: add rk3328 ACODEC node
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 13:07:05 +0000 (14:07 +0100)]
Merge tag 'v5.1-rockchip-dts32-1' of git://git./linux/kernel/git/mmind/linux-rockchip into arm/dt
New board the Elgin-R1 based on the rv1108 soc and a number of small
improvements for rv1108 as well. RK3066 got support for the core
display components and the Edison tablet got its touchscreen added.
Apart from that a wider fix to drop display-wp usage from places where
it shouldn't be used, a pin fix for Edison and a cleanup to prevent
rk3036 board from defining sound-dai-cells for core components in
each board separately.
* tag 'v5.1-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: clean up the abuse of disable-wp
ARM: dts: rv1108: Add support for rv1108-elgin-r1 board
dt-bindings: Add vendor prefix for elgin
ARM: dts: rockchip: rv1108: Add spim0 and spim1 pinctrl groups
ARM: dts: rockchip: Add missing dma-names SPI support for rv1108
ARM: dts: rockchip: add rk3066 vop display nodes
ARM: dts: rockchip: add focaltech touchscreen to rk3188-bqedison2qc
ARM: dts: rockchip: fix cif1_pdn pin on rk3188-bqedison2qc
ARM: dts: rockchip: add HCLK_HDMI to rk3066 vio power-domain
ARM: dts: rockchip: move rk3036 i2s sound-dail-cells into soc dtsi
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 13:02:53 +0000 (14:02 +0100)]
Merge tag 'am654-for-v5.1' of git://git./linux/kernel/git/kristo/linux into arm/dt
AM65x DT changes for v5.1. Includes:
- EMMC support for am654-evm board
* tag 'am654-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kristo/linux:
arm64: dts: ti: k3-am654-base-board: Add eMMC Support
arm64: dts: ti: k3-am654: Add Support for eMMC host controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 13:01:28 +0000 (14:01 +0100)]
Merge tag 'davinci-for-v5.1/dt' of git://git./linux/kernel/git/nsekhar/linux-davinci into arm/dt
DaVinci device-tree updates for v5.1 contains a patch to enable analog
mic input on da850 LCDK board.
* tag 'davinci-for-v5.1/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-lcdk: Enable the analog mic input
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 12:58:57 +0000 (13:58 +0100)]
Merge tag 'omap-for-v5.1/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
dts updates for omap variants for v5.1 merge window
This series contains board specific dts updates and few minor
clean-up changes:
- add stdout-path for am335x-chiliboard
- add wlcore wakeirq for omap3-evm, pandaboard and omap4-droid4
- remove unnecessary address-cells and io-cells for am33xx
- replace deprecated linux,wakeup with wakeup-source property
- use spdx license for am335x-shc
- configure ethernet pins for omap4-sdp
* tag 'omap-for-v5.1/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap4-sdp: Make ethernet working even if booted with latest u-boot
ARM: dts: am335x-shc.dts: Switch to SPDX identifier
ARM: dts: am437x: replace linux,wakeup with wakeup-source property
ARM: dts: am33xx: Remove unnecessary properties
ARM: dts: omap4-droid4: Configure wlcore wakeirq
ARM: dts: Configure wlcore wakeirq for pandaboard
ARM: dts: Add wlcore wakeirq for omap3-evm
ARM: dts: am335x-chiliboard: Add stdout-path property
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 12:58:06 +0000 (13:58 +0100)]
Merge tag 'omap-for-v5.1/dt-ti-81xx-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
dts updates for ti81xx for v5.1 merge window
Two changes to add support for McGill University's IceBoard telescope
ARM + FPGA instrumentation board. This board is used for several
telescopes around the world, see the related device tree commit for
some interesting links for more information.
Note that these changes are based on the related ti81xx soc changes.
* tag 'omap-for-v5.1/dt-ti-81xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Adds device tree file for McGill's IceBoard, based on TI AM3874
ARM: dts: ti81xx: Add dts boilerplate for all GPIO and SPI peripherals
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 15 Feb 2019 12:57:17 +0000 (13:57 +0100)]
Merge tag 'omap-for-v5.1/soc-ti-81xx-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt
SoC updates for ti81xx for v5.1 merge window
Two changes to add legacy hwmod data for gpio and spi peripherals on
ti81xx. We have not yet updated ti81xx to probe devices with ti-sysc
interconnect target module driver, so these changes are still needed
to make devices usable for the related device tree changes.
* tag 'omap-for-v5.1/soc-ti-81xx-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: ti81xx: Add hwmod boilerplate for all GPIO and SPI peripherals
ARM: ti81xx: Move I2C entries in omap_hwmod_81xx to maintain grouping
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Biju Das [Thu, 7 Feb 2019 08:31:50 +0000 (08:31 +0000)]
arm64: dts: renesas: cat875: Enable PCIe support
This patch enables PCIEC0 PCI express controller on the sub board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Biju Das [Thu, 7 Feb 2019 08:31:49 +0000 (08:31 +0000)]
arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support
Silicon Linux CAT 874 board has 2GB DDR memory. Update the dma-ranges
mapping for pciec0 node. Also declare pcie bus clock, since it is
generated on the CAT874 main board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Biju Das [Mon, 4 Feb 2019 09:20:07 +0000 (09:20 +0000)]
arm64: dts: renesas: r8a774c0: Add TMU device nodes
This patch adds TMU{0|1|2|3|4} device nodes for r8a774c0 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Biju Das [Mon, 4 Feb 2019 09:20:04 +0000 (09:20 +0000)]
arm64: dts: renesas: r8a774c0: Add CMT device nodes
This patch adds CMT{0|1|2|3} device nodes for r8a774c0 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Fabrizio Castro [Thu, 31 Jan 2019 11:34:10 +0000 (11:34 +0000)]
arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices
This patch defines OOP tables for all CPUs, similarly to
what done by Takeshi Kihara and Yoshihiro Kaneko for the
R8A77990.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Takeshi Kihara [Tue, 15 Jan 2019 12:02:42 +0000 (21:02 +0900)]
arm64: dts: renesas: r8a77990: Add OPPs table for cpu devices
This patch define OOP tables for all CPUs.
This allows CPUFreq to function.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Niklas Söderlund [Wed, 31 Oct 2018 23:31:25 +0000 (00:31 +0100)]
arm64: dts: renesas: enable HS400 on R-Car Gen3
Successfully tested on H3 ES2.0 and M3-N ES1.0.
Transfer rates where >160MB/s for H3 and >200MB/s for M3-N.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Biju Das [Tue, 22 Jan 2019 15:25:49 +0000 (15:25 +0000)]
ARM: dts: r8a7744: Add LVDS support
Add LVDS encoder node to r8a7744 SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Biju Das [Tue, 22 Jan 2019 15:25:48 +0000 (15:25 +0000)]
ARM: dts: r8a7744: Add DU support
Add du node to r8a7744 SoC DT. Boards that want to enable the DU
need to specify the output topology.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sowjanya Komatineni [Tue, 18 Dec 2018 22:40:56 +0000 (14:40 -0800)]
arm64: tegra: Update compatible for Tegra186 I2C
Update I2C Device node compatible string to be appropriate.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Tue, 18 Dec 2018 22:37:04 +0000 (14:37 -0800)]
arm64: tegra: Update compatible for Tegra210 I2C
Update I2C device node compatible string to be appropriate.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Thu, 13 Dec 2018 21:14:30 +0000 (13:14 -0800)]
arm64: tegra: Support 200 MHz for SDMMC on Tegra194
Change the SDMMC clock source to support a maximum frequency of 200 MHz
on Tegra194.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Wed, 23 Jan 2019 19:30:52 +0000 (11:30 -0800)]
arm64: tegra: Add CQE Support for SDMMC4
Add CQE Support for Tegra186 and Tegra194 SDMMC4 controller
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sowjanya Komatineni [Thu, 10 Jan 2019 22:46:02 +0000 (14:46 -0800)]
arm64: tegra: Add SDMMC auto-calibration settings
Add SDMMC initial pad offsets used by auto calibration process.
Add SDMMC fixed drive strengths for Tegra210, Tegra186 and
Tegra194 which are used when calibration timeouts.
Fixed drive strengths are based on Pre SI Analysis of the pads.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Mikko Perttunen [Wed, 28 Nov 2018 09:54:20 +0000 (10:54 +0100)]
arm64: tegra: Mark TCU as primary serial port on Tegra194 P2888
The Tegra Combined UART is the proper primary serial port on P2888,
so use it.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Mikko Perttunen [Wed, 28 Nov 2018 09:54:19 +0000 (10:54 +0100)]
arm64: tegra: Add nodes for TCU on Tegra194
Add nodes required for communication through the Tegra Combined UART.
This includes the AON HSP instance, addition of shared interrupts
for the TOP0 HSP instance, and finally the TCU node itself. Also
mark the HSP instances as compatible to tegra194-hsp, as the hardware
is not identical but is compatible to tegra186-hsp.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Fri, 4 Jan 2019 03:07:01 +0000 (11:07 +0800)]
arm64: tegra: Enable DFLL clock on Smaug
Enable DFLL clock for Smaug board.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Fri, 4 Jan 2019 03:07:00 +0000 (11:07 +0800)]
arm64: tegra: Add CPU power rail regulator on Smaug
Add CPU power rail regulator for Smaug board.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Fri, 4 Jan 2019 03:06:59 +0000 (11:06 +0800)]
arm64: tegra: Enable DFLL clock on Jetson TX1
Enable DFLL clock for Jetson TX1 platform.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Fri, 4 Jan 2019 03:06:58 +0000 (11:06 +0800)]
arm64: tegra: Add pinmux for PWM-based DFLL support on P2597
Add pinmux for PWM-based DFLL support.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Fri, 4 Jan 2019 03:06:57 +0000 (11:06 +0800)]
arm64: tegra: Add CPU clocks on Tegra210
Add CPU clocks for Tegra210.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Fri, 4 Jan 2019 03:06:56 +0000 (11:06 +0800)]
arm64: tegra: Add DFLL clock on Tegra210
Add essential DFLL clock properties for Tegra210.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Chen-Yu Tsai [Tue, 5 Feb 2019 15:00:39 +0000 (23:00 +0800)]
ARM: dts: sun8i: a83t: Enable PMIC power supplies on various boards
On the Bananapi M3 and Cubietruck Plus, the DC input jacks are wired to
the ACIN pins, which is represented by the AC power supply. Both boards
have connectors for LiPo batteries, which are represented by the battery
power supply.
The H8 Homlet is a set-top box design. The DC input jack is wired to the
ACIN pins, but there are no battery connectors.
Enable these power supplies in the device tree.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Chen-Yu Tsai [Wed, 6 Feb 2019 03:32:39 +0000 (11:32 +0800)]
ARM: dts: sun9i: cubieboard4: Enable GMAC
The Cubieboard4 has a Realtek RTL8211E ethernet PHY which uses RGMII to
talk to the MAC. The PHY is powered by 2 regulators: cldo1 for the PHY's
core logic and gpio1-ldo for I/O. The latter also powers the SoC side
pins. As there is no binding to model a second regulator supply for the
PHY, it is omitted. It is however properly modeled for the PIO.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Chen-Yu Tsai [Wed, 6 Feb 2019 03:32:38 +0000 (11:32 +0800)]
ARM: dts: sun9i: a80-optimus: Enable GMAC
The A80 Optimus has a Realtek RTL8211E ethernet PHY which uses RGMII to
talk to the MAC. The PHY is powered by 2 regulators: cldo1 for the PHY's
core logic and gpio1-ldo for I/O. The latter also powers the SoC side
pins. As there is no binding to model a second regulator supply for the
PHY, it is omitted. It is however properly modeled for the PIO.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Chen-Yu Tsai [Wed, 6 Feb 2019 03:32:37 +0000 (11:32 +0800)]
ARM: dts: sun9i: Add A80 GMAC RGMII pinmux setting
The GMAC (gigabit ethernet controller) supports RGMII to connect to
the ethernet PHY, for gigabit network speeds.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Chen-Yu Tsai [Wed, 6 Feb 2019 03:32:36 +0000 (11:32 +0800)]
ARM: dts: sun9i: Add A80 GMAC gigabit ethernet controller node
The A80 has the same GMAC found on the A31 SoC.
Add a device node, and an alias for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Chen-Yu Tsai [Wed, 6 Feb 2019 03:32:35 +0000 (11:32 +0800)]
ARM: dts: sun9i: Add GMAC clock node
The A80 has the same DWMAC hardware as on earlier Allwinner SoCs. The
accompanying GMAC clock register has been moved into the "System
Control" area.
Add a clock node for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Chen-Yu Tsai [Wed, 6 Feb 2019 03:32:34 +0000 (11:32 +0800)]
ARM: dts: sun9i: cubieboard4: Add GPIO pin-bank regulator supplies
The Cubieboard 4 has the PMIC providing voltage to all the pin-bank
supply rails from its various regulator outputs. All pin-banks that
have supply rails are accounted for. PN pin-bank does not have a
supply rail.
Also remove any "regulator-always-on" properties from regulators that
were only marked to provide pin-bank power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Chen-Yu Tsai [Wed, 6 Feb 2019 03:32:33 +0000 (11:32 +0800)]
ARM: dts: sun9i: a80-optimus: Add GPIO pin-bank regulator supplies
The A80 Optimus has the PMIC providing voltage to all the pin-bank
supply rails from its various regulator outputs. All pin-banks that
have supply rails are accounted for. PN pin-bank does not have a
supply rail.
Also remove any "regulator-always-on" properties from regulators that
were only marked to provide pin-bank power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Chen-Yu Tsai [Wed, 6 Feb 2019 03:32:32 +0000 (11:32 +0800)]
ARM: dts: sun9i: a80-optimus: Add node for AXP809's unused dc1sw regulator
The DC1SW output from the AXP809 is unused. Unused regulators should
still be listed so as to be considered to be fully constrained.
Fixes:
aa4a27bc819e ("ARM: dts: sun9i: a80-optimus: Add AXP809 PMIC device node and regulators")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Joseph Lo [Fri, 4 Jan 2019 03:06:46 +0000 (11:06 +0800)]
dt-bindings: cpufreq: tegra124: remove cpu_lp clock from required properties
The cpu_lp clock property is only needed when the CPUfreq driver
supports CPU cluster switching. But it was not a design for this driver
and it didn't handle that as well. So removing this property.
Cc: devicetree@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Fri, 4 Jan 2019 03:06:45 +0000 (11:06 +0800)]
dt-bindings: cpufreq: tegra124: remove vdd-cpu-supply from required properties
The Tegra124 cpufreq driver works only with DFLL clock, which is a
hardware-based frequency/voltage controller. The driver doesn't need to
control the regulator itself. Hence remove that.
Cc: devicetree@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Joseph Lo [Fri, 4 Jan 2019 03:06:44 +0000 (11:06 +0800)]
dt-bindings: clock: tegra124-dfll: add Tegra210 support
Add Tegra210 support for DFLL clock.
Cc: devicetree@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Peter De Schrijver [Fri, 4 Jan 2019 03:06:43 +0000 (11:06 +0800)]
dt-bindings: clock: tegra124-dfll: Update DFLL binding for PWM regulator
Add new properties to configure the DFLL PWM regulator support.
Cc: devicetree@vger.kernel.org
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rafał Miłecki [Sun, 16 Aug 2015 06:13:25 +0000 (08:13 +0200)]
ARM: tegra: add "jedec,spi-nor" flash compatible binding
Starting with commit
8947e396a829 ("Documentation: dt: mtd: replace
"nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor"
binding indicating support for JEDEC identification.
Use it for all flashes that are supposed to support READ ID op according
to the datasheets.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Chen-Yu Tsai [Tue, 5 Feb 2019 15:42:25 +0000 (23:42 +0800)]
arm64: dts: allwinner: h5: libretech-all-h3-cc: Mark eMMC HS-DDR 3.3V capable
The Libre Computer ALL-H3-CC H5 is one of the few boards that can have
its eMMC run at HS-DDR speed mode. Mark it as such.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Chen-Yu Tsai [Tue, 5 Feb 2019 15:00:40 +0000 (23:00 +0800)]
arm64: dts: allwinner: a64: Enable PMIC power supplies on various boards
On these A64 devices, the DC input jacks are wired to the ACIN pins of
the PMIC, which is represented by the AC power supply. With the
exception of the Nanopi A64, all devices include LiPo batteries or have
connectors for them, which are represented by the battery power supply.
Enable these power supplies in the device tree.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Alistair Strachan [Wed, 23 Jan 2019 20:06:06 +0000 (12:06 -0800)]
arm64: dts: hikey: Revert "Enable HS200 mode on eMMC"
This reverts commit
abd7d0972a192ee653efc7b151a6af69db58f2bb. This
change was already partially reverted by John Stultz in
commit
9c6d26df1fae ("arm64: dts: hikey: Fix eMMC corruption regression").
This change appears to cause controller resets and block read failures
which prevents successful booting on some hikey boards.
Cc: Ryan Grachek <ryan@edited.us>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: stable <stable@vger.kernel.org> #4.17+
Signed-off-by: Alistair Strachan <astrachan@google.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Jan Kiszka [Thu, 24 Jan 2019 07:52:33 +0000 (08:52 +0100)]
arm64: dts: hikey: Give wifi some time after power-on
Somewhere along recent changes to power control of the wl1835, power-on
became very unreliable on the hikey, failing like this:
wl1271_sdio: probe of mmc2:0001:1 failed with error -16
wl1271_sdio: probe of mmc2:0001:2 failed with error -16
After playing with some dt parameters and comparing to other users of
this chip, it turned out we need some power-on delay to make things
stable again. In contrast to those other users which define 200 ms, the
hikey would already be happy with 1 ms. Still, we use the safer 10 ms,
like on the Ultra96.
Fixes:
ea452678734e ("arm64: dts: hikey: Fix WiFi support")
Cc: <stable@vger.kernel.org> #4.12+
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Vladimir Zapolskiy [Tue, 29 Jan 2019 19:20:47 +0000 (21:20 +0200)]
ARM: dts: lpc32xx: ea3250: beautify gpio keys children nodes
Regarding the 'gpio_keys' device node a dtc reports a couple of
warnings:
Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary
#address-cells/#size-cells without "ranges" or child "reg" property
Warning (unit_address_vs_reg): /gpio_keys/button@21: node has
a unit name, but no reg property
The change fixes these issues and adds empty lines between adjacent
children device nodes. The device node itself is renamed by substituting
an underscore by hyphen to follow the standard naming convention
of device tree nodes.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Tue, 29 Jan 2019 19:20:46 +0000 (21:20 +0200)]
ARM: dts: lpc32xx: ea3250: add unit address to memory device node
The change adds a unit address to memory device node, the issue was
reported as a unit_address_vs_reg warning by dtc.
Root device node properties #address-cells and #size-cells were
removed as inherited from lpc32xx.dtsi.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Tue, 29 Jan 2019 19:20:45 +0000 (21:20 +0200)]
ARM: dts: lpc32xx: phy3250: add unit address to memory device node
The change adds a unit address to memory device node, the issue was
reported as a unit_address_vs_reg warning by dtc.
Root device node properties #address-cells and #size-cells were
removed as inherited from lpc32xx.dtsi.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Tue, 29 Jan 2019 19:20:44 +0000 (21:20 +0200)]
ARM: dts: lpc32xx: phy3250: setup LCD controller to panel interface
The change adds description of Sharp LQ035Q7DB03 3.5" 320x240 TFT panel,
which is connected to Phytec phyCORE-LPC3250 board, ARM PrimeCell PL111
LCD controller on NXP LPC3250 SoC gets its configuration appropriately
to support graphics output to the panel.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Tue, 29 Jan 2019 19:20:43 +0000 (21:20 +0200)]
ARM: dts: lpc32xx: phy3250: remove regulators umbrella device node
The originally added 'regulators' device node has a number of flaws,
to name a few its children has unit addresses but no reg properties,
the regulators are not captured by a device driver due to a missing
'simple-bus' compatible, the regulator names are selected by killing
either alphabetical order or device node grouping property.
The change removes 'regulators' device node and renames the regulators
and labels.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Tue, 29 Jan 2019 19:20:41 +0000 (21:20 +0200)]
ARM: dts: lpc32xx: phy3250: fix SD card regulator voltage
The fixed voltage regulator on Phytec phyCORE-LPC3250 board, which
supplies SD/MMC card's power, has a constant output voltage level
of either 3.15V or 3.3V, the actual value depends on JP4 position,
the power rail is referenced as VCC_SDIO in the board hardware manual.
Fixes:
d06670e96267 ("arm: dts: phy3250: add SD fixed regulator")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Tue, 29 Jan 2019 19:20:40 +0000 (21:20 +0200)]
ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller clocks property
The originally added ARM PrimeCell PL111 clocks property misses
the required "clcdclk" clock, which is the same as a clock to enable
the LCD controller on NXP LPC3230 and NXP LPC3250 SoCs.
Fixes:
93898eb775e5 ("arm: dts: lpc32xx: add clock properties to device nodes")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Tue, 29 Jan 2019 19:20:39 +0000 (21:20 +0200)]
ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller variant
ARM PrimeCell PL111 LCD controller is found on On NXP LPC3230
and LPC3250 SoCs variants, the original reference in compatible
property to an older one ARM PrimeCell PL110 is invalid.
Fixes:
e04920d9efcb3 ("ARM: LPC32xx: DTS files for device tree conversion")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Sat, 26 Jan 2019 14:29:21 +0000 (16:29 +0200)]
ARM: dts: lpc32xx: reparent keypad controller to SIC1
After switching to a new interrupt controller scheme by separating SIC1
and SIC2 from MIC interrupt controller just one SoC keypad controller
was not taken into account, fix it now:
WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:524 irq_domain_associate+0x50/0x1b0
error: hwirq 0x36 is too large for interrupt-controller@
40008000
...
lpc32xx_keys
40050000.key: failed to get platform irq
lpc32xx_keys: probe of
40050000.key failed with error -22
Fixes:
9b8ad3fb81ae ("ARM: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MIC")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Sat, 26 Jan 2019 14:29:20 +0000 (16:29 +0200)]
ARM: dts: lpc32xx: add required clocks property to keypad device node
NXP LPC32xx keypad controller requires a clock property to be defined.
The change fixes the driver initialization problem:
lpc32xx_keys
40050000.key: failed to get clock
lpc32xx_keys: probe of
40050000.key failed with error -2
Fixes:
93898eb775e5 ("arm: dts: lpc32xx: add clock properties to device nodes")
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy [Thu, 11 Oct 2018 12:31:03 +0000 (15:31 +0300)]
ARM: dts: Add DT for MYIR Tech MYD-LPC4357 Development Board
Add support for MYIR Tech MYD-LPC4357 Development Board and
MY-LCD70TP-C 7" TFT LCD module with Innolux AT070TN82 panel.
The board contains quite rich periferals, the list features
NXP LPC4357 SoC, 32 MB SDRAM, 4 MB SPI Flash, audio input/output
interface, LCD panel, micro SD card slot, USB, USB OTG, Ethernet,
2 CAN ports, 4 UARTs, I2C and SPI interfaces routed to external
interface.
More information can be found on http://www.myirtech.com/list.asp?id=422
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Mathieu Malaterre [Fri, 15 Dec 2017 12:46:39 +0000 (13:46 +0100)]
ARM: dts: lpc32xx: Remove leading 0x and 0s from bindings notation
Improve the DTS files by removing all the leading "0x" and zeros to fix
the following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
and
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +
For simplicity, two sed expressions were used to solve each warnings
separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before
the opening curly brace:
https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve as a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit
4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
[vzapolskiy: fixed commit message to pass checkpatch.pl test]
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Florian Fainelli [Sat, 2 Feb 2019 17:20:38 +0000 (09:20 -0800)]
Merge tag 'tags/bcm2835-dt-64-next-2019-02-01' into devicetree-arm64/next
This pull request brings in the arm64 reference for Raspberry Pi 3 A+.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
David Dai [Wed, 16 Jan 2019 16:11:01 +0000 (18:11 +0200)]
arm64: dts: sdm845: Add interconnect provider DT nodes
Add RSC (Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Thu, 31 Jan 2019 20:20:55 +0000 (12:20 -0800)]
arm64: dts: qcom: msm8996: Disabled VFE SMMU
Initializing the SMMU trips a security violation, so disable the VFE
SMMU for now.
Fixes:
f3442ab97257 ("arm64: dts: qcom: msm8996: Add VFE SMMU node")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Bjorn Andersson [Fri, 25 Jan 2019 18:14:22 +0000 (10:14 -0800)]
arm64: dts: qcom: qcs404: Add rpmcc node
Add the rpm clock controller node, to provide the low-noise baseband
clock for the USB PHYs, among other things.
Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Marc Gonzalez [Wed, 30 Jan 2019 16:24:10 +0000 (17:24 +0100)]
arm64: dts: qcom: msm8998: Add rpmcc node
Add MSM8998 Resource Power Manager Clock Controller DT node.
Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Jeffrey Hugo [Mon, 21 Jan 2019 21:33:28 +0000 (14:33 -0700)]
arm64: dts: qcom: msm8998: Add USB-related nodes
Add nodes for USB and related PHYs.
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Stefan Wahren [Fri, 28 Dec 2018 22:09:27 +0000 (23:09 +0100)]
arm64: dts: broadcom: Add reference to RPi 3 A+
This adds a reference to the dts of the Raspberry Pi 3 A+,
so we don't need to maintain the content in arm64.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Fri, 28 Dec 2018 22:09:26 +0000 (23:09 +0100)]
ARM: dts: add Raspberry Pi 3 A+
The Raspberry Pi 3 A+ is similar to the Pi 3 B+ but has only 512 MB RAM,
1 USB 2.0 port and no Ethernet.
Compared to the Raspberry Pi 3 B it isn't possible to control BT_ON and
WL_ON separately.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Eric Anholt <eric@anholt.net>
Florian Fainelli [Fri, 1 Feb 2019 19:25:26 +0000 (11:25 -0800)]
Merge tag 'tags/bcm2835-dt-next-2019-02-01' into devicetree/next
This pull request adds support for the new Raspberry Pi 3 A+ and
the missing GPIO labels for RPi 2/3. Additionally it contains
some minor DT fixes.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Harald Geyer [Wed, 30 Jan 2019 11:11:58 +0000 (11:11 +0000)]
arm64: dts: allwinner: a64: teres-i: enable power supplies
TERES-I has ACIN connector and battery.
Signed-off-by: Harald Geyer <harald@ccbib.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Stefan Wahren [Sat, 19 Jan 2019 16:35:47 +0000 (17:35 +0100)]
ARM: dts: bcm2835-rpi-zero-w: Drop unnecessary pinctrl
There is no need to specify a pinctrl for the reset GPIO. So we better
remove this avoid a potential conflict between pinctrl and pwrseq
after the pinmux driver has been changed to strict:
pinctrl-bcm2835
20200000.gpio: pin gpio41 already requested by wifi-pwrseq;
cannot claim for pinctrl-bcm2835:499
pinctrl-bcm2835
20200000.gpio: pin-41 (pinctrl-bcm2835:499) status -22
pwrseq_simple: probe of wifi-pwrseq failed with error -22
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Tue, 1 Jan 2019 17:29:08 +0000 (18:29 +0100)]
ARM: dts: bcm283x: Add missing GPIO line names
The GPIO sysfs is deprecated and disabled in the defconfig files.
So in order to motivate the usage of the new GPIO character device API
add the missing GPIO line names for Raspberry Pi 2 and 3. In the lack
of full schematics i would leave all undocumented pins as unnamed.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Thu, 10 Jan 2019 19:22:55 +0000 (20:22 +0100)]
ARM: dts: bcm2837-rpi-3-b-plus: Clarify label for STATUS_LED
The RPI 3 B+ provides control to both LEDs (PWR and ACT). So append
the first letter of the LED color (like in the schematics) in order
to clarify this.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Sun, 30 Dec 2018 11:50:30 +0000 (12:50 +0100)]
ARM: dts: bcm2837-rpi-3-b: Use consistent label for HDMI hotplug
This make the GPIO label for HDMI hotplug more consistent to the other
boards.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Sun, 30 Dec 2018 16:28:35 +0000 (17:28 +0100)]
ARM: dts: bcm2835: Fix labels for GPIO 0,1
According to the schematics for all RPis with a 40 pin header,
the GPIOs 0 and 1 are labeled as ID_SD and ID_SC. In order to
clarify that is a I2C bus, append the third letter.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Sun, 30 Dec 2018 11:07:16 +0000 (12:07 +0100)]
ARM: dts: bcm2835-rpi: Drop unnecessary #address-cells/#size-cells
Compiling the bcm2835-rpi.dtsi with W=1 leads to the following warning:
Warning (avoid_unnecessary_addr_size): /soc/firmware: unnecessary
#address-cells/#size-cells without "ranges" or child "reg" property
Fix this by removing these unnecessary properties.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Sun, 30 Dec 2018 10:51:22 +0000 (11:51 +0100)]
ARM: dts: bcm283x: Fix DTC warning for memory node
Compiling the bcm283x DTS with W=1 leads to the following warning:
Warning (unit_address_vs_reg): /memory: node has a reg or ranges property,
but no unit name
Fix this by adding the unit address.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Fri, 28 Dec 2018 22:09:26 +0000 (23:09 +0100)]
ARM: dts: add Raspberry Pi 3 A+
The Raspberry Pi 3 A+ is similar to the Pi 3 B+ but has only 512 MB RAM,
1 USB 2.0 port and no Ethernet.
Compared to the Raspberry Pi 3 B it isn't possible to control BT_ON and
WL_ON separately.
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Acked-by: Eric Anholt <eric@anholt.net>
Stefan Wahren [Fri, 28 Dec 2018 22:09:25 +0000 (23:09 +0100)]
dt-bindings: bcm: Add Raspberry Pi 3 A+
This adds the root properties for the Raspberry Pi 3 A+ .
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Herring <robh@kernel.org>
David Hernandez Sanchez [Fri, 1 Feb 2019 10:48:10 +0000 (11:48 +0100)]
ARM: dts: stm32: Enable thermal sensor support on STM32MP157c-ed1
Enable STM32 Digital Thermal Sensor (dts) driver for STM32MP157c-ed1 board.
Signed-off-by: David Hernandez Sanchez <david.hernandezsanchez@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Cezary Gapinski [Fri, 1 Feb 2019 10:45:00 +0000 (11:45 +0100)]
ARM: dts: stm32: add SPI support on STM32F429 SoC
This patch adds all SPI instances of the STM32F429 SoC.
Signed-off-by: Cezary Gapinski <cezary.gapinski@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Faiz Abbas [Thu, 17 Jan 2019 09:44:24 +0000 (15:14 +0530)]
arm64: dts: ti: k3-am654-base-board: Add eMMC Support
On the am654x-evm, sdhci0 node is connected to an eMMC. Add node and
pinmux for the same.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Faiz Abbas [Thu, 17 Jan 2019 09:44:23 +0000 (15:14 +0530)]
arm64: dts: ti: k3-am654: Add Support for eMMC host controller
Add support for the Secure Digital Host Controller Interface (SDHCI)
present on TI's AM654 SOCs. It is compatible with eMMC5.1 Host
Specifications.
Enable only upto HS200 speed mode.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Hao Dong [Sun, 20 Jan 2019 22:33:27 +0000 (23:33 +0100)]
ARM: dts: BCM5301X: Add basic DT for Phicomm K3
This router has BCM4709C0 SoC, 128 MiB NAND flash (MX30LF1G18AC-TI),
512 MiB memory and 3 x LAN and 1 x WAN ports. WiFi chips are
BCM4366C0 x 2. The router has a small LCD and 3 capactive keys driven by
a PIC microcontroller, which is in turn wired to UART1 of main board.
Signed-off-by: Hao Dong <halbertdong@gmail.com>
[rmilecki: drop chosen { }, fix whitespaces, update commit message]
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>