Siva Chandra Reddy [Tue, 2 Jun 2020 21:04:57 +0000 (14:04 -0700)]
[libc] Add implementation of few floating point manipulation functions.
Implementations of copysign[f], frexp[f], logb[f], and modf[f] are added.
Reviewers: asteinhauser
Differential Revision: https://reviews.llvm.org/D81134
Craig Topper [Thu, 11 Jun 2020 19:18:52 +0000 (12:18 -0700)]
[X86] Replace TB with PS on instructions that are documented in the SDM with 'NP'
'NP' means that the instruction is not recognized with a 66, F2 or F3
prefix. It will either #UD or decode to a different instruction.
All of the cases are here should fall into the #UD variety since
we should be detecting the collision with other instructions when
we build the disassembler tables.
Eli Friedman [Thu, 11 Jun 2020 19:13:18 +0000 (12:13 -0700)]
[AArch64] Regenerate SVE test llvm-ir-to-intrinsic.ll.
Louis Dionne [Thu, 11 Jun 2020 17:50:40 +0000 (13:50 -0400)]
[libc++abi] Simplify the logic for finding libc++ from libc++abi
Since we have the monorepo, libc++abi's build requires a sibling checkout
of the libc++ sources. Hence, the logic for finding libc++ can be greatly
simplified.
Alexey Bataev [Thu, 11 Jun 2020 15:28:59 +0000 (11:28 -0400)]
[OPENMP50]Codegen for scan directive in simd loops.
Added codegen for scan directives in simd loop. The codegen transforms
original code:
```
int x = 0;
#pragma omp simd reduction(inscan, +: x)
for (..) {
<first part>
#pragma omp scan inclusive(x)
<second part>
}
```
into
```
int x = 0;
for (..) {
int x_priv = 0;
<first part>
x = x_priv + x;
x_priv = x;
<second part>
}
```
and
```
int x = 0;
#pragma omp simd reduction(inscan, +: x)
for (..) {
<first part>
#pragma omp scan exclusive(x)
<second part>
}
```
into
```
int x = 0;
for (..) {
int x_priv = 0;
<second part>
int temp = x;
x = x_priv + x;
x_priv = temp;
<first part>
}
```
Differential revision: https://reviews.llvm.org/D78232
sameeran joshi [Sun, 19 Apr 2020 11:10:37 +0000 (16:40 +0530)]
[flang] Semantics for SELECT TYPE
Summary:
Added support for all semantic checks except C1157
was previously implemented.
Address review comments.
Reviewers: PeteSteinfeld, tskeith, klausler, DavidTruby, kiranktp, anchu-rajendran, sscalpone
Subscribers: kiranchandramohan, llvm-commits, flang-commits
Tags: #llvm, #flang
Differential Revision: https://reviews.llvm.org/D79851
Leonard Chan [Thu, 11 Jun 2020 18:17:08 +0000 (11:17 -0700)]
[clang] Frontend components for the relative vtables ABI (round 2)
This patch contains all of the clang changes from D72959.
- Generalize the relative vtables ABI such that it can be used by other targets.
- Add an enum VTableComponentLayout which controls whether components in the
vtable should be pointers to other structs or relative offsets to those structs.
Other ABIs can change this enum to restructure how components in the vtable
are laid out/accessed.
- Add methods to ConstantInitBuilder for inserting relative offsets to a
specified position in the aggregate being constructed.
- Fix failing tests under new PM and ASan and MSan issues.
See D72959 for background info.
Differential Revision: https://reviews.llvm.org/D77592
Stanislav Mekhanoshin [Thu, 11 Jun 2020 17:50:12 +0000 (10:50 -0700)]
Regenerated SROA phi-gep.ll test. NFC.
hyd-dev [Thu, 11 Jun 2020 16:30:16 +0000 (12:30 -0400)]
[PCH] Support writing BuiltinBitCastExprs to PCHs
eee944e7f adds the new BuiltinBitCastExpr, but does not set the Code member of
ASTStmtWriter. This is not correct and causes an assertion failue in
ASTStmtWriter::emit() when building PCHs that contain __builtin_bit_cast. This
commit adds serialization::EXPR_BUILTIN_BIT_CAST and handles
ASTStmtWriter::Code properly.
Differential revision: https://reviews.llvm.org/D80360
jerryyin [Thu, 11 Jun 2020 15:10:21 +0000 (15:10 +0000)]
[mlir][rocdl] Fixing breakage of dim operator from
904f91db
Summary:
* Update the unit test dimOp index to be an operand
* Refactored the constant naming
Subscribers: mehdi_amini, rriddle, jpienaar, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, liufengdb, stephenneuendorffer, Joonsoo, grosul1, frgossen, Kayjukh, jurahul, msifontes
Tags: #mlir
Differential Revision: https://reviews.llvm.org/D81663
diggerlin [Thu, 11 Jun 2020 17:33:51 +0000 (13:33 -0400)]
[NFC] clean up the AsmPrinter::emitLinkage for AIX part
SUMMARY:
Since we deal with aix emitLinkage in the PPCAIXAsmPrinter::emitLinkage() in the patch https://reviews.llvm.org/D75866. It do not go to AsmPrinter::emitLinkage() any more, we clean up some aix related code in the AsmPrinter::emitLinkage()
Reviewers: Jason liu
Differential Revision: https://reviews.llvm.org/D81613
Jonas Devlieghere [Thu, 11 Jun 2020 16:35:19 +0000 (09:35 -0700)]
[lldb/Test] Ensure inline tests have a unique build directory
Inline tests have one method named 'test' which means that multiple
inline tests in the same file end up sharing the same build directory
per variant.
This patch overrides the getBuildDirBasename method for the InlineTest
class to include the test name.
Differential revision: https://reviews.llvm.org/D81516
Alexander Belyaev [Thu, 11 Jun 2020 10:40:18 +0000 (12:40 +0200)]
[mlir][shape] Add assemblyFormat for `shape.add`.
Differential Revision: https://reviews.llvm.org/D81644
Sanjay Patel [Wed, 10 Jun 2020 18:05:21 +0000 (14:05 -0400)]
[VectorCombine] add tests for compare scalarization; NFC
Petar Avramovic [Thu, 11 Jun 2020 15:55:59 +0000 (17:55 +0200)]
AMDGPU/GlobalISel: Fix lower for f64->f16 G_FPTRUNC
Put AND before ADD in LegalizerHelper::lowerFPTRUNC_F64_TO_F16
in order to match algorithm from AMDGPUTargetLowering::LowerFP_TO_FP16.
Differential Revision: https://reviews.llvm.org/D81666
Fangrui Song [Thu, 11 Jun 2020 16:05:59 +0000 (09:05 -0700)]
[llvm-objdump] Decrease instruction indentation for non-x86
Place the instruction at the 24th column (0-based indexing), matching
GNU objdump ARM/AArch64/powerpc/etc when the address is low.
This is beneficial for non-x86 targets which have short instruction
lengths.
```
// GNU objdump AArch64
0:
91001062 add x2, x3, #0x4
400078:
91001062 add x2, x3, #0x4
// llvm-objdump, with this patch
0: 62 10 00 91 add x2, x3, #4
400078: 62 10 00 91 add x2, x3, #4
// llvm-objdump, if we change to print a word instead of bytes in the future
0:
91001062 add x2, x3, #4
400078:
91001062 add x2, x3, #4
// GNU objdump Thumb
0: bf00 nop
// GNU objdump Power ISA 3.1 64-bit instruction
// 0: 00 00 10 04 plwa r3,0
// 4: 00 00 60 a4
```
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D81590
Alexey Bataev [Thu, 11 Jun 2020 15:22:14 +0000 (11:22 -0400)]
Revert "[OPENMP50]Codegen for scan directive in simd loops."
This reverts commit
fb80e67f10eea7177b0ff9c618c8231363b6f2fc to resolve
the issue with asan buildbots.
Mircea Trofin [Tue, 9 Jun 2020 21:33:46 +0000 (14:33 -0700)]
[llvm][NFC] Factor some common data in InlineAdvice
Summary:
Other derivations will all want to emit optimization remarks and, as
part of that, use debug info.
Additionally, drive-by const-ing.
Reviewers: davidxl, dblaikie
Subscribers: aprantl, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D81507
Simon Pilgrim [Thu, 11 Jun 2020 14:38:39 +0000 (15:38 +0100)]
[X86] Fold vXi1 OR(KSHIFTL(X,NumElts/2),Y) -> KUNPCK
Convert shift+or bool vector patterns into CONCAT_VECTORS if we know this will be lowered to KUNPCK (which requires 16+ vector elements).
Fixes PR32547
jerryyin [Fri, 5 Jun 2020 16:53:41 +0000 (16:53 +0000)]
[mlir][rocdl] Adding vector to ROCDL dialect lowering
* Created the vector to ROCDL lowering pass
* The lowering pass lowers vector transferOps to rocdl mubufOps
* Added unit test and functional test
serge-sans-paille [Thu, 4 Jun 2020 07:13:39 +0000 (09:13 +0200)]
Fix return status of DataFlowSanitizer pass
Take into account added functions, global values and attribute change.
Differential Revision: https://reviews.llvm.org/D81239
Alexey Bataev [Mon, 25 May 2020 20:06:31 +0000 (16:06 -0400)]
[OPENMP50]Codegen for use_device_addr clauses.
Summary:
Added codegen for use_device_addr clause. The components of the list
items are mapped as a kind of RETURN components and then the returned
base address is used instead of the real address of the base declaration
used in the use_device_addr expressions.
Reviewers: jdoerfert
Subscribers: yaxunl, guansong, sstefan1, cfe-commits, caomhin
Tags: #clang
Differential Revision: https://reviews.llvm.org/D80730
Jay Foad [Mon, 18 May 2020 18:12:29 +0000 (19:12 +0100)]
[IR] Clean up dead instructions after simplifying a conditional branch
Change BasicBlock::removePredecessor to optionally return a vector of
instructions which might be dead. Use this in ConstantFoldTerminator to
delete them if they are dead.
Reapply with a bug fix: don't drop the "!KeepOneInputPHIs" argument when
removePredecessor calls PHINode::removeIncomingValue.
Differential Revision: https://reviews.llvm.org/D80206
Sam Parker [Thu, 11 Jun 2020 13:52:17 +0000 (14:52 +0100)]
[IR] Remove assert from ShuffleVectorInst
Which triggers on valid, but not useful, IR such as a undef mask.
Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=46276
Differential Revision: https://reviews.llvm.org/D81634
LLVM GN Syncbot [Thu, 11 Jun 2020 13:36:59 +0000 (13:36 +0000)]
[gn build] Port
78e636b3f2f
Bruno Ricci [Thu, 11 Jun 2020 13:08:27 +0000 (14:08 +0100)]
[clang][NFC] Generate the {Type,ArrayType,UnaryExprOrType,Expression}Traits...
...enumerations from TokenKinds.def and use the new macros from TokenKinds.def
to remove the hard-coded lists of traits.
All the information needed to generate these enumerations is already present
in TokenKinds.def. The motivation here is to be able to dump the trait spelling
without hard-coding the list in yet another place.
Note that this change the order of the enumerators in the enumerations (except
that in the TypeTrait enumeration all unary type traits are before all binary
type traits, and all binary type traits are before all n-ary type traits).
Apart from the aforementioned ordering which is relied upon, after this patch
no code in clang or in the various clang tools depend on the specific ordering
of the enumerators.
No functional changes intended.
Differential Revision: https://reviews.llvm.org/D81455
Reviewed By: aaron.ballman
Jay Foad [Thu, 11 Jun 2020 13:22:16 +0000 (14:22 +0100)]
Revert "[IR] Clean up dead instructions after simplifying a conditional branch"
This reverts commit
4494e45316a0bfaabb6bb1450fb0f49a0e6832af.
It caused problems for sanitizer buildbots.
Daniel Grumberg [Wed, 13 May 2020 16:07:47 +0000 (17:07 +0100)]
Add AST_SIGNATURE record to unhashed control block of PCM files
Summary:
This record is constructed by hashing the bytes of the AST block in a similiar
fashion to the SIGNATURE record. This new signature only means anything if the
AST block is fully relocatable, i.e. it does not embed absolute offsets within
the PCM file. This change ensure this does not happen by replacing these offsets
with offsets relative to the nearest relevant subblock of the AST block.
Reviewers: Bigcheese, dexonsmith
Subscribers: dexonsmith, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D80383
Alexey Bataev [Fri, 5 Jun 2020 19:17:14 +0000 (15:17 -0400)]
[OPENMP50]Codegen for scan directive in simd loops.
Added codegen for scandirectives in simd loop. The codegen transforms
original code:
```
int x = 0;
#pragma omp simd reduction(inscan, +: x)
for (..) {
<first part>
#pragma omp scan inclusive(x)
<second part>
}
```
into
```
int x = 0;
for (..) {
int x_priv = 0;
<first part>
x = x_priv + x;
x_priv = x;
<second part>
}
```
and
```
int x = 0;
#pragma omp simd reduction(inscan, +: x)
for (..) {
<first part>
#pragma omp scan exclusive(x)
<second part>
}
```
into
```
int x = 0;
for (..) {
int x_priv = 0;
<second part>
int temp = x;
x = x_priv + x;
x_priv = temp;
<first part>
}
```
Differential revision: https://reviews.llvm.org/D78232
Simon Pilgrim [Thu, 11 Jun 2020 12:57:39 +0000 (13:57 +0100)]
Add missing lambda capture from rGf529c0a8a149.
Simon Pilgrim [Thu, 11 Jun 2020 12:48:42 +0000 (13:48 +0100)]
Fix unused variable warning. NFCI.
We're only using the D2 iteration value inside the assert (the only component of the loop) - move the entire loop inside the assert by using llvm::all_of.
Simon Pilgrim [Thu, 11 Jun 2020 12:32:48 +0000 (13:32 +0100)]
[X86][AVX512] Add second test case for PR32547
Demonstrate missing support for OR(X,KSHIFTL(Y,8)) -> KUNPCKBW as well as the existing OR(KSHIFTL(X,8),Y) -> KUNPCKBW test.
Bruno Ricci [Thu, 11 Jun 2020 12:29:44 +0000 (13:29 +0100)]
[clang][NFC] Fix a Wdocumentation warning in Basic/TargetInfo.h
Jay Foad [Mon, 18 May 2020 18:12:29 +0000 (19:12 +0100)]
[IR] Clean up dead instructions after simplifying a conditional branch
Change BasicBlock::removePredecessor to optionally return a vector of
instructions which might be dead. Use this in ConstantFoldTerminator to
delete them if they are dead.
Differential Revision: https://reviews.llvm.org/D80206
Bruno Ricci [Thu, 11 Jun 2020 12:13:05 +0000 (13:13 +0100)]
[clang] Convert a default argument expression to the parameter type...
...before checking that the default argument is valid with
CheckDefaultArgumentVisitor.
Currently the restrictions on a default argument are checked with the visitor
CheckDefaultArgumentVisitor in ActOnParamDefaultArgument before
performing the conversion to the parameter type in SetParamDefaultArgument.
This was fine before the previous patch but now some valid code post-CWG 2346
is rejected:
void test() {
const int i2 = 0;
extern void h2a(int x = i2); // FIXME: ok, not odr-use
extern void h2b(int x = i2 + 0); // ok, not odr-use
}
This is because the reference to i2 in h2a has not been marked yet with
NOUR_Constant. i2 is marked NOUR_Constant when the conversion to the parameter
type is done, which is done just after.
The solution is to do the conversion to the parameter type before checking
the restrictions on default arguments with CheckDefaultArgumentVisitor.
This has the side-benefit of improving some diagnostics.
Differential Revision: https://reviews.llvm.org/D81616
Reviewed By: rsmith
Pavel Labath [Wed, 10 Jun 2020 13:26:50 +0000 (15:26 +0200)]
[lldb] Remove Scalar operator= overloads
The are not needed as Scalar is implicitly constructible from all of
these types (so the compiler will use a combination of a constructor +
move assignment instead), and they make it very easy for implementations
of assignment and construction operations to diverge.
Jay Foad [Wed, 10 Jun 2020 08:18:56 +0000 (09:18 +0100)]
[MemCpyOptimizer] Simplify API of processStore and processMem* functions
Previously these functions either returned a "changed" flag or a "repeat
instruction" flag, and could also modify an iterator to control which
instruction would be processed next.
Simplify this by always returning a "changed" flag, and handling all of
the "repeat instruction" functionality by modifying the iterator.
No functional change intended except in this case:
// If the source and destination of the memcpy are the same, then zap it.
... where the previous code failed to process the instruction after the
zapped memcpy.
Differential Revision: https://reviews.llvm.org/D81540
Bruno Ricci [Thu, 11 Jun 2020 11:41:08 +0000 (12:41 +0100)]
[clang] CWG 2082 and 2346: loosen the restrictions on parameters and local variables in default arguments.
This patch implements the resolution of CWG 2082 and CWG 2346.
The resolution of CWG 2082 changed [dcl.fct.default]p7 and p9 to allow
a parameter or local variable to appear in a default argument if not
in a potentially-evaluated expression.
The resolution of CWG 2346 changed [dcl.fct.default]p7 to allow a local
variable to appear in a default argument if not odr-used.
An issue remains after this patch
(see the FIXME in test/CXX/dcl.decl/dcl.meaning/dcl.fct.default/p7.cpp).
This is addressed by the next patch.
Differential Revision: https://reviews.llvm.org/D81615
Reviewed By: rsmith, erichkeane
Bruno Ricci [Thu, 11 Jun 2020 10:53:47 +0000 (11:53 +0100)]
[clang][NFC] Various NFCs in CheckDefaultArgumentVisitor
Before the next patches do the following NFCs:
- Make it a const visitor; CheckDefaultArgumentVisitor should
really not modify the visited nodes.
- clang-format
- Take a reference to Sema instead of a pointer and pass it
as the first argument to the constructor. This is for
consistency with the other similar visitors.
- Use range for loops when appropriate as per the style guide.
- Use `const auto *" when appropriate as per the style guide.
Pavel Labath [Thu, 11 Jun 2020 11:13:31 +0000 (13:13 +0200)]
[llvm/DWARFDebugLine] Remove spurious full stop from warning messages
Other warnings messages don't have a trailing full stop.
Alexander Belyaev [Thu, 11 Jun 2020 11:08:24 +0000 (13:08 +0200)]
[mlir][linalg] Fix the type (indicies->indices).
Pavel Labath [Thu, 11 Jun 2020 11:04:26 +0000 (13:04 +0200)]
[llvm/DWARFDebugLine] Fix a typo in one warning message
Alexander Belyaev [Thu, 11 Jun 2020 09:49:30 +0000 (11:49 +0200)]
[mlir] Add new builders to linalg.reshape.
Differential Revision: https://reviews.llvm.org/D81640
Chris Jackson [Thu, 11 Jun 2020 09:28:39 +0000 (10:28 +0100)]
[DebugInfo] Refactor SalvageDebugInfo and SalvageDebugInfoForDbgValues
- Simplify the salvaging interface and the algorithm in InstCombine
Reviewers: vsk, aprantl, Orlando, jmorse, TWeaver
Reviewed by: Orlando
Differential Revision: https://reviews.llvm.org/D79863
Georgii Rymar [Wed, 10 Jun 2020 12:28:57 +0000 (15:28 +0300)]
[yaml2obj] - Allocate the file space for SHT_NOBITS sections in some cases.
This teaches yaml2obj to allocate file space for a no-bits section
when there is a non-nobits section in the same segment that follows it.
It was discussed in D78005 thread and matches GNU linkers and LLD behavior.
Differential revision: https://reviews.llvm.org/D80629
Daniel Grumberg [Thu, 11 Jun 2020 09:22:14 +0000 (10:22 +0100)]
[NFC] Make formatting changes to ASTBitCodes.h ahead of a functional change
Simon Pilgrim [Thu, 11 Jun 2020 09:22:35 +0000 (10:22 +0100)]
[X86][AVX512] Avoid bitcasts between scalar and vXi1 bool vectors
AVX512 mask types are often bitcasted to scalar integers for various ops before being bitcast back to be used as a predicate. In many cases we can avoid these KMASK<->GPR transfers and perform equivalent operations on the mask unit.
If the destination mask type is legal, and we can confirm that the scalar op originally came from a mask/vector/float/double type then we should try to avoid the scalar entirely.
This avoids some codegen issues noticed while working on PTEST/MOVMSK improvements.
Partially fixes PR32547 - we don't create a KUNPCK yet, but OR(X,KSHIFTL(Y)) can be handled in a separate patch.
Differential Revision: https://reviews.llvm.org/D81548
Simon Pilgrim [Thu, 11 Jun 2020 09:08:13 +0000 (10:08 +0100)]
[X86][AVX512] Add test case for PR32547
Show current codegen baseline before D81548
Endre Fülöp [Wed, 10 Jun 2020 06:59:04 +0000 (08:59 +0200)]
[analyzer] On-demand parsing capability for CTU
Summary:
Introduce on-demand parsing of needed ASTs during CTU analysis.
The index-file format is extended, and analyzer-option CTUInvocationList
is added to specify the exact invocations needed to parse the needed
source-files.
Reviewers: martong, balazske, Szelethus, xazax.hun, whisperity
Reviewed By: martong, xazax.hun
Subscribers: gribozavr2, thakis, ASDenysPetrov, ormris, mgorny, whisperity, xazax.hun, baloghadamsoftware, szepet, rnkovacs, a.sidorin, mikhail.ramalho, Szelethus, donat.nagy, dkrupp, Charusso, steakhal, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D75665
Jakub Lichman [Thu, 11 Jun 2020 08:50:13 +0000 (10:50 +0200)]
[mlir][Linalg][Doc] Fix of misleading example in Property 2
Code example in MLIR Linalg doc fixed because it referenced non-existing variables and some parameters were of wrong types.
Differential Revision: https://reviews.llvm.org/D81633
Dominik Montada [Fri, 27 Mar 2020 15:47:37 +0000 (16:47 +0100)]
[GlobalISel] fix crash in IRTranslator, MachineIRBuilder when translating @llvm.dbg.value intrinsic and using -debug
Summary:
Fix crash when using -debug caused by the GlobalISel observer trying to print
an incomplete DBG_VALUE instruction. This was caused by the MachineIRBuilder
using buildInstr, which immediately inserts the instruction causing print,
instead of using BuildMI to first build up the instruction and using
insertInstr when finished.
Add RUN-line to existing debug-insts.ll test with -debug flag set to make sure
no crash is happening.
Also fixed a missing %s in the 2nd RUN-line of the same test.
Reviewers: t.p.northover, aditya_nandakumar, aemerson, dsanders, arsenm
Reviewed By: arsenm
Subscribers: wdng, arsenm, rovka, hiraditya, volkan, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D76934
Daniel Grumberg [Sun, 7 Jun 2020 19:05:25 +0000 (20:05 +0100)]
Make ASTFileSignature an array of 20 uint8_t instead of 5 uint32_t
Reviewers: aprantl, dexonsmith, Bigcheese
Subscribers: arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D81347
Raphael Isemann [Wed, 10 Jun 2020 14:37:23 +0000 (16:37 +0200)]
[lldb] Fix a crash in PlatformAppleSimulator::GetCoreSimulatorPath when Xcode developer directory can't be found
Summary:
`PlatformAppleSimulator::GetCoreSimulatorPath` currently checks if
`m_core_simulator_framework_path` wasn't set yet and then tries to calculate its
actual value. However, if `GetXcodeDeveloperDirectory` returns an invalid
FileSpec, `m_core_simulator_framework_path` is never assigned a value which
causes that the `return m_core_simulator_framework_path.getValue();` at the end
of the function will trigger an assert.
This patch just assigns an invalid FileSpec to `m_core_simulator_framework_path`
which seems what the calling code in `PlatformAppleSimulator::LoadCoreSimulator`
expects as an error value.
I assume this can be reproduces on machines that don't have an Xcode
installation, but this patch is mostly based on this backtrace I received from
someone else that tried to run the test suite:
```
Assertion failed: (hasVal), function getValue, file llvm/include/llvm/ADT/Optional.h, line 73.
[...]
3 libsystem_c.dylib 0x00007fff682a1ac6 __assert_rtn + 314
4 liblldb.11.0.0git.dylib 0x000000010b835931 PlatformAppleSimulator::GetCoreSimulatorPath() (.cold.1) + 33
5 liblldb.11.0.0git.dylib 0x0000000107e92f11 PlatformAppleSimulator::GetCoreSimulatorPath() + 369
6 liblldb.11.0.0git.dylib 0x0000000107e9383e void std::__1::__call_once_proxy<std::__1::tuple<PlatformAppleSimulator::LoadCoreSimulator()::$_1&&> >(void*) + 30
7 libc++.1.dylib 0x00007fff654d5bea std::__1::__call_once(unsigned long volatile&, void*, void (*)(void*)) + 139
8 liblldb.11.0.0git.dylib 0x0000000107e92019 PlatformAppleSimulator::LaunchProcess(lldb_private::ProcessLaunchInfo&) + 89
9 liblldb.11.0.0git.dylib 0x0000000107e92be5 PlatformAppleSimulator::DebugProcess(lldb_private::ProcessLaunchInfo&, lldb_private::Debugger&, lldb_private::Target*, lldb_private::Status&) + 101
10 liblldb.11.0.0git.dylib 0x0000000107cb044d lldb_private::Target::Launch(lldb_private::ProcessLaunchInfo&, lldb_private::Stream*) + 669
11 liblldb.11.0.0git.dylib 0x000000010792c9c5 lldb::SBTarget::Launch(lldb::SBLaunchInfo&, lldb::SBError&) + 1109
12 liblldb.11.0.0git.dylib 0x0000000107a92acd _wrap_SBTarget_Launch(_object*, _object*) + 477
13 org.python.python 0x000000010681076f PyCFunction_Call + 321
14 org.python.python 0x000000010689ee12 _PyEval_EvalFrameDefault + 7738
```
Reviewers: JDevlieghere, jasonmolenda
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D80997
Esme-Yi [Thu, 11 Jun 2020 07:45:31 +0000 (07:45 +0000)]
[PowerPC][NFC] Testing ROTL of v1i128.
Summary: Add RUN lines for pwr8.
Kristof Beyls [Thu, 11 Jun 2020 07:31:23 +0000 (08:31 +0100)]
[NFC] Refactor ThunkInserter to make it available for all targets.
By moving target-independent code from
llvm/lib/Target/X86/X86IndirectThunks.cpp
to
llvm/include/llvm/CodeGen/IndirectThunks.h
Differential Revision: https://reviews.llvm.org/D81401
Craig Topper [Thu, 11 Jun 2020 07:31:28 +0000 (00:31 -0700)]
[X86] Remove unnecessary In64BitMode predicate from TEST64ri32. NFC
This appears to have been added when In64BitMode was added to a
bunch of instructions that don't have register operands. When an
instruction uses a register the parser will prevent a 64-bit
register from being parsed on a 32-bit target. But with only
memory and immediate operands this doesn't happen.
TEST64ri32 does have a register operand so the issue the predicate
was supposed to fix doesn't apply.
Vitaly Buka [Thu, 11 Jun 2020 07:16:09 +0000 (00:16 -0700)]
[sanitizer] Avoid unneeded deferefence
David Sherwood [Fri, 22 May 2020 12:39:03 +0000 (13:39 +0100)]
[CodeGen] Let computeKnownBits do something sensible for scalable vectors
Until we have a real need for computing known bits for scalable
vectors I have simply changed the code to bail out for now and
pretend we know nothing. I've also fixed up some simple callers of
computeKnownBits too.
Differential Revision: https://reviews.llvm.org/D80437
LLVM GN Syncbot [Thu, 11 Jun 2020 06:53:42 +0000 (06:53 +0000)]
[gn build] Port
0ee176edc8b
Kristof Beyls [Thu, 11 Jun 2020 06:42:16 +0000 (07:42 +0100)]
[AArch64] Introduce AArch64SLSHardeningPass, implementing hardening of RET and BR instructions.
Some processors may speculatively execute the instructions immediately
following RET (returns) and BR (indirect jumps), even though
control flow should change unconditionally at these instructions.
To avoid a potential miss-speculatively executed gadget after these
instructions leaking secrets through side channels, this pass places a
speculation barrier immediately after every RET and BR instruction.
Since these barriers are never on the correct, architectural execution
path, performance overhead of this is expected to be low.
On targets that implement that Armv8.0-SB Speculation Barrier extension,
a single SB instruction is emitted that acts as a speculation barrier.
On other targets, a DSB SYS followed by a ISB is emitted to act as a
speculation barrier.
These speculation barriers are implemented as pseudo instructions to
avoid later passes to analyze them and potentially remove them.
Even though currently LLVM does not produce BRAA/BRAB/BRAAZ/BRABZ
instructions, these are also mitigated by the pass and tested through a
MIR test.
The mitigation is off by default and can be enabled by the
harden-sls-retbr subtarget feature.
Differential Revision: https://reviews.llvm.org/D81400
Yvan Roux [Thu, 11 Jun 2020 06:45:46 +0000 (08:45 +0200)]
[ARM][MachineOutliner] Add NoLRSave mode.
Outline chunks of code which don't need a save/restore mechanism of the
link register.
Differential Revision: https://reviews.llvm.org/D80125
Fangrui Song [Thu, 11 Jun 2020 05:32:43 +0000 (22:32 -0700)]
Restore part of D80450 [CUDA][HIP] Fix implicit HD function resolution
The "if (S.getLangOpts().CUDA && Cand1.Function && Cand2.Function) {"
part is known to be problematic but the root cause isn't clear yet.
Craig Topper [Thu, 11 Jun 2020 05:31:21 +0000 (22:31 -0700)]
[X86] Use X86AS enum constants to replace hardcoded numbers in more places. NFC
Craig Topper [Thu, 11 Jun 2020 04:25:15 +0000 (21:25 -0700)]
[X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC
Paula Toth [Thu, 11 Jun 2020 04:33:56 +0000 (21:33 -0700)]
[libc] Fix integration test header dependency.
Craig Topper [Thu, 11 Jun 2020 04:24:44 +0000 (21:24 -0700)]
Revert "[X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC"
This reverts commit
874800b4f7e4312a283b0638e832ec92a88540f4.
Forgot to update the clang includes
Craig Topper [Thu, 11 Jun 2020 00:57:47 +0000 (17:57 -0700)]
[X86] Move X86 stuff out of TargetParser.h and into the recently created X86TargetParser.h. NFC
Vitaly Buka [Tue, 2 Jun 2020 08:19:57 +0000 (01:19 -0700)]
[StackSafety] Pass summary into codegen
Summary:
The patch wraps ThinLTO index into immutable
pass which can be used by StackSafety analysis.
Reviewers: eugenis, pcc
Reviewed By: eugenis
Subscribers: hiraditya, steven_wu, dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80985
Kai Luo [Thu, 11 Jun 2020 03:45:33 +0000 (11:45 +0800)]
Revert "[PowerPC][NFC] Testing ROTL of v1i128."
This reverts commit
c79ab63e839b2621405f4472c46f88bfc7a30257 which is
committed by accident.
Yaxun (Sam) Liu [Thu, 11 Jun 2020 03:41:51 +0000 (23:41 -0400)]
Fix __clang_cuda_math_forward_declares.h
Recent change from `#if !defined(__CUDA__)` to `#if !__CUDA__` caused
regression on ROCm 3.5 since there is `#define __CUDA__`
before inclusion of the header file, which causes `#if !__CUDA__`
to be invalid.
Change `#if !__CUDA__` back to `#if !defined(__CUDA__)` for backward
compatibility.
Esme-Yi [Thu, 11 Jun 2020 02:40:58 +0000 (02:40 +0000)]
[PowerPC][NFC] Testing ROTL of v1i128.
Summary: Add RUN lines for pwr8.
Louis Dionne [Wed, 10 Jun 2020 18:41:47 +0000 (14:41 -0400)]
[libc++] Consider everything inside %T to be a dependency of each test
Instead of passing file dependencies individually, assume that the
whole content of the unique test directory is a dependency. This
simplifies the test harness significantly, by making %T the directory
that contains everything required to run a test. This also removes the
need for the %{file_dependencies} substitution, which is removed by this
patch.
Furthermore, this patch also changes the harness to execute tests locally
inside %T, so as to avoid creating a separate directory for no purpose.
LemonBoy [Wed, 10 Jun 2020 02:17:43 +0000 (19:17 -0700)]
[SPARC] Lower fp16 ops to libcalls
The fp16 ops are legalized by extending/chopping them as needed.
The tests are shamelessly stolen from the RISC-V backend.
Recommit with fixed RUN lines for the test.
Differential Revision: https://reviews.llvm.org/D77569
Matt Arsenault [Thu, 11 Jun 2020 01:27:03 +0000 (21:27 -0400)]
AMDGPU/GlobalISel: Fix porting error in 32-bit division
The baffling thing is this passed the OpenCL conformance test for
32-bit integer divisions, but only failed in the 32-bit path of
BypassSlowDivisions for the 64-bit tests.
Jonas Devlieghere [Thu, 11 Jun 2020 01:12:59 +0000 (18:12 -0700)]
[Debugger] Use FileSystem instead of calling openFileForWrite directly.
This replaces the (only) call to llvm::sys::fs::openFileForWrite with
FileSystem::Open. This guarantees that we include log files in the
reproducers.
Differential revision: https://reviews.llvm.org/D81499
Mehdi Amini [Thu, 11 Jun 2020 00:45:33 +0000 (00:45 +0000)]
Revert "[mlir][spirv] Enhance structure type member decoration handling"
This reverts commit
4b7aa6c8c1b0f68c6800225b39b3b389adf31332.
This broke gcc builds.
Fangrui Song [Thu, 11 Jun 2020 00:40:04 +0000 (17:40 -0700)]
Revert D80450 "[CUDA][HIP] Fix implicit HD function resolution"
This reverts commit
263390d4f5f23967a31af09eb6e0c12e633d6104.
This can still cause bogus errors:
eigen3/Eigen/src/Core/CoreEvaluators.h:94:38: error: call to implicitly-deleted copy constructor of 'unary_evaluator<Eigen::Inverse<Eigen::Matrix<double, 4, 4, 0, 4, 4>>>'
thrust/system/detail/generic/for_each.h:49:3: error: implicit instantiation of undefined template
'thrust::detail::STATIC_ASSERTION_FAILURE<false>'
Rahul Joshi [Thu, 11 Jun 2020 00:37:59 +0000 (17:37 -0700)]
[MLIR] Emit debug message if inlining fails
Summary: Emit a debug message if inlining fails.
Differential Revision: https://reviews.llvm.org/D81320
Rahul Joshi [Thu, 11 Jun 2020 00:34:02 +0000 (17:34 -0700)]
[MLIR] Add ArrayAttr::empty()
Summary: Add ArrayAttr::empty() to check for an empty ArrayAttr
Differential Revision: https://reviews.llvm.org/D81579
Xing GUO [Thu, 11 Jun 2020 00:36:06 +0000 (08:36 +0800)]
[DWARFYAML][debug_ranges] Make the "Offset" field optional.
Before this patch, we have to calculate the offset for the current range list entry. This patch helps make the "Offset" field optional.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D81220
Xing GUO [Thu, 11 Jun 2020 00:34:11 +0000 (08:34 +0800)]
[DWARFYAML] Add support for emitting DWARF64 .debug_aranges section.
The `debug_info_offset`(`CuOffset`) should be 64-bit width rather than 32-bit width in DWARF64 .debug_aranges section. This patch helps resolve it.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D81528
Daniel Sanders [Mon, 1 Jun 2020 18:50:53 +0000 (11:50 -0700)]
Support other llc-like tools in update_llc_test_checks.py
Summary:
If you have downstream tools that are llc-like (e.g, llc with different
defaults), it's convenient to still be able to use
`update_llc_test_checks` with them. Refactor slightly to allow such tools
to be supported by adding them to LLC_LIKE_TOOLS
Reviewers: bogner
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80960
Rahul Joshi [Thu, 11 Jun 2020 00:22:30 +0000 (17:22 -0700)]
[MLIR] Print function name when ReturnOp verification fails
Summary:
- Print function name when ReturnOp verification fails
- This helps easily finding the invalid ReturnOp in an IR dump.
Differential Revision: https://reviews.llvm.org/D81513
Rob Suderman [Thu, 11 Jun 2020 00:18:33 +0000 (17:18 -0700)]
[mlir][StandardOps] Updated IndexCastOp to support tensor<index> cast
Summary:
We now support index casting for tensor<index> to tensor<int>. This
better supports compatibility with the Shape dialect.
Differential Revision: https://reviews.llvm.org/D81611
River Riddle [Wed, 10 Jun 2020 23:58:55 +0000 (16:58 -0700)]
[mlir][NFC] Split Parser into several different files.
Summary: At this point Parser has grown to be over 5000 lines and can be very difficult to navigate/update/etc. This commit splits Parser.cpp into several sub files focused on parsing specific types of entities; e.g., Attributes, Types, etc.
Differential Revision: https://reviews.llvm.org/D81299
Craig Topper [Wed, 10 Jun 2020 23:54:09 +0000 (16:54 -0700)]
[InstCombine] Remove some repeated calls to getOperand. NFCI
We had alread loaded operand 1 and 2 of the select as TV and FV
using the more the readable getTrueValue/getFalseValue.
HazemAbdelhafez [Wed, 10 Jun 2020 23:15:55 +0000 (19:15 -0400)]
[mlir][spirv] Enhance structure type member decoration handling
Modify structure type in SPIR-V dialect to support:
1) Multiple decorations per structure member
2) Key-value based decorations (e.g., MatrixStride)
This commit kept the Offset decoration separate from members'
decorations container for easier implementation and logical clarity.
As such, all references to Structure layoutinfo are now offsetinfo,
and any member layout defining decoration (e.g., RowMajor for Matrix)
will be add to the members' decorations container along with its
value if any.
Differential Revision: https://reviews.llvm.org/D81426
George Mitenkov [Wed, 10 Jun 2020 23:10:26 +0000 (19:10 -0400)]
[MLIR][SPIRVToLLVM] Implemented conversion for arithmetic ops and 3 bitwise ops.
Following the previous revision `D81100`, this commit implements a templated class
that would provide conversion patterns for “straightforward” SPIR-V ops into
LLVM dialect. Templating allows to abstract away from concrete implementation
for each specific op. Those are mainly binary operations. Currently supported
and tested ops are:
- Arithmetic ops: `IAdd`, `ISub`, `IMul`, `FAdd`, `FSub`, `FMul`, `FDiv`, `FNegate`,
`SDiv`, `SRem` and `UDiv`
- Bitwise ops: `BitwiseAnd`, `BitwiseOr`, `BitwiseXor`
The implementation relies on `SPIRVToLLVMConversion` class that makes use of
`OpConversionPattern`.
Differential Revision: https://reviews.llvm.org/D81305
Hongtao Yu [Thu, 21 May 2020 20:19:44 +0000 (13:19 -0700)]
[LLD][ThinLTO] Add --thinlto-single-module to allow compiling partial modules.
This change introduces an LLD switch --thinlto-single-module to allow compiling only a part of the input modules. This is specifically enables:
1. Fast investigating/debugging modules of interest without spending time on compiling unrelated modules.
2. Compiler debug dump with -mllvm -debug-only= for specific modules.
It will be useful for large applications which has 1K+ input modules for thinLTO.
The switch can be combined with `--lto-obj-path=` or `--lto-emit-asm` to obtain intermediate object files or assembly files. So far the module name matching is implemented as a fuzzy name lookup where the modules with name containing the switch value are compiled.
E.g,
Command:
ld.lld main.o thin.a --thinlto-single-module=thin.a --lto-obj-path=single.o
log:
[ThinLTO] Selecting thin.a(thin1.o at 168) to compile
[ThinLTO] Selecting thin.a(thin2.o at 228) to compile
Command:
ld.lld main.o thin.a --thinlto-single-module=thin1.o --lto-obj-path=single.o
log:
[ThinLTO] Selecting thin.a(thin1.o at 168) to compile
Differential Revision: https://reviews.llvm.org/D80406
Scott Constable [Wed, 10 Jun 2020 22:31:47 +0000 (15:31 -0700)]
[X86] Add an Unoptimized Load Value Injection (LVI) Load Hardening Pass
@nikic raised an issue on D75936 that the added complexity to the O0 pipeline was causing noticeable slowdowns for `-O0` builds. This patch addresses the issue by adding a pass with equal security properties, but without any optimizations (and more importantly, without the need for expensive analysis dependencies).
Reviewers: nikic, craig.topper, mattdr
Reviewed By: craig.topper, mattdr
Differential Revision: https://reviews.llvm.org/D80964
Siva Chandra Reddy [Wed, 10 Jun 2020 22:06:50 +0000 (15:06 -0700)]
[libc][Obvious] Use full path with cmake's if(EXISTS ...).
That if(EXISTS ...) works only with full paths was missed in couple of
places a in recent cleanup.
Jonas Devlieghere [Wed, 10 Jun 2020 21:58:06 +0000 (14:58 -0700)]
[lldb/Test] Add 'std-module' category and skip them with reproducers
These tests are flaky on the reproducer bot. I suspect it has something
to do with the module cache. Skipping the whole category while I
investigate the issue.
Alexander Belyaev [Wed, 10 Jun 2020 19:45:18 +0000 (21:45 +0200)]
[mlir][linalg] Add a builder for `linalg.(indexed_)generic`.
Differential Revision: https://reviews.llvm.org/D81610
Craig Topper [Wed, 10 Jun 2020 21:39:02 +0000 (14:39 -0700)]
[X86] Call LowerADDRSPACECAST directly from ReplaceNodeResults to avoid repeating identical code. NFC
Craig Topper [Wed, 10 Jun 2020 21:18:00 +0000 (14:18 -0700)]
[X86] Add a 32-bit version of mixed-ptr-sizes.ll to make sure we get code coverage on the ADDRSPACECAST handling in ReplaceNodeResults. NFC
Akira Hatanaka [Tue, 9 Jun 2020 19:02:25 +0000 (12:02 -0700)]
Disallow trivial_abi on a class if all copy and move constructors are
deleted
Instead of forcing the class to be passed in registers, which was what
r350920 did, issue a warning and inform the user that the attribute
cannot be used.
For more background, see this discussion:
http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-
20190128/259907.html
This fixes PR39683.
rdar://problem/
47308221
Differential Revision: https://reviews.llvm.org/D57626
Adrian Prantl [Wed, 10 Jun 2020 21:09:23 +0000 (14:09 -0700)]
debugserver: Enable -DLLDB_ENERGY when compiling against an internal SDK
This brings over functionality from the xcodeproject that went missing during the CMake transition.
rdar://problem/
63840635
Differential Revision: https://reviews.llvm.org/D81300
Casey Carter [Wed, 10 Jun 2020 20:55:33 +0000 (13:55 -0700)]
[libcxx][test] MSVC's __is_trivially_copyable is fixed in VS 16.7
... so we can disable `TEST_WORKAROUND_C1XX_BROKEN_IS_TRIVIALLY_COPYABLE`.
Leonard Chan [Wed, 10 Jun 2020 20:50:05 +0000 (13:50 -0700)]
Revert "[clang] Frontend components for the relative vtables ABI"
This reverts commit
2e009dbcb3e373a59e6e84dce6d51ae8a29f60a5.
Reverting since there were some test failures on buildbots that used the
new pass manager. ASan and MSan are also finding some bugs in this that
I'll need to address.
Michael Spencer [Wed, 10 Jun 2020 20:37:03 +0000 (14:37 -0600)]
[clang] Use IsVolatile=true and RequiresNullTerminator=false for PCMs
This change got missed while upstreaming
https://reviews.llvm.org/D77772. This is the part of that change that
actually passes the correct arguments when opening a PCM.
The test didn't catch this because it starts at the
`MemoryBuffer::getOpenFile` level. It's not really possible to test
`ModuleManager::addModule` itself to verify how the file was opened.