Vitaly Buka [Thu, 22 Jun 2023 05:02:43 +0000 (22:02 -0700)]
[asan] Don't quarantine large blocks
Almost NFC, as blocks over max quarantine size will trigger immediate
drain anyway. In followup patches we can optimize passthrough case.
Reviewed By: thurston
Differential Revision: https://reviews.llvm.org/D153495
Fangrui Song [Thu, 22 Jun 2023 17:03:17 +0000 (10:03 -0700)]
[XRay] Make xray_instr_map compatible with Mach-O
The `__DATA,xray_instr_map` section has label differences like
`.quad Lxray_sled_0-Ltmp0` that is represented as a pair of UNSIGNED and SUBTRACTOR relocations.
LLVM integrated assembler attempts to rewrite A-B into A-B'+offset where B' can
be included in the symbol table. B' is called an atom and should be a
non-temporary symbol in the same section. However, since `xray_instr_map` does
not define a non-temporary symbol, the SUBTRACTOR relocation will have no
associated symbol, and its `r_extern` value will be 0. Therefore, we will see
linker errors like:
error: SUBTRACTOR relocation must be extern at offset 0 of __DATA,xray_instr_map in a.o
To fix this issue, we need to define a non-temporary symbol in the section. We
can accomplish this by renaming `Lxray_sleds_start0` to `lxray_sleds_start0`
("L" to "l").
`lxray_sleds_start0` serves as the atom for this dead-strippable subsection.
With the `S_ATTR_LIVE_SUPPORT` attribute, `ld -dead_strip` will retain
subsections that reference live functions.
Special thanks to Oleksii Lozovskyi for reporting the issue and providing
initial analysis.
Differential Revision: https://reviews.llvm.org/D153239
Sindhu Chittireddy [Mon, 19 Jun 2023 02:31:53 +0000 (19:31 -0700)]
[NFC] Fix potential dereferencing of nullptr.
Replace getAs with castAs and add assert if needed.
Differential revision: https://reviews.llvm.org/D153236
Igor Kirillov [Fri, 9 Jun 2023 16:03:22 +0000 (16:03 +0000)]
[CodeGen] Extend reduction support in ComplexDeinterleaving pass to support predication
Adds the capability to recognize SelectInst that appear in the IR.
These instructions are generated during scalable vectorization for reduction
and when the code contains conditions inside the loop body or when
"-prefer-predicate-over-epilogue=predicate-dont-vectorize" is set.
Differential Revision: https://reviews.llvm.org/D152558
Jun Zhang [Thu, 22 Jun 2023 16:38:41 +0000 (00:38 +0800)]
[libc][NFC] Simplify return value logic in set_thread_ptr()
Signed-off-by: Jun Zhang <jun@junz.org>
Differential Revision: https://reviews.llvm.org/D153572
Jon Chesterfield [Thu, 22 Jun 2023 16:46:08 +0000 (17:46 +0100)]
[libc] Add memory fences to device-local locking calls
This makes the interface less error prone. The acquire was previously
forgotten. Release is currently missing if recv() is the last operation made
before close.
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D153571
Craig Topper [Thu, 22 Jun 2023 16:38:46 +0000 (09:38 -0700)]
[RISCV] Use GPR register class for RV64 ZDInx. Remove GPRF64 register class.
The GPRF64 has the same spill size as GPR and is only used for RV64.
There's no real reason to have it as a separate class other than
for type inference for isel patterns in tablegen.
This patch adds f64 to the GPR register class when XLen=64. I use
f32 when XLen=32 even though we don't make use of it just to avoid
the oddity.
isel patterns have been updated to fix the lack of type infererence.
I might do similar for GPRF16 and GPRF32 or I might change them to
use an optimized spill size instead of always using XLen.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D153110
Yuanfang Chen [Wed, 21 Jun 2023 21:45:35 +0000 (14:45 -0700)]
[vscode-mlir] bump vsce version to 2.19.0
For https://bugs.chromium.org/p/llvm/issues/detail?id=46
Differential Revision: https://reviews.llvm.org/D153473
Craig Topper [Thu, 22 Jun 2023 16:22:58 +0000 (09:22 -0700)]
[RISCV] Move Zca/Zcb/Zcd/Zcf/Zcmp/Zcmt out of experimental status.
According to https://wiki.riscv.org/display/HOME/Recently+Ratified+Extensions
these were ratified in April 2023.
Reviewed By: VincentWu
Differential Revision: https://reviews.llvm.org/D153161
Christian Ulmann [Thu, 22 Jun 2023 14:53:21 +0000 (14:53 +0000)]
[mlir][LLVM] Fix empty res attr import
This commit ensures that an empty list of result attributes is not
imported as an empty `ArrayAttr`. Instead, the attribute is just not
added to the `LLVMFuncOp`.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D153553
Arthur Eubanks [Tue, 20 Jun 2023 23:38:55 +0000 (16:38 -0700)]
[SimplifyCFG] Add option to not speculate blocks
Required for phase ordering changes to not regress Rust code with D145265.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D153391
Arthur Eubanks [Wed, 21 Jun 2023 21:13:05 +0000 (14:13 -0700)]
[clang][LTO] Add flag to run verifier after every pass
Helps with debugging issues caught by the verifier.
Plumbed through both normal clang compile and ThinLTO.
Reviewed By: tejohnson
Differential Revision: https://reviews.llvm.org/D153468
Paul Kirth [Wed, 19 Apr 2023 17:13:36 +0000 (17:13 +0000)]
[RISCV] Strengthen atomic ordering for sequentially consistent stores
This is a similar change to one proposed for GCC:
https://inbox.sourceware.org/gcc-patches/
20230414170942.1695672-1-patrick@rivosinc.com/
The changes in this patch are based on the proposal by Hans Boehm to more
closely match the intended semantics for sequentially consistent stores
and to allow some platforms to avoid an ABI break when switching to more
performant atomic instructions. Platforms that have already compiled
code using the existing mappings will also have more time to gradually
replace that code in preparation of the switch.
Further details can be found in the psABI proposal:
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/378.
This patch implements a mapping that is stronger than the one outlined in table
A.6 of the RISC-V unprivileged spec to be future compatible with table A.7 of
the same document. The related discussion can be found at
https://lists.riscv.org/g/tech-unprivileged/topic/risc_v_memory_model_topics/
92916241
The major change to RISC-V code generation is that we will now emit a trailing
fence for sequentially consistent stores.
The new code sequence should have the following form:
```
fence rw,w; s{b|h|w|d}; fence rw,rw;
```
Other changes and optimizations like using amoswap will be handled separately.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D149486
Ties Stuij [Thu, 22 Jun 2023 14:47:42 +0000 (15:47 +0100)]
[ARM] add Thumb-1 8-bit movs/adds relocations to LLVM
This patch adds the LLVM-side plumbing for the following relocations:
- R_ARM_THM_ALU_ABS_G0_NC
- R_ARM_THM_ALU_ABS_G1_NC
- R_ARM_THM_ALU_ABS_G2_NC
- R_ARM_THM_ALU_ABS_G3
(see section 5.6.1.5, Static Thumb16 relocations, of the AArch32 ELF Arm ABI:
https://github.com/ARM-software/abi-aa/blob/
844a79fd4c77252a11342709e3b27b2c9f590cf1/aaelf32/aaelf32.rst#5615static-thumb16-relocations)
Which can respectivly be generated by prefixing assembly symbols with:
- :lower0_7:
- :lower8_15:
- :upper0_7:
- :upper8_15:
LLD support for these relocations will be added in a follow-up patch
Reviewed By: john.brawn, MaskRay
Differential Revision: https://reviews.llvm.org/D149443
David Truby [Thu, 22 Jun 2023 12:52:37 +0000 (13:52 +0100)]
[flang] add -flang-experimental-polymorphism flag to flang-new
This flag enables Fortran 2003 polymorphism. It is marked experimental
and not included in --help.
Reviewed By: tblah, awarzynski
Differential Revision: https://reviews.llvm.org/D153281
Simi Pallipurath [Thu, 22 Jun 2023 12:55:59 +0000 (13:55 +0100)]
Revert "Revert "[lld][Arm] Big Endian - Byte invariant support.""
This reverts commit
d8851384c6ac2a1cea15e05228dbde5f13654e23.
Reason: Applied the fix for the Asan buildbot failures.
Nikita Popov [Wed, 21 Jun 2023 15:04:41 +0000 (17:04 +0200)]
[SDAGBuilder] Handle multi-part arguments in argument copy elision (PR63430)
When eliding an argument copy, we need to update the chain to ensure
the argument reads are performed before later writes. However, the
code doing this only handled this for the first part of the argument.
If the argument had multiple parts, the chains of the later parts were
dropped. Make sure we preserve all chains.
Fixes https://github.com/llvm/llvm-project/issues/63430.
Nikita Popov [Thu, 22 Jun 2023 14:54:42 +0000 (16:54 +0200)]
[LoopUnroll] Avoid undef indices in test (NFC)
Doesn't really matter for the larger purpose of the test, but
avoid the use of undef indices and instead use the loop induction
variable as index, which is what was likely intended here.
Akash Banerjee [Tue, 20 Jun 2023 14:29:22 +0000 (15:29 +0100)]
[MLIR][OpenMP]Add Flang lowering support for device_ptr and device_addr clauses
Add lowering support for the use_device_ptr and use_Device_addr clauses for the Target Data directive.
Depends on D152822
Differential Revision: https://reviews.llvm.org/D152824
Akash Banerjee [Tue, 20 Jun 2023 13:57:27 +0000 (14:57 +0100)]
[MLIR][OpenMP] Minor change to assembly format for Target Data op
Minor reordering of clauses in the assembly format for Target Data op to make it closer to the OpenMP standard.
Differential Revision: https://reviews.llvm.org/D152822
Peter Klausler [Tue, 20 Jun 2023 20:45:22 +0000 (13:45 -0700)]
[flang] Fix bug with generic and homonymous specific module procedure
An unconditional EraseSymbol() call was deleting a generic interface symbol
when the generic had a module procedure of the same name as a specific
procedure, and the module procedure's definition appeared in the same
module. Also clean up some applications of the MODULE attribute to
symbols created along the way.
Differential Revision: https://reviews.llvm.org/D153478
Nikita Popov [Thu, 22 Jun 2023 10:15:58 +0000 (12:15 +0200)]
[InstCombine] Fold assume(false) to non-terminator unreachable
assume(false) is immediate UB, so fold it to (non-terminator)
unreachable.
Florian Hahn [Thu, 22 Jun 2023 14:36:31 +0000 (15:36 +0100)]
[LSR] Adjust test to make sure it keeps testing for the original issue.
Make sure the test keeps testing for the original issue after D153202.
Peter Klausler [Wed, 21 Jun 2023 18:37:53 +0000 (11:37 -0700)]
[flang] Fix USE with homonymous renaming
Fortran requires that a USE with renaming prevent the USE'd symbol
from also being associated into a scope without renaming. The
implementation in name resolution gets confused in the case of
a USE with renaming using the same name ("x => x"). Clean things
up. Fixes LLVM bug https://github.com/llvm/llvm-project/issues/63397.
Differential Revision: https://reviews.llvm.org/D153452
Nikita Popov [Thu, 22 Jun 2023 14:19:47 +0000 (16:19 +0200)]
[InstCombine] Remove instructions before non-terminator unreachable
Treat non-terminator unreachable the same as unreachable, and
remove guaranteed-to-transfer instructions before it.
Nikita Popov [Thu, 22 Jun 2023 14:29:17 +0000 (16:29 +0200)]
[InstCombine] Add additional instructions in non-term unreachable test (NFC)
Nikita Popov [Thu, 22 Jun 2023 14:25:49 +0000 (16:25 +0200)]
[InstCombine] Avoid UB in tests (NFC)
Peter Klausler [Wed, 21 Jun 2023 19:43:55 +0000 (12:43 -0700)]
[flang] Rewrite "1*j" to "(j)", not "j", when j is a variable
Expression folding currently unconditionally rewrites "1*j"
to "j", which is wrong when "j" is a variable, as it transforms
an expression into a variable and can lead to incorrect associations
in contexts like an actual argument or an ASSOCIATE selector.
Transform "1*j" to a parenthesized "(j)" when "j" is a variable.
Fixes LLVM bug https://github.com/llvm/llvm-project/issues/63259.
Differential Revision: https://reviews.llvm.org/D153457
Peter Klausler [Wed, 21 Jun 2023 20:35:53 +0000 (13:35 -0700)]
[flang] Fix looping on LEN type parameter usage
When a LEN type parameter of one PDT is being used as the value
of a LEN type parameter in another PDT, expression rewriting can
loop infinitely due to an incorrect assumption that the same PDT's
parameters are being referenced.
Fixes LLVM bug https://github.com/llvm/llvm-project/issues/63198
Differential Revision: https://reviews.llvm.org/D153465
Nikita Popov [Thu, 22 Jun 2023 13:37:33 +0000 (15:37 +0200)]
[InstCombine] Remove code after non-terminator unreachable
Instruction after a non-terminator unreachable are ... unreachable,
so remove them. Reuse the same logic we use for removing
instructions from dead blocks.
Nikita Popov [Thu, 22 Jun 2023 13:56:41 +0000 (15:56 +0200)]
[InstCombine] Add test for code after non-terminator unreachable (NFC)
Nikita Popov [Thu, 22 Jun 2023 13:50:22 +0000 (15:50 +0200)]
[InstCombine] Don't remove non-terminator unreachable markers
Even if the value happens to be undef, we should preserve these so
they get turned into an unreachable terminator later.
Peter Klausler [Wed, 21 Jun 2023 21:33:48 +0000 (14:33 -0700)]
[flang] Error recovery in bad specific MIN/MAX calls
When a specific MIN/MAX intrinsic function (e.g. MAX1) reference
has an actual argument error, ensure that a later attempt to fold
the call into a constant doesn't crash due to a missing argument.
Fixes https://github.com/llvm/llvm-project/issues/63140
Differential Revision: https://reviews.llvm.org/D153470
Nikita Popov [Thu, 22 Jun 2023 13:42:31 +0000 (15:42 +0200)]
[InstCombine] Avoid UB in tests (NFC)
Peter Klausler [Tue, 20 Jun 2023 22:40:35 +0000 (15:40 -0700)]
[flang] Rework name resolution of Cray pointer declarations
The current code has redundancy with the infrastructure for
declaration checking that can be replaced by better usage of
the parse tree walking framework. This also fixes LLVM flang
bug #58971.
Differential Revision: https://reviews.llvm.org/D153385
Peter Klausler [Tue, 20 Jun 2023 16:36:12 +0000 (09:36 -0700)]
wip
Paul Robinson [Wed, 21 Jun 2023 20:01:32 +0000 (13:01 -0700)]
[Headers][doc] Add various arith/logical intrinsic descriptions to avx2intrin.h
Differential Revision: https://reviews.llvm.org/D153462
Haojian Wu [Thu, 22 Jun 2023 12:35:28 +0000 (14:35 +0200)]
[include-cleaner] No need to overwrite the source file if there is no
cleanups
Mitch Phillips [Thu, 22 Jun 2023 12:28:42 +0000 (14:28 +0200)]
Revert "Revert "Revert "[LLD][ELF] Cortex-M Security Extensions (CMSE) Support"""
This reverts commit
9246df7049b0bb83743f860caff4221413c63de2.
Reason: This patch broke the UBSan buildbots. See more information in
the original phabricator review: https://reviews.llvm.org/D139092
Jay Foad [Thu, 22 Jun 2023 11:25:16 +0000 (12:25 +0100)]
[AMDGPU] Regenerate some checks
David Green [Thu, 22 Jun 2023 11:46:54 +0000 (12:46 +0100)]
[AArch64] Remove G_VECREDUCE_FADD from selectReduction
I believe that for fp reductions we can use the imported tablegen patterns for
selection, as opposed to going via selectReduction. Integer reductions are more
difficult, as the return types in selection DAG will be promoted to i32.
Differential Revision: https://reviews.llvm.org/D153244
Pravin Jagtap [Thu, 22 Jun 2023 11:03:47 +0000 (07:03 -0400)]
[AMDGPU] Switch to the new cl option amdgpu-atomic-optimizer-strategy.
Atomic optimizer is turned on by default through D152649. This patch
removes the usage of old command line option amdgpu-atomic-optimizations
and transfer the responsibility to `amdgpu-atomic-optimizer-strategy`.
We can safely remove old option when LLPC remove its all usage.
Reviewed By: foad, arsenm, #amdgpu, cdevadas
Differential Revision: https://reviews.llvm.org/D153007
Nikita Popov [Thu, 22 Jun 2023 11:00:02 +0000 (13:00 +0200)]
[LoopUnroll] Regenerate test checks (NFC)
Nikita Popov [Thu, 22 Jun 2023 10:23:46 +0000 (12:23 +0200)]
[InstCombine] Use CreateNonTerminatorUnreachable() helper
Create the standard non-terminator unreachable, rather than a
slight variation on it.
Jolanta Jensen [Tue, 20 Jun 2023 12:51:41 +0000 (12:51 +0000)]
[NFC SVE ACLE] Remove IR combines that no longer apply.
Remove IR combines that no longer apply after the SVE merging
intrinsics taking an all active predicate, have been canonicalised
to their equivalent undef (_u) variants.
Differential Revision: https://reviews.llvm.org/D153415
Matt Arsenault [Wed, 1 Feb 2023 00:27:51 +0000 (20:27 -0400)]
DAG: Expand legalization of is.fpclass to fcmp for DAZ
Try to use a compare with 0 if DAZ is assumed.
FPClassTest really needs to be marked as a bimask enum, but the API
for that is currently broken.
Matt Arsenault [Thu, 22 Jun 2023 01:31:36 +0000 (21:31 -0400)]
Add some unit tests for DenormalMode helper
Split out from D143180
Simon Pilgrim [Thu, 22 Jun 2023 10:04:54 +0000 (11:04 +0100)]
[DAG] ScalarizeVectorResult - add ISD::MULHS/ISD::MULHU handling
Fixes #63439
Ivan Kosarev [Thu, 22 Jun 2023 09:47:58 +0000 (10:47 +0100)]
[AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 14.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D152907
Ivan Kosarev [Thu, 22 Jun 2023 09:04:05 +0000 (10:04 +0100)]
[AMDGPU][GFX11] Add test coverage for 16-bit conversions, part 13.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D152906
Matthias Springer [Thu, 22 Jun 2023 09:30:57 +0000 (11:30 +0200)]
[mlir][linalg] Remove duplicate tensor.pad lowering pattern
There is another transform that lowers tensor.pad to tensor.empty + linalg.fill + tensor.insert_slice: `transform.structured.rewrite_in_destination_passing_style`. Delete the other transform.
Differential Revision: https://reviews.llvm.org/D153429
Piotr Zegar [Thu, 22 Jun 2023 08:02:20 +0000 (08:02 +0000)]
[clang-tidy][NFC] Add missing argument comment to LexerUtils.cpp
D148697 post commit review change.
Matthias Springer [Thu, 22 Jun 2023 09:03:10 +0000 (11:03 +0200)]
[mlir][affine] Fix build after D153324
Matthias Springer [Thu, 22 Jun 2023 08:49:37 +0000 (10:49 +0200)]
[mlir][tensor] Clean up tensor::DimOp usage
* Remove duplicate functions. `tensor::getMixedSize` and `tensor::getMixedSizes` should be used.
* Use `tensor::getMixedSize` instead of `createOrFold<tensor::DimOp>`. This is more efficient. `createOrFold` will create an op an immediately try to fold it. In case of a static dimension size, an attribute can be used directly.
Differential Revision: https://reviews.llvm.org/D153332
David Green [Thu, 22 Jun 2023 08:52:02 +0000 (09:52 +0100)]
[AArch64] Mark vecreduce_fminimum and vecreduce_fmaximum as legal
This adds some simple lowering of vecreduce_fminimum and vecreduce_fmaximum to
fminv/fmaxv instructions, in the same way that vecreduce_fmax / vecreduce_fmin
is lowered to fminnmv / fmaxnmv.
Differential Revision: https://reviews.llvm.org/D153246
Dmitry Makogon [Mon, 19 Jun 2023 09:33:46 +0000 (16:33 +0700)]
[SCEV] Don't store AddRec loop when simplifying multiplication of AddRecs
When multiplying several AddRecs, we do the following simplification:
{A1,+,A2,+,...,+,An}<L> * {B1,+,B2,+,...,+,Bn}<L> = {x=1 in [ sum y=x..2x
[ sum z=max(y-x, y-n)..min(x,n) [
choose(x, 2x)*choose(2x-y, x-z)*A_{y-z}*B_z]]
],+,...up to x=2n}
This is done iteratively, pair by pair. So if we try to multiply three AddRecs
A1, A2, A3, then we'd try to simplify A1 * A2 to A1' and then try to
simplify A1' * A3 if A1' is also an AddRec.
The transform is only legal if the loops of the two AddRecs are the same.
It is checked in the code, but the loop of one of the AddRecs is stored
in a local variable and doesn't get updated when we simplify a pair to a new AddRec.
In the motivating test the new AddRec A1' was created for a different loop and,
as the loop variable didn't get updated, the check for different loops passed and
the transform worked for two AddRecs from different loops.
So it created a wrong SCEV. And it caused LSR to replace an instruction with another
one that had the same SCEV as the incorrectly computed one.
Differential Revision: https://reviews.llvm.org/D153254
Matthias Springer [Thu, 22 Jun 2023 08:39:34 +0000 (10:39 +0200)]
[mlir][affine] More efficient `makeComposedFolded...` helpers
The old code used to materialize constants as ops, immediately folded them into the resulting affine map and then deleted the constant ops again. Instead, directly fold the attributes into the affine map. Furthermore, all helpers accept `OpFoldResult` instead of `Value` now. This makes the code at call sites more efficient, because it is no longer necessary to materialize a `Value`, just to be able to use these helper functions.
Note: The API has changed (accepts OpFoldResult instead of Value), otherwise this change is NFC.
Differential Revision: https://reviews.llvm.org/D153324
Diana Picus [Wed, 7 Jun 2023 08:47:22 +0000 (10:47 +0200)]
[AMDGPU] Add llvm.amdgcn.cs.chain intrinsic to IR & verifier
We only check a subset of the constraints in the verifier:
* that we only call the intrinsic from functions with a restricted set of
calling conventions
* that the 'flags' argument is an immediate
Other checks are (probably) more appropriate for codegen.
Differential Revision: https://reviews.llvm.org/D151995
Diana Picus [Wed, 7 Jun 2023 08:18:31 +0000 (10:18 +0200)]
[AMDGPU] Add amdgpu_cs_chain[_preserve] CCs to IR & verifier
Add the amdgpu_cs_chain and amdgpu_cs_chain_preserve keywords to
LLVM IR and make sure we can parse and print them. Also make sure we
perform some basic checks in the IR verifier - similar to what we check
for many of the other AMDGPU calling conventions, plus the additional
restriction that we can't have direct calls to functions with these
calling conventions.
Differential Revision: https://reviews.llvm.org/D151994
Job Noorman [Thu, 22 Jun 2023 07:34:57 +0000 (09:34 +0200)]
[BOLT][RISCV] Add tests for simple CFG transformations
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D153346
Job Noorman [Thu, 22 Jun 2023 07:33:32 +0000 (09:33 +0200)]
[BOLT] Don't register internal func relocs as external references
Currently, all relocations that point inside a function are registered
as external references. If these relocations cannot be resolved as jump
tables or computed gotos, the containing function gets marked as
not-simple and excluded from optimizations.
RISC-V uses relocations for branches and jumps (to support linker
relaxation) and as such, almost no functions get marked as simple. This
patch fixes this by only registering relocations that originate outside
of the referenced function as external references.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D153345
Job Noorman [Thu, 22 Jun 2023 07:32:32 +0000 (09:32 +0200)]
[BOLT][RISCV] Implement R_RISCV_ADD32/SUB32
Thispatch implements the R_RISCV_ADD32 and R_RISCV_SUB32 relocations for
RISC-V.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D146554
Itay Bookstein [Thu, 22 Jun 2023 07:23:52 +0000 (10:23 +0300)]
[coroutine] Add missing presplitcoroutine attr to example
Signed-off-by: Itay Bookstein <itay.bookstein@nextsilicon.com>
Michael Platings [Mon, 19 Jun 2023 15:02:52 +0000 (16:02 +0100)]
[Driver][BareMetal] Error if no matching multilib
Previously if no matching multilib was found then the user would
typically see an error like "fatal error: 'stdio.h' file not found"
which gives no indication as to the underlying problem.
With this change the user will instead see an error like
clang: error: no multilib found matching flags: --target=thumbv7em-none-unknown-eabi -march=...
clang: note: available multilibs are:
--target=armv4t-none-unknown-eabi
--target=thumbv6m-none-unknown-eabi -mfpu=none
...
Differential Revision: https://reviews.llvm.org/D153292
Tobias Gysi [Thu, 22 Jun 2023 06:27:12 +0000 (06:27 +0000)]
[mlir][llvm] Fix import of SwitchOp
This revision ensures SwitchOps with case and condition
bitwidths other than 32-bit are imported properly. It adds an
APInt based builder to the SwitchOp and implements
a verifier that checks that the condition and the case
value types match.
Reviewed By: Dinistro
Differential Revision: https://reviews.llvm.org/D153438
Petr Hosek [Fri, 9 Jun 2023 07:14:28 +0000 (07:14 +0000)]
[libc] Place headers in the right include directory
When LLVM_ENABLE_PER_TARGET_RUNTIME_DIR is enabled, place headers
in `include/<target>` directory, otherwise use `include/`.
Differential Revision: https://reviews.llvm.org/D152592
Vitaly Buka [Thu, 22 Jun 2023 06:05:21 +0000 (23:05 -0700)]
[test][sanitizer] Reformat and print to stderr
Christian Sigg [Thu, 22 Jun 2023 05:50:38 +0000 (07:50 +0200)]
[Bazel][mlir] Avoid ODR violation introduced in 7ab749c.
This change also prepares for 9119325 to land again.
Adds `mlir_c_runner_utils_hdrs` and `mlir_runner_utils_hdrs` targets which do not depend on `//llvm::Support`.
These can be used by other 'runner.so' targets if they are loaded along with the 'runner_utils.so' without calling `__mlir_execution_engine_init()` twice.
Elliot Goodrich [Thu, 22 Jun 2023 05:49:43 +0000 (06:49 +0100)]
[llvm] Split out DenseMapInfo<variant> specialization
Remove the `DenseMapInfo<std::variant<Ts...>>` variant out from
`llvm/ADT/DenseMapInfo.h` into a separate header
`llvm/ADT/DenseMapInfoVariant.h`
This allows us to remove the `<variant>` include, which is being
transitively and unncessary included in all translation units that
include `llvm/ADT/DenseMap.h`.
There have been similar changes to move out specializations for
* `APInt.h`
fd7e309e02fd226b0390888388ed732608e52c73 and
* `StringRef.h`/`ArrayRef.h`
983565a6fe4a9f40c7caf82b65c650c20dbcc104
to reduce the compilation time. As we are unable to move the
specialization into `<variant>`, we create a separate
`DenseMapInfoVariant.h` header that can be used by anyone who needs this
specialization.
This reduces the total number of preprocessing tokens across the LLVM
source files in lib from (roughly) 1,964,876,961 to 1,936,551,496 - a
reduction of ~1.44%. This should result in a small improvement in
compilation time.
Differential Revision: https://reviews.llvm.org/D150997
Jacques Pienaar [Mon, 19 Jun 2023 21:24:14 +0000 (14:24 -0700)]
[mlir][docgen] Enable op grouping mechanism.
Add ability to be able to group ops together in documentation generation. This
results in section of ops grouped together under one summary & description.
This doesn't do anything special for the groups beyond nesting yet.
Differential Revision: https://reviews.llvm.org/D153306
Vitaly Buka [Thu, 22 Jun 2023 03:59:07 +0000 (20:59 -0700)]
[NFC][sanitizer] Rename internal getters
Michael Maitland [Wed, 21 Jun 2023 18:23:55 +0000 (11:23 -0700)]
[RISCV] Separate scheduler calsses for vfredmax/min
vfredmax/min may have different scheduling behavior on different
microarchitectures compared to other reductions. This different
behavior can be described by giving vfredmax/min separate
scheduling resources.
Differential Revision: https://reviews.llvm.org/D153450
Matt Arsenault [Sat, 7 Jan 2023 13:52:16 +0000 (08:52 -0500)]
Intrinsics: Allow tablegen to mark parameters with dereferenceable
Matt Arsenault [Sun, 20 Nov 2022 16:37:13 +0000 (08:37 -0800)]
HIP: Directly call ldexp builtins
Aart Bik [Thu, 22 Jun 2023 01:04:05 +0000 (18:04 -0700)]
[mlir][sparse][gpu] refine SDDMM pattern for cuSPARSE
Old pattern was missing some cases (e.g. swapping the arguments)
but it also allowed too many cases (e.g. non-empty "absent" or
different arguments for add/mul). This fixes the issues.
Reviewed By: K-Wu
Differential Revision: https://reviews.llvm.org/D153487
Matt Arsenault [Thu, 3 Nov 2022 06:43:38 +0000 (23:43 -0700)]
AMDGPU: Drop and upgrade llvm.amdgcn.atomic.inc/dec to atomicrmw
Craig Topper [Thu, 22 Jun 2023 01:02:53 +0000 (18:02 -0700)]
[RISCV] Minor refactoring of some code in copyPhysReg. NFC
Move some of the vmv.v.i handling into the vmv.v.v if. This
reduces the scope of one variable.
Craig Topper [Thu, 22 Jun 2023 00:53:49 +0000 (17:53 -0700)]
[TableGen][Target] Rename Attribute field in SubtargetFeature class to FieldName.
The word "attribute" has a specific meaning in LLVM. Avoid using it
here to mean something different.
This addresses feedback from D153180.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D153444
Brad Richardson [Wed, 8 Feb 2023 16:13:12 +0000 (10:13 -0600)]
[flang] don't require -flang-experimental-exec flag anymore
Reviewed By: awarzynski, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D153379
Vitaly Buka [Wed, 21 Jun 2023 23:17:43 +0000 (16:17 -0700)]
[test][sanitizer] Pre-commit huge malloc test
Vitaly Buka [Wed, 21 Jun 2023 23:15:34 +0000 (16:15 -0700)]
Revert "[test][sanitizer] Precommit huge malloc test"
Wrong accidental commit.
This reverts commit
1f18c9624b44e763a76742634f0f95432ea7cb23.
Shoaib Meenai [Wed, 21 Jun 2023 23:16:46 +0000 (16:16 -0700)]
[MachO] Remove redundant `.section` directive
See https://reviews.llvm.org/D153382#inline-1483291
Vitaly Buka [Wed, 21 Jun 2023 23:13:17 +0000 (16:13 -0700)]
[test][sanitizer] Precommit huge malloc test
Vitaly Buka [Wed, 21 Jun 2023 21:19:29 +0000 (14:19 -0700)]
[test] Add llvm-xray into XRAY_TEST_DEPS
Vitaly Buka [Wed, 21 Jun 2023 21:19:11 +0000 (14:19 -0700)]
[test] Add lli into ORC_TEST_DEPS
Mitch Phillips [Wed, 21 Jun 2023 22:32:38 +0000 (00:32 +0200)]
Revert "[mlir][RunnerUtils] Make symbols private + implement loading mechanism."
This reverts commit
bba2b656110209a3d9863b92c060082479b06ab1.
Reason: Broke the HWASan buildbot. See https://reviews.llvm.org/D153250
for more information.
Rashmi Mudduluru [Thu, 15 Jun 2023 21:36:23 +0000 (14:36 -0700)]
[-Wunsafe-buffer-usage] Handle pointer initializations for grouping related variables
Differential Revision: https://reviews.llvm.org/D150489
Shoaib Meenai [Fri, 16 Jun 2023 22:44:28 +0000 (15:44 -0700)]
[Frontend] Remove ShowIncludesPretendHeader
It hasn't been written to since https://reviews.llvm.org/D46652, so it
was always empty. I don't have enough context on that diff to know if
the removal of the write to ShowIncludesPretendHeader in that diff was
intentional, but no one's complained about it for five years, so I
assume we're okay to just get rid of it entirely.
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D153176
Shoaib Meenai [Fri, 16 Jun 2023 22:32:34 +0000 (15:32 -0700)]
[Frontend] Don't output skipped includes from predefines
`-H` displays a tree of included header files, but that tree is supposed
to omit two categories of header files:
1. Any header files pulled in via `-include`, which the code refers to
as the "predefines".
2. Any header files whose inclusion was skipped because they'd already
been included (assuming header guards or `#pragma once`).
`-fshow-skipped-includes` was intended to make `-H` display the second
category of files. It wasn't checking for the first category, however,
so you could end up with only the middle of the `-include` hierarchy
displayed, e.g. the added test would previously output:
```
... /data/users/smeenai/llvm-project/clang/test/Frontend/Inputs/test2.h
. /data/users/smeenai/llvm-project/clang/test/Frontend/Inputs/test.h
```
This diff adds a check to prevent that and correctly omit headers from
`-include` even when `-fshow-skipped-includes` is passed. While I'm
here, add tests for the interaction between `-fshow-skipped-includes`
and `-sys-header-deps` as well.
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D153175
Valentin Clement [Wed, 21 Jun 2023 22:33:03 +0000 (15:33 -0700)]
[flang] Enhance getTypeAsString to support more FIR types
Add support for couple of FIR types such as fir.ptr, fir.heap,
fir.box, fir.class
Reviewed By: razvanlupusoru
Differential Revision: https://reviews.llvm.org/D153461
Owen Pan [Mon, 19 Jun 2023 06:18:00 +0000 (23:18 -0700)]
[clang-format] Don't finalize #if, #else, #endif, etc.
Don't finalize a preprocessor branch directive if it's the first
token of an annotated line. See the rationale at
https://reviews.llvm.org/D150057#inline-1449546.
Fixes #63379
Differential Revision: https://reviews.llvm.org/D153243
Christopher Ferris [Wed, 21 Jun 2023 00:43:11 +0000 (17:43 -0700)]
[scudo] Change overloaded function name append.
The ScopedString class has two functions named append. One takes
a va_list, but on some platforms va_list is typedef'd to char*.
That means that this call:
std::string value;
Str.append("print this string %s", value.c_str());
The compiler can incorrectly think this is the va_list function,
leading to crashes when calling this. To fix this, change the name
of the va_list function to be vappend to avoid this.
Fix https://github.com/llvm/llvm-project/issues/62893
Reviewed By: Chia-hungDuan
Differential Revision: https://reviews.llvm.org/D153389
Louis Dionne [Wed, 21 Jun 2023 13:08:45 +0000 (09:08 -0400)]
[libc++] Fix the check-format job
Previously, it wouldn't take into account files in ignore_format.txt
(at least not on OSX) because the `find` command would return file names
like `libcxx/src//new_handler.cpp`, which never matched the file names
in `ignore_format.txt`.
Differential Revision: https://reviews.llvm.org/D153416
Jason Molenda [Wed, 21 Jun 2023 21:54:00 +0000 (14:54 -0700)]
Add two new entitlements when debugserver is built by Apple
Two new entitlements, com.apple.private.thread-set-state and
com.apple.private.set-exception-port should be included in the
debugserver entitlement plist when built internally at Apple.
The desktop builds of debugserver don't need these entitlements;
don't add them to debugserver-macosx-entitlements.plist.
rdar://
108912676
rdar://
103032208
Louis Dionne [Mon, 19 Jun 2023 16:58:51 +0000 (12:58 -0400)]
[libc++] Refactor the selection of string's ABI in __config
This doesn't change the selection, but it expands the conditions to
add comments and make it clearer what's happening. It also removes a
-Wundef instance when we checked __ARM_ARCH_7K__ >= 2 without checking
that it is defined in the first place.
Differential Revision: https://reviews.llvm.org/D153413
David Green [Wed, 21 Jun 2023 21:47:30 +0000 (22:47 +0100)]
[ARM] Repair check lines in sub-cmp-peephole.ll test. NFC
Commit
ec77747fbdca901e0fded58f940dae62e0f6b726 regenerated the check lines
without being very careful about which lines were updated. This attempts to fix
them to make sure the V7 and V8 lines are emitted as needed.
Amilendra Kodithuwakku [Wed, 21 Jun 2023 20:40:41 +0000 (21:40 +0100)]
Revert "Revert "[LLD][ELF] Cortex-M Security Extensions (CMSE) Support""
This reverts commit
a685ddf1d104b3ce9d53cf420521f5aaff429630.
This relands Arm CMSE support (D139092) and fixes the GCC build bot errors.
Razvan Lupusoru [Wed, 21 Jun 2023 21:24:24 +0000 (14:24 -0700)]
[mlir][openacc] Update host_data data operands list name
For all other compute and data constructs, the data operands list
is named `dataClauseOperands`. Update `acc.host_data` to be
consistent with this naming.
Reviewed By: clementval
Differential Revision: https://reviews.llvm.org/D153425
Peiming Liu [Wed, 21 Jun 2023 04:16:40 +0000 (04:16 +0000)]
[mlir][sparse] rewrite arith::SelectOp to semiring operations to sparsify it.
Reviewed By: aartbik, K-Wu
Differential Revision: https://reviews.llvm.org/D153397
Tomasz Kuchta [Wed, 21 Jun 2023 21:18:05 +0000 (21:18 +0000)]
[DFSAN] Add support for strncat
This patch adds a support for the libc strncat() function in DFSAN
Reviewed by: browneee
Differential Revision: https://reviews.llvm.org/D152196