Bryan Brattlof [Tue, 21 Jun 2022 21:36:03 +0000 (16:36 -0500)]
soc: soc_ti_k3: identify j7200 SR2.0 SoCs
Anytime a new revision of a chip is produced, Texas Instruments
will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID
register by one. Typically this will be decoded as SR1.0 -> SR2.0 ...
however a few TI SoCs do not follow this convention.
Rather than defining a revision string array for each SoC, use a
default revision string array for all TI SoCs that continue to follow
the typical 1.0 -> 2.0 revision scheme.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Jim Liu [Tue, 21 Jun 2022 09:03:38 +0000 (17:03 +0800)]
phy: nuvoton: add NPCM7xx phy control driver
add BMC NPCM750 phy control driver
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Philippe Schenker [Mon, 20 Jun 2022 14:57:45 +0000 (16:57 +0200)]
toradex: tdx-cfg-block: add new toradex oui range
Add new Toradex MAC OUI (8c:06:cb), to the config block. With this change
we extend the possible serial-numbers as follows:
For serial-numbers
00000000-
16777215 OUI 00:14:2d is taken
For serial-numbers
16777216-
33554431 OUI 8c:06:cb is taken
Lower 24-bit of the serial number are used in the NIC part of the
MAC address, the complete serial number can be calculated using the OUI.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:12 +0000 (13:26 -0500)]
board: ti: common: board_detect: Do 1byte address checks first.
Do 1 byte address checks first prior to doing 2 byte address checks.
When performing 2 byte addressing on 1 byte addressing eeprom, the
second byte is taken in as a write operation and ends up erasing the
eeprom region we want to preserve.
While we could have theoretically handled this by ensuring the write
protect of the eeproms are properly managed, this is not true in case
where board are updated with 1 byte eeproms to handle supply status.
Flipping the checks by checking for 1 byte addressing prior to 2 byte
addressing check prevents this problem at the minor cost of additional
overhead for boards with 2 byte addressing eeproms.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:11 +0000 (13:26 -0500)]
board: ti: common: Handle the legacy eeprom address width properly
Due to supply chain issues, we are starting to see a mixture of eeprom
usage including the smaller 7-bit addressing eeproms such as 24c04
used for eeproms.
These eeproms don't respond well to 2 byte addressing and fail the
read operation. We do have a check to ensure that we are reading the
alternate addressing size, however the valid failure prevents us
from checking at 1 byte anymore.
Rectify the same by falling through and depend on header data comparison
to ensure that we have valid data.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Fri, 17 Jun 2022 18:26:10 +0000 (13:26 -0500)]
board: ti: common: Optimize boot when detecting consecutive bad records
The eeprom data area is much bigger than the data we intend to store,
however, with bad programming, we might end up reading bad records over
and over till we run out of eeprom space. instead just exit when 10
consecutive records are read.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vignesh Raghavendra [Wed, 15 Jun 2022 14:03:05 +0000 (19:33 +0530)]
firmware: ti_sci_static_data: Make file board agnostic
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.
Drop J7200 EVM specific settings as its same as J721e
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:34 +0000 (17:45 +0300)]
configs: am62x_evm_r5: Add CONFIG_NR_DRAM_BANKS as done in a53 defconfig
Add CONFIG_NR_DRAM_BANKS from am62x_evm_a53_defconfig as this is
needed to calculate the size of DDR that is available.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:33 +0000 (17:45 +0300)]
board: ti: am62x: Account for DDR size fixups if ECC is enabled
Call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.
A second fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:32 +0000 (17:45 +0300)]
board: ti: am62x: Use fdt functions for ram and bank init
Use the appropriate fdtdec_setup_mem_size_base() call in
dram_init() and fdtdec_setup_bank_size() in dram_bank_init()
to pull these values from DT, where they are already available,
instead of hardcoding them.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:31 +0000 (17:45 +0300)]
arm: dts: k3-am625-*: Mark memory with u-boot,dm-spl
Mark the memory node with u-boot,dm-spl so we can use it
from early SPL on both R5 and A53.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Georgi Vlaev [Tue, 14 Jun 2022 14:45:30 +0000 (17:45 +0300)]
arm: mach-k3: common: Use ddr_init in spl_enable_dcache
The spl_enable_dcache() function calls dram_init_banksize()
to get the total memory size. Normally the dram_init_banksize()
setups the memory banks, while the total size is reported
by ddr_init(). This worked so far for K3 since we set the
gd->ram_size in dram_init_banksize() as well.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Philippe Schenker [Mon, 13 Jun 2022 17:35:23 +0000 (19:35 +0200)]
toradex: tdx-cfg-block: extend assembly version
There are two decimal digits reserved to encode the module version and
revision. This code so far implemented A-Z which used 0-25 of this
range.
This commit extends the range to make use of all 99 numbers. After
capital letters the form with a hashtag and number (e.g. #26) is used.
Examples:
If the assembly version is between zero and 25 the numbering is as follows,
as it also has been before this commit:
0: V0.0A
1: V0.0B
...
25: V0.0Z
New numbering of assembly version:
If the number is between 26 and 99 the new assembly version name is:
26: V0.0#26
27: V0.0#27
...
99: V0.0#99
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Philippe Schenker [Mon, 13 Jun 2022 17:35:22 +0000 (19:35 +0200)]
toradex: tdx-cfg-block: use defines for string length
With those defines the length can be reused and is in one place
extendable.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Philippe Schenker [Mon, 13 Jun 2022 17:35:21 +0000 (19:35 +0200)]
toradex: tdx-cfg-block: use only snprintf
Prevent memory issues that could appear with sprintf. Replace all
sprintf occurences with snprintf.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Aswath Govindraju [Fri, 10 Jun 2022 12:53:38 +0000 (18:23 +0530)]
board: ti: j721e: Return if there is an error while configuring SerDes
While configuring SerDes, errors could be encountered, in these cases,
return instead of going ahead. This is will help in booting even if
configuration of SerDes fails.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Vaishnav Achath [Fri, 3 Jun 2022 06:02:16 +0000 (11:32 +0530)]
arm: k3: j721e: add dynamic sf bus override support for j721e
implement overrides for spl_spi_boot_bus() and spl_spi_boot_cs()
lookup functions according to bootmode selection, so as to support
both QSPI and OSPI boot using the same build.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Vaishnav Achath [Fri, 3 Jun 2022 06:02:15 +0000 (11:32 +0530)]
common: spl: spl_spi: add support for dynamic override of sf bus
Currently the SPI flash to load from is defined through the compile
time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
prevents the loading of binaries from different SPI flash using the
same build.E.g. supporting QSPI flash boot and OSPI flash boot
on J721E platform is not possible due to this limitation.
This commit adds lookup functions spl_spi_boot_bus()
and spl_spi_boot_cs for identifying the flash device based on the
selected boot device, when not overridden the lookup functions are
weakly defined in common/spl/spl_spi.c.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Wed, 6 Jul 2022 13:15:36 +0000 (09:15 -0400)]
Merge branch '2022-07-05-more-Kconfig-migrations' into next
- Migrate more CONFIG symbols to Kconfig, remove some dead code and
clean-up arch/Kconfig.nxp slightly more.
Tom Rini [Mon, 20 Jun 2022 12:07:58 +0000 (08:07 -0400)]
Convert CONFIG_KIRKWOOD_PCIE_INIT et al to Kconfig
This converts the following to Kconfig:
CONFIG_KIRKWOOD_EGIGA_INIT
CONFIG_KIRKWOOD_PCIE_INIT
CONFIG_KIRKWOOD_RGMII_PAD_1V8
CONFIG_KM_DISABLE_PCIE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:57 +0000 (08:07 -0400)]
qemu-ppce500: Move CONFIG_SYS_PCI_MAP_{START, END} to board code
These CONFIG options are only used on this board, in the board file
itself. Remove these from the CONFIG namespace and define in the board
file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:56 +0000 (08:07 -0400)]
Convert CONFIG_SYS_FSL_PCI_VER_3_X to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_PCI_VER_3_X
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:55 +0000 (08:07 -0400)]
Convert CONFIG_PCI_MSC01 to Kconfig
This converts the following to Kconfig:
CONFIG_PCI_MSC01
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:54 +0000 (08:07 -0400)]
socrates: Rework CONFIG_PCI_CLK_FREQ
The symbol CONFIG_PCI_CLK_FREQ is local to this board. Provide equal
clarity in the code by referencing the numeric value directly and move
the explanatory comment to the code, just prior to use.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:53 +0000 (08:07 -0400)]
Convert CONFIG_SH7751_PCI to Kconfig
This converts the following to Kconfig:
CONFIG_SH7751_PCI
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:52 +0000 (08:07 -0400)]
MPC837XERDB: Remove unused PCI defines
These defines aren't referenced in code today, remove them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:51 +0000 (08:07 -0400)]
m68k: Remove unused PCI code
The only mcf5445x platform does not enable PCI, drop this code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:50 +0000 (08:07 -0400)]
Convert CONFIG_PCI_CONFIG_HOST_BRIDGE to Kconfig
This converts the following to Kconfig:
CONFIG_PCI_CONFIG_HOST_BRIDGE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:49 +0000 (08:07 -0400)]
Convert CONFIG_PCI_GT64120 to Kconfig
This converts the following to Kconfig:
CONFIG_PCI_GT64120
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:48 +0000 (08:07 -0400)]
Convert CONFIG_PCI_SCAN_SHOW to Kconfig
This converts the following to Kconfig:
CONFIG_PCI_SCAN_SHOW
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:47 +0000 (08:07 -0400)]
pci: Remove pci_sh4 and related defines.
This driver is not enabled anywhere, remove it. Also remove definitions
of symbols only used in this driver, on platforms that did not enable
it.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:46 +0000 (08:07 -0400)]
Convert CONFIG_PCIE_IMX to Kconfig
This converts the following to Kconfig:
CONFIG_PCIE_IMX
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:45 +0000 (08:07 -0400)]
Convert CONFIG_PCIE1 et al to Kconfig
This converts the following to Kconfig:
CONFIG_PCIE1
CONFIG_PCIE2
CONFIG_PCIE3
CONFIG_PCIE4
CONFIG_PCI1
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:44 +0000 (08:07 -0400)]
Convert CONFIG_LAYERSCAPE_NS_ACCESS to Kconfig
This converts the following to Kconfig:
CONFIG_LAYERSCAPE_NS_ACCESS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:43 +0000 (08:07 -0400)]
lcd: Remove legacy CONFIG_FB_ADDR code
No platforms set both CONFIG_LCD and CONFIG_FB_ADDR at this time, drop
this legacy code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 20 Jun 2022 12:07:42 +0000 (08:07 -0400)]
Convert CONFIG_FSL_FIXED_MMC_LOCATION et al to Kconfig
This converts the following to Kconfig:
CONFIG_FSL_FIXED_MMC_LOCATION
CONFIG_ESDHC_HC_BLK_ADDR
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Jun 2022 20:24:34 +0000 (16:24 -0400)]
powerpc: Clean up CHAIN_OF_TRUST related options
As things stand currently, there is only one PowerPC platform that
enables the options for CHAIN_OF_TRUST. From the board header files,
remove a number of never-set options. Remove board specific values from
arch/powerpc/include/asm/fsl_secure_boot.h as well. Rework
include/config_fsl_chain_trust.h to not abuse the CONFIG namespace for
constructing CHAIN_BOOT_CMD. Migrate all of the configurable addresses
to Kconfig.
If any platforms are re-introduced with secure boot support, everything
required should still be here, but now in Kconfig, or requires migration
of an option to Kconfig.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Jun 2022 20:24:33 +0000 (16:24 -0400)]
nxp: config_fsl_chain_trust.h: Clean up and remove unused portions
The way that secure boot is implemented today on NXP ARM platforms does
not reuse the elements found in include/config_fsl_chain_trust.h to
construct CONFIG_SECBOOT but instead board header files have their
environment setup as needed and then fsl_setenv_chain_of_trust() will
set secureboot in the environment. Remove a large number of unused
defines here.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Jun 2022 20:24:32 +0000 (16:24 -0400)]
fsl_validate: Migrate SPL_UBOOT_KEY_HASH to Kconfig
Move setting of SPL_UBOOT_KEY_HASH to a non-NULL value to Kconfig. As
part of this, change fsl_secboot_validate(...) to check that it is
passed a non-empty string, rather than non-NULL.
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Jun 2022 20:24:31 +0000 (16:24 -0400)]
arch/Kconfig.nxp: Re-organize slightly
Make all of the CHAIN_OF_TRUST options be under a single menu and add a
comment for the rest, so the resulting config file reads more clearly.
Remove duplicate CHAIN_OF_TRUST options from
board/congatec/common/Kconfig. Remove duplicate NXP_ESBC config
questions and move to arch/Kconfig.nxp.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:40 +0000 (14:04 -0400)]
Convert CONFIG_SYS_FSL_SFP_BE et al to Kconfig
This converts the following to Kconfig:
CONFIG_KEY_REVOCATION
CONFIG_SYS_FSL_SFP_BE
CONFIG_SYS_FSL_SFP_LE
CONFIG_SYS_FSL_SFP_VER_3_0
CONFIG_SYS_FSL_SFP_VER_3_2
CONFIG_SYS_FSL_SFP_VER_3_4
CONFIG_SYS_FSL_SRK_LE
This partly means making sure to enable SYS_FSL_ERRATUM_A007186 only for
when CHAIN_OF_TRUST is enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:39 +0000 (14:04 -0400)]
Convert CONFIG_SYS_FSL_SEC_MON et al to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_SEC_MON
CONFIG_SYS_FSL_SEC_MON_BE
CONFIG_SYS_FSL_SEC_MON_LE
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:38 +0000 (14:04 -0400)]
Convert CONFIG_ESDHC_DETECT_QUIRK to Kconfig
This converts the following to Kconfig:
CONFIG_ESDHC_DETECT_QUIRK
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:37 +0000 (14:04 -0400)]
Convert CONFIG_ESBC_HDR_LS et al to Kconfig
This converts the following to Kconfig:
CONFIG_ESBC_HDR_LS
CONFIG_ESBC_ADDR_64BIT
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:36 +0000 (14:04 -0400)]
nxp: Rename board/freescale/common/Kconfig to arch/Kconfig.nxp
Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:35 +0000 (14:04 -0400)]
nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig
The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:34 +0000 (14:04 -0400)]
Convert CONFIG_HETROGENOUS_CLUSTERS et al to Kconfig
This converts the following to Kconfig:
CONFIG_HETROGENOUS_CLUSTERS
CONFIG_SYS_MAPLE
CONFIG_SYS_CPRI
CONFIG_PPC_CLUSTER_START
CONFIG_DSP_CLUSTER_START
CONFIG_SYS_CPRI_CLK
CONFIG_SYS_ULB_CLK
CONFIG_SYS_ETVPE_CLK
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 16 Jun 2022 18:04:33 +0000 (14:04 -0400)]
Convert CONFIG_EXTRA_CLOCK to Kconfig
This converts the following to Kconfig:
CONFIG_EXTRA_CLOCK
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:55 +0000 (12:03 -0400)]
Convert CONFIG_SYS_DDR_RAW_TIMING to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_DDR_RAW_TIMING
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:54 +0000 (12:03 -0400)]
Convert CONFIG_SYS_SPD_BUS_NUM to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_SPD_BUS_NUM
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:53 +0000 (12:03 -0400)]
Convert CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR to Kconfig
This converts the following to Kconfig:
CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:52 +0000 (12:03 -0400)]
Convert CONFIG_USB_GADGET_DWC2_OTG_PHY to Kconfig
This converts the following to Kconfig:
CONFIG_USB_GADGET_DWC2_OTG_PHY
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:51 +0000 (12:03 -0400)]
Convert CONFIG_USE_ONENAND_BOARD_INIT to Kconfig
This converts the following to Kconfig:
CONFIG_USE_ONENAND_BOARD_INIT
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:50 +0000 (12:03 -0400)]
Convert CONFIG_SAMSUNG_ONENAND to Kconfig
This converts the following to Kconfig:
CONFIG_SAMSUNG_ONENAND
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Wed, 15 Jun 2022 16:03:49 +0000 (12:03 -0400)]
Rename CONFIG_PWM to CONFIG_PWM_S5P and move to Kconfig
We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to
Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new
symbol.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Wed, 15 Jun 2022 16:03:48 +0000 (12:03 -0400)]
smdkc100: Remove some unused options
There are a few options we test and set and then never reference, remove
them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:47 +0000 (12:03 -0400)]
nxp: Cleanup some emulator related options.
- Drop the emulator CONFIG test from include/configs/ls1088ardb.h
- Migrate CONFIG_SYS_FSL_DDR_EMU to a select'able option in
drivers/ddr/fsl/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:46 +0000 (12:03 -0400)]
watchdog: designware: Make this depend on WDT
As this driver can dynamically determine the values set in
CONFIG_DW_WDT_BASE when using WDT, so make this depend on WDT rather
than migrate CONFIG_DW_WDT_BASE to Kconfig.
Cc: Chee Tien Fong <tien.fong.chee@intel.com>
Cc: Chin-Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinh.nguyen@intel.com>
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Stefan Roese <sr@denx.de>
Cc: hee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 15 Jun 2022 16:03:45 +0000 (12:03 -0400)]
Convert CONFIG_ENABLE_36BIT_PHYS to Kconfig
This converts the following to Kconfig:
CONFIG_ENABLE_36BIT_PHYS
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:44 +0000 (12:03 -0400)]
net: designware: Rename CONFIG_DW_GMAC_DEFAULT_DMA_PBL to GMAC_DEFAULT_DMA_PBL
This value is always used at the default, rename it for now. This
likely should come from the device tree if non-default, moving forward.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 15 Jun 2022 16:03:43 +0000 (12:03 -0400)]
Convert CONFIG_DW_ALTDESCRIPTOR to Kconfig
This converts the following to Kconfig:
CONFIG_DW_ALTDESCRIPTOR
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 5 Jul 2022 01:30:23 +0000 (21:30 -0400)]
Merge tag 'fsl-qoriq-2022-7-3' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
Several patches from Pali
- fsl_elbc detection fix
- sort p2020 dts node, drop duplicated node
- p1_p2_rdb_pc board cleanup
- simplify mpc85xx _start_cont jumping code
Pali Rohár [Tue, 28 Jun 2022 15:54:00 +0000 (17:54 +0200)]
powerpc: mpc85xx: Simplify jump to _start_cont in flash code
After more patches code for jumping to _start_cont symbol in flash memory
involved to code with useless mathematical operations. Currently it does:
r3 := CONFIG_SYS_MONITOR_BASE + ABS(_start_cont) - CONFIG_SYS_MONITOR_BASE
jump to r3
Which is equivalent of just:
r3 := ABS(_start_cont)
jump to r3
The purpose of that code is just to jump to _start_code symbol,
independently of program counter. So branch must be done to absolute
address. Trying to write:
ba _start_cont
just cause linker error:
LD u-boot
powerpc-linux-gnuspe-ld.bfd: arch/powerpc/cpu/mpc85xx/start.o: in function `switch_as':
(.bootpg+0x4b8): relocation truncated to fit: R_PPC_ADDR24 against symbol `_start_cont' defined in .text section in arch/powerpc/cpu/mpc85xx/start.o
make: *** [Makefile:1801: u-boot] Error 1
Probably by the fact that absolute address cannot be expressed by 24-bits.
So write the code via mtlr+blr pattern as it was before and load general
purpose register with absolute address of the symbol:
lis r3,_start_cont@h
ori r3,r3,_start_cont@l
mtlr r3
blr
Seems that gcc and gnu ld linker support symbol@h and symbol@l syntax like
number@h and number@l without any problem. And disassembling of compiler
u-boot binary proved that lis+ori instructions are called with numbers
which represent halves of absolute address of _start_cont symbol.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Thu, 23 Jun 2022 16:22:21 +0000 (18:22 +0200)]
board: freescale: p1_p2_rdb_pc: Remove mapping for TDM-PMC card
From whole P1/P2 family of RDB boards is TDM-PMC card (PCI Mezzanine Card,
Freescale PQ-MDS-T1) available only on P1021RDB and P1025RDB boards.
So address mapping for TDM-PMC card on LBC should not be enabled on any
other P1/P2 RDB board as there is no device at that TDM-PMC address.
Support for P1021RDB and P1025RDB boards was already removed from mainline
U-Boot in commits
6d1dd76afe85 ("board/freescale: Remove P1021RDB board
support") and
d521cece5adb ("board/freescale: Remove P1025RDB board
support").
So do not enable TDM-PMC address mapping on remaining P1/P2 RDB boards and
remove all macros related to TDM-PMC address mappings.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Thu, 23 Jun 2022 13:25:36 +0000 (15:25 +0200)]
board: freescale: p1_p2_rdb_pc: Allow to compile without __SW_BOOT_SD macro
Add #ifdef guard for __SW_BOOT_SD macro like there are guards for all other
__SW_BOOT_* macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Thu, 23 Jun 2022 13:18:52 +0000 (15:18 +0200)]
board: freescale: p1_p2_rdb_pc: Allow to compile without BOARD_NAME
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Thu, 23 Jun 2022 12:39:04 +0000 (14:39 +0200)]
powerpc: dts: p2020: Remove duplicate pic@40000 node
DT node pic@40000 is defined explicitly in p2020-post.dtsi file and also
transitionally via include file pq3-mpic.dtsi. Remove duplicate definition
from p2020-post.dtsi.
No change in final DTB file.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Thu, 23 Jun 2022 12:39:03 +0000 (14:39 +0200)]
powerpc: dts: p2020: Sort DT nodes by their addresses
No functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Mon, 20 Jun 2022 11:07:03 +0000 (13:07 +0200)]
mtd: rawnand: fsl_elbc: Fix detection when nand_scan_ident() has not selected ecc.mode
ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
nand_scan_ident() has not selected ecc.mode or when it selected it to none
ecc mode.
Distinguish between these two states by checking of node property
"nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.
This change fixes usage of none ecc mode if it is specified in DTS file.
Fixes:
c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device tree")
Signed-off-by: Pali Rohár <pali@kernel.org>
Tom Rini [Thu, 30 Jun 2022 19:21:52 +0000 (15:21 -0400)]
Merge tag 'u-boot-at91-2022.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.10 cycle:
This feature set includes mostly fixes and alignments: DT alignment with
Linux for sama7g5, removal of invalid eeprom compatibles, removal of
extra debug_uart_init calls for all at91 boards, support for pio4 driver
pioE bank, and other minor fixes and enhancements for sam9x60 and
sama5d2_icp boards.
Tom Rini [Thu, 30 Jun 2022 13:32:15 +0000 (09:32 -0400)]
Merge tag 'versal-qspi-for-v2022.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Versal QSPI/OSPI changes for v2022.10
- Add new flash types
- Add cadence ospi driver for Xilinx Versal
Mihai Sain [Wed, 25 May 2022 10:32:08 +0000 (13:32 +0300)]
gpio: atmel_pio4: add support for PIO_PORTE
Add support for gpio PORT E, which is available on e.g. sama7g5 SoC.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Tom Rini [Wed, 29 Jun 2022 13:54:02 +0000 (09:54 -0400)]
Merge branch '2022-06-28-Kconfig-migrations' into next
- Convert a large number of CONFIG symbols to Kconfig. Of note is a
large chunk of USB symbols (and dead code removal), ensuring all
SPL/TPL/VPL symbols have an appropriate dependency, largely (but not
entirely) removing the testing of CONFIG_SPL_BUILD in board headers,
and allowing CONFIG_EXTRA_ENV_TEXT and CONFIG_EXTRA_ENV_SETTINGS to
co-exist as this facilities migration of many platforms.
T Karthik Reddy [Thu, 12 May 2022 10:05:35 +0000 (04:05 -0600)]
spi: cadence-qspi: Fix programming ospi flash speed
When the requested flash speed is 0, the baudrate division for the
requested speed causing drop in the performance. So set the ospi flash
to operate at max frequency when requested speed is zero.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-6-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Thu, 12 May 2022 10:05:34 +0000 (04:05 -0600)]
spi: cadence_qspi: Enable apb linear mode for apb read & write operations
On versal platform, enable apb linear mode for apb read and write
execute operations amd disable it when using dma reads. This is done by
xilinx_pm_request() secure calls when CONFIG_ZYNQMP_FIRMWARE is enabled,
else we use direct raw reads and writes in case of mini U-Boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-5-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Thu, 12 May 2022 10:05:33 +0000 (04:05 -0600)]
spi: cadence-qspi: reset qspi flash for versal platform
When flash operated at non default mode like DDR, flash need to be reset
to operate in SDR mode to read flash ids by spi-nor framework. Reset the
flash to the default state before using the flash. This reset is handled
by a gpio driver, in case of mini U-Boot as gpio driver is disabled, we
do raw read and write access by the registers.
Versal platform utilizes spi calibration for read delay programming, so
incase by default read delay property is set in DT. We make sure not to
use read delay from DT by overwriting read_delay with -1.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-4-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Thu, 12 May 2022 10:05:32 +0000 (04:05 -0600)]
arm64: versal: Add versal specific cadence ospi driver
Add support for cadence ospi driver for Versal platform. This driver
provides support for DMA read operation which utilizes cadence qspi
driver.
If "cdns,is-dma" DT property is specified use dma for read operation
from cadence_qspi driver. As cadence_qspi_apb_dma_read() is defined in
cadence_ospi_versal driver add a weak function defination in
cadence_qspi driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-3-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
T Karthik Reddy [Thu, 12 May 2022 10:05:31 +0000 (04:05 -0600)]
spi: cadence-qspi: move cadence qspi macros to header file
Move all the cadence macros from cadence_qspi_apb.c to cadence_qspi.h
file.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/20220512100535.16364-2-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ashok Reddy Soma [Wed, 25 May 2022 05:17:12 +0000 (10:47 +0530)]
mtd: spi-nor-ids: Add support for flashes tested by xilinx
Add support for various flashes from below manufacturers which are tested
by xilinx for years.
EON:
en25q128b
GIGA:
gd25lx256e
ISSI:
is25lp008
is25lp016
is25lp01g
is25wp008
is25wp016
is25wp01g
is25wx256
MACRONIX:
mx25u51245f
mx66u1g45g
mx66l2g45g
MICRON:
mt35xl512aba
mt35xu01g
SPANSION:
s70fs01gs_256k
SST:
sst26wf016b
WINBOND:
w25q16dw
w25q16jv
w25q512jv
w25q32bv
w25h02jv
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1653455832-14763-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Tue, 14 Jun 2022 02:57:37 +0000 (22:57 -0400)]
gw_ventana: Migrate to using CONFIG_EXTRA_ENV_TEXT
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/gw_ventana.h and over
to plain text in board/gateworks/gw_ventana/gw_ventana.env. This lets
us drop CONFIG_EXTRA_ENV_SETTINGS_COMMON as everything resides in a
single environment file now.
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Tom Rini [Tue, 14 Jun 2022 02:57:36 +0000 (22:57 -0400)]
Complete migration of MTDPARTS_DEFAULT / MTDIDS_DEFAULT, include in environment
- Ensure that everyone setting mtdids= and mtdparts= is doing so via the
CONFIG options.
- If the CONFIG options are set, ensure that the default environment
sets mtdparts / mtdids.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:35 +0000 (22:57 -0400)]
Rename CONFIG_SYS_AUTOLAOD to CONFIG_SYS_DISABLE_AUTOLOAD
The "autoload" environment variable is always checked with env_get_yesno
as it can be set to any form of no. The default behavior of
env_get_yesno is to return -1 on variables that are not set, which acts
as true in general (we test for non-zero return). To convert
CONFIG_SYS_AUTOLOAD to Kconfig, given that it was almost always used to
set autoload to no, first rename to CONFIG_SYS_DISABLE_AUTOLOAD for
consistency sake. Then, make it so that if enabled we set autoload=0 in
the default environment. Migrate all platforms which set
CONFIG_SYS_AUTOLOAD to non-true or that set autoload to false in their
default environment to using CONFIG_SYS_DISABLE_AUTOLOAD
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:34 +0000 (22:57 -0400)]
opos6uldev: Migrate to using CONFIG_EXTRA_ENV_TEXT
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/opos6uldev.h and over to
plain text in board/armadeus/opos6uldev/opos6uldev.env. This lets us
manage env_version without a CONFIG variable.
Cc: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:33 +0000 (22:57 -0400)]
Convert CONFIG_ENV_RANGE to Kconfig
This converts the following to Kconfig:
CONFIG_ENV_RANGE
Now that this is in Kconfig we can enforce a minimum size and so remove
the check in C code to ensure range is larger than size.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:32 +0000 (22:57 -0400)]
dragonboard410c: Migrate to using CONFIG_EXTRA_ENV_TEXT
With the exception of distro_boot support, we can move all of the rest
of the environment changes to come from CONFIG_EXTRA_ENV_TEXT and in
turn remove CONFIG_ENV_REFLASH.
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:31 +0000 (22:57 -0400)]
env: Remove include/generated/env.* under "make clean"
When running "make clean" we want to remove env.in and well as env.txt.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 14 Jun 2022 02:57:30 +0000 (22:57 -0400)]
env: Do not make CONFIG_EXTRA_ENV_TEXT and CONFIG_EXTRA_ENV_SETTINGS conflict
Largely, the use of CONFIG_EXTRA_ENV_SETTINGS can be migrated directly
to come from CONFIG_EXTRA_ENV_TEXT. The biggest case that cannot easily
be migrated is distro_bootcmd support. Rather than block migration on
this, remove the #error here so that we can being moving forward.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:05 +0000 (20:02 -0400)]
Convert CONFIG_SYS_USB_FAT_BOOT_PARTITION to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_USB_FAT_BOOT_PARTITION
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:04 +0000 (20:02 -0400)]
Convert CONFIG_USB_MAX_CONTROLLER_COUNT to Kconfig
This converts the following to Kconfig:
CONFIG_USB_MAX_CONTROLLER_COUNT
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:03 +0000 (20:02 -0400)]
common: usb: Update logic for usb.o, usb_hub.o and usb_storage.o
Now that we have consistently named symbols to enable USB host or gadget
controller support in SPL or full U-Boot, we do not need to
unconditionally build USB files nor depend on non-SPL symbols to know
when to build these common files.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:02 +0000 (20:02 -0400)]
mx6memcal: Remove SPL_USB_HOST
As this particular platform is intended to be loaded and run a specific
set of routines in SPL, we do not need the ability to further use the
USB as a host device in SPL. Disable this support.
Cc: Eric Nelson <eric@nelint.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Eric Nelson <eric@nelint.com>
Tom Rini [Mon, 13 Jun 2022 00:02:01 +0000 (20:02 -0400)]
usb: Remove non-DM code in ehci-fsl and xhci
The DM_USB migration deadline has passed and this is not used in SPL.
Remove this now unused code.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:02:00 +0000 (20:02 -0400)]
Convert CONFIG_FPGA_STRATIX_V to Kconfig
This converts the following to Kconfig:
CONFIG_FPGA_STRATIX_V
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:01:59 +0000 (20:01 -0400)]
fpga: Remove CONFIG_FPGA_COUNT
This define is only currently used in a single board, and always set to
one. Define this within the board code and remove other references.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 13 Jun 2022 00:01:58 +0000 (20:01 -0400)]
Convert CONFIG_ENV_MIN_ENTRIES et al to Kconfig
This converts the following to Kconfig:
CONFIG_ENV_MIN_ENTRIES
CONFIG_ENV_MAX_ENTRIES
Cc: Michal Simek <michal.simek@amd.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:38 +0000 (22:59 -0400)]
Globally remove most CONFIG_SPL_BUILD tests from config headers
With the exception of how PowerPC handles SPL and TPL (which has its own
issues), we cannot safely hide options under CONFIG_SPL_BUILD. Largely
remove the places that have this test today.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:37 +0000 (22:59 -0400)]
Convert CONFIG_SYS_MPC85XX_NO_RESETVEC to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_MPC85XX_NO_RESETVEC
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:36 +0000 (22:59 -0400)]
Remove CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE and CONFIG_SPL_ABORT_ON_RAW_IMAGE
These symbols do not exist in mainline, remove them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:35 +0000 (22:59 -0400)]
siemens: Move CONFIG_FACTORYSET to Kconfig
Introduce board/siemens/common/Kconfig and have it hold FACTORYSET to
start with. Use select for this on the boards that need it.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Jun 2022 02:59:34 +0000 (22:59 -0400)]
video: Migrate exynos display options to Kconfig
Following how it's done for the majority of drivers, add a new
VIDEO_EXYNOS option and Kconfig file under drivers/video/exynos and list
the current options there.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>