Chris Forbes [Sun, 26 Jul 2020 03:11:11 +0000 (20:11 -0700)]
bifrost: Lower x->bool conversions to != 0
Signed-off-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6079>
Connor Abbott [Mon, 27 Jul 2020 10:11:44 +0000 (12:11 +0200)]
tu: Enable resource dynamic indexing
This has actually worked since bindless support was merged.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>
Connor Abbott [Mon, 27 Jul 2020 10:48:37 +0000 (12:48 +0200)]
ir3: Fix incorrect src flags for samp_tex
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>
Connor Abbott [Mon, 27 Jul 2020 10:47:43 +0000 (12:47 +0200)]
ir3: Remove redundant samp_tex validation
It's already checked in ir3_validate. This way we don't have to fix it
up for bindless.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>
Connor Abbott [Mon, 27 Jul 2020 10:46:28 +0000 (12:46 +0200)]
ir3: Validate bindless samp_tex correctly
It's full instead of half precision, because the maximum number of
textures/samplers is much larger.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6086>
Connor Abbott [Mon, 27 Jul 2020 11:17:42 +0000 (13:17 +0200)]
tu: Fix descriptor update templates with input attachments
Found via
dEQP-VK.binding_model.descriptorset_random.sets4.noarray.ubolimitlow.sbolimitlow.sampledimglow.outimgonly.noiub.nouab.frag.ialimitlow.0
Fixes:
159a1300ceb ("turnip: input attachment descriptor set rework")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6087>
Jonathan Marek [Tue, 14 Jul 2020 14:19:15 +0000 (10:19 -0400)]
turnip: fix SP_HS_UNKNOWN_A831 value for A650
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
Jonathan Marek [Tue, 14 Jul 2020 14:11:11 +0000 (10:11 -0400)]
turnip: use patchControlPoints for HS_INPUT_SIZE value
It should be calculated from patchControlPoints, not tcs_vertices_out.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
Jonathan Marek [Mon, 6 Jul 2020 03:08:25 +0000 (23:08 -0400)]
turnip: move WFI out of draw state to fix a650 hangs
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
Jonathan Marek [Tue, 14 Jul 2020 12:55:32 +0000 (08:55 -0400)]
freedreno/ir3: fix wrong local_primitive_id_start type
When changing the patch to use an offset instead of a bool, the type was
accidentally left as bool.
Fixes:
f472c9844309 ("freedreno/ir3: add support for a650 tess shared storage")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5765>
Bas Nieuwenhuizen [Mon, 27 Jul 2020 09:52:24 +0000 (11:52 +0200)]
vulkan/wsi: Convert usage of -1 to UINT32_MAX.
The integers are unsigned so they do the same but this makes it
locally more clear what happened.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6071>
Bas Nieuwenhuizen [Fri, 24 Jul 2020 23:37:57 +0000 (01:37 +0200)]
vulkan/wsi/x11: report device-group present rectangles with prime.
dEQP-VK.wsi.xlib.surface.query_devgroup_present_modes with prime
fail when 0 rectangles are reported. While I believe that test
tests this unintentionally (trying to test the VK_INCOMPLETE return),
I believe it makes sense to always return a rectangle.
In particular we require the data from the given rectangle for
presentation even if we use prime and given that prime is completely
transparent for the app it still counts as local from the perspective
as the application.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6071>
Daniel Schürmann [Sun, 26 Jul 2020 11:22:12 +0000 (13:22 +0200)]
radv: call radv_nir_lower_ycbcr_textures after first optimizations
There might still be tex instructions with undef texture/sampler before
the first round of optimizations. No pipelinedb changes.
Fixes:
14a12b771d0a380defacafe5825362af77ff21bd ('spirv: Rework our handling of images and samplers')
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6083>
David McFarland [Sun, 26 Jul 2020 20:29:49 +0000 (17:29 -0300)]
radv: link with ld_args_build_id
This is needed for radv_device_get_cache_uuid to work correctly.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6081>
Iago Toral Quiroga [Wed, 22 Jul 2020 06:15:10 +0000 (08:15 +0200)]
v3d/compiler: request fragment shader clip lowering to be vulkan compatible.
Vulkan allows fragment shaders to read gl_ClipDistance[], in which case
the SPIR-V compiler will inject a compact array variable at
VARYING_SLOT_CLIP_DIST0. Request the lowering to always work in terms
of a compact array variable so we don't have to care about the API
in use.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6022>
Iago Toral Quiroga [Tue, 21 Jul 2020 08:01:34 +0000 (10:01 +0200)]
v3d/compiler: handle compact varyings
We are going to need this in Vulkan because the SPIR-V compiler
defines clip distances as a single compact array of scalars, so
our compiler needs to know what to do with them.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6022>
Iago Toral Quiroga [Tue, 21 Jul 2020 10:21:39 +0000 (12:21 +0200)]
nir/lower_clip: make the pass compatible with Vulkan semantics
Vulkan allows fragment shaders to read gl_ClipDistance[], in which
case the SPIR-V compiler inserts a single compact array variable for
VARYING_SLOW_CLIP_DIST0 and the lowering should not try to inject
its own variables, but instead work in terms of the existing one.
Vulkan drivers are expected to call this with use_clipdist_array set
to true to be consistent with this setup.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6022>
Bas Nieuwenhuizen [Fri, 24 Jul 2020 19:56:04 +0000 (21:56 +0200)]
radv: Fix uninitialized variable in renderpass.
Fixes some dEQP-VK.renderpass2.* flakes. Valgrind:
Test case 'dEQP-VK.renderpass2.dedicated_allocation.attachment.8.724'..
==754520== Conditional jump or move depends on uninitialised value(s)
==754520== at 0x575B21C: radv_layout_is_htile_compressed (radv_image.c:1690)
==754520== by 0x572F470: radv_handle_depth_image_transition (radv_cmd_buffer.c:5855)
==754520== by 0x572F2F2: radv_handle_image_transition (radv_cmd_buffer.c:6123)
==754520== by 0x572EEC6: radv_handle_subpass_image_transition (radv_cmd_buffer.c:3385)
==754520== by 0x572A104: radv_cmd_buffer_begin_subpass (radv_cmd_buffer.c:4843)
==754520== by 0x572A007: radv_CmdBeginRenderPass (radv_cmd_buffer.c:4913)
==754520== by 0x572A197: radv_CmdBeginRenderPass2 (radv_cmd_buffer.c:4921)
Why false?
A renderloop happens when the same attachment is both used as input
attachment and output (color, ds) attachment in a subpass. Of course
this doesn't happen outside of a renderpass and hence we can initialize
it to false at the start of the renderpass.
Fixes:
66131ceb8bc "radv: Pass through render loop detection to internal layout decisions."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3074
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6068>
Karol Herbst [Fri, 24 Jul 2020 14:34:43 +0000 (16:34 +0200)]
nir/lower_io: assert that offsets are used for shader_in
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6059>
Christian Gmeiner [Fri, 3 Jul 2020 10:42:56 +0000 (12:42 +0200)]
etnaviv: do register setup only once
Register set setup should be done once at backend
initializaion, as ra_set_finalize is O(r^2*c^2).
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5996>
Christian Gmeiner [Mon, 29 Jun 2020 10:10:55 +0000 (12:10 +0200)]
etnaviv: move shader_count to etna_compiler
Also fix data race on making the shader's id.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5996>
Christian Gmeiner [Mon, 29 Jun 2020 10:02:29 +0000 (12:02 +0200)]
etnaviv: introduce struct etna_compiler
This struct will be used to for state saved across compiler
invocations.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5996>
Connor Abbott [Fri, 3 Jul 2020 16:44:56 +0000 (18:44 +0200)]
tu: Enable vertex & fragment stores & atomics
Note that there are some extra tess fails, but they're probably
unrelated to the actual feature. There were also some xfails that were
created as part of an earlier attempt to enable the feature which were
fixed in the meantime, so remove them.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>
Connor Abbott [Fri, 3 Jul 2020 16:41:42 +0000 (18:41 +0200)]
tu: Detect invalid-for-binning renderpass dependencies
This is all that was missing for stores & atomics.
Closes: #3196
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>
Connor Abbott [Wed, 22 Jul 2020 21:52:50 +0000 (23:52 +0200)]
tu: Fix hangs for DS with no output
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>
Connor Abbott [Tue, 21 Jul 2020 12:36:53 +0000 (14:36 +0200)]
tu: Fix empty blit scissor case
With vertexPipelineStoresAndAtomics enabled, fixes:
dEQP-VK.tessellation.invariance.one_minus_tess_coord_component.quads_fractional_even_spacing_cw_point_mode
dEQP-VK.tessellation.invariance.tess_coord_component_range.triangles_fractional_even_spacing_ccw_point_mode
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5738>
Jason Ekstrand [Fri, 24 Jul 2020 15:04:48 +0000 (10:04 -0500)]
spirv: Also copy over binding information for atomic counters
I missed this if statement so atomic counters weren't getting bindings
and, when you have more than one of them, that meant they were all
getting combined into one.
Fixes:
3584cb09bc15 "spirv: Give atomic counters their own variable mode"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6060>
Connor Abbott [Tue, 21 Jul 2020 09:33:33 +0000 (11:33 +0200)]
tu: Implement VK_KHR_draw_indirect_count
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
Connor Abbott [Fri, 24 Jul 2020 13:22:37 +0000 (15:22 +0200)]
tu: Add missing wfi to tu6_emit_hw()
It needs to be there before changing CCU state. This was accidentally
deleted in
f494799a7f09deebacb5696fde7514e3329de246 when it should've
been moved.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
Connor Abbott [Mon, 20 Jul 2020 11:12:32 +0000 (13:12 +0200)]
tu: Integrate WFI/WAIT_FOR_ME/WAIT_MEM_WRITES with cache tracking
Track them via pending_flush_bits. Previously WFI was only tracked in
flush_bits and WAIT_FOR_ME was emitted directly. This means that we don't
emit WAIT_FOR_ME or WAIT_FOR_IDLE if there wasn't a cache flush or other
write by the GPU. Also split up host writes from sysmem writes, as only
the former require WFI/WAIT_FOR_ME.
Along the way, I also realized that we were missing proper handling of
transform feedback counter writes which require WAIT_MEM_WRITES. Plumb
that through as well. And CmdDrawIndirectByteCountEXT needs a
WAIT_FOR_ME as it does not wait for WFI internally.
As an example of what this does, a typical barrier for transform
feedback with srcAccess = VK_TRANSFORM_FEEDBACK_WRITE_COUNTER_BIT_EXT
and dstAccess = VK_ACCESS_INDIRECT_COMMAND_READ_BIT used to emit on
A650:
- WAIT_FOR_IDLE
and now we emit:
- WAIT_MEM_WRITES
- WAIT_FOR_ME
So we've eliminated a useless WFI and added some necessary waits.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
Connor Abbott [Tue, 21 Jul 2020 08:48:16 +0000 (10:48 +0200)]
freedreno: Add INDIRECT_COUNT CP_DRAW_INDIRECT_MULTI variants
These have an indirect count which is loaded from an iova, and the
minimum is taken between the indirect and direct counts. Note, I also
had to fix gen_header.py to deal with the extra-long names we get.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
Connor Abbott [Mon, 20 Jul 2020 14:55:59 +0000 (16:55 +0200)]
freedreno: Clean up CP_DRAW_MULTI_INDIRECT definition
Depends on the envytools changes to make the "addvariant" magic work in
order to decode this correctly, and to be able to print the register
names directly.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6007>
Jonathan Marek [Thu, 18 Jun 2020 03:42:48 +0000 (23:42 -0400)]
turnip: remove extra gmem alignment
Now that we clear the PITCHALIGN" field when filling GMEM input attachment
descriptors, we can get rid of the extra tile width alignment on a630/a640.
With the "block_align_shift" value change, this brings down the default
gmem_align from 16k to 4k on a630/a640 and down from 24k to 12k on a650,
to match the gallium driver.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5528>
Christian Gmeiner [Mon, 20 Jul 2020 19:40:16 +0000 (21:40 +0200)]
etnaviv: explicitly set nir_variable_mode
No functional changes - fixes the following assert:
nir_lower_io_impl: Assertion `!(modes & ~supported_modes)' failed.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5997>
Samuel Pitoiset [Fri, 10 Jul 2020 07:03:44 +0000 (09:03 +0200)]
radv: clean up remaining pipeline init functions
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Fri, 10 Jul 2020 06:54:58 +0000 (08:54 +0200)]
radv: remove useless return value to radv_pipeline_scratch_init()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Fri, 10 Jul 2020 06:53:00 +0000 (08:53 +0200)]
radv: add radv_pipeline_init_shader_stages_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 09:54:37 +0000 (11:54 +0200)]
radv: constify all radv_pipeline_generate_*() helpers
To make clear that the pipeline should be read only.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 09:43:29 +0000 (11:43 +0200)]
radv: assign pipeline gfx fields before PM4 emission
To be able to constify all radv_pipeline_generate_*() helpers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 09:49:32 +0000 (11:49 +0200)]
radv: clean up binning state initialization
It's no longer emitted directly in the pipeline.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 09:36:45 +0000 (11:36 +0200)]
radv: clean up adjusting MSAA state if conservative rast is enabled
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 09:07:02 +0000 (11:07 +0200)]
radv: add radv_pipeline_generate_vgt_gs_out()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 09:05:54 +0000 (11:05 +0200)]
radv: add radv_pipeline_init_input_assembly_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 08:42:57 +0000 (10:42 +0200)]
radv: clean up tessellation state emission
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 08:36:28 +0000 (10:36 +0200)]
radv: remove unnecessary radv_tessellation_state::lds_size
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 08:33:16 +0000 (10:33 +0200)]
radv: set LDS TCS size at shaders creation for GFX9+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 08:06:43 +0000 (10:06 +0200)]
radv: align the LDS size in calculate_tess_lds_size()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Thu, 9 Jul 2020 06:40:13 +0000 (08:40 +0200)]
radv: remove one unnecessary param to radv_generate_graphics_pipeline_key()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 19:45:09 +0000 (21:45 +0200)]
radv: remove no-op si_multiwave_lds_size_workaround()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 19:35:23 +0000 (21:35 +0200)]
radv: remove unnecessary radv_tessellation_state::num_patches
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 15:48:49 +0000 (17:48 +0200)]
radv: clean up radv_compute_generate_pm4()
For consistency regarding how the graphics pipeline is built.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 15:49:14 +0000 (17:49 +0200)]
radv: reduce the number of allocated dwords for compute CS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 15:06:10 +0000 (17:06 +0200)]
radv: clean up PA_SC_CLIPRECT_RULE emission
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 15:00:19 +0000 (17:00 +0200)]
radv: clean up VGT_SHADER_STAGES_EN emission
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 14:51:54 +0000 (16:51 +0200)]
radv: emit PA_SC_LINE_CNTL as part of the rasterization state
While we are at it, remove one useless field in radv_multisample_state.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 13:59:42 +0000 (15:59 +0200)]
radv: emit more invariant registers as part of the initial gfx state
This reduces the number of emitted packets for pipelines.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 13:56:47 +0000 (15:56 +0200)]
radv: remove outdated TODO related to PA_SU_VTX_CNTL.PIX_CENTER
It should be always 1, nothing more to check.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 13:02:00 +0000 (15:02 +0200)]
radv: remove set but unused radv_pipeline::vertex_elements
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Samuel Pitoiset [Wed, 8 Jul 2020 12:58:58 +0000 (14:58 +0200)]
radv: remove declared but unused radv_pipeline::is_dual_src
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
Eric Engestrom [Fri, 24 Jul 2020 12:20:44 +0000 (14:20 +0200)]
bin/khronos-update: add workaround for python bug 9625
The bug causes `choices` to break `nargs='*'`.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6057>
Eric Engestrom [Tue, 21 Jul 2020 00:27:33 +0000 (02:27 +0200)]
bin/khronos-update: add support for the SPIRV files
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6004>
Eric Engestrom [Tue, 21 Jul 2020 00:26:58 +0000 (02:26 +0200)]
bin/khronos-update: having a folder in include/ is not a requirement
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6004>
Neil Roberts [Fri, 17 Jul 2020 13:32:19 +0000 (15:32 +0200)]
v3d: Retry with the fallback scheduler when RA fails
v3d_compile is now split out into a helper function that gets called a
second time if compilation fails the first time with the result
reporting the register allocation failed. The second time it is run with
the fallback scheduler to try and increase the chances of successfully
allocating the registers.
v2: Add a performance debug message when using the fallback scheduler.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
Neil Roberts [Fri, 17 Jul 2020 10:49:59 +0000 (12:49 +0200)]
v3d: Changed v3d_compile:failed to an enum
Instead of just having a bool status for the failure, there is now an
enum so that the compilation can report a more detailed status.
Currently this is only used to report whether the failure was due to
failed register allocation. The “failed” bool doesn’t seem to actually
have been used anywhere so this doesn’t really change a lot.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
Neil Roberts [Fri, 17 Jul 2020 09:00:53 +0000 (11:00 +0200)]
nir/schedule: Add an option for a fallback scheduling algorithm
The current scheduling algorithm favors parallelism a bit too
aggressively and sometimes generates shaders that fail register
allocation. This happens even if the threshold is set to zero to force
it to always use the CSR instruction choosing algorithm.
This patch adds an option to use an even more aggressive fallback that
just always picks the instruction with the shortest maximum delay in the
hope that that will generate the least register pressure. The intention
is to use this as a last resort after register allocation fails in order
to at least have a working shader.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
Neil Roberts [Fri, 17 Jul 2020 07:49:33 +0000 (09:49 +0200)]
v3d: Mark scheduling dependency for prim id and first output
The input primitive ID is read from the VPM in the same memory segment
as the outputs. This means that writing the GS header to VPM location 0
needs to be done after reading the primitive ID. This patch adds a
dependency between the load_primitive_id intrinsic and the store_output
intrinsic for location 0 to stop the scheduler from reordering them.
v2: Use an enum for the dependency class number.
v3: Add "GS" to the class enum name.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
Neil Roberts [Fri, 17 Jul 2020 07:24:02 +0000 (09:24 +0200)]
nir/schedule: Add a callback for backend-specific dependencies
Adds a callback function to nir_schedule_options to give the backend a
chance to add custom dependencies between certain intrinsics. The
callback can assign a class number to the intrinsic and then set a read
or write dependency on that class.
v2: Use a linked-list of schedule nodes for the dependency classes
instead of a fixed-sized array.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
Neil Roberts [Fri, 17 Jul 2020 07:17:29 +0000 (09:17 +0200)]
nir/schedule: Store a pointer to the options struct in scoreboard
Instead of copying the individual members of nir_schedule_options into
the scoreboard, it now just keeps a pointer to the options. This avoids
the duplicated comments and makes it easier to add more options later.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
Neil Roberts [Fri, 17 Jul 2020 07:08:47 +0000 (09:08 +0200)]
nir/scheduler: Move nir_scheduler to its own header
nir_schedule already has a struct for options which makes it more than
just a function declaration. Later patches intend to add more structs to
complement these options. In order to make the code easier to manage,
this moves the nir_scheduler-related parts out of nir.h to their own
header.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5953>
Jason Ekstrand [Fri, 29 May 2020 21:45:21 +0000 (16:45 -0500)]
spirv: Rework our handling of images and samplers
Previously, objects of type OpTypeImage or OpTypeSampler were treated as
vtn_pointers and objects of type OpTypeSampledImage were a special-use
vtn_sampled_image struct. This commit changes that so that all of those
objects are stored in vtn_ssa_values. Each of images, samplers, and
sampled images, are stored as a scalar or vector nir_ssa_def whose
components are NIR deref values. We now use vtn_type_get_nir_type to
re-resolve those as-needed into GLSL sampler types for NIR.
This simplification has a number of benefits:
1. We can git rid of the rest of our special-cases for handling images
and samplers in function arguments. Now that they're treated as
structs at the glsl_type level, the generic paths can handle images
and samplers.
2. We can now construct composite values containing images and samplers
internally. It's unclear from the SPIR-V spec whether or not this
is allowed and it's not a pattern that GLSLang currently generates
thanks to GLSL rules. However, if we do start seeing SPIR-V that
contains such composites, we should now be able to handle it.
3. SPIR-V OpNull and OpUndef instructions can now create samplers,
images, and sampled images. The NIR generated won't likely be fully
valid but, given a NIR pass to do something sensible, it should be a
thing we can compile.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Thu, 11 Jun 2020 18:29:02 +0000 (13:29 -0500)]
anv,turnip,radv,clover,glspirv: Run nir_copy_prop before nir_opt_deref
We're about to make the SPIR-V -> NIR path generate a bit more complex
SSA chains for certain derefs. This will ensure we don't regress anyone
when we start making vec2's of derefs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Sat, 30 May 2020 01:48:23 +0000 (20:48 -0500)]
spirv: More heavily use vtn_ssa_value in function parameter handling
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Sat, 30 May 2020 02:02:31 +0000 (21:02 -0500)]
spirv: Remove a dead case in function parameter handling
Ever since
31a7476335f911a, we've set something for vtn_type::type for
all pointer types. For logical pointer types, it's uint32_t.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Fri, 29 May 2020 22:57:34 +0000 (17:57 -0500)]
spirv: Add a helper for getting the NIR type of a vtn_type
There are a few cases, atomic counters being one example, where the type
used by vtn_ssa_value is not the same as the type we want NIR to use in
derefs and variables. To solve this, we add a helper which converts
between the types for us. In the next commit, we'll be adding another
major user of this: images and samplers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Fri, 29 May 2020 23:39:30 +0000 (18:39 -0500)]
spirv: Give atomic counters their own variable mode
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Fri, 29 May 2020 21:36:54 +0000 (16:36 -0500)]
spirv: Drop the sampled boolean from vtn_type
It was set but never used. We always check the glsl_type instead.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Fri, 29 May 2020 21:10:28 +0000 (16:10 -0500)]
spirv: Add better checks for SSA value types
Primarily, we check for two things:
1. That we only ever add SSA values via vtn_push_ssa_value and
vtn_copy_value.
2. That the type of the SSA value matches the SPIR-V destination type.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Sat, 30 May 2020 17:27:54 +0000 (12:27 -0500)]
spirv: Hand-roll fewer vtn_ssa_value creations
Previously, we created our vtn_ssa_value in _vtn_variable_load_store
manually as we did the recursive load/store. Instead, we now create the
SSA value before calling into the recursive function. This is a tiny
bit less efficient but it removes a case of hand-rolling vtn_ssa_value
creation. For symmetry, we make _vtn_block_load_store assume the value
is already created. Finally, we remove a trivial hand-rolled case in
vtn_composite_extract.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Sat, 30 May 2020 17:23:50 +0000 (12:23 -0500)]
spirv: Simplify vtn_ssa_value creation
For three different functions which create vtn_ssa_values, we had three
completely different implementations. This unifies them all to roughly
the same algorithm. While we're at it, we take advantage of the
nir_build_imm helper to avoid some extra code in vtn_const_ssa_value.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Fri, 29 May 2020 19:40:12 +0000 (14:40 -0500)]
spirv/subgroups: Refactor to use vtn_push_ssa
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Sat, 30 May 2020 16:07:46 +0000 (11:07 -0500)]
spirv/subgroups: Stop incrementing w
The w++ is to handle a differences between the KHR extension and Vulkan
1.1 feature where the Vulkan 1.1 instructions take an scope parameter.
While incrementing w technically works, it's really subtle and very easy
to miss when reading the code.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Fri, 29 May 2020 21:04:02 +0000 (16:04 -0500)]
spirv/glsl450: Use vtn_push_ssa_value
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Fri, 29 May 2020 20:57:42 +0000 (15:57 -0500)]
spirv/alu: Use vtn_push_ssa_value
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Fri, 29 May 2020 20:44:10 +0000 (15:44 -0500)]
spirv: Refactor vtn_push_ssa
We rename it to vtn_push_ssa_value, move it to spirv_to_nir, and remove
the unnecessary type parameter.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Thu, 28 May 2020 23:39:45 +0000 (18:39 -0500)]
spirv: Use the new helpers in OpConvertUToPtr/PtrToU
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Wed, 27 May 2020 23:28:18 +0000 (18:28 -0500)]
spirv: Add a vtn_get_nir_ssa helper
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Wed, 27 May 2020 23:08:20 +0000 (18:08 -0500)]
spirv/amd: Use vtn_push_nir_ssa
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Wed, 27 May 2020 22:49:47 +0000 (17:49 -0500)]
spirv: Add a vtn_push_nir_ssa helper
This makes it easy to write a simple NIR SSA value
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Wed, 27 May 2020 22:55:10 +0000 (17:55 -0500)]
spirv: Rename push_value_pointer to push_pointer
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Wed, 27 May 2020 23:33:47 +0000 (18:33 -0500)]
spirv: Add a helpers for getting types of values
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Fri, 29 May 2020 04:00:21 +0000 (23:00 -0500)]
spirv: Use nir_bany/ball for OpAny/All
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Thu, 28 May 2020 22:14:30 +0000 (17:14 -0500)]
spirv: Clean up OpSignBitSet
For some reason, we were doing a signed shift vectors and an unsigned
shift for scalars. We then plug it into i2b so it should make no
difference whatsoever. The fact that we're doing different things for
vectors vs. scalars is bonkers. Let's simplify the code a bit.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Wed, 27 May 2020 22:41:23 +0000 (17:41 -0500)]
spirv: Fix indentation in vtn_handle_ptr
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Wed, 27 May 2020 21:15:39 +0000 (16:15 -0500)]
spirv: Drop the void *ptr from vtn_value
It isn't being used for anything.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jason Ekstrand [Thu, 28 May 2020 23:32:01 +0000 (18:32 -0500)]
spirv: Simplify our handling of NonUniform
The original implementation of SPV_EXT_descriptor_indexing was extremely
paranoid about the NonUniform qualifier, trying to fetch it from every
possible location and propagate it through access chains etc. However,
the Vulkan spec is quite nice to us on this and has very strict rules
for where the NonUniform decoration has to be placed. For image and
texture operations, we can search for the decoration on the spot when we
process the image or texture op. For pointers, we continue putting it
on the pointer but we don't bother trying to do anything silly like
propagate it through casts.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
Jesse Natalie [Tue, 23 Jun 2020 12:44:11 +0000 (05:44 -0700)]
nir/vtn: Add support for 8 and 16 vector ball/bany
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6030>
Jesse Natalie [Mon, 22 Jun 2020 23:48:43 +0000 (16:48 -0700)]
nir: Support 8 and 16 component vectors for reduceable intrinsics
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6030>
Jesse Natalie [Mon, 22 Jun 2020 18:49:41 +0000 (11:49 -0700)]
nir: Support algebraic opts on vectors larger than 4
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6030>
Jesse Natalie [Mon, 1 Jun 2020 22:46:03 +0000 (15:46 -0700)]
nir: Support vec8/vec16 in nir_lower_bit_size
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6030>
Rob Clark [Thu, 23 Jul 2020 20:02:08 +0000 (13:02 -0700)]
freedreno: sync registers from envytools
Pull in a bunch of fixes and updates.. mostly using varset correctly,
and fixes for implicit bools.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6052>