Danylo Piliaiev [Mon, 15 Feb 2021 11:14:56 +0000 (13:14 +0200)]
turnip,freedreno/a6xx: tell hw the size of shared mem used by CS
Before, we only used 2k of shared memory.
It was found that 5 lower bits of SP_CS_UNKNOWN_A9B1 do control
the available size of shared memory for compute shaders, with
AVAILABLE_SIZE = (SP_CS_UNKNOWN_A9B1_SHARED_SIZE + 1) * 1k
up to 32k. And SP_CS_UNKNOWN_A9B1_SHARED_SIZE being zero enables
all 32k of shared memory.
Fixes tests:
dEQP-VK.rasterization.line_continuity.line-strip
dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_local.buffer.guard_nonlocal.workgroup.comp
dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_nonlocal.workgroup.guard_local.buffer.comp
dEQP-VK.memory_model.write_after_read.core11.u32.coherent.fence_fence.atomicwrite.workgroup.payload_local.image.guard_nonlocal.workgroup.comp
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9157>
Eric Anholt [Thu, 18 Feb 2021 19:12:56 +0000 (11:12 -0800)]
ci: Move specific driver testing to separate files in separate dirs.
The top-level gitlab-ci.yml is big and unwieldy when one wants to work on
CI for a single driver. Move the drivers to separate include files for
ease of finding all your driver's tests, and also to pave the way for work
on a single driver's CI to not retest all other drivers.
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9139>
Jesse Natalie [Fri, 19 Feb 2021 16:09:08 +0000 (08:09 -0800)]
microsoft/clc: Add a test with an unused kernel arg
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9160>
Jesse Natalie [Fri, 19 Feb 2021 16:04:23 +0000 (08:04 -0800)]
microsoft/clc: Re-order dead variable removal after uniform vars_to_explicit_types
Since vars_to_explicit_types is now where driver_location/offset is filled out,
we need to make sure that we still have all app-provided kernel arg variables
at that point in time so they all get assigned unique offsets. That means
that we can't have removed dead uniforms yet, which also means we can't have
filled out metadata for inline samplers (since usage of them generates tons
of duplicate uniforms).
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9160>
Danylo Piliaiev [Fri, 19 Feb 2021 14:41:33 +0000 (16:41 +0200)]
turnip: consider tile_max_h when calculating tiling config
Otherwise we may get a tile height exceeding the maximum.
Fixes tests:
dEQP-VK.pipeline.render_to_image.core.2d.huge.height.r8g8b8a8_unorm
dEQP-VK.pipeline.render_to_image.core.2d.huge.height.r8g8b8a8_unorm_d16_unorm
dEQP-VK.pipeline.render_to_image.core.2d.huge.height.r8g8b8a8_unorm_s8_uint
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9159>
Adam Jackson [Thu, 18 Feb 2021 15:39:41 +0000 (10:39 -0500)]
xlib: Fix build regression since
99e25d183d9
Just named the variable wrong. Can't really fault anyone for breaking a
target we don't build in CI...
Fixes:
99e25d183d9 mesa: optimize set_varying_vp_inputs by precomputing the conditions
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9132>
Yogesh Mohan Marimuthu [Wed, 3 Feb 2021 08:40:11 +0000 (14:10 +0530)]
ac/rgp: set gfxip in elf_hdr.e_flags
This patch will set the gfxip into elf_hdr.e_flags by reading data
from struct rad_info->chip_class instead of hardcoding.
v2: remove unused #define
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
Yogesh Mohan Marimuthu [Wed, 27 Jan 2021 10:54:48 +0000 (16:24 +0530)]
ac/rgp: dump co, col, pso database to rgp profile file
This patch dumps code object, code object loader events, pso correlation
databses to given rgp profile file. The data to dump is taken from
struct rgp_code_object, struct rgp_loader_events and
struct rgp_pso_correlation.
v2: fix sqtt_file structure name to match existing names in file.
fix checking wrong variable for pso correlation record_count.
remove freeing rgp database here.
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
Yogesh Mohan Marimuthu [Fri, 29 Jan 2021 10:28:45 +0000 (15:58 +0530)]
ac/rgp,radeonsi,radv: pass struct thread_trace_data to ac_sqtt_dump_data()
struct thread_trace_data holds struct rgp_code_object, struct
rgp_loader_events, struct rgp_pso_correlation data. This data is required
in function ac_sqtt_dump_data(). This patch makes the code changes
required to pass struct thread_trace_data to function ac_sqtt_dump_data().
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
Yogesh Mohan Marimuthu [Fri, 29 Jan 2021 09:41:42 +0000 (15:11 +0530)]
ac/rgp: expose data structure to populate co, col, pso database
This patch exposes struct rgp_code_object, struct rgp_loader_events and
struct rgp_pso_correlation into struct ac_thread_trace_data. Other modules
can fill in this data structure. The code object, code object loader events,
pso correlation database is written to rgp profile file using data from
these data structure exposed by this patch.
v2: move the data structures to struct ac_thread_trace_data
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
Yogesh Mohan Marimuthu [Wed, 27 Jan 2021 10:32:22 +0000 (16:02 +0530)]
ac/rgp: add helper function to write rgp elf oject
This patch adds helper function ac_rgp_write_elf_object() which
creates elf object from struct rgp_code_object_record. The elf
object is written to given output rgp profile file.
v2: for newly added files, change copyright year from 2020 to 2021
v3: fix 32bit compilation failure
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
Yogesh Mohan Marimuthu [Wed, 27 Jan 2021 10:07:03 +0000 (15:37 +0530)]
ac/rgp: add rgp co, col, pso data structures
This patch adds data structures used to collect data for code object,
code object loader event and pso correlation databases present in
a rgp profile.
v2: fix code review comments from Pierre-Eric
v3: Make loader_event_type into enum
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
Yogesh Mohan Marimuthu [Wed, 27 Jan 2021 09:36:59 +0000 (15:06 +0530)]
ac/rgp: add ac_msgpack.h/c
This patch adds functions to create msgpack formatted data.
For msgpack specification refer to
github.com/msgpack/msgpack/blob/master/spec.md
This patch only adds formats from msgpac specification that
are required for rgp profile data.
v2: for newly added files, change copyright year from 2020 to 2021
Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
Michel Zou [Thu, 18 Feb 2021 16:20:22 +0000 (17:20 +0100)]
util: fix gcc vsnprintf overflow
Anything higher than INT_MAX results in overflow although the parameter is declared as size_t.
Worse, with (size_t)-1 it is silently ignored and Woverflow is not emitted.
Closes #4226
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9134>
Danylo Piliaiev [Thu, 18 Feb 2021 17:15:14 +0000 (19:15 +0200)]
turnip: consider HW limit on number of views when apply multipos opt
Blob doesn't apply multipos optimization starting from 11 views
even on a650, however in practice, with the limit of 16 views,
tests pass on a640/a650 and fail on a630.
Fixes tests:
dEQP-VK.multiview.draw_indexed.max_multi_view_view_count
dEQP-VK.multiview.input_attachments.max_multi_view_view_count
dEQP-VK.multiview.masks.max_multi_view_view_count
dEQP-VK.multiview.multisample.max_multi_view_view_count
dEQP-VK.multiview.queries.max_multi_view_view_count
dEQP-VK.multiview.renderpass2.index.fragment_shader.max_multi_view_view_count
dEQP-VK.multiview.secondary_cmd_buffer.max_multi_view_view_count
Fixes:
8d275778 ("tu: Enable multi-position output")
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9135>
Samuel Pitoiset [Tue, 9 Feb 2021 13:07:45 +0000 (14:07 +0100)]
radv: emit the trap handler registers earlier
Directly into the GFX init IB.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
Samuel Pitoiset [Tue, 9 Feb 2021 12:47:28 +0000 (13:47 +0100)]
radv: make the TMA/TBA BOs resident buffers
They are always used if the trap handler is enabled.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
Samuel Pitoiset [Tue, 9 Feb 2021 10:51:38 +0000 (11:51 +0100)]
radv: make the trace BO a resident buffer
It's always used if RADV_DEBUG=hang is set.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
Samuel Pitoiset [Tue, 9 Feb 2021 10:50:52 +0000 (11:50 +0100)]
radv: make the border color BO a resident buffer
It's always used if the feature is enabled.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9076>
Michel Zou [Thu, 18 Feb 2021 08:19:30 +0000 (09:19 +0100)]
zink: fix win32 build
Fixes:
57575627,
c4cc3d91
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9126>
Samuel Pitoiset [Thu, 18 Feb 2021 22:34:41 +0000 (23:34 +0100)]
radv: set correct value for OFFCHIP_BUFFERING on GFX10+
Higher values break tessellation. I was only able to reproduce this
by switching back/from AMDVLK which was really weird...
According to Marek (
1c6eca23fdd8), it looks like it's related to
register shadowing and PAL enables it, that probably explains a bit.
Copied from PAL and RadeonSI.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4207
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2498
Fixes:
74d69299d16 ("radv/gfx10: double the number of tessellation offchip buffers per SE")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9141>
Vinson Lee [Sun, 14 Feb 2021 06:20:39 +0000 (22:20 -0800)]
nv50/ir: Initialize Instruction members.
Fix defects reported by Coverity Scan.
uninit_member: Non-static class member serial is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member sched is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member bb is not initialized in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9037>
Mike Blumenkrantz [Tue, 29 Sep 2020 19:25:47 +0000 (15:25 -0400)]
zink: use vkGetFenceStatus when we're obviously checking for status
a timeout of 0 indicates that gallium wants to know whether a fence is done,
so we can use a simpler call here
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9154>
Mike Blumenkrantz [Fri, 4 Sep 2020 16:01:50 +0000 (12:01 -0400)]
zink: break out even more of zink_blit state saving
for reuse in upcoming clear refactoring
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9150>
Jonathan Marek [Mon, 11 Jan 2021 19:56:48 +0000 (14:56 -0500)]
freedreno/a6xx: set SP_PERFCTR_ENABLE in computerator
Set this register to have properly working SP perfcntrs in computerator.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
Jonathan Marek [Mon, 11 Jan 2021 19:47:38 +0000 (14:47 -0500)]
freedreno/a6xx: update some registers
Some sorting, adding unknown fields, documenting some fields, etc.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
Jonathan Marek [Mon, 11 Jan 2021 18:48:24 +0000 (13:48 -0500)]
freedreno/a6xx: always use reg64 for address registers (no LO/HI)
Reduce noise in a6xx.xml by removing LO/HI versions of address registers.
Also fix type="address" registers in register packing (use bit size instead
of checking for "waddress" to use qword)
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
Jonathan Marek [Mon, 11 Jan 2021 18:00:24 +0000 (13:00 -0500)]
freedreno/a6xx: update perfcntr registers (declare as arrays)
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
Jonathan Marek [Mon, 11 Jan 2021 17:49:57 +0000 (12:49 -0500)]
freedreno/registers: use macro instead of inline function for array regs
This is to allow use in places where an inline function isn't allowed,
such as a static initializer.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
Connor Abbott [Thu, 10 Sep 2020 12:02:12 +0000 (14:02 +0200)]
freedreno/a6xx: Document threadsize-related fields
We'll need to use if we want to start playing around with thread sizes.
At least now we know what the actual threadsize is.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8423>
Mike Blumenkrantz [Tue, 8 Sep 2020 17:00:49 +0000 (13:00 -0400)]
zink: just end the current renderpass in zink_batch_no_rp()
since we aren't (currently) parallelizing and now have barriers, we don't need to cycle
the batch here, which lets us avoid submitting too-small command buffers
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9148>
Mike Blumenkrantz [Wed, 9 Sep 2020 19:14:55 +0000 (15:14 -0400)]
zink: break out buffer copying into util function with batch param
if we want to explicitly specify compute batch, we need to be able
to pass that along
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9147>
Mike Blumenkrantz [Wed, 9 Sep 2020 18:36:47 +0000 (14:36 -0400)]
zink: add buffer barriers for resource_copy_region
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9147>
Mike Blumenkrantz [Wed, 16 Sep 2020 17:18:15 +0000 (13:18 -0400)]
zink: just call context destructor on creation fail
this more reliably handles the failure case
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9149>
Mike Blumenkrantz [Fri, 19 Feb 2021 03:03:58 +0000 (22:03 -0500)]
zink: update relnotes
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9151>
Mike Blumenkrantz [Fri, 19 Feb 2021 03:03:39 +0000 (22:03 -0500)]
zink: tag some missing ES features
we're only missing advanced blend
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9151>
Mike Blumenkrantz [Wed, 17 Feb 2021 03:20:08 +0000 (22:20 -0500)]
zink: fix surface creation for cube slices
if first==last layer, this should be a 2D slice of the cube
else if this isn't all the layers, this should be an array of slices
fixes a bunch of spec@arb_shader_image_size@builtin cases
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9080>
Dave Airlie [Thu, 18 Feb 2021 01:19:16 +0000 (17:19 -0800)]
lavapipe: use os_time for timing related things
drop the use of the Linux code.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
Dave Airlie [Thu, 18 Feb 2021 01:10:28 +0000 (17:10 -0800)]
lavapipe: make OPT macro MSVC compatible
This macros is ugly, make it uglier but msvc compatible.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
Dave Airlie [Thu, 18 Feb 2021 01:09:00 +0000 (17:09 -0800)]
lavepipe: some misc msvc fixes
drop some headers, get rid of printflike, drop the __builtin_ffs
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
Dave Airlie [Thu, 18 Feb 2021 01:07:54 +0000 (17:07 -0800)]
lavapipe: use msvc compatible 0 init
trivial changes
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
Dave Airlie [Thu, 18 Feb 2021 01:06:39 +0000 (17:06 -0800)]
lavapipe: fix some void ptr arithmetic
msvc disagrees with it, and they are trivial to fix.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
Dave Airlie [Thu, 18 Feb 2021 01:05:07 +0000 (17:05 -0800)]
lavapipe/meson: drop megadrivers build req
This just seems to be cut-n-paste, so lose it.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
Dave Airlie [Fri, 19 Feb 2021 00:25:13 +0000 (10:25 +1000)]
lavapipe: implement physical device group enumeration
This was missing when I added physical device groups, and
was causing crashes on win32.
Fixes:
6af87193c ("lavapipe: add basic vulkan device group support.")
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9120>
Mike Blumenkrantz [Thu, 10 Sep 2020 18:45:04 +0000 (14:45 -0400)]
zink: be more explicit with image barriers for copy operations
we know the access and pipeline stage here, so we can pass those along
to ensure synchronization
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Tue, 8 Sep 2020 14:08:45 +0000 (10:08 -0400)]
zink: add general zink_resource_barrier() wrapper
this simplifies a bit of code where we may want to be throwing in barriers
regardless of the resource type
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Tue, 8 Sep 2020 14:05:43 +0000 (10:05 -0400)]
zink: zink_resource_barrier -> zink_resource_image_barrier
need this namespace
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Mon, 7 Sep 2020 14:40:21 +0000 (10:40 -0400)]
zink: improve barrier usage for clear functions
ensure that we're always using the right layout for images that are
being cleared
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Mon, 7 Sep 2020 14:39:43 +0000 (10:39 -0400)]
zink: add batch references for resources in clear functions
need to make sure we track these writes
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Mon, 7 Sep 2020 14:35:20 +0000 (10:35 -0400)]
zink: add access info for update_descriptor image barriers
this forces resources to transition where necessary to ensure that
data from previous ops have been made available (e.g., clear -> shader image)
we also switch needs_barrier over to a more accurate signature here since we
can now do it without breaking update_descriptors()
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Mon, 7 Sep 2020 14:34:24 +0000 (10:34 -0400)]
zink: add access param for image resource barriers
we need more detail on some of these to ensure proper synchronization
and availability/visibility of image data between commands/stages
the signature for needs_barrier() is still funky here to avoid breaking
usage in update_descriptors()
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Thu, 20 Aug 2020 13:53:54 +0000 (09:53 -0400)]
zink: add barriers for index and draw param buffers
need to ensure synchronization here too
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 18:50:05 +0000 (14:50 -0400)]
zink: assert batch is not in a renderpass when emitting pipeline barrier
this is only valid for subpasses which have self-dependencies set, and we
don't currently do that
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 18:45:09 +0000 (14:45 -0400)]
zink: take struct zink_batch param instead of direct cmdbuf in barrier helpers
this is weird and prevents us from verifying batch states
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 19:46:08 +0000 (15:46 -0400)]
zink: combine resource barriers where possible during update_descriptors
if we have a resource in the same state for multiple shader stages, we can
emit a single barrier for all the stage bits instead of multiple barriers
this also helps with detecting potentially redundant barriers when we go to
emit them later on
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 15:47:08 +0000 (11:47 -0400)]
zink: break out barrier transitioning in update_descriptors
this hopefully makes the code a little more readable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 19:44:37 +0000 (15:44 -0400)]
zink: avoid emitting unnecessary pipeline barriers during update_descriptors
if the current state of the resource matches the desired state, we don't need
to emit anything, and we can potentially avoid ending a renderpass
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 19:41:41 +0000 (15:41 -0400)]
zink: add generic wrapper for checking whether a resource needs a barrier
handy to not need to check ahead of time
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 15:46:31 +0000 (11:46 -0400)]
zink: use define for max descriptor array size
this was getting a bit unwieldy
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 15:28:58 +0000 (11:28 -0400)]
zink: add helper for image resource barriers and avoid unnecessary barriers
same as buffer barriers now
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 15:27:41 +0000 (11:27 -0400)]
zink: add a VkPipelineStageFlags param to zink_resource_barrier()
this matches the buffer variant in its flexibility now
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 15:14:46 +0000 (11:14 -0400)]
zink: remove aspect param from zink_resource_barrier
we have a helper function for this now that we can reuse
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 14:49:58 +0000 (10:49 -0400)]
zink: rework xfb barrier transitions when reusing as vertex inputs
if we have proper barrier usage to start with, then we don't need to do
any kind of weird flushing upon changing vertex inputs and can also remove
a flag from zink_resource
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Wed, 19 Aug 2020 14:40:58 +0000 (10:40 -0400)]
zink: rework xfb counter resource barriers
using the new helper functions, we can now more accurately determine
exactly which barriers we need/want and avoid setting unnecessary barriers
or ending a renderpass early
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Mon, 17 Aug 2020 20:10:03 +0000 (16:10 -0400)]
zink: set buffer resource barriers for descriptor resources in update_descriptors()
need to make sure these are properly synchronized
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Mike Blumenkrantz [Mon, 17 Aug 2020 20:08:02 +0000 (16:08 -0400)]
zink: add helper function for getting pipeline stage from shader stage
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8945>
Alyssa Rosenzweig [Thu, 18 Feb 2021 16:01:19 +0000 (11:01 -0500)]
panfrost/ci: Mark flaky test
I cannot reproduce the issue in local runs.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 18:34:17 +0000 (13:34 -0500)]
docs/features: Mark atomics/images done on Bifrost
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 16:54:18 +0000 (11:54 -0500)]
panfrost: Advertise FRAMEBUFFER_NO_ATTACHMENTS
Passes dEQP-GLES31.functional.fbo.no_attachments.*, it doesn't look like
we need to do anything special.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 18:49:04 +0000 (13:49 -0500)]
panfrost: Comment on state of ARB_shader_clock
Pending on kernel work.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 02:16:26 +0000 (21:16 -0500)]
pan/bi: Use explicit move even for RT#0 of MRT
Otherwise we get a bad RA if RT 0 = RT 3 (for example), fixes
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.const_literal.fragment.sampler2d
Fixes:
a6f1500bedd ("pan/bi: Workaround BLEND precolour with explicit moves")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 01:40:42 +0000 (20:40 -0500)]
pan/bi: Allow dynamically uniform tex indices
Passes the relevant tests of
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.*, a few
failures that seem to relate to MRT instead of this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 00:55:12 +0000 (19:55 -0500)]
pan/bi: Implement interpolateAtOffset
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 00:55:00 +0000 (19:55 -0500)]
pan/bi: Add imm_f16 helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 23:58:22 +0000 (18:58 -0500)]
pan/bi: Implement interpolateAtSample
Passes dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.*
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 23:45:46 +0000 (18:45 -0500)]
pan/bi: Preload sample ID for sample shading
Used in the LD_VAR_IMM. Wondering if preload requirements shouldn't
instead be pushed from the compiler based on actual usage instead of
guessing from the NIR...
Fixes dEQP-GLES31.functional.shaders.multisample_interpolation.sample_qualifier.*
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 23:11:45 +0000 (18:11 -0500)]
pan/bi: Elucidate slot 6/7 operation
Used to order fragments. With that clarified it's clear that we need to
wait on slot 7 for LD_TILE too (outside the limited context of a blend
shader).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 23:12:30 +0000 (18:12 -0500)]
pan/bi: Flesh out LD_TILE emit
Needs to support non-blend shader operation (conversion descriptor
sourced from a sysval), as well as MRT. Fixes fbfetch on Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 23:19:29 +0000 (18:19 -0500)]
pan/bi: Fix blend shaders using LD_TILE with MRT
Don't hardcode the RT to 0. Affects ES3.0 which already exposes MRT --
despite no dEQP coverage of this particular corner case, apps could hit
this in the wild on 21.0. Fixes
dEQP-GLES31.functional.draw_buffers_indexed.overwrite_indexed.common_blend_func_buffer_blend_func
Fixes:
c7e1ef7c0c5 ("panfrost: Advertise ES3.0 on Bifrost")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 18:48:57 +0000 (13:48 -0500)]
pan/bi: Implement shader_clock intrinsic
Trivial.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 14:54:19 +0000 (09:54 -0500)]
pan/bi: Implement image_atomic_comp_swap
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 14:50:39 +0000 (09:50 -0500)]
pan/bi: Implement image_atomic_exchange
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Icecream95 [Mon, 28 Dec 2020 12:05:05 +0000 (01:05 +1300)]
pan/bi: nir_intrinsic_image_size support
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Icecream95 [Sat, 26 Dec 2020 04:09:07 +0000 (17:09 +1300)]
pan/bi: Implement image load/store
v2 (Alyssa): Split out functions, support 3D/array
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Thu, 18 Feb 2021 14:49:57 +0000 (09:49 -0500)]
pan/bi: Materialize *DTSEL_IMM in the scheduler
We want to be able to set a descriptor table and have the instruction
pair "magically" come to be. To do so, we adjust the definition of
DTSEL_IMM (deviating a bit from the architectural definition but in
practice simplifying disassembly immensely) and add a scheduler
lowering. This ensures DTSEL is always paired correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Icecream95 [Fri, 12 Feb 2021 10:37:08 +0000 (23:37 +1300)]
pan/bi: Remove check for first_ubo_is_default_ubo
It won't be set for OpenCL.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 16:02:24 +0000 (11:02 -0500)]
pan/bi: Handle computational atomics
All the same formula: calculate an address, emit a pseudoinstruction for
the atomic, emit a postprocess that can be DCE'd if not needed.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 18:51:55 +0000 (13:51 -0500)]
pan/bi: Add ATOM_C1 promotion check
Optimizes atomic counters.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 13:18:40 +0000 (08:18 -0500)]
pan/bi: Extract bi_atom_opc from NIR intrinsic
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 16:01:57 +0000 (11:01 -0500)]
pan/bi: Lower atomic pseudo-instructions
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 16:00:43 +0000 (11:00 -0500)]
pan/bi: Add 32-bit atomic pseudoinstruction
To enable scheduler lowering to an ATOM_CX pair.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Icecream95 <ixn@disroot.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 13:48:34 +0000 (08:48 -0500)]
pan/bi: Add SEG_ADD.i64 pseudoinstruction
Expands to a pair *SEG_ADD/+SEG_ADD, which is used for lowering shared
atomics.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 19:45:44 +0000 (14:45 -0500)]
pan/bi: Allow @rNULL with tied operands
Will enable DCE of atomics.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 04:38:52 +0000 (23:38 -0500)]
pan/bi: Don't read alpha out of bounds
RT#0 may not have alpha, do something safe instead of risking issues
with RA later.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 18:47:09 +0000 (13:47 -0500)]
pan/bi: Fix LD_GCLK staging count
64-bit result
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 19:13:30 +0000 (14:13 -0500)]
pan/bi: Don't inline 64-bit constants
Will drop the upper bits incorrectly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Tue, 16 Feb 2021 15:46:19 +0000 (10:46 -0500)]
pan/bi: Fix RA of node 0 again
Botched rebase.
Fixes:
c578ca73939 ("pan/bi: Add interference per clause")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 04:02:11 +0000 (23:02 -0500)]
panfrost: Remove useless check
Already checked in format_supported (only difference being cube map
arrays but the extension isn't advertised yet anyway due to missing
geometry shaders.)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 02:28:34 +0000 (21:28 -0500)]
panfrost: Set border colour on Bifrost sampler
Passes dEQP-GLES31.functional.texture.border_clamp.*
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
Alyssa Rosenzweig [Wed, 17 Feb 2021 03:47:01 +0000 (22:47 -0500)]
panfrost: Take panfrost_dev for AFBC selection
This appears to be architecture dependent.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>