Erik Faye-Lund [Tue, 28 May 2019 11:34:34 +0000 (13:34 +0200)]
docs: use code instead of tt-tag
The tt-tag has been removed from HTML5, so let's normalize this to
code-tags intead. This just makes things a bit more consistent, as we've
mixed these left and right so far anyway.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 28 May 2019 11:20:29 +0000 (13:20 +0200)]
docs: use paragraph instead of double newlines
This is a bit more semantically clean in HTML, and makes us keep
content and presentation a bit more separated.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Mon, 3 Jun 2019 17:07:50 +0000 (19:07 +0200)]
docs: use verbatim .plan quote
This quote is now verbatim, as archived here:
https://github.com/ESWAT/john-carmack-plan-archive/blob/master/by_year/johnc_plan_1999.txt
This makes it look a bit more consistent with the following news-entry,
and makes things IMO a bit more clear.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Alyssa Rosenzweig [Wed, 5 Jun 2019 18:51:16 +0000 (18:51 +0000)]
panfrost/midgard: Verify SSA claims when pipelining
The pipeline register creation algorithm is only valid for SSA indices;
NIR registers and such cannot be pipelined without more complex
analysis. However, there are the ocassional class of "liars" -- indices
that claim to be SSA but are not. This occurs in the blend shader
prologue, for example. Detect this and just bail quietly for now.
Eventually we need to rewrite the blend shader prologue to occur in NIR
anyway (which would mitigate the issue), but that's more involved and
depends on a better understanding of pixel formats in blend shaders (for
non-RGBA8888/UNORM cases).
Fixes some blend shader regressions.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 5 Jun 2019 18:26:29 +0000 (18:26 +0000)]
panfrost/midgard: Don't assign var locations ourselves
This piece of code was cargo-culted from the ir3 standalone compiler and
made sense when we were a standalone compiler ourselves. Unfortunately,
for the online compiler, mesa/st *already handles this for us* and if we
duplicate it here, we're duplicating it *incorrectly*. So just delete
these lines and fix a heck of a lot of tests.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Tue, 14 May 2019 15:28:17 +0000 (17:28 +0200)]
panfrost: Reload framebuffer contents if there's no clear
If by flush time the client hasn't submitted a clear, add jobs for
reloading the framebuffer contents as the first draw in the frame.
This is required by programs such as Weston which don't do clears and
rely on the previous contents of the framebuffer being there.
Reloading the whole framebuffer on every frame without regards to what
is needed or what is going to be covered is very inefficient, but future
work will introduce support for damage regions and partial updates so we
know what needs to be actually reloaded.
Fixes quite a few tests in dEQP-EGL.functional.buffer_age.*.
[Alyssa: The context is that tilers do an implicit glClear() on every
frame, whether you asked them to or not. If you want a clear, this is
very efficient. But if you don't, you have to explicitly blit the
backbuffer back into tile memory, accomplished by a dummy texturing
draw. This patch generates that draw via u_blitter, although we could do
a bit better ourselves by eliding the vertex job. This fixes "black
rectangles in Weston/sway" as well as "video not displaying when UI
visible in mpv"]
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 23 May 2019 03:01:32 +0000 (03:01 +0000)]
panfrost: Don't flip scanout
The mesa/st flips the viewport, so we respect that rather than
trying to flip the framebuffer itself and ignoring the viewport and
using a messy heuristic.
However, this brings an underlying disagreement about the interpretation
of winding order to light. The blob uses a different strategy than Mesa
for handling viewport Y flipping, so the meanings of the winding order
bit are flipped for it. To keep things clean on our end, we rename to
explicitly use Gallium (rather than flipped OpenGL) conventions.
Fixes upside-down Xwayland/egl windows.
v2: Adjust lowering configuration to correctly flip gl_PointCoord.y and
gl_FragCoord.y. v1 was R-b'd by Tomeu, but then retracted due to these
regressions which are not fixed.
Suggested-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Sort-of-reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Timur Kristóf [Fri, 31 May 2019 16:43:20 +0000 (18:43 +0200)]
st/nine: Use tgsi_to_nir when preferred IR is NIR.
This patch allows nine to read the preferred IR from pipe caps and use
NIR when that is preferred by the driver, by calling tgsi_to_nir. Also
adds some debug options that allow overriding it.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Lionel Landwerlin [Wed, 5 Jun 2019 08:20:23 +0000 (11:20 +0300)]
intel/perf: improve dynamic loading config detection
We're currently trying to detect dynamic loading config support by
trying to remove to test config (hard coded in the i915 driver) and
checking we get ENOENT.
This can fail if the test config was updated in Mesa but not yet in
i915.
A better way to do this is to pick an invalid ID and check for ENOENT.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 4 Jun 2019 23:23:17 +0000 (18:23 -0500)]
intel/nir: Take nir_shader*s in brw_nir_link_shaders
Since NIR_PASS no longer swaps out the NIR pointer when NIR_TEST_* is
enabled, we can just take a single pointer and not a pointer to pointer.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 4 Jun 2019 23:19:06 +0000 (18:19 -0500)]
intel/nir: Stop returning the shader from helpers
Now that NIR_TEST_* doesn't swap the shader out from under us, it's
sufficient to just modify the shader rather than having to return in
case we're testing serialization or cloning.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 4 Jun 2019 22:50:22 +0000 (17:50 -0500)]
nir: Don't replace the nir_shader when NIR_TEST_SERIALIZE=1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108957
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Jason Ekstrand [Tue, 4 Jun 2019 22:48:33 +0000 (17:48 -0500)]
nir: Don't replace the nir_shader when NIR_TEST_CLONE=1
Instead, we add a new helper which stomps one nir_shader and replaces it
with another. The new helper effectively just changes which pointer
gets used for the base nir_shader. It should be 99% as good at testing
cloning but without requiring that everything handle having the shader
swapped out from under it constantly.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108957
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Caio Marcelo de Oliveira Filho [Wed, 5 Jun 2019 05:55:13 +0000 (22:55 -0700)]
iris: Only recompile CS when needed
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Lionel Landwerlin [Wed, 5 Jun 2019 08:49:06 +0000 (11:49 +0300)]
intel/perf: fix EuThreadsCount value in performance equations
EuThreadsCount is supposed to be the number of threads per EU, not the
total number of threads in the whole device.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
1fc7b951278428 ("i965: Add Gen8+ INTEL_performance_query support")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mark Janes [Wed, 5 Jun 2019 17:49:32 +0000 (10:49 -0700)]
intel/tools: use C99 print conversion specifier for 32 bit builds
Fixes formatting errors for 32 bit compilations, eg:
error: format ‘%lx’ expects argument of type ‘long unsigned int’,
but argument 5 has type ‘uint64_t’ {aka ‘long long unsigned int’}
[-Werror=format=]
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Samuel Pitoiset [Mon, 20 May 2019 08:28:03 +0000 (10:28 +0200)]
radv: use only one descriptor in the fmask expand pass
This removes one useless SMEM load operations which pointed to
the same descriptor anyway.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 20 May 2019 08:28:02 +0000 (10:28 +0200)]
radv: set ACCESS_NON_READABLE on the fmask expand pass output image
The driver will emit GLC=1.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 20 May 2019 08:28:01 +0000 (10:28 +0200)]
radv: remove one useless image type in the fmask expand shader
Both input and output images use the same type.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Kristian H. Kristensen [Tue, 4 Jun 2019 22:15:40 +0000 (15:15 -0700)]
freedreno/ir3: Extend debug helpers to support TCS/TES/GS
Reviewed-by: Rob Clark <robdclark@gmail.com>
Kristian H. Kristensen [Mon, 3 Jun 2019 21:25:39 +0000 (14:25 -0700)]
freedreno/a6xx: Use VALIDREG in next_regid() helper
Reviewed-by: Rob Clark <robdclark@gmail.com>
Kristian H. Kristensen [Tue, 4 Jun 2019 20:38:33 +0000 (13:38 -0700)]
freedreno/a6xx: Remove dead code from a5xx
Reviewed-by: Rob Clark <robdclark@gmail.com>
Kristian H. Kristensen [Mon, 3 Jun 2019 20:58:11 +0000 (13:58 -0700)]
freedreno/ir3: Generalize ir3_shader_disasm()
Use a helper function to get the sysval/attribute/varying/output name
and make the disam debug output independent of shader stage.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Alyssa Rosenzweig [Wed, 5 Jun 2019 14:48:57 +0000 (14:48 +0000)]
panfrost/midgard: Always break up fragment writeout
In a fragment shader, r0 is written out with a special branch sequence.
r0 is not a real register here, but essentially a pipeline register --
as such, it needs to be written out in full and on time, with hanging
dependencies in the bundle. Otherwise, we break up the bundle, which
costs an extra ALU cycle and adds a move.
When the scheduler ran last thing, we could do this analysis within the
scheduler. Now that RA can run after scheduling, that's no longer valid,
so we remove the analysis and always break it up (at a performance
penalty). Future work can add a post-RA/post-schedule pass to merge
writeout blocks if possible. It's a bit of a low-priority next to fixing
conformance regressions, of course.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 5 Jun 2019 14:33:42 +0000 (14:33 +0000)]
panfrost/midgard: Fix cubemap regression
Fixes:
2d9802233 ("panfrost/midgard: Extend RA to non-vec4 sources")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Deepak Rawat [Wed, 5 Jun 2019 17:46:47 +0000 (10:46 -0700)]
winsys/drm: Fix out of scope variable usage
In this particular instance, struct member were used outside of the
block where it was defined. Fix this by moving the definition outside of
block.
Signed-off-by: Deepak Rawat <drawat@vmware.com>
Fixes:
569f83898768 ("winsys/svga: Add support for new surface ioctl, multisample pattern")
Reviewed-by: Brian Paul <brianp@vmware.com>
Alyssa Rosenzweig [Wed, 5 Jun 2019 15:12:58 +0000 (15:12 +0000)]
panfrost/midgard: Lower integer division
We use the shared nir_lower_idiv pass to lower integer division, fixing
144 dEQP tests. This pass was not applied in the past due to breakage
from iabs fixed earlier in the series.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 5 Jun 2019 15:24:51 +0000 (15:24 +0000)]
panfrost/midgard: Fix 1-arg ALU memory corruption
Certain ops that only take one argument have an imaginary "zero"
constant for their second argument. For instance, conversions:
i2f [dest], [source], #0
Memory corruption meant that #0 was instead random noise. For some ops,
that doesn't matter (manifested as abnormally large code size and poor
scheduling due to extra constants in random places). But for others,
where a 1-op is emulated by a 2-op with an implicit 0 second argument,
that broke things.
Fixes iabs (emulated by iabsdiff).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 5 Jun 2019 15:18:35 +0000 (15:18 +0000)]
panfrost/midgard: Add a bunch of new ALU ops
These ops are used to accelerate various functions exposed in OpenCL.
This commit only includes the routine additions to the table. They are
not wired through the compiler; rather, they are just here to keep a
reference for the disassembler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-By: Ryan Houdek <Sonicadvance1@gmail.com>
Emil Velikov [Thu, 16 May 2019 17:01:40 +0000 (18:01 +0100)]
egl: add EGL_platform_device support
This new 'platform' is added by default with no guards.
It is effectively a copy of the surfaceless one, with updated function
names and brand new probe function.
Due to the reuse, some of the ifdef HAVE_SURFACELESS_PLATFORM guards
have been dropped.
A worthy mention are the changes in _egFindDisplay, since the original
and dup'd fd are required, we make use of the plat_opt argument.
Note that no hacks for eglGetDisplay are added - the API works only with
the eglGetPlatformDisplay* API.
v2:
- s/_eglCompareDeviceDisplay/_eglSameDeviceDisplay/ (Eric)
- let ^^ return bool (Eric)
- fixup meson build, move files() further up (Eric)
- copy from plat. surfaceless w/o the visual cleanups
- close and free when destroying the dpy
- sprinkle a few _eglDeviceSupports
- split fd handling into separate function
- use directly the render node if no FD is given (Mathias)
v3:
- s/dpy/disp/g
- drop swap_buffers* callbacks
- drop loader_set_logger()
- drop local define
- re-introduce _eglGetDRMDeviceRenderNode()
- EGL_WARN on ForceSoftware with HW device - continue using the HW device
- bail out for "EGL_MESA_device_software" until it's fixed
- wire-up the Android build
v4:
- use new style _eglFindDisplay()
- split hw vs sw code paths
- don't close the internal fd (already handled in FiniDisplay())
- make swrast work (bit hacky bit will do for now)
- Android for real, drop autotools
- Correct HW + LIBGL_ALWAYS_SOFTWARE check
- use the dri2_create_drawable() helper
v5:
- enhance comment around fd checks (Mathias)
- rebase for dri2_init_surface() changes
Cc: Mathias Fröhlich <Mathias.Froehlich@gmx.net>
Acked-by: Marek Olšák <marek.olsak@amd.com> (v4)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov [Thu, 16 May 2019 17:01:39 +0000 (18:01 +0100)]
egl: keep the software device at the end of the list
By default, the user is likely to pick the first device so it should
not be the least performant (aka software) one.
v2: Drop odd comment (Marek)
Suggested-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov [Thu, 16 May 2019 17:01:38 +0000 (18:01 +0100)]
egl/dri: flesh out and use dri2_create_drawable()
Wrap the loader->createNewDrawable() dance into a helper and use it
throughout the codebase.
This addresses a cases like surfaceless (SL) on swrast (SL on kms_swrast
is fine) where we'd attempt using the wrong driver and crash out.
v2: fixup quirky GBM (Mathias)
v3: fixup GBM for real (Marek)
Cc: mesa-stable@lists.freedesktop.org
Cc: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com> (v2)
Signed-off-by: Marek Olšák <marek.olsak@amd.com> (v2)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 16 May 2019 17:01:37 +0000 (18:01 +0100)]
egl: fold X11 attrib handling like other platforms
Since we no longer need special handling for X11, refactor the code to
follow the style used by all other platforms.
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Adam Jackson [Thu, 16 May 2019 17:01:36 +0000 (18:01 +0100)]
egl: remove Options::Platform handling
The full set of attributes is already handled with previous patches.
Thus all this is not dead code.
v2 (Emil) - split from a larger patch.
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Adam Jackson [Thu, 16 May 2019 17:01:35 +0000 (18:01 +0100)]
egl/x11: pick the user requested screen
At the moment the user will pass the screen number via attribs, yet we
would throw that away. Reason being that the int *screen passed to
xcb_connect() is output only.
v2 (Emil):
- split from a larger patch
- use xcb_connect() returned screen, as fallback
- use helper function only as needed
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Adam Jackson [Thu, 16 May 2019 17:01:34 +0000 (18:01 +0100)]
egl: handle the full attrib list in display::options
Earlier spec is vague, although EGL 1.5 makes it clear:
Multiple calls made to eglGetPlatformDisplay with the same
parameters will return the same EGLDisplay handle.
With this commit we store and compare the full attrib list.
v2 (Emil):
- Split into separate patches
- Use EGLBoolean over int masked as such
- Don't return free'd pointed on calloc failure
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov [Thu, 16 May 2019 17:01:33 +0000 (18:01 +0100)]
egl: flesh out a _eglNumAttribs() helper
Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Krzysztof Raszkowski [Fri, 31 May 2019 11:33:32 +0000 (13:33 +0200)]
swr: fix support for GL_ARB_copy_image extension
This commit fix support and adjusts the capabilities
returned by the SWR driver and the documentation
to correctly report the GL_ARB_copy_image extension.
Reviewed-by: Alok Hota <alok.hota@intel.com>
Guido Günther [Mon, 3 Jun 2019 09:12:02 +0000 (11:12 +0200)]
etnaviv: etnaviv_bo_cache_test: Use /dev/dri/renderD128 by default
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Mon, 3 Jun 2019 09:12:02 +0000 (11:12 +0200)]
build: Build etnaviv drm tests
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Mon, 3 Jun 2019 09:12:02 +0000 (11:12 +0200)]
etnaviv: drm tests: Use mesa header locations
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Mon, 3 Jun 2019 09:12:01 +0000 (11:12 +0200)]
etnaviv: Add libdrm tests as of
922d92994267743266024ecceb734ce0ebbca808
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:08 +0000 (14:35 +0200)]
build: Build etnaviv drm
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:08 +0000 (14:35 +0200)]
etnaviv: gallium: Use internal etnaviv_drmif.h
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:08 +0000 (14:35 +0200)]
etnaviv: drm: s/bo_del/_etna_bo_del/
This avoids a conflict with freedreno's bo_del().
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:08 +0000 (14:35 +0200)]
etnaviv: drm: s/table_lock/etna_table_lock/
This avoids a conflict with freedreno's table_lock
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:08 +0000 (14:35 +0200)]
etnaviv: drm: Move uapi header
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:08 +0000 (14:35 +0200)]
etnaviv: drm: Drop excessive debugging in perfmon
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:08 +0000 (14:35 +0200)]
entaviv: drm: Don't use drmMsg()
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:08 +0000 (14:35 +0200)]
etnaviv: drm: Use _mesa_hash_table instead of drmHash
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:06 +0000 (14:35 +0200)]
etnaviv: drm: Use mesa's ARRAY_SIZE
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:06 +0000 (14:35 +0200)]
etnaviv: drm: Use mesa's os_m{un,}map
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:06 +0000 (14:35 +0200)]
etnaviv: drm: Use mesa's atomic definitions
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:06 +0000 (14:35 +0200)]
etnaviv: drm: Drop drm_{public,private}
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:06 +0000 (14:35 +0200)]
etnaviv: drm: Drop inexistent headers
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:06 +0000 (14:35 +0200)]
etnaviv: Add libdrm code as of
922d92994267743266024ecceb734ce0ebbca808
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Guido Günther [Fri, 31 May 2019 12:35:06 +0000 (14:35 +0200)]
etnaviv: untabify
Two driver files had tabs mixed with spaces. Remove the tabs.
Signed-off-by: Guido Günther <guido.gunther@puri.sm>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tomeu Vizoso [Wed, 5 Jun 2019 06:44:05 +0000 (08:44 +0200)]
panfrost: bifrost: Fix format string in disassembler
The compiler configuration was hardened to fail on format warnings and
things stopped building.
Fixes:
c9c1e2610647 ("mesa: prevent common string formatting security issues")
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-By: Ryan Houdek <Sonicadvance1@gmail.com>
Kenneth Graunke [Wed, 5 Jun 2019 05:02:24 +0000 (22:02 -0700)]
iris: Free the buffer when reading from the disk cache.
Alyssa Rosenzweig [Tue, 4 Jun 2019 21:35:47 +0000 (21:35 +0000)]
panfrost/midgard: Don't promote non-SSA to pipeline registers
Fixes:
33800f4612 ("panfrost/midgard: Implement "pipeline register"
prepass")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Eric Anholt [Fri, 17 May 2019 16:55:40 +0000 (09:55 -0700)]
freedreno: Drop invalid scissor optimization.
We do support TF now, so it's no longer valid. Besides, if we want this
optimization, we should probably have mesa/st doing it right for everyone.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Eric Anholt [Wed, 15 May 2019 00:18:40 +0000 (17:18 -0700)]
freedreno: Reuse glsl_get_sampler_coordinate_components().
We have the GLSL type, so we can just ask it how many coordinates there
are. The GLSL function already has Vulkan cases that we'd probably want
eventually.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Eric Anholt [Mon, 3 Jun 2019 23:12:14 +0000 (16:12 -0700)]
freedreno: Improve the pi approximations in trig lowering.
When comparing our sin/cos behavior to the closed source driver, I
noticed that we were off by a bit (or, in the case of 1/2pi, 3 bits).
Fixes:
dEQP-GLES3.functional.shaders.random.trigonometric.vertex.52
dEQP-GLES3.functional.shaders.random.all_features.vertex.0
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Marek Olšák [Fri, 24 May 2019 22:57:10 +0000 (18:57 -0400)]
ac: rename LLVM <= 7 helpers for readability
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Wed, 22 May 2019 22:23:27 +0000 (18:23 -0400)]
ac: fix a typo in ac_build_wg_scan_bottom
Cc: 19.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Caio Marcelo de Oliveira Filho [Tue, 4 Jun 2019 22:23:41 +0000 (15:23 -0700)]
glx: Fix error message when no driverName is available
Just provide a "(null)" literal in case driverName is NULL.
In file included from ../src/glx/dri3_glx.c:76:
../src/glx/dri3_glx.c: In function ‘dri3_create_screen’:
../src/glx/dri_common.h:70:36: error: ‘%s’ directive argument is null [-Werror=format-overflow=]
70 | #define CriticalErrorMessageF(...) dri_message(_LOADER_FATAL, __VA_ARGS__)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/glx/dri3_glx.c:1002:4: note: in expansion of macro ‘CriticalErrorMessageF’
1002 | CriticalErrorMessageF("failed to load driver: %s\n", driverName);
| ^~~~~~~~~~~~~~~~~~~~~
../src/glx/dri3_glx.c:1002:50: note: format string is defined here
1002 | CriticalErrorMessageF("failed to load driver: %s\n", driverName);
| ^~
cc1: some warnings being treated as errors
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chia-I Wu [Mon, 3 Jun 2019 18:39:34 +0000 (11:39 -0700)]
virgl: resolve to correct level during texture read
When PIPE_TRANSFER_READ requires a resolve, we blit from the host
storage to a temporary storage, and do a format conversion from the
temporary storage to the guest storage. This change makes sure we
convert to the correct level of the guest storage.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Mon, 3 Jun 2019 22:19:18 +0000 (15:19 -0700)]
virgl: fix texture resolving with compressed formats
util_format_translate_3d expects the source box to be aligned to the
block size. When resolving, make sure the size of the staging
buffer is aligned to the block size.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Bas Nieuwenhuizen [Tue, 4 Jun 2019 21:19:27 +0000 (23:19 +0200)]
freedreno: Add printf pattern string.
Some new flag setting disallows it due to being a security risk.
Fixes:
c9c1e261064 "mesa: prevent common string formatting security issues"
Reviewed-by: Rob Clark <robdclark@gmail.com>
Bas Nieuwenhuizen [Tue, 4 Jun 2019 21:14:56 +0000 (23:14 +0200)]
Revert "vl: Enable DRM by default."
Reason:
meson.build:586:7: ERROR: Unknown variable "dep_libdrm".
if building without x11 platform.
This reverts commit
392c60928a5debbe6782ed1aa136597504bfbc5b.
Alyssa Rosenzweig [Thu, 23 May 2019 03:01:32 +0000 (03:01 +0000)]
panfrost/midgard: .pos propagation
A previous optimization converts fmax(x, 0.0) instructions to fmov.pos.
This pass then propagates the .pos from the move up to the source
instruction (when possible). From there, copy propagation will eliminate
the move.
In the future, we might prefer to do this in common NIR code like we do
for saturate, as Bifrost can also benefit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Thu, 23 May 2019 02:23:39 +0000 (02:23 +0000)]
panfrost/midgard: Cleanup copy propagation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Thu, 23 May 2019 01:40:23 +0000 (01:40 +0000)]
panfrost/midgard: Implement "pipeline register" prepass
This prepass, run after scheduling but before RA, specializes to
pipeline registers where possible. It walks the IR, checking whether
sources are ever used outside of the immediate bundle in which they are
written. If they are not, they are rewritten to a pipeline register (r24
or r25), valid only within the bundle itself. This has theoretical
benefits for power consumption and register pressure (and performance by
extension). While this is tested to work, it's not clear how much of a
win it really is, especially without an out-of-order scheduler (yet!).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Thu, 23 May 2019 01:56:03 +0000 (01:56 +0000)]
panfrost/midgard: Helpers for pipeline
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 22 May 2019 04:33:21 +0000 (04:33 +0000)]
panfrost/midgard: Refactor schedule/emit pipeline
First, this moves the scheduler and emitter out of midgard_compile.c
into their own dedicated files.
More interestingly, this slims down midgard_bundle to be essentially an
array of _pointers_ to midgard_instructions (plus some bundling
metadata), rather than the instructions and packing themselves. The
difference is critical, as it means that (within reason, i.e. as long as
it doesn't affect the schedule) midgard_instrucitons can now be modified
_after_ scheduling while having changes updated in the final binary.
On a more philosophical level, this removes an IR. Previously, the IR
before scheduling (MIR) was separate from the IR after scheduling
(post-schedule MIR), requiring a separate set of utilities to traverse,
using different idioms. There was no good reason for this, and it
restricts our flexibility with the RA. So unify all the things!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 22 May 2019 04:32:55 +0000 (04:32 +0000)]
panfrost/midgard: Cleanup RA (stylistic changes)
Trivial.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 22 May 2019 04:32:17 +0000 (04:32 +0000)]
panfrost/midgard: Share MIR utilities
These are more generally useful than the files they were constrained to.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Tue, 21 May 2019 04:09:43 +0000 (04:09 +0000)]
panfrost/midgard: Misc. cleanup for readibility
Mostly, this fixes a number of instances of lines >> 80 chars,
refactoring them into something legible.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 22 May 2019 02:45:42 +0000 (02:45 +0000)]
panfrost/midgard: Extend RA to non-vec4 sources
This represents a major break with the former RA design. We now use
conflicting register classes to represent the subdivision of Midgard's
128-bit registers into varying sizes and arrangement. We determine class
based on the number of components in the instructions' masks. To support
this, we include a number of helpers in the RA to allow composing
swizzles and masks, such that MIR written implicitly assuming .xyzw
sources can be transformed to use actual (non-aligned) sources.
The net result is a marked decrease in register pressure on
non-vec4-exclusive shaders. We could still be doing much better. Not
implemented yet are:
- Register spilling
- Per-component liveness
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 22 May 2019 02:44:12 +0000 (02:44 +0000)]
panfrost/midgard: Set masks on ld_vary
These masks distinguish scalar/vec2/vec3 loads from the default vec4,
which helps with assembly readability (since it's immediately obvious
how many components are _actually_ affected, rather than doing
mysterious things to an unknown number of unused components). Later in
the series, this will enable smarter register allocation, as the unused
components will not be interpreted abnormally.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 22 May 2019 02:41:51 +0000 (02:41 +0000)]
panfrost/midgard: Fix liveness analysis bugs
This fixes liveness analysis with respect to inline constants and
branching. in practice, the symptom is abnormally high register
pressure.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 22 May 2019 02:40:41 +0000 (02:40 +0000)]
panfrost/midgard: Set int outmod for "pasted" code
These snippets of integer assembly are injected for various purposes.
Eventually, we'll want to implement these in NIR directly. Regardless,
the "default" output modifier is different between floats and ints, so
let's set the right one.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Wed, 22 May 2019 02:39:48 +0000 (02:39 +0000)]
panfrost/midgard: Hoist some utility functions
These were static to midgard_compile.c but are more generally useful
across the compiler.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Mon, 20 May 2019 00:46:48 +0000 (00:46 +0000)]
panfrost/midgard: Remove pinning
This mechanism is only used by blend shaders, so just use a move here.
Ideally, it'll be copy-propped and DCE'd away; this removes a source of
considerable indirection and will simplify RA logic.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Ryan Houdek <Sonicadvance1@gmail.com>
Alyssa Rosenzweig [Tue, 4 Jun 2019 19:54:12 +0000 (19:54 +0000)]
nir/algebraic: Simplify max(abs(a), 0.0) -> abs(a)
This pattern was noticed in glmark's jellyfish scene.
v2: Add inexact qualifier due to NaN behaviour.
Minimal shader-db changes (slightly helped).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Elie Tournier <tournier.elie@gmail.com>
Mark Janes [Mon, 3 Jun 2019 23:59:45 +0000 (16:59 -0700)]
mesa: prevent common string formatting security issues
Adds a compile-time error for obvious security issues like:
printf(string_var);
The proposed flag is more tolerant than -Wformat-nonliteral.
Specifically, it tolerates common mesa formatting like:
static const char *shader_template = "really long string %d";
printf(shader_template, uniform_number);
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110833
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Jason Ekstrand [Wed, 29 May 2019 22:46:55 +0000 (17:46 -0500)]
intel/fs: Add an UNDEF instruction to avoid excess live ranges
With 8 and 16-bit types and anything where we have to use non-trivial
strides registersto deal with restrictions, we end up with things that
look like partial writes even though we don't care about any values in
the register except those written by that instruction. This is
particularly important when dealing with loops because liveness sees
is_partial_write and the fact that an old version from a previous loop
iteration may be valid at that point and extends all purely partially
written values to the entire loop.
This commit adds a new UNDEF instruction which does nothing (the
generator doesn't emit anything) but which does a fake write to the
register. This informs liveness that we don't care about any values
before that point so it won't consider those registers to be falsely
live. We can safely emit UNDEF instructions for all SSA values that
come in from NIR and nearly all temporaries generated by various stages
of the compiler. In particular, we need to insert UNDEF instructions
when we handle region restrictions because the newly allocated registers
are almost guaranteed to be partially written.
No shader-db changes.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110432
Reviewed-by: Matt Turner <mattst88@gmail.com>
Caio Marcelo de Oliveira Filho [Mon, 3 Jun 2019 21:41:46 +0000 (14:41 -0700)]
spirv: Update the OpenCL.std.h header
This corresponds to commit
8b911bd2ba37677037b38c9bd286c7c05701bcda on
GitHub.
We previously tweaked OpenCL.std.h from upstream to be included in C
code. Now upstream header can be included, however the symbol names
are slightly different (include an OpenCLstd_ prefix), so this patch
also fixes vtn_opencl.c to use those.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Bas Nieuwenhuizen [Mon, 13 May 2019 12:09:55 +0000 (14:09 +0200)]
radv: Use bo metadata for imported image tiling on Android.
This way we handle linear images etc. correctly.
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Thu, 30 May 2019 18:34:06 +0000 (20:34 +0200)]
vl: Enable DRM by default.
If libdrm is found the pipe loader enables drm anyway, and that is
pretty much the only extra dependency this code has.
This enables creating libva display using a drm fd without having
to enable the DRM (GBM really) backend of EGL, which is completely
unrelated.
Leaving the X11 platforms alone as they would still result in the
additional inclusion of extra deps.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Jason Ekstrand [Fri, 17 May 2019 16:33:23 +0000 (11:33 -0500)]
anv: Advertise support for VK_EXT_fragment_shader_interlock
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Jason Ekstrand [Fri, 17 May 2019 16:32:10 +0000 (11:32 -0500)]
spirv: Implement SPV_EXT_fragment_shader_interlock
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Jason Ekstrand [Fri, 17 May 2019 16:20:13 +0000 (11:20 -0500)]
spirv: Update the headers from latest Khronos master
This corresponds to
8b911bd2ba37677037b38c9bd286c7c05701bcda in
https://github.com/KhronosGroup/SPIRV-Headers.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Jason Ekstrand [Fri, 17 May 2019 16:01:20 +0000 (11:01 -0500)]
vulkan: Update the XML and headers to 1.1.110
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Rhys Perry [Wed, 29 May 2019 15:07:44 +0000 (16:07 +0100)]
ac/nir: mark some texture intrinsics as convergent
Otherwise LLVM can sink them and their texture coordinate calculations
into divergent branches.
v2: simplify the conditions on which the intrinsic is marked as convergent
v3: only mark as convergent in FS and CS with derivative groups
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rhys Perry [Thu, 30 May 2019 14:55:11 +0000 (15:55 +0100)]
radv: fix some compiler warnings
Fixes -Woverflow warnings with GCC 9.1.1
v2: use a cast instead of a bitwise and
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Jason Ekstrand [Mon, 3 Jun 2019 22:09:12 +0000 (17:09 -0500)]
intel/fs: Skip registers faster when setting spill costs
This might be slightly faster since we're doing one read rather than
two before we decide to skip. The more important reason, however, is
because no_spill prevents us from re-spilling spill registers. In the
new world in which we don't re-calculate liveness every spill, we may
not have valid liveness for spill registers so we shouldn't even look
their live ranges up.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110825
Fixes:
e99081e76d4 "intel/fs/ra: Spill without destroying the..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Connor Abbott [Fri, 24 May 2019 13:08:06 +0000 (15:08 +0200)]
radeonsi/nir: Fix type in bindless address computation
Bindless handles in GL are 64-bit. This fixes an assert failure in LLVM.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Christian Gmeiner [Tue, 28 May 2019 19:43:51 +0000 (21:43 +0200)]
etnaviv: implement set_active_query_state(..) for hw queries
Clear w/ quad uses a normal draw which adds up to OQ. st/meta
uses set_active_query_state(..) to tell the driver to pause
queries in such cases.
Fixes spec@arb_occlusion_query@occlusion_query_meta_save piglit.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Samuel Pitoiset [Mon, 3 Jun 2019 15:52:56 +0000 (17:52 +0200)]
radv: do not use gfx fast depth clears for layered depth/stencil images
The driver should only fast depth clears with the graphics path
when the view covers all image layers, otherwise this might
corrupt layers when HTILE is enabled.
Cc: 19.0 19.1 mesa-stable@lists.freedesktop.org
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>