Alyssa Rosenzweig [Fri, 9 Apr 2021 19:53:22 +0000 (15:53 -0400)]
panfrost: Don't unroll loops in GLSL
GLSL loop analysis is trouble. Just use NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Tue, 13 Apr 2021 19:56:01 +0000 (15:56 -0400)]
pan/bi: Workaround *V2F32_TO_V2F16 erratum
Exact conditions this workaround is needed unknown. Determined
experimentally.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Tue, 23 Feb 2021 00:26:03 +0000 (00:26 +0000)]
pan/bi: Don't schedule clamps to +FADD.v2f16
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Tue, 13 Apr 2021 18:36:08 +0000 (14:36 -0400)]
pan/bi: Add and use bi_negzero helper
-0.0 is the additive identity in IEEE 754 arithmetic, not +0.0!
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Fri, 9 Apr 2021 20:24:54 +0000 (16:24 -0400)]
pan/bi: Lower swizzles on CLPER
Needed for vectorized FP16 derivatives.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Fri, 9 Apr 2021 21:06:27 +0000 (17:06 -0400)]
pan/bi: Fix loads and stores smaller than 32 bits
Spiritual successor to Icecream95's patch of the same name.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Icecream95 [Sun, 3 Jan 2021 08:54:26 +0000 (21:54 +1300)]
pan/bi: Replace lane0 modifier with lane_dest for load instructions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Icecream95 [Sun, 3 Jan 2021 08:53:05 +0000 (21:53 +1300)]
pan/bi: Add "lane_dest" modifier
Similar to the "lane" modifier, but for the instruction destination
instead the sources.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Tue, 13 Apr 2021 17:22:01 +0000 (13:22 -0400)]
pan/bi: Implement vectorized int downcasts
Just MKVEC but needs the usual special handling.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Tue, 13 Apr 2021 17:21:19 +0000 (13:21 -0400)]
pan/bi: Improve assert for vector size errors
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Mon, 4 Jan 2021 23:19:51 +0000 (18:19 -0500)]
pan/bi: Fix 16-bit fsat
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Thu, 31 Dec 2020 21:03:38 +0000 (16:03 -0500)]
pan/bi: Implement vectorized f32_to_f16
f2f16 needs special treatment since it can access multiple 32-bit words.
Corresponds to the two-op instruction V2F32_TO_V2F16.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Tue, 23 Feb 2021 23:41:32 +0000 (23:41 +0000)]
pan/bi: Emit int CSEL instead of float by default
Will be needed when we use 1-bit booleans.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Thu, 31 Dec 2020 23:17:50 +0000 (18:17 -0500)]
pan/bi: Support 16-bit load_interpolated_input
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Mon, 4 Jan 2021 23:54:41 +0000 (18:54 -0500)]
pan/bi: Union modifiers from across variants
itertools.groupby depends on sorting, so this code was quietly broken on
cases like FADD.v2f16.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Mon, 4 Jan 2021 23:20:21 +0000 (18:20 -0500)]
pan/bi: Simplify Python expression
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Wed, 21 Apr 2021 18:54:00 +0000 (14:54 -0400)]
pan/bi: Don't reference nir_lower_mediump_outputs
Nonexistant.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Tue, 13 Apr 2021 22:47:04 +0000 (18:47 -0400)]
pan/bi: Add simple constant folding pass
Cleans up swizzle lowering, and will be used for other cleanup as
well (fancy texturing tends to create a lot of foldable code).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Mon, 3 May 2021 15:03:11 +0000 (11:03 -0400)]
pan/bi: Don't reference uninit source in ATOM_C1
Causes it to be live throughout the shader, causing register allocation
failures on some dEQP-GLES31 shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Alyssa Rosenzweig [Mon, 3 May 2021 14:57:40 +0000 (10:57 -0400)]
pan/bi: Add missing sr_count to pseudo-atomics
Fixes missing prints for these.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10392>
Rhys Perry [Fri, 30 Apr 2021 10:39:12 +0000 (11:39 +0100)]
radv,ac/llvm: use a dword alignment for descriptor loads
RADV doesn't try to keep anything 16 or 32 byte aligned. RADV also seems
to create better code for some reason.
fossil-db (Sienna Cichlid):
Totals from 37693 (30.93% of 121873) affected shaders:
SGPRs: 1762792 -> 1785504 (+1.29%); split: -1.01%, +2.30%
VGPRs: 1761032 -> 1760808 (-0.01%); split: -0.09%, +0.07%
SpillSGPRs: 55793 -> 56011 (+0.39%); split: -3.49%, +3.88%
SpillVGPRs: 16766 -> 16387 (-2.26%); split: -3.99%, +1.73%
CodeSize:
82902228 ->
82781608 (-0.15%); split: -0.29%, +0.14%
Scratch: 3024896 -> 2987008 (-1.25%); split: -3.08%, +1.83%
MaxWaves: 919794 -> 920302 (+0.06%); split: +0.09%, -0.03%
shader-db (Sienna Cichlid):
Totals from affected shaders:
SGPRS: 3976 -> 3976 (0.00 %)
VGPRS: 3392 -> 3392 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 178792 -> 178980 (0.11 %) bytes
Max Waves: 1389 -> 1389 (0.00 %)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4715
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10543>
Connor Abbott [Fri, 30 Apr 2021 16:07:58 +0000 (18:07 +0200)]
tu: Fix SP_GS_PRIM_SIZE for large sizes
Based on the previous commit.
Fixes: 012773b ("turnip: Configure VPC for geometry shaders")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
Connor Abbott [Fri, 30 Apr 2021 16:05:37 +0000 (18:05 +0200)]
freedreno/a6xx: Fix SP_GS_PRIM_SIZE for large sizes
This fixes a few piglit hangs.
Fixes: 0eebedb ("freedreno/a6xx: Emit program state for GS")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
Connor Abbott [Fri, 30 Apr 2021 16:03:56 +0000 (18:03 +0200)]
freedreno/a6xx: Better document SP_GS_PRIM_SIZE
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10551>
Bas Nieuwenhuizen [Sun, 2 May 2021 12:22:43 +0000 (14:22 +0200)]
radv: Only require DRM 3.23.
Turns out kernel 4.15 only goes up to amdgpu 3.23 . 3.35 is way
too new. Too new for e.g. ChromeOS.
Fixes:
1df4f11eb5f ("radv: require DRM 3.35+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4728
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10576>
Michel Zou [Tue, 20 Apr 2021 13:15:58 +0000 (15:15 +0200)]
vulkan/wsi: avoid wsi_x11_check_for_dri3 for sw device
Disabling the check allows swapchains to be created on a remote
X Server using the xlib backend, which in turn allows Vulkan apps,
such as swapchain_images in Vulkan Samples, to run.
Closes #4323
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10349>
Antonio Caggiano [Mon, 26 Apr 2021 16:49:14 +0000 (18:49 +0200)]
panfrost: Fix invalid conversions
When compiling with a C++ compiler, invalid conversions are treated as
errors unless the fpermissive flag is provided. These changes fix all
invalid conversions encountered while including libpanfrost in a C++
project.
Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10468>
Alyssa Rosenzweig [Sat, 17 Apr 2021 21:43:17 +0000 (17:43 -0400)]
nir/opcodes: Reword confusing comment
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10578>
Samuel Pitoiset [Fri, 30 Apr 2021 12:50:57 +0000 (14:50 +0200)]
radv/winsys: fix executing huge secondary command buffers on GFX6
If the secondary has a list of CS buffers, it should be copied to
the primary.
Fixes dEQP-VK.api.command_buffers.record_many_draws_secondary_2.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10547>
Samuel Pitoiset [Fri, 30 Apr 2021 10:58:02 +0000 (12:58 +0200)]
radv/winsys: add GFX6_MAX_CS_SIZE instead of using a magic value
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10547>
Tony Wasserka [Tue, 27 Apr 2021 15:26:09 +0000 (17:26 +0200)]
aco/spill: Fix improper handling of exec phis
The "continue" was placed in the wrong loop, leading to exec being
counted as a spilled register when it wasn't.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
a56ddca4e80a6ef7bb0c44edb4e5b6169510aaca ('aco: make all exec accesses non-temporaries')
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4533
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10486>
Karol Herbst [Fri, 30 Apr 2021 11:04:16 +0000 (13:04 +0200)]
nvc0: fix implicit-fallthrough gcc warning
gcc warning:
../src/gallium/drivers/nouveau/nvc0/nvc0_screen.c: In function ‘nvc0_screen_get_compute_param’:
../src/gallium/drivers/nouveau/nvc0/nvc0_screen.c:623:7: warning: this statement may fall through [-Wimplicit-fallthrough=]
623 | switch (obj_class) {
| ^~~~~~
../src/gallium/drivers/nouveau/nvc0/nvc0_screen.c:634:4: note: here
634 | case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE: /* l[] */
| ^~~~
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10544>
Karol Herbst [Fri, 30 Apr 2021 11:00:40 +0000 (13:00 +0200)]
nv50/query: fix stringop-overflow gcc warning
gcc warning:
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c: In function ‘nv50_hw_metric_get_query_result’:
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c:140:26: warning: ‘sm11_hw_metric_calc_result’ accessing 64 bytes in a region of size 32 [-Wstringop-overflow=]
140 | *(uint64_t *)result = sm11_hw_metric_calc_result(hq, res64);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c:140:26: note: referencing argument 2 of type ‘uint64_t *’ {aka ‘long unsigned int *’}
../src/gallium/drivers/nouveau/nv50/nv50_query_hw_metric.c:105:1: note: in a call to function ‘sm11_hw_metric_calc_result’
105 | sm11_hw_metric_calc_result(struct nv50_hw_query *hq, uint64_t res64[8])
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10544>
Icecream95 [Fri, 23 Apr 2021 11:48:00 +0000 (23:48 +1200)]
panfrost: Split panfrost_batch_submit to prevent stack overflows
panfrost_batch_submit can recurse to hundreds of levels to submit
dependencies, so split the actual submit code from the dependency
recursion, saving over a kilobyte of stack space per recursion
level. Enforce this with ATTRIBUTE_NOINLINE.
Use ATTRIBUTE_NOINLINE on panfrost_batch_submit itself as well to
prevent GCC from inlining the function into itself, which would use a
few hundred bytes of stack.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10574>
Samuel Pitoiset [Tue, 27 Apr 2021 12:50:35 +0000 (14:50 +0200)]
radv: only keep concurrent MSAA images compressed if TC-compat CMASK
Otherwise, we need a FMASK_DECOMPRESS which is only supported
on the gfx queue.
Fixes rendering with Forza Horizon 4 on Polaris10.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10482>
Samuel Pitoiset [Wed, 28 Apr 2021 15:21:23 +0000 (17:21 +0200)]
radv: check if DCC is enabled when resolving different levels
Fixes an assertion triggered by new CTS:
dEQP-VK.renderpass2.suballocation.multisample_resolve.*_resolve_level_*
Looks like the driver should pass a range to radv_layout_dcc_compressed().
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10502>
Timothy Arceri [Fri, 30 Apr 2021 06:05:23 +0000 (16:05 +1000)]
util: disable glthread in CSGO
Users have reported a rise in trust factor problems [1] since using
mesa builds containing
6f2017205e62. Until we confirm its not a problem
disable glthread.
[1] https://github.com/ValveSoftware/csgo-osx-linux/issues/2630
Fixes:
6f2017205e62 ("dri: enable glthread + radeonsi workaround for CS:GO")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4710
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10540>
Alyssa Rosenzweig [Tue, 20 Apr 2021 19:36:41 +0000 (01:06 +0530)]
asahi: Add Gallium driver
Forked from noop, with some code from Panfrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 2 May 2021 16:40:39 +0000 (12:40 -0400)]
asahi: Add vertex formats table
This all gets lowers anyway so it's not entirely clear if this is the
best approach, but these map formats that have native device_load
encodings. (and don't need shader unpack code)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Tue, 27 Apr 2021 22:48:11 +0000 (18:48 -0400)]
asahi: Add some magic IOGPU routines
These turned out to be software defined structures consumed by the macOS
kernel (specifically, by IOGPUCommandQueue). I'm a bit bothered by the
sheer amount of random hex flying about, though Hector made some
progress on deciphering the structure. Nevertheless there's some comfort
knowing it's not actual hardware magic.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 25 Apr 2021 19:10:45 +0000 (15:10 -0400)]
asahi: Add uniform upload routines
Effectively everything is treated as a sysval.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 2 May 2021 16:30:39 +0000 (12:30 -0400)]
asahi: Add pool data structure
Lifted from Panfrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 2 May 2021 16:30:22 +0000 (12:30 -0400)]
asahi: Add device abstraction
Over IOKit or DRM, primarily for memory allocation. Common between
Gallium and Vulkan.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 23:15:43 +0000 (19:15 -0400)]
asahi: Add tiling routines
For the 64x64 Morton order pattern we know how to use for textures and
framebuffers. (AGX also supports a framebuffer compression scheme. This
is not that.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 23:13:29 +0000 (19:13 -0400)]
asahi: Add command buffer decode helpers
Forked from Panfrost's pandecode. Like pandecode, most of the
heavylifting is generated with GenXML, so this is relatively simple.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 23:13:11 +0000 (19:13 -0400)]
asahi: Add (clean room) IOKit uABI header
This only builds on macOS (depends on IOKit), where it is required for
command buffer submission and tracing the Metal blob.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 23:10:10 +0000 (19:10 -0400)]
asahi: Add a GenXML fork
Via Panfrost via v3d via Intel. Sour dough!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 23:08:51 +0000 (19:08 -0400)]
asahi: Add allocation data structure
Something half-way between what IOKit (macOS) and DRM (Linux) want.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 23:08:14 +0000 (19:08 -0400)]
asahi: Add command buffer XML definitions
Formatted for GenXML. Incomplete and probably riddled with errors, but a
good start.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 23:07:59 +0000 (19:07 -0400)]
asahi: Add hexdump utility
Used in our decoder.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 21:41:19 +0000 (17:41 -0400)]
agx: Support bcsel
We're already using cmpsel in lots of places, pipe through the real
thing!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 20:24:17 +0000 (16:24 -0400)]
agx: Pack cmpsel
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 2 May 2021 13:36:09 +0000 (09:36 -0400)]
agx: Add b2i implementation
Another icmpsel variant.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 20:23:15 +0000 (16:23 -0400)]
agx: Implement b2f
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 20:23:01 +0000 (16:23 -0400)]
agx: Support 1-bit booleans
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 18 Apr 2021 19:16:04 +0000 (15:16 -0400)]
agx: Add min/max support
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 18:01:32 +0000 (14:01 -0400)]
agx: Pack texture ops
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 18:01:08 +0000 (14:01 -0400)]
agx: Emit texture ops
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 24 Apr 2021 18:00:55 +0000 (14:00 -0400)]
agx: Add agx_tex_dim helper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 18 Apr 2021 00:43:32 +0000 (20:43 -0400)]
agx: Implement vertex_id
Preloaded to r5 in vertex shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 23:57:51 +0000 (19:57 -0400)]
agx: Lower load_attr to device memory accesses
This is pretty annoying but not as catastrophic as I feared... at least,
until we need to support indirect access, non-native formats, or instancing.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 22:09:41 +0000 (18:09 -0400)]
agx: Set flag on last st_vary instruction
Not sure what the point is but let's match the blob.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 20:55:45 +0000 (16:55 -0400)]
agx: Implement load_ubo/kernel_input
Lower to a read from global memory at a base address specified in a
sysval.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 20:59:51 +0000 (16:59 -0400)]
agx: Add sysval management helper
Will be used for lowering UBO loads, among other applications.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 20:57:01 +0000 (16:57 -0400)]
agx: Implement limited case of i2i16/i2i32 as iadd
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 15:38:00 +0000 (11:38 -0400)]
agx: Propagate immediates
8-bit integers can be inlined to immediates on integer ops. Likewise,
floats with simple representations can be converted to 8-bit minifloats
and inlined on float ops.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 15:13:32 +0000 (11:13 -0400)]
agx: Propagate fmov backwards as well
Primarily for fsat. Also folds conversions but this is more of an
accident, and it doesn't do so optimally (due to the f2f16/f2f32
orientation issue outlined in the pass comments).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 14:52:15 +0000 (10:52 -0400)]
agx: Add dead code eliminator
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 14:29:27 +0000 (10:29 -0400)]
agx: Add forward optimizing pass for fmov
Explain the ideas behind our SSA-based optimizer (inspired by ACO's,
thank you to Daniel Schuermann for discussing this with me in the
context of Bifrost), and implement the subset needed to propagate
abs/neg through.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 13:58:20 +0000 (09:58 -0400)]
agx: Add 32-bit bitwise shifts
Only ishr has an actual native instruction, the others are special cases
of the bitfield insertion/extraction ops.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 00:49:23 +0000 (20:49 -0400)]
agx: Add saturated integer add/subtract support
Just a flag on the regular iadd instruction.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 00:36:39 +0000 (20:36 -0400)]
agx: Add iadd/imad integer arithmetic
Lots of optimizations will be possible later on.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Fri, 16 Apr 2021 22:36:06 +0000 (18:36 -0400)]
agx: Add bitwise operations
This get translated to bitop with the corresponding truth table with
some builder syntax sugar.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Fri, 16 Apr 2021 22:02:24 +0000 (18:02 -0400)]
agx: Implement native int->float conversions
This time 8, 16, and 32-bit sources are supported natively, but not
64-bit.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Fri, 16 Apr 2021 21:55:49 +0000 (17:55 -0400)]
agx: Implement native float->int conversions
No 8-bit or 64-bit yet since those need lowerings.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Fri, 16 Apr 2021 18:55:39 +0000 (14:55 -0400)]
agx: Add minifloat tests
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Fri, 16 Apr 2021 03:30:33 +0000 (23:30 -0400)]
agx: Add 8-bit AGX minifloat routines
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Fri, 16 Apr 2021 02:51:47 +0000 (22:51 -0400)]
agx: Implement fsin/fcos
First, we lower to fsin_agx and some ALU in NIR. Then, we implement
fsin_agx with the underlying transcental ops.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Wed, 14 Apr 2021 19:28:13 +0000 (15:28 -0400)]
agx: Implement simple floating point ops
These are all direct translations of NIR->AIR.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Mon, 12 Apr 2021 03:45:35 +0000 (23:45 -0400)]
agx: Implement ld_vary
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Mon, 12 Apr 2021 03:00:35 +0000 (23:00 -0400)]
agx: Terminate programs with stop and traps
The function of stop is clear. The function of trap, let alone a whole
sled of them, is less so. Maybe a debugging feature for later.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 22:11:05 +0000 (18:11 -0400)]
agx: Add st_vary(_final) instruction packing
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sat, 17 Apr 2021 21:01:20 +0000 (17:01 -0400)]
agx: Add packing for memory loads/stores
Encoding is dramatically different from ALU.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Mon, 12 Apr 2021 03:49:30 +0000 (23:49 -0400)]
agx: Add instruction packing
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 20:01:47 +0000 (16:01 -0400)]
agx: Add a trivial register allocator
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 19:29:08 +0000 (15:29 -0400)]
agx: Add instruction printing
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 19:19:49 +0000 (15:19 -0400)]
agx: Implement fragment_out
For a single colour render target.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 19:10:39 +0000 (15:10 -0400)]
agx: Implement vec2/vec3/vec4 ops
As p_combine, to un-stub emit_alu.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 19:09:36 +0000 (15:09 -0400)]
agx: Add agx_alu_src_index helper for emit_alu
Since we don't use abs/neg in NIR, this just needs to construct
p_extract ops to deal with swizzles.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 19:09:03 +0000 (15:09 -0400)]
agx: Implement direct st_vary
Indirection can come later, if at all..
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 19:08:44 +0000 (15:08 -0400)]
agx: Implement load_const as mov
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 15:26:00 +0000 (11:26 -0400)]
agx: Stub emit_intrinsic
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 15:05:52 +0000 (11:05 -0400)]
agx: Stub NIR instruction iteration
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 14:57:55 +0000 (10:57 -0400)]
agx: Stub control flow walking
From Bifrost. We'll need to diverge (no pun intended) due to exec_mask
handling specific to Apple.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 2 May 2021 13:44:15 +0000 (09:44 -0400)]
agx: Remap varyings to match AGX ABI
It's not clear if this is software or hardware defined, but until we
know more about linkage, let's match the blob. Fixes dEQP issues with
gl_PointSize.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Sun, 11 Apr 2021 02:03:19 +0000 (22:03 -0400)]
agx: Stub NIR backend compiler
A fork of the Bifrost compiler, tailored to AGX. nir_register support is
removed, as I want to use an SSA-based allocator for AGX. (There are no
VLIW-like requirements and extremely limited vector semantics, so we can
use an ACO approach with ease.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Thu, 15 Apr 2021 23:08:26 +0000 (19:08 -0400)]
agx: Generate builder routines
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Thu, 15 Apr 2021 23:08:00 +0000 (19:08 -0400)]
agx: Generate runtime-accessible opcode table
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Thu, 15 Apr 2021 23:08:13 +0000 (19:08 -0400)]
agx: Generate opcode list
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
Alyssa Rosenzweig [Wed, 14 Apr 2021 20:50:23 +0000 (16:50 -0400)]
agx: Add opcode descriptions as Python
Pattern lifted from NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>