Kenneth Graunke [Fri, 27 May 2016 18:12:45 +0000 (11:12 -0700)]
glsl: Expose gl_PointSize if OES/EXT_tessellation_point_size is enabled.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 8 Jul 2016 19:00:30 +0000 (12:00 -0700)]
glsl: Add extension plumbing for OES/EXT_tessellation_shader.
This adds the #extension directive support, built-in #defines,
lexer keyword support, and updates has_tessellation_shader().
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 8 Jul 2016 18:49:30 +0000 (11:49 -0700)]
mesa: Move tessellation shader gets to GL_CORE, GLES31 section.
This makes them available in the GLES 3.1 API.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 8 Jul 2016 18:48:15 +0000 (11:48 -0700)]
mesa: Add {OES,EXT}_tessellation_shader to the extensions table.
Also update _mesa_has_tessellation to know about the new extensions.
For now, these are dummy_false, to avoid turning on the extension
until everything's in place. Eventually, we'll move them over to
the "ARB_tessellation_shader" bit so that any drivers supporting
both the desktop extension and ES 3.1 get the feature.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Fri, 8 Jul 2016 18:42:08 +0000 (11:42 -0700)]
mapi: Add PatchParameteriOES and PatchParameteriEXT.
The OES_tessellation_shader and EXT_tessellation_shader specifications
have suffixed names. These are identical to the core function, so just
alias them.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Nicolai Hähnle [Fri, 29 Jul 2016 16:59:11 +0000 (17:59 +0100)]
radeonsi: add has_draw_indirect_multi flag
Prefer to use DRAW_(INDEX)_INDIRECT_MULTI when available in the firmware.
Versions for SI and CI already added as provided by the firmware team, but
keep in mind that they won't currently be used since the radeon kernel module
has no interface to query the firmware version.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 29 Jul 2016 17:05:30 +0000 (18:05 +0100)]
radeonsi: transpose indirect/index draw dispatch
This allows better code sharing for indirect draw calls.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 29 Jul 2016 16:56:21 +0000 (17:56 +0100)]
radeonsi: move index buffer calculations in si_emit_draw_packets up
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 29 Jul 2016 16:51:23 +0000 (17:51 +0100)]
radeonsi: unify emitting PKT3_SET_BASE for indirect draws
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 28 Jul 2016 15:40:21 +0000 (16:40 +0100)]
winsys/amdgpu: query ME/PFP/CE firmware versions
The radeon kernel module doesn't have the firmware query interface, so the
corresponding values will remain 0.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 3 Aug 2016 11:30:32 +0000 (13:30 +0200)]
radeonsi: move spi_ps_input_addr override outside of the loop
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 3 Aug 2016 10:54:45 +0000 (12:54 +0200)]
radeonsi: drop unnecessary u_pstipple.h include
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 3 Aug 2016 10:52:28 +0000 (12:52 +0200)]
radeonsi: do not pass the return type to buffer_load_const
Overriding it is not allowed anyway, and actually lead to a crash when polygon
stippling was used with monolithic shaders.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Fri, 8 Jul 2016 20:29:31 +0000 (13:29 -0700)]
glsl: Combine GS and TES array resizing visitors.
These are largely identical, except that the GS version has a few
extra error conditions. We can just pass in the stage and skip these.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Fri, 24 Jun 2016 07:09:00 +0000 (00:09 -0700)]
glsl: Fix location bias for patch variables.
We need to subtract VARYING_SLOT_PATCH0, not VARYING_SLOT_VAR0.
Since "patch" only applies to inputs and outputs, we can just handle
this once outside the switch statement, rather than replicating the
check twice and complicating the earlier conditions.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Fri, 24 Jun 2016 06:12:45 +0000 (23:12 -0700)]
glsl: Fix the program resource names of gl_TessLevelOuter/Inner[].
These are lowered to gl_TessLevel{Outer,Inner}MESA. We need them to
appear in the program resource list with their original names and types.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Wed, 28 Oct 2015 23:39:11 +0000 (16:39 -0700)]
glsl: Delete bogus ir_set_program_inouts assert.
This assertion is bogus. Varying structs, and arrays of structs, are
allowed by GLSL, and we can see them here. While we currently don't
have any partial-variable support for those, simply returning false
and marking the entire thing as used is certainly legitimate.
I believe this is often swept under the rug by varying packing,
but that's disabled in certain tessellation situations.
Hit by 20 dEQP-GLES31.functional.tessellation.user_defined_io.* tests.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Thu, 2 Jun 2016 01:40:21 +0000 (18:40 -0700)]
glsl: Simplify interface qualifier parsing.
This better matches the grammar in section 4.3.9 of the GLSL 4.5 spec,
and also removes some redundant code.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Fri, 20 May 2016 22:17:37 +0000 (15:17 -0700)]
glsl: Add a has_tessellation_shader() helper.
Similar to has_geometry_shader(), has_compute_shader(), and so on.
This will make it easier to add more conditions here later.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Marek Olšák [Sat, 6 Aug 2016 15:28:57 +0000 (17:28 +0200)]
Revert "gallium/radeon: count contexts"
This reverts commit
b403eb338533894ee012a96bf55653996c92ec7c.
Not needed.
Marek Olšák [Sat, 30 Jul 2016 22:50:14 +0000 (00:50 +0200)]
radeonsi: add GLSL lit tests
They can only be run manually as described in HOW_TO_RUN.
It should help catch suboptimal code generation.
Some of the tests already fail.
v2: rename the tests to *.glsl,
fix lit.cfg to find FileCheck
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Marek Olšák [Sat, 30 Jul 2016 22:48:11 +0000 (00:48 +0200)]
radeonsi: add a standalone compiler amdgcn_glslc
This will be used by GLSL lit tests.
For developers only. It shouldn't be distributable and it doesn't use
the Mesa build system.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 30 Jul 2016 22:46:09 +0000 (00:46 +0200)]
radeonsi: add environment variable SI_FORCE_FAMILY
This will be used by: amdgcn_glslc -mcpu=[family]
It can also be used for shader-db if you want stats for a different family.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 1 Aug 2016 22:44:55 +0000 (00:44 +0200)]
winsys/radeon: implement cs_get_next_fence
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 1 Aug 2016 22:44:55 +0000 (00:44 +0200)]
winsys/amdgpu: implement cs_get_next_fence
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 1 Aug 2016 22:43:02 +0000 (00:43 +0200)]
gallium/radeon: add cs_get_next_fence winsys callback
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 15 Jul 2016 21:17:43 +0000 (23:17 +0200)]
gallium/radeon: count contexts
We don't wanna use unflushed fences when we have multiple contexts.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 15 Jul 2016 21:16:08 +0000 (23:16 +0200)]
gallium/radeon: count gfx IB flushes
This will be used as a counter for whether fence_finish needs to flush
the IB.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 19:53:23 +0000 (21:53 +0200)]
gallium/radeon: move radeon_winsys::cs_memory_below_limit to drivers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 19:41:23 +0000 (21:41 +0200)]
gallium/radeon: inline radeon_winsys::query_memory_usage
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 19:39:00 +0000 (21:39 +0200)]
gallium/radeon/winsyses: expose per-IB used_vram and used_gart to drivers
The following patches will use this.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 16:31:33 +0000 (18:31 +0200)]
gallium/radeon/winsyses: print CS submission error number
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 16:18:36 +0000 (18:18 +0200)]
radeonsi: flush if constant, shader, and streamout buffers use too much memory
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 15:48:28 +0000 (17:48 +0200)]
radeonsi: flush if sampler views and images use too much memory
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 15:28:43 +0000 (17:28 +0200)]
radeonsi: deal with high vertex buffer memory usage correctly
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 14:33:50 +0000 (16:33 +0200)]
radeonsi: take compute shader and dispatch indirect memory usage into account
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 14:33:50 +0000 (16:33 +0200)]
radeonsi: take scratch buffer and draw indirect memory usage into account
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 14:20:19 +0000 (16:20 +0200)]
radeonsi: check IB memory usage of CP DMA operations
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 29 Jul 2016 13:48:18 +0000 (15:48 +0200)]
gallium/radeon: add r600_resource::vram_usage and gart_usage
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Mathias Fröhlich [Mon, 1 Aug 2016 04:55:35 +0000 (06:55 +0200)]
mesa: Copy bitmask of VBOs in the VAO on gl{Push,Pop}Attrib.
On gl{Push,Pop}Attrib(GL_CLIENT_VERTEX_ARRAY_BIT) take
care that gl_vertex_array_object::VertexAttribBufferMask
matches the bound buffer object in the
gl_vertex_array_object::VertexBinding array.
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Fredrik Höglund <fredrik@kde.org>
Nanley Chery [Thu, 4 Aug 2016 22:47:23 +0000 (15:47 -0700)]
anv/gen7_pipeline: Set PixelShaderKillPixel for discards
According to the IVB PRM Vol2 P1, this bit must be set if a pixel shader
contains a discard instruction.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97207
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Wed, 3 Aug 2016 18:06:19 +0000 (11:06 -0700)]
util/r11g11b10f: Whitespace cleanups
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Jason Ekstrand [Wed, 3 Aug 2016 16:58:13 +0000 (09:58 -0700)]
util/format: Use explicitly sized types
Both the rgb9e5 and r11g11b10 formats are defined based on how they are
packed into a 32-bit integer. It makes sense that the functions that
manipulate them take an explicitly sized type.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Jason Ekstrand [Wed, 3 Aug 2016 16:54:03 +0000 (09:54 -0700)]
util/rgb9e5: Get rid of the float754 union
There are a number of reasons for this refactor. First, format_rgb9e5.h is
not something that a user would expect to define such a generic union.
Second, defining it requires checking for endianness which is ugly. Third,
90% of what we were doing with the union was float <-> uint32_t bitcasts
and the remaining 10% can be done with a sinmple left-shift by 23.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Jason Ekstrand [Wed, 3 Aug 2016 16:39:00 +0000 (09:39 -0700)]
util/format_rgb9e5: Get rid of the rgb9e5 union
The rgb9e5 format is a packed format defined in terms of slicing up a
single 32-bit value. The bitfields are far more confusing than simple
shifts and require that we check the endianness.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Jason Ekstrand [Wed, 3 Aug 2016 16:22:13 +0000 (09:22 -0700)]
util: Move format_r11g11b10f.h to src/util
It's used from both mesa main and gallium.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Jason Ekstrand [Wed, 3 Aug 2016 16:16:12 +0000 (09:16 -0700)]
util: Move format_rgb9e5.h to src/util
It's used from both mesa main and gallium.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Andres Gomez [Tue, 2 Aug 2016 20:19:28 +0000 (23:19 +0300)]
glsl: fix indentation, comments and line lengths in ast_function.cpp
Acked-by: Timothy Arceri <timothy.arceri@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Andres Gomez [Tue, 2 Aug 2016 11:26:23 +0000 (14:26 +0300)]
glsl: apply_implicit_conversion is static again
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Andres Gomez [Sat, 30 Jul 2016 14:57:54 +0000 (17:57 +0300)]
glsl: struct constructors/initializers only allow implicit conversions
When an argument for a structure constructor or initializer doesn't
match the expected type, only Section 4.1.10 “Implicit Conversions”
are allowed to try to match that expected type.
From page 32 (page 38 of the PDF) of the GLSL 1.20 spec:
" The arguments to the constructor will be used to set the structure's
fields, in order, using one argument per field. Each argument must
be the same type as the field it sets, or be a type that can be
converted to the field's type according to Section 4.1.10 “Implicit
Conversions.”"
From page 35 (page 41 of the PDF) of the GLSL 4.20 spec:
" In all cases, the innermost initializer (i.e., not a list of
initializers enclosed in curly braces) applied to an object must
have the same type as the object being initialized or be a type that
can be converted to the object's type according to section 4.1.10
"Implicit Conversions". In the latter case, an implicit conversion
will be done on the initializer before the assignment is done."
v2: Remove also the now redundant constant conversion, the
constant_record_constructor helper and the replacement code
(Timothy).
Fixes GL44-CTS.shading_language_420pack.initializer_list_negative
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Andres Gomez [Tue, 2 Aug 2016 13:20:59 +0000 (16:20 +0300)]
glsl: Refactor implicit conversion into its own helper
v2: Refactor also the conversion to constant and replacement code
(Timothy).
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Andres Gomez [Sat, 30 Jul 2016 22:46:59 +0000 (01:46 +0300)]
glsl/types: disallow implicit conversions before GLSL 1.20
Implicit conversions were added in the GLSL 1.20 spec version.
v2: Join the checks for GLSL 1.10 and ESSL (Timothy).
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Signed-off-by: Andres Gomez <agomez@igalia.com>
Kenneth Graunke [Tue, 2 Aug 2016 03:59:08 +0000 (20:59 -0700)]
i965: Rework the unlit centroid workaround.
Previously, for every input, we moved the dispatch mask to the flag
register, then emitted two predicated PLN instructions, one with
centroid barycentric coordinates (for normal pixels), and one with
pixel barycentric coordinates (for unlit helper pixels).
Instead, we can simply emit a set of predicated MOVs at the top of
the program which copy the pixel barycentric coordinates over the
centroid ones for unlit helper pixel channels. Then, we can just
use normal PLNs.
On Sandybridge:
total instructions in shared programs: 7538470 -> 7534500 (-0.05%)
instructions in affected programs: 101268 -> 97298 (-3.92%)
helped: 705
HURT: 9 (all of which are SIMD16 programs)
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tim Rowley [Fri, 29 Jul 2016 17:47:49 +0000 (11:47 -0600)]
swr: [rasterizer core] static analysis fixes for conservative rast
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Thu, 28 Jul 2016 22:25:09 +0000 (16:25 -0600)]
swr: [rasterizer core] implement InnerConservative input coverage
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Thu, 28 Jul 2016 19:16:46 +0000 (13:16 -0600)]
swr: [rasterizer core] remove CanEarlyZ function
Test is now in SetupPipeline.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Tue, 26 Jul 2016 19:14:45 +0000 (13:14 -0600)]
swr: [rasterizer core] use 32x32 macrotile for openswr
Significant performance increase (up to 2x) on high geometry workloads.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Tue, 26 Jul 2016 18:32:14 +0000 (12:32 -0600)]
swr: [rasterizer fetch] add support for 24bit format fetch
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Tue, 26 Jul 2016 18:10:36 +0000 (12:10 -0600)]
swr: [rasterizer fetch] additional fetch format support
Add support for 0 pitch in fetch.
Add support for USCALE/SSCALE for 32bit integer fetches.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Mon, 25 Jul 2016 23:05:55 +0000 (17:05 -0600)]
swr: [rasterizer jitter] fix potential jit exit crash
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Mon, 25 Jul 2016 22:24:58 +0000 (16:24 -0600)]
swr: [rasterizer core] update sync handling
Sync now uses a callback to ensure that it's called by the last
thread moving past a DC. This will help with the new counter
handling.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Mon, 25 Jul 2016 22:21:47 +0000 (16:21 -0600)]
swr: [rasterizer core] rename variable
Avoid nested declarations of the same name within a single function.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Thu, 21 Jul 2016 22:54:25 +0000 (16:54 -0600)]
swr: [rasterizer jitter] adjust extern "C" block scope
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Wed, 20 Jul 2016 22:05:25 +0000 (16:05 -0600)]
swr: [rasterizer core] conservative rast degenerate handling
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Tue, 19 Jul 2016 18:51:46 +0000 (12:51 -0600)]
swr: [rasterizer core] allow hexadecimal for integer knobs
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Eric Anholt [Tue, 2 Aug 2016 19:48:47 +0000 (12:48 -0700)]
mesa: Dynamically allocate the matrix stack.
By allocating and initializing the matrices at context creation, the OS
couldn't even overcommit the pages. This saves about 63k (out of 946k) of
maximum memory size according to massif on simulated vc4
glsl-algebraic-add-add-1. It also means we could potentially relax the
maximum stack sizes, but that should be a separate commit.
v2: Drop redundant Top update, explain why the stack is small at init
time.
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Tue, 2 Aug 2016 19:28:27 +0000 (12:28 -0700)]
state_tracker: Initialize the draw context only when needed.
It's only used for rarely-used deprecated GL features
(feedback/rasterpos), so we can skip the memory allocation and
initialization for it most of the time.
Saves about 659k (out of 1605k) of maximum memory size according to massif
on simulated vc4 glsl-algebraic-add-add-1
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Wed, 3 Aug 2016 21:01:03 +0000 (14:01 -0700)]
vc4: Move scalarizing and some lowering to link time.
This works out to be a wash in terms of memory usage: We use more memory
to store the separate ALU instructions, but we optimize out a lot of code
as well. The main result, though, is that we do more of our work at link
time rather than draw time.
Eric Anholt [Wed, 3 Aug 2016 18:55:55 +0000 (11:55 -0700)]
vc4: Avoid VS shader recompiles by keeping a set of FS inputs seen so far.
We don't want to bake the whole array into the FS key, because of the
hashing overhead. But we can keep a set of the arrays seen, and use a
pointer to the copy in as the array's proxy.
Between this and the previous patch, gl-1.0-blend-func now passes on
hardware, where previously it was filling the 256MB CMA area with shaders
and OOMing.
Drops 712 shaders from shader-db.
Eric Anholt [Wed, 3 Aug 2016 18:57:53 +0000 (11:57 -0700)]
vc4: Don't recompile the CS when the FS changes.
The compiled_fs_id is a proxy for the vc4->prog.fs->input_slots[], but
only the VS dereferences it.
Drops 754 shaders from shader-db.
Eric Anholt [Wed, 3 Aug 2016 18:39:59 +0000 (11:39 -0700)]
vc4: Move FS inputs setup out to a helper function.
It's a pretty big block, and I was about to make it bigger.
Kenneth Graunke [Fri, 29 Jul 2016 08:29:12 +0000 (01:29 -0700)]
nir: Make nir_opt_remove_phis see through moves.
I found a shader in Tales of Maj'Eyal that contains:
if ssa_21 {
block block_1:
/* preds: block_0 */
...instructions that prevent the select peephole...
vec1 32 ssa_23 = imov ssa_4
vec1 32 ssa_24 = imov ssa_4.y
vec1 32 ssa_25 = imov ssa_4.z
/* succs: block_3 */
} else {
block block_2:
/* preds: block_0 */
vec1 32 ssa_26 = imov ssa_4
vec1 32 ssa_27 = imov ssa_4.y
vec1 32 ssa_28 = imov ssa_4.z
/* succs: block_3 */
}
block block_3:
/* preds: block_1 block_2 */
vec1 32 ssa_29 = phi block_1: ssa_23, block_2: ssa_26
vec1 32 ssa_30 = phi block_1: ssa_24, block_2: ssa_27
vec1 32 ssa_31 = phi block_1: ssa_25, block_2: ssa_28
Here, copy propagation will bail because phis cannot perform swizzles,
and CSE won't do anything because there is no dominance relationship
between the imovs. By making nir_opt_remove_phis handle identical moves,
we can eliminate the phis and rewrite everything to use ssa_4 directly,
so all the moves become dead and get eliminated.
I don't think we need to check "exact" - just the alu sources.
Presumably phi sources should match in their exactness.
On Broadwell:
total instructions in shared programs:
11639872 ->
11638535 (-0.01%)
instructions in affected programs: 134222 -> 132885 (-1.00%)
helped: 338
HURT: 0
v2: Fix return value to be NULL, not false (caught by Iago).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Fri, 29 Jul 2016 08:29:11 +0000 (01:29 -0700)]
nir: Make nir_alu_srcs_equal non-static.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Fri, 29 Jul 2016 08:29:10 +0000 (01:29 -0700)]
nir: Turn imov/fmov of undef into undef.
On Broadwell:
total instructions in shared programs:
11640214 ->
11639872 (-0.00%)
instructions in affected programs: 17744 -> 17402 (-1.93%)
helped: 78
HURT: 0
total spills in shared programs: 2924 -> 2922 (-0.07%)
spills in affected programs: 104 -> 102 (-1.92%)
helped: 1
HURT: 0
total fills in shared programs: 4394 -> 4389 (-0.11%)
fills in affected programs: 237 -> 232 (-2.11%)
helped: 1
HURT: 0
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Fri, 29 Jul 2016 08:29:09 +0000 (01:29 -0700)]
i965: Use a separate register for every access to an SSA undef.
Previously, we allocated a new VGRF for every undefined definition.
Instead, this patch makes us allocate a new VGRF for every use of an
undefined definition. This makes sure that undefined values are
fully independent of one another, and have live ranges limited to
their single use. This allows register coalescing to combine the
source and destination of MOVs from undefined sources, eliminating
the MOV altogether.
On Broadwell:
total instructions in shared programs:
11641187 ->
11640214 (-0.01%)
instructions in affected programs: 70199 -> 69226 (-1.39%)
helped: 213
HURT: 1
v2: Add a comment (based on Iago's suggested one).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Michel Dänzer [Thu, 28 Jul 2016 08:52:11 +0000 (17:52 +0900)]
vl/dri3: Destroy Present event context when destroying drawable v2
Without this, the X server may accumulate stale Present event contexts
if a client performs several video decoding sessions using the same
window.
v2: Based on Chris Wilson's review:
* Use xcb_discard_reply() instead of free(xcb_request_check())
Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com>
Michel Dänzer [Thu, 28 Jul 2016 08:44:49 +0000 (17:44 +0900)]
loader/dri3: Destroy Present event context when destroying drawable v2
Without this, the X server may accumulate stale Present event contexts
if a client ends up creating and destroying DRI drawables for the same
window.
v2: Based on Chris Wilson's review:
* Use xcb_present_select_input_checked so that protocol errors
generated by old X servers can be handled gracefully
* Use xcb_discard_reply() instead of free(xcb_request_check())
Ben Widawsky [Tue, 2 Aug 2016 00:18:48 +0000 (17:18 -0700)]
gbm: Correct bo_import documentation (trivial)
Missed here:
commit
a43d286ef7ff65087b1f051d071b829ca7b02073
Author: Kristian Høgsberg <krh@bitplanet.net>
Date: Fri Mar 28 10:17:11 2014 -0700
gbm: Add import from fd
Cc: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Eric Anholt [Tue, 2 Aug 2016 23:01:34 +0000 (16:01 -0700)]
vc4: Avoid generating a custom shader per level in glGenerateMipmaps().
We were baking in the LOD of the source level to each shader. Instead,
pass it in as a uniform -- this requires storing it to a temp register,
but that's better than compiling a ton of separate shaders:
total instructions in shared programs: 115032 -> 115036 (0.00%)
instructions in affected programs: 96 -> 100 (4.17%)
LOST: 572
Eric Anholt [Tue, 2 Aug 2016 22:01:59 +0000 (15:01 -0700)]
vc4: Tell valgrind about BO allocations from mmap time to destroy.
This helps in debugging memory pressure. It would be nice if we could
tell valgrind about it all the way from allocation time to destroy, but we
need a pointer to hand to VALGRIND_MALLOCLIKE_BLOCK.
Jan Ziak [Sat, 30 Jul 2016 00:31:10 +0000 (02:31 +0200)]
loader: fix memory leak in loader_dri3_open
Found via "valgrind --leak-check=full glxgears".
Signed-off-by: Jan Ziak (http://atom-symbol.net) <0xe2.0x9a.0x9b@gmail.com>
Acked-by: Boyan Ding <boyan.j.ding@gmail.com>
Cc: "12.0 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Tue, 2 Aug 2016 18:02:21 +0000 (11:02 -0700)]
vc4: Fix a leak of the src[] array of VPM reads in optimization.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Eric Anholt [Tue, 2 Aug 2016 17:57:01 +0000 (10:57 -0700)]
vc4: Fix leak of the bo_handles table.
Eric Anholt [Wed, 27 Jul 2016 21:58:43 +0000 (14:58 -0700)]
vc4: Fix handling of UBO range offsets.
The ranges are in units of bytes, not dwords. This wasn't caught by
piglit tests because ttn tends to make one big uniform file, so we only
had one UBO range with a src and dst offset of 0.
Eric Anholt [Thu, 28 Jul 2016 00:26:59 +0000 (17:26 -0700)]
nir: Allow opt_peephole_select to work on empty blocks.
nir_opt_peephole_select has the job of removing IF statements with no side
effects. However, if the IF statement's successor didn't have any
instructions in it, we were skipping it, which occurred in mupen64 on vc4
with glsl_to_nir enabled:
instructions in affected programs: 6134 -> 4120 (-32.83%)
total uniforms in shared programs: 38268 -> 38219 (-0.13%)
No changes on Haswell shader-db.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Anholt [Wed, 27 Jul 2016 00:21:46 +0000 (17:21 -0700)]
vc4: Dump NIR at shader state creation time as well.
I keep wanting to see this version of the NIR.
Marek Olšák [Thu, 14 Jul 2016 23:06:58 +0000 (01:06 +0200)]
r600g: use last_gfx_fence like radeonsi
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 14 Jul 2016 22:39:38 +0000 (00:39 +0200)]
gallium/radeon: move last_gfx_fence from radeonsi to common code
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 2 Aug 2016 09:51:21 +0000 (11:51 +0200)]
radeonsi: skip unnecessary si_update_shaders calls
Small decrease in draw call overhead.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 30 Jul 2016 12:57:20 +0000 (14:57 +0200)]
radeonsi: print the command line to VM fault reports (v2)
v2: rebase on top of Brian's commit
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 30 Jul 2016 12:56:28 +0000 (14:56 +0200)]
ddebug: print the command line to all logs (v2)
for piglit with the pipelined hang detection mode
v2: rebase on top of Brian's commit
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 30 Jul 2016 21:54:06 +0000 (23:54 +0200)]
ddebug: don't use fmemopen on non-Linux OS
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97140
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 30 Jul 2016 14:32:32 +0000 (16:32 +0200)]
radeonsi: don't set the last parameter component of llvm.AMDGPU.cube
LLVM doesn't use it.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 30 Jul 2016 14:28:20 +0000 (16:28 +0200)]
radeonsi: use llvm.amdgcn.cube* if available
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 30 Jul 2016 14:23:48 +0000 (16:23 +0200)]
radeonsi: use llvm.amdgcn.rsq.f64 if available
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 26 Jul 2016 20:34:03 +0000 (22:34 +0200)]
radeonsi: use v_mad_f32 for fma
v_fma_f32 runs at FP64 rate (= slow). Alien Isolation and F1 2015 seem
to use fma for all d3d multiply-add instructions, which is silly.
This tries to restore performance for those games.
The main difference between v_mad_f32 and v_fma_f32 is that v_mad doesn't
support denormals, which we don't enable anyway, because they are slow too.
Also, there is code size reduction:
Totals from affected shaders:
VGPRS: 109796 -> 109808 (0.01 %)
Spilled SGPRs: 29995 -> 30022 (0.09 %)
Spilled VGPRs: 12 -> 13 (8.33 %) <-- it's just one shader going from 12 to 13
Code Size: 6667596 -> 6476356 (-2.87 %) bytes
Max Waves: 26931 -> 26899 (-0.12 %)
I've not actually tested real performance.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Haixia Shi [Wed, 3 Aug 2016 00:03:32 +0000 (17:03 -0700)]
i965: use mt->offset in intel_miptree_map_movntdqa()
We need to include mt->offset in the calculation of src pointer because its
value may be non-zero, for example in a cubemap texture.
Signed-off-by: Haixia Shi <hshi@chromium.org>
Cc: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chad Versace <chad@kiwitree.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Change-Id: I461ad5b204626d5a1c45611fc6b63735dcf29f63
Timothy Arceri [Tue, 2 Aug 2016 07:46:19 +0000 (17:46 +1000)]
nir: fix validation message
Looks like a copy and paste error from
f752effa087
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Chad Versace [Tue, 2 Aug 2016 20:29:53 +0000 (13:29 -0700)]
.mailmap: Update my address
I left Intel, so make my personal address the canonical address.
Tim Rowley [Tue, 2 Aug 2016 18:18:08 +0000 (13:18 -0500)]
swr: build swr with -fno-strict-aliasing
swr rasterizer contains numerous data transfers between vectors
and ordinary C types. Fixing for strict aliasing will take time.
Reviewed-by: Matt Turner <mattst88@gmail.com>