Alyssa Rosenzweig [Tue, 22 Mar 2022 01:31:53 +0000 (21:31 -0400)]
asahi: Run lower_blend for all fragment shaders
Unify the paths so that colour masks are respected even when regular
blending is off (or when logic ops are used!) Fixes
dEQP-GLES2.functional.color_clear.masked_rgb
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Mike Blumenkrantz [Wed, 18 May 2022 14:07:43 +0000 (10:07 -0400)]
turnip: fix assert for max xfb outputs
this is a counter, not an index, so use <=
cc: mesa-stable
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16620>
Chia-I Wu [Mon, 16 May 2022 18:07:03 +0000 (11:07 -0700)]
turnip: disable UBWC for SNORM formats
In copy_format, we treat snorm as unorm to avoid clamping. But snorm
and unorm are UBWC incompatible for special values such as all 0's or
all 1's. Disable UBWC for snorm.
For reference, I dumped the first byte of an UBWC blocks and it was
color UNORM SNORM
all black 0x01 0x31
all white 0x0d 0x11
@flto clarified that bit 4 is unset for fast clear encoded blocks. It
looks like fast clear is not used for SNORM.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6480
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16534>
Jeffrey Knockel [Mon, 2 May 2022 01:15:32 +0000 (21:15 -0400)]
egl: dereference XCB drawable pointers
eglCreatePlatformWindowSurface[EXT] and
eglCreatePlatformPixmapSurface[EXT] should be passed (xcb_window_t *)
and (xcb_pixmap_t *), so we must dereference these types before using
them as drawables. We already do something similar with X11 drawable
pointers.
Signed-off-by: Jeffrey Knockel <jeff@jeffreyknockel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16269>
Karol Herbst [Sat, 7 May 2022 10:20:17 +0000 (12:20 +0200)]
clc: disable opaque pointers until they are supported
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16479>
Karol Herbst [Thu, 12 May 2022 17:26:31 +0000 (19:26 +0200)]
clc: fix compiler features_macro CTS Test
Even with that alone we can't pass the test, as LLVM enables some
extensions based on the SPIR target we choose.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16479>
Karol Herbst [Fri, 15 Apr 2022 17:21:44 +0000 (19:21 +0200)]
clc: speed up compilation by not relying on opencl-c.h
This depends on LLVM change: https://reviews.llvm.org/D125401
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16479>
Karol Herbst [Sat, 23 Apr 2022 08:48:51 +0000 (10:48 +0200)]
clc: drop parsingComplete check
This relies too much on the properties of the SPIRV-LLVM-Translator and is
required to load SPIR-Vs found in the OpenCL CTS.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16479>
Karol Herbst [Sun, 24 Apr 2022 11:21:13 +0000 (13:21 +0200)]
clc: parse localSize and localSizeHint
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16479>
Chia-I Wu [Tue, 17 May 2022 23:30:34 +0000 (16:30 -0700)]
turnip: fix tu6_pack_border_color for z24
The value should be at the bottom 24 bits, not at the top.
dEQP-VK.pipeline.sampler.* still passes. This fixes most of
dEQP-GLES31.functional.texture_border_clamp.formats.*depth* on angle.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16570>
Icecream95 [Thu, 5 May 2022 01:06:28 +0000 (13:06 +1200)]
panfrost: Move patched_s out of the pan_blitter_views struct
The struct is returned from a function, so in debug builds the address
may change after returning, and pointers to patched_s will be broken.
Pass the pointer to the patched stencil view as a parameter to
pan_preload_get_views to avoid this.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16343>
Icecream95 [Thu, 5 May 2022 01:04:37 +0000 (13:04 +1200)]
panfrost: Increase the limit for blend shader variants
Qt uses blend constants to set text colour, this will allow more
colours onscreen before thrashing happens.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16343>
Icecream95 [Thu, 5 May 2022 00:57:40 +0000 (12:57 +1200)]
panfrost: Copy blend constant into variant even when reusing it
Otherwise future lookups will match searches for the old constant.
Fixes:
bbff09b9521 ("panfrost: Move the blend shader cache at the device level")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6355
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16343>
Mike Blumenkrantz [Tue, 10 May 2022 16:38:01 +0000 (12:38 -0400)]
zink: use dynamic rendering (most of the time)
this is a simplified version of the renderpass infrastructure which
tracks rendering info on the context and updates it incrementally to
try and reduce cpu overhead
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Wed, 11 May 2022 14:54:33 +0000 (10:54 -0400)]
zink: split out scissor flagging from framebuffer updating
this is kinda similar but not actually the same thing
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 16:28:34 +0000 (12:28 -0400)]
zink: lift some renderpass mechanics up a level in the api
(should be) no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 16:25:43 +0000 (12:25 -0400)]
zink: track whether there's any transient attachments bound
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 16:24:15 +0000 (12:24 -0400)]
zink: break out zs rt attrib analysis into util function
(should be) no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 16:24:15 +0000 (12:24 -0400)]
zink: break out color rt attrib analysis into util function
(should be) no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 16:22:40 +0000 (12:22 -0400)]
zink: fix indentation
no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 16:22:25 +0000 (12:22 -0400)]
zink: pass rt attrib to zink_render_pass_attachment_get_barrier_info()
no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 16:20:33 +0000 (12:20 -0400)]
zink: remove renderpass state flag for swapchain
this is redundant and can be merged onto the rt attrib
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 16:18:19 +0000 (12:18 -0400)]
zink: break up swapchain renderpass update to util function
no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 16:17:37 +0000 (12:17 -0400)]
zink: break out sample location updating to separate function
no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Tue, 10 May 2022 15:42:14 +0000 (11:42 -0400)]
zink: use local variable for getting rt barrier info
no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Mon, 9 May 2022 16:24:04 +0000 (12:24 -0400)]
zink: remove fb rebind check during renderpass begin
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Mon, 9 May 2022 16:23:26 +0000 (12:23 -0400)]
zink: use global image rebind counter for dmabuf export
this is a bit less flimsy and handles more than just framebuffer rebinds
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Mon, 9 May 2022 15:32:32 +0000 (11:32 -0400)]
zink: move renderpass handling to zink_render_pass.c
no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Mon, 9 May 2022 15:21:55 +0000 (11:21 -0400)]
zink: use zink_batch_no_rp to end renderpasses
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Mon, 9 May 2022 15:20:13 +0000 (11:20 -0400)]
zink: always use zink_batch_rp to init renderpass
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Mike Blumenkrantz [Thu, 7 Apr 2022 19:23:58 +0000 (15:23 -0400)]
zink: rename a fb surface variables
no functional changes, just being more consistent
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16476>
Samuel Pitoiset [Tue, 10 May 2022 17:48:32 +0000 (19:48 +0200)]
radv: export implicit primitive ID in NIR for legacy VS or TES
It's implicit for VS or TES, while it's required for GS or MS.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16404>
Samuel Pitoiset [Fri, 13 May 2022 15:40:42 +0000 (17:40 +0200)]
radv: determine if shaders use NGG before linking
This would be needed by some NIR pass during linking. Given that NGG
settings are currently dispatched in many places, I don't think this
should hurt but it should be refactored at some point.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16404>
Iago Toral Quiroga [Fri, 20 May 2022 07:44:45 +0000 (09:44 +0200)]
broadcom/compiler: don't promote early fragment tests when writing sample mask
If the sample mask is being written it means we want to discard some of the
samples generated so we should not be promoting the fragment shader to
do early tests, since that would not take into account the sample mask
written from the shader.
Fixes:
dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_samples_4
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16626>
Iago Toral Quiroga [Fri, 20 May 2022 06:46:51 +0000 (08:46 +0200)]
v3dv: fix format usage checks when extended usage flag is set
Fixes:
dEQP-VK.image.extended_usage_bit_compatibility.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16625>
Iago Toral Quiroga [Wed, 18 May 2022 11:59:24 +0000 (13:59 +0200)]
v3dv: expose VK_KHR_vulkan_memory_model
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16602>
Hyunjun Ko [Fri, 20 May 2022 01:37:38 +0000 (01:37 +0000)]
turnip: add an assertion for max descriptor set count.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16624>
Lucas Stach [Thu, 19 May 2022 18:29:38 +0000 (20:29 +0200)]
etnaviv: add linear PE support
GPUs with the LINEAR_PE feature bit have the ability to render into linear
buffers. While this decreases PE cache effectiveness and is thus slower than
rendering into a (super-)tiled buffer, it's still preferable for cases where
we would need a blit to get into linear otherwise, i.e. when importing a
linear buffer or when linear is forced on allocation by usage flags or
modifiers.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16615>
Lucas Stach [Thu, 19 May 2022 17:18:29 +0000 (19:18 +0200)]
etnaviv: improve single buffer setup
The blob only switches to the 3 single buffer state when required, which seems
to be the case when any color or ZS target is <= 16bpp. Using 2 as the single
buffer state gives a very small 1-2% performance improvement on fillrate
constrained rendering, so it likely affects some PE cache setting.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16615>
Sil Vilerino [Thu, 19 May 2022 13:43:33 +0000 (06:43 -0700)]
winsys: Do not use Display type when X11 is not present in build
Reviewed-by: Adam Jackson <ajax@redhat.com>
Closes: mesa/mesa#6520
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16608>
Pierre-Eric Pelloux-Prayer [Wed, 18 May 2022 11:00:35 +0000 (13:00 +0200)]
radeonsi/tests: use a smaller tests-per-group value
Faster glcts runs (44 -> 34 sec).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16580>
Pierre-Eric Pelloux-Prayer [Wed, 18 May 2022 10:55:58 +0000 (12:55 +0200)]
radeonsi/tests: add a --slow option
Some glcts tests implement tons of tests because they verify
every possible combination of format/swizzle/target/...
They take a long time to execute and aren't possible to run
using multiple processes.
The proper way to fix it would be to split them in vk-gl-cts,
as is already done for some of them (eg es31fTextureGatherTests.cpp).
In the meantime, not running them makes glcts run almost
10 times faster.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16580>
Hyunjun Ko [Fri, 20 May 2022 01:29:31 +0000 (01:29 +0000)]
radv: fix assertion for the count of xfb output
It's an counter, not an index.
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16623>
Hans-Kristian Arntzen [Wed, 18 May 2022 13:44:30 +0000 (15:44 +0200)]
radv: Fix RTPSO hashing of pGroups.
There are padding bytes here. Only hash relevant members.
Fixes:
ca2d96db51e ("radv: Add caching for RT pipelines.")
Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16582>
Jason Ekstrand [Thu, 19 May 2022 16:12:46 +0000 (11:12 -0500)]
lavapipe: Use the common BindVertexBuffers wrapper
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16611>
Jason Ekstrand [Thu, 19 May 2022 16:28:51 +0000 (11:28 -0500)]
radv: Use the common CmdBindVertexBuffers wrapper
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16611>
Jason Ekstrand [Thu, 19 May 2022 16:28:03 +0000 (11:28 -0500)]
radv: Add a sqtt entrypoint for CmdBindVertexBuffers2
Fixes:
b2622843003e ("radv: add support for dynamic vertex input binding stride")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16611>
Jason Ekstrand [Thu, 19 May 2022 16:10:23 +0000 (11:10 -0500)]
vulkan,anv,turnip: Add a common CmdBindVertexBuffers wrapper
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16611>
Qiang Yu [Wed, 18 May 2022 03:17:20 +0000 (11:17 +0800)]
radeonsi: lower nir_intrinsic_sparse_residency_code_and
This is required by lower_tg4_offsets which split one
sparseTextureGatherOffsetsARB call to four sparseTextureGatherOffsetARB
calls and merge their resisident results into one.
Fixes:
ee040a6b639 ("radeonsi: enable ARB_sparse_texture2")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16599>
Mike Blumenkrantz [Thu, 19 May 2022 23:50:25 +0000 (19:50 -0400)]
zink: update radv baseline
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16622>
Nicolas Caramelli [Thu, 19 May 2022 14:58:05 +0000 (16:58 +0200)]
egl: Fix EGL_EXT_platform_xcb name string to match the registry
Signed-off-by: Nicolas Caramelli <caramelli.devel@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16609>
Dylan Baker [Thu, 19 May 2022 21:57:47 +0000 (14:57 -0700)]
docs: update calendar and link releases notes for 22.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16617>
Dylan Baker [Thu, 19 May 2022 21:57:38 +0000 (14:57 -0700)]
docs: Extend calendar entries for 22.0 by 1 releases.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16617>
Dylan Baker [Thu, 19 May 2022 21:21:30 +0000 (14:21 -0700)]
docs: add sha256sum to 22.0.4 notes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16617>
Dylan Baker [Thu, 19 May 2022 18:06:58 +0000 (11:06 -0700)]
docs: add release notes for 22.0.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16617>
Jason Ekstrand [Thu, 19 May 2022 17:47:50 +0000 (12:47 -0500)]
lavapipe: Use the correct ICD path on Win32
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16612>
Kenneth Graunke [Tue, 17 May 2022 23:37:35 +0000 (16:37 -0700)]
intel: Drop Wa_1409226450 (stall before instruction cache invalidation)
Production Tigerlake and DG1 hardware shouldn't need this workaround.
It was only needed on the very first steppings which never went public.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16575>
Emma Anholt [Thu, 12 May 2022 00:33:11 +0000 (17:33 -0700)]
freedreno/ir3: Lower texture instructions used only for f2f16 to 16-bit.
2.5% improvement in gfxbench vk-5-normal. No obvious change on
gl-5-normal.
shader-db on Rob's android shaders:
total instructions in shared programs: 770644 -> 770595 (<.01%)
instructions in affected programs: 14880 -> 14831 (-0.33%)
total nops in shared programs: 167784 -> 167860 (0.05%)
nops in affected programs: 3351 -> 3427 (2.27%)
total non-nops in shared programs: 602860 -> 602735 (-0.02%)
non-nops in affected programs: 10523 -> 10398 (-1.19%)
total mov in shared programs: 19313 -> 19286 (-0.14%)
mov in affected programs: 365 -> 338 (-7.40%)
total cov in shared programs: 18075 -> 17978 (-0.54%)
cov in affected programs: 566 -> 469 (-17.14%)
total dwords in shared programs: 1612848 -> 1612596 (-0.02%)
dwords in affected programs: 13882 -> 13630 (-1.82%)
total last-baryf in shared programs: 56144 -> 55975 (-0.30%)
last-baryf in affected programs: 482 -> 313 (-35.06%)
total full in shared programs: 36094 -> 36092 (<.01%)
full in affected programs: 10 -> 8 (-20.00%)
total sstall in shared programs: 66986 -> 66923 (-0.09%)
sstall in affected programs: 1392 -> 1329 (-4.53%)
total systall in shared programs: 91244 -> 91072 (-0.19%)
systall in affected programs: 1194 -> 1022 (-14.41%)
total (sy) in shared programs: 4316 -> 4321 (0.12%)
(sy) in affected programs: 19 -> 24 (26.32%)
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
Emma Anholt [Thu, 12 May 2022 02:55:45 +0000 (19:55 -0700)]
freedreno/ir3: Add support for 16-bit nir_texop_lod.
Same basic path, just do the rescaling in half float.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
Emma Anholt [Mon, 2 May 2022 23:22:37 +0000 (16:22 -0700)]
turnip: Make RelaxedPrecision-decorated ALU ops 16-bit.
Improves gfxbench vk-5-normal performance 5.5%.
Fixes: #6346
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
Emma Anholt [Tue, 26 Apr 2022 23:29:04 +0000 (16:29 -0700)]
spirv_to_nir: Cast RelaxedPrecision ALU op dests to mediump.
This is controlled by spirv_to_nir_options.relaxed_precision_alu, because
some drivers don't want it.
This gets us mostly 16-bit math on turnip in vk-5-normal.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
Emma Anholt [Mon, 2 May 2022 22:54:12 +0000 (15:54 -0700)]
spirv: Use nir_vec_scalars() to simplify matrix transpose.
This should emit fewer instructions that need to be copy-propagated away.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
Emma Anholt [Wed, 11 May 2022 23:31:33 +0000 (16:31 -0700)]
freedreno/ir3: Fix 16-bit bit_count.
No need to do the 16-bit lowering if it already is.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16465>
Lionel Landwerlin [Thu, 19 May 2022 10:09:25 +0000 (13:09 +0300)]
u_trace/anv/iris: drop cs argument for recording traces
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16605>
Danylo Piliaiev [Wed, 18 May 2022 10:08:22 +0000 (13:08 +0300)]
docs/u_trace: document u_trace usage
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16579>
Charmaine Lee [Wed, 18 May 2022 22:33:05 +0000 (15:33 -0700)]
svga: fix aa point
Use in_prim from current geometry shader to check for point prim type
when determine if aa point is enabled or not.
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16598>
Charmaine Lee [Wed, 18 May 2022 00:20:53 +0000 (17:20 -0700)]
svga: add need_texcoord_semantic to tgsi_add_point_sprite & tgsi_add_aa_point
Since PIPE_CAP_TGSI_TEXCOORD is now set in SVGA vgpu10 driver,
we need to add a new parameter need_texcoord_semantic to
tgsi_add_point_sprite and tgsi_add_aa_point
to allow setting texcoords using tgsi texcoord semantic.
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16598>
Lionel Landwerlin [Thu, 19 May 2022 07:43:23 +0000 (10:43 +0300)]
intel/ds: fix compilation
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6518
Fixes:
efc2782f970c ("intel/perf: store a copy of devinfo")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16601>
Dylan Baker [Thu, 19 May 2022 16:03:09 +0000 (09:03 -0700)]
docs: Add calendar entries for 22.1 release.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16610>
Dylan Baker [Wed, 18 May 2022 20:31:26 +0000 (13:31 -0700)]
relnotes: Add sha256sum and fix minor formatting issues
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16610>
Dylan Baker [Wed, 18 May 2022 19:30:26 +0000 (12:30 -0700)]
docs: add release notes for 22.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16610>
Dylan Baker [Thu, 19 May 2022 16:00:04 +0000 (09:00 -0700)]
docs: update calendar and link releases notes for 22.1.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16610>
Alyssa Rosenzweig [Mon, 9 May 2022 20:03:27 +0000 (16:03 -0400)]
pan/va: Use ^ instead of ` to indicate last-use
This syncs the ISA syntax with other Valhall ISA users. It's also somewhat
easier to read.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 18 May 2022 15:57:55 +0000 (11:57 -0400)]
pan/va: Remove DISCARD.f32 destination
It doesn't actually write anything. This is a pointless divergence from Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Mon, 16 May 2022 13:43:34 +0000 (09:43 -0400)]
pan/va: Handle 2-src blend in lower_split_src
Fixes assertion fail in shaders/dolphin/smg.1.shader_test
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Fri, 13 May 2022 00:21:42 +0000 (20:21 -0400)]
pan/bi: Validate vector widths
Now that our IR is much more strongly typed, and RA code quality depends on
correct typing, add a validation pass to make sure we didn't screw it up. This
pass found a massive number of bugs in early versions of this series.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 19:47:39 +0000 (15:47 -0400)]
pan/bi: Validate preload constraints are satisfied
We tightened the rules around preloading substantially and take advantage of the
rules in RA. The safe helpers it introduced should ensure the rules are
followed, but just in case, add a validation pass to check our work. This pass
found (multiple) bugs in early versions of this series.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Fri, 13 May 2022 15:54:19 +0000 (11:54 -0400)]
pan/bi: See through splits for var_tex fusion
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Thu, 12 May 2022 17:10:57 +0000 (13:10 -0400)]
pan/bi: Optimize split of collect
Required to get decent codegen from UBO pushing.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Thu, 12 May 2022 16:37:00 +0000 (12:37 -0400)]
pan/bi: Don't propagate discard
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 21:12:13 +0000 (17:12 -0400)]
pan/bi: Remove liveness metadata tracking
We don't use it for anything, and with no pass infrastructure it's just an
accident waiting to happen.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 19:39:56 +0000 (15:39 -0400)]
pan/bi: Simplify register precolouring in the IR
In the current IR, any register may be preloaded by reading it anywhere, and any
register may be precoloured by writing it anywhere. This is convenient for
instruction selection, but requires the register allocator to do considerable
gymnastics to ensure it doesn't clobber precoloured registers. It also breaks
the purity of our SSA representation, which complicates optimization passes
(e.g. copyprop).
Let's trade some instruction selection complexity for simplifying register
allocation by constraining how register precolouring works. Under the new model:
* Registers may only be preloaded at the start of the program.
* Precoloured destinations are handled explicitly by RA.
Internally, a stronger invariant is placed for preloading: registers may only be
preloaded by MOV.i32 instructions at the beginning of the block, and these moves
must be unique. These invariants ensure RA can trivially coalesce the moves.
A bi_preload helper is added as a safe version of bi_register respecting these
invariants, allowing a smooth transition for instruction selection.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 16:21:38 +0000 (12:21 -0400)]
pan/bi: Remove bi_word and bi_word_node
They are no longer used, as offsets are no longer used for normal values (only for
FAU). Keep it like that.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 16:26:42 +0000 (12:26 -0400)]
pan/bi: Scalarize copyprop
Reduces memory footprint.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 16:24:31 +0000 (12:24 -0400)]
pan/bi: Scalarize modifier propagation
Reduces memory footprint.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 16:24:22 +0000 (12:24 -0400)]
pan/bi: Scalarize bi_opt_cse
Reduces memory footprint.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 16:22:10 +0000 (12:22 -0400)]
pan/bi: Scalarize bi_lower_swizzle
Reduces memory footprint.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 16:18:36 +0000 (12:18 -0400)]
pan/va: Don't use bi_word in FAU unit test
It will be removed shortly, as the FAU construction helper should be used
instead.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 16:15:54 +0000 (12:15 -0400)]
pan/va: Use split for 64-bit lowering
Written in this way, this pass looks pretty silly...
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Tue, 10 May 2022 16:22:48 +0000 (12:22 -0400)]
pan/bi: Emit collect and split
..Rather than using offsets during instruction selection.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Tue, 10 May 2022 16:23:28 +0000 (12:23 -0400)]
pan/bi: Simplfy BLEND emit
We don't need to collect anything, now that Valhall handles this case correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Tue, 10 May 2022 15:54:03 +0000 (11:54 -0400)]
pan/bi: Lift split/collect cache from AGX
Design based on ACO (and fruitful discussions with Daniel).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Tue, 10 May 2022 14:03:16 +0000 (10:03 -0400)]
pan/bi: Create COLLECT during isel
This transitions us away from the fake SSA we currently use for vectors.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Tue, 10 May 2022 16:21:58 +0000 (12:21 -0400)]
pan/bi: Expand MAX_DESTS to 4
For splits.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 18 May 2022 16:44:38 +0000 (12:44 -0400)]
pan/bi: Fix mov and pack_32_2x16
Move can take in a vector and write a scalar, depending on the swizzle. We need
to handle this case. Split out mov and pack_32_2x16 so we can specify correct
behaviour for both. Also drop unused 1-bit boolean stuff which obscured the fix.
Fixes:
76cea8e27b3 ("panfrost: Fix pack_32_2x16 implementation")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Mon, 16 May 2022 18:17:51 +0000 (14:17 -0400)]
pan/bi: Lower split/collect before RA
For transitioning to the new scalarized IR.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 11 May 2022 19:39:38 +0000 (15:39 -0400)]
pan/bi: Add bi_before_block cursor
Useful for preloading.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Mon, 9 May 2022 21:00:11 +0000 (17:00 -0400)]
pan/bi: Add collect and split instructions
These move-like instructions will be generated during instruction selection and
lowered before/after register allocation.
These need special printer support until we get dynamic sources/destinations.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Mon, 9 May 2022 21:28:38 +0000 (17:28 -0400)]
pan/bi: Add source/destination counts
In preparation for dynamic allocation, as needed for phi nodes and parallel
copies. For now, it just serves to simplify the semantics of splits and
collects.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
Alyssa Rosenzweig [Wed, 18 May 2022 14:52:29 +0000 (10:52 -0400)]
pan/bi: Use value-based interference with LCRA
"Revisiting Out-of-SSA Translation for Correctness, Code Quality, and
Efficiency" discusses "value-based interference": two variables interfere if and
only if there exists a point in the program where they are both live *with
different values*. In particular, the source and destination of a move do not
interfere a priori, because they have the same value at that point in the
program. (If a later instruction overwrites one, the required interference will
be added there).
We can use this idea to avoid some extra interferences, avoiding a regression in
moves from split/collect.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
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