platform/kernel/u-boot.git
8 years agotpm: Fix fault in case CONFIG_DM_TPM is set without any TPM
Christophe Ricard [Thu, 21 Jan 2016 22:19:13 +0000 (23:19 +0100)]
tpm: Fix fault in case CONFIG_DM_TPM is set without any TPM

In case CONFIG_DM_TPM was set without any TPM chipset configured a fault
was generated (NULL pointer access).

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Thu, 28 Jan 2016 20:17:11 +0000 (15:17 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra

8 years agoARM: tegra: rm Jetson TK1 PMIC GPIO programming
Stephen Warren [Mon, 18 Jan 2016 18:23:16 +0000 (11:23 -0700)]
ARM: tegra: rm Jetson TK1 PMIC GPIO programming

The PMIC is configured such that its GPIOs have the correct configuration
at power-up, so no programming is required.

In fact, the current programming is actively wrong, since:

(a) the AS3722 driver configures the GPIO to be an output before setting
its output value, which causes a 0v glitch on the output.

(b) the AS3722 driver configures the GPIO to drive a high voltage from its
VSUP_GPIO power source rather than its VDD_GPIO_LV power source, so the pin
drives 5V not 1.8V as desired.

Solve these problems by removing the code which configures the PMIC GPIOs.

Note that this patch was tested directly on top of v2016.01; since then,
commit 96350f729c42 "dm: tegra: net: Convert tegra boards to driver model
for Ethernet" prevents PCIe from being initialized. Alternatively, simply
revert that commit to get PCIe Ethernet working again, then apply this
patch to test.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-x86
Tom Rini [Thu, 28 Jan 2016 15:07:22 +0000 (10:07 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-x86

8 years agox86: Correct spi node alias
Bin Meng [Wed, 27 Jan 2016 08:56:34 +0000 (00:56 -0800)]
x86: Correct spi node alias

With recent changes spi node was moved to a place as a subnode under
pch, so update the alias to refer to its correct place as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agox86: config option for loading ACPI table from QEMU
Miao Yan [Wed, 20 Jan 2016 09:57:07 +0000 (01:57 -0800)]
x86: config option for loading ACPI table from QEMU

This patch adds a config option for loading ACPI table from QEMU. When enabled,
U-Boot won't generate ACPI tables, but use those provided by QEMU.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: qemu: add the ability to load and link ACPI tables from QEMU
Miao Yan [Wed, 20 Jan 2016 09:57:06 +0000 (01:57 -0800)]
x86: qemu: add the ability to load and link ACPI tables from QEMU

This patch adds the ability to load and link ACPI tables provided by QEMU.
QEMU tells guests how to load and patch ACPI tables through its fw_cfg
interface, by adding a firmware file 'etc/table-loader'. Guests are
supposed to parse this file and execute corresponding QEMU commands.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: qemu: setup PM IO base for ACPI in southbridge
Miao Yan [Wed, 20 Jan 2016 09:57:05 +0000 (01:57 -0800)]
x86: qemu: setup PM IO base for ACPI in southbridge

Enable ACPI IO space for piix4 (for pc board) and ich9 (for q35 board)

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: qemu: re-structure qemu_fwcfg_list_firmware()
Miao Yan [Wed, 20 Jan 2016 09:57:04 +0000 (01:57 -0800)]
x86: qemu: re-structure qemu_fwcfg_list_firmware()

Re-write the logic in qemu_fwcfg_list_firmware(), add a function
qemu_fwcfg_read_firmware_list() to handle reading firmware list.

Signed-off-by: Miao Yan <yanmiaobest@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: baytrail: Add option to disable the internal UART to setup_early_uart()
Stefan Roese [Tue, 19 Jan 2016 13:24:12 +0000 (14:24 +0100)]
x86: baytrail: Add option to disable the internal UART to setup_early_uart()

This patch adds a parameter to the function setup_early_uart() to either
enable or disable the internal BayTrail legacy UART. Since the name
setup_early_uart() does not match its functionality any more, lets
rename it to setup_internal_uart() as well in this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agomisc: Add simple driver to enable the legacy UART on Winbond Super IO chips
Stefan Roese [Tue, 19 Jan 2016 13:05:10 +0000 (14:05 +0100)]
misc: Add simple driver to enable the legacy UART on Winbond Super IO chips

On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: x86-common.h: Add generic FS commands
Stefan Roese [Mon, 18 Jan 2016 13:49:57 +0000 (14:49 +0100)]
x86: x86-common.h: Add generic FS commands

This patch adds the generic FS commands (ls, load) to all x86 boards.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Miao Yan <yanmiaobest@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
8 years agox86: baytrail: Add documentation for FSP memory-down values
Stefan Roese [Mon, 18 Jan 2016 10:55:44 +0000 (11:55 +0100)]
x86: baytrail: Add documentation for FSP memory-down values

This patch adds the documentation for the memory-down parameters
of the Intel FSP. To configure a board without SPD DDR DIMM but
with onboard DDR chips. The values are taken from the coreboot
header:

src/soc/intel/fsp_baytrail/chip.h

(git ID da1a70ea from 2016-01-16 as reference).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Andrew Bradford <andrew.bradford@kodakalaris.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agoMerge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Wed, 27 Jan 2016 20:05:36 +0000 (15:05 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

8 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Wed, 27 Jan 2016 20:05:12 +0000 (15:05 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-microblaze

8 years agoarmv8/ls1043aqds: add QSPI boot support
Qianyu Gong [Mon, 25 Jan 2016 07:16:07 +0000 (15:16 +0800)]
armv8/ls1043aqds: add QSPI boot support

Enable the U-Boot Driver Model(DM) to use the Freescale QSPI driver.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/ls1043aqds: add QSPI support in SD boot
Gong Qianyu [Mon, 25 Jan 2016 07:16:06 +0000 (15:16 +0800)]
armv8/ls1043aqds: add QSPI support in SD boot

QSPI and IFC are pin-multiplexed on LS1043A. So we use
ls1043aqds_sdcard_ifc_defconfig to support IFC in SD boot and
ls1043aqds_sdcard_qspi_defconfig to support QSPI in SD boot.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/ls1043aqds: add DSPI support
Gong Qianyu [Mon, 25 Jan 2016 07:16:05 +0000 (15:16 +0800)]
armv8/ls1043aqds: add DSPI support

Enable three DSPI flash memories on board.

Commands:
=> sf probe 1:0
SF: Detected N25Q128A with page size 256 Bytes,
erase size 64 KiB, total 16 MiB
=> sf probe 1:1
SF: Detected SST25WF040B with page size 256 Bytes,
erase size 4 KiB, total 512 KiB
=> sf probe 1:2
SF: Detected EN25S64 with page size 256 Bytes,
erase size 64 KiB, total 8 MiB

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodm: env_sf: fix saveenv() to use driver model
Gong Qianyu [Tue, 26 Jan 2016 07:06:42 +0000 (15:06 +0800)]
dm: env_sf: fix saveenv() to use driver model

It might be missed when converting spi_flash_probe() in cmd_sf.c.

This patch refers to commit fbb099183e3a ("dm: Convert
spi_flash_probe() and 'sf probe' to use driver model").

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agospi: fsl_qspi: Fix qspi_op_rdsr memcpy issue
Gong Qianyu [Tue, 26 Jan 2016 07:06:41 +0000 (15:06 +0800)]
spi: fsl_qspi: Fix qspi_op_rdsr memcpy issue

In current driver, we always copy 4 bytes to the dest memory.
Actually the dest memory may be shorter than 4 bytes.
Add an argument to indicate the dest memory length.
Avoid writing memory outside of the bounds.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agospi: fsl_qspi: Fix qspi_op_rdid memcpy issue
Gong Qianyu [Tue, 26 Jan 2016 07:06:40 +0000 (15:06 +0800)]
spi: fsl_qspi: Fix qspi_op_rdid memcpy issue

In current driver everytime we memcpy 4 bytes to the dest memory
regardless of the remaining length.
This patch adds checking the remaining length before memcpy.
If the length is shorter than 4 bytes, memcpy the actual length of data
to the dest memory.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agospi: fsl_qspi: fix compile warning for 64-bit platform
Gong Qianyu [Tue, 26 Jan 2016 07:06:39 +0000 (15:06 +0800)]
spi: fsl_qspi: fix compile warning for 64-bit platform

This patch fixes the following compile warning:
drivers/spi/fsl_qspi.c: In function 'fsl_qspi_probe':
drivers/spi/fsl_qspi.c:937:15:
  warning: cast to pointer from integer of different size
 [-Wint-to-pointer-cast]
  priv->regs = (struct fsl_qspi_regs *)plat->reg_base;
               ^
Just make the cast explicit.

Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agommc: fsl_esdhc: set Abort command type for CMD12
Yangbo Lu [Thu, 21 Jan 2016 09:33:19 +0000 (17:33 +0800)]
mmc: fsl_esdhc: set Abort command type for CMD12

According to SD spec, CMD12, CMD52 for writing I/O abort in CCCR need
to be set an Abort command type when they are sent. So, we remove all
chip-specific #ifdefs and make it available for all platforms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/ls1043aqds: Add lpuart support
Wenbin Song [Thu, 21 Jan 2016 09:14:55 +0000 (17:14 +0800)]
armv8/ls1043aqds: Add lpuart support

Add lpuart support using the driver model.

Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/ls1043aqds: Spilt off board device tree
Wenbin Song [Thu, 21 Jan 2016 09:14:54 +0000 (17:14 +0800)]
armv8/ls1043aqds: Spilt off board device tree

Move new /chosen node out of the board device tree.

Signed-off-by: Wenbin Song <wenbin.song@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/ls1043aqds: Select lpuart pins of various muxes
Shaohui Xie [Thu, 21 Jan 2016 09:14:53 +0000 (17:14 +0800)]
armv8/ls1043aqds: Select lpuart pins of various muxes

Set Board Configuration Register to select the lpuart pins of various
muxes.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agommc: fsl_esdhc: increase data transaction timeout to 500ms
Yangbo Lu [Wed, 30 Dec 2015 06:19:30 +0000 (14:19 +0800)]
mmc: fsl_esdhc: increase data transaction timeout to 500ms

The MMC spec says "It is strongly recommended for hosts to implement
more than 500ms timeout value even if the card indicates the 250ms
maximum busy length."  Even the previous value of 300ms is known to
be insufficient for some cards. So, increase the timeout to 500ms.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: fsl-mc: Remove portal id hard-coding
Prabhakar Kushwaha [Thu, 24 Dec 2015 10:03:49 +0000 (15:33 +0530)]
driver: net: fsl-mc: Remove portal id hard-coding

Management Complex firmware 9.0 has fixed the issue of
dprc_destroy_container i.e. the used portal is not return to the
free pool. Which was resulting in error ethernet driver want to
use this portal via either DPL or dynamically in Linux.

Hard-coding of portal id is removed.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: ldpaa: Add debug info of printing DPMAC stats
Prabhakar Kushwaha [Thu, 24 Dec 2015 10:03:37 +0000 (15:33 +0530)]
driver: net: ldpaa: Add debug info of printing DPMAC stats

Add debug information prints to provide DPMAC statistics
 - Number of bytes received
 - Number of received and discard frames
 - Number of bytes transferred
 - Number of frames transferred
 etc.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: ldpaa: Increase num of buffers for a pool
Prabhakar Kushwaha [Thu, 24 Dec 2015 10:03:25 +0000 (15:33 +0530)]
driver: net: ldpaa: Increase num of buffers for a pool

Management Complex FW 9.0 set the hardware depletion to be 20
buffers in order to support multiple pools in DPNI. This requires
driver to fill the pool with at least 21 to be able to receive
frames. So, Increase number of buffers for a pool.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: ldpaa: Report back only error frames for tx
Prabhakar Kushwaha [Thu, 24 Dec 2015 10:03:13 +0000 (15:33 +0530)]
driver: net: ldpaa: Report back only error frames for tx

Management Complex FW 9.0 puts a new requirement to provide Tx
confirmation and error queue configuration by calling
dpni_set_tx_conf API.

Configure report of only error frames for a tx frame.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: fsl-mc: Prepare extended cfg for DPNI create
Prabhakar Kushwaha [Thu, 24 Dec 2015 10:03:01 +0000 (15:33 +0530)]
driver: net: fsl-mc: Prepare extended cfg for DPNI create

Management Complex FW 9.0 puts a new requirement to prepare extended
parameters which should be provided as input in dpni_create. extended
parameters includes traffic class and IP reassembly configurations.

So prepare extended parameters with default "0" as input for
dpni_create.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: fsl-mc: flib changes for MC FW 9.0.0
Prabhakar Kushwaha [Thu, 24 Dec 2015 10:02:49 +0000 (15:32 +0530)]
driver: net: fsl-mc: flib changes for MC FW 9.0.0

MC firmware version 9.0.0 contains
 - Support of new APIs
 - Update in existing APIs
 - Change in Major and minor version of DPAA2 objects

This patch contains modifications in FLIB files to support new
MC firmware version.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: fsl-mc: Add version check for MC objects
Prabhakar Kushwaha [Thu, 24 Dec 2015 10:02:37 +0000 (15:32 +0530)]
driver: net: fsl-mc: Add version check for MC objects

Check and compare version of management  complex's object with
the version supported by Freescale ldpaa2 ethernet driver.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agosecure_boot: change error handler for esbc_validate
Aneesh Bansal [Fri, 22 Jan 2016 11:07:28 +0000 (16:37 +0530)]
secure_boot: change error handler for esbc_validate

In case of error while executing esbc_validate command, SNVS
transition and issue of reset is required only for secure-boot.
If boot mode is non-secure, this is not required.

Similarly, esbc_halt command which puts the core in Spin Loop
is applicable only for Secure Boot.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agosecure_boot: enable chain of trust for PowerPC platforms
Aneesh Bansal [Fri, 22 Jan 2016 11:07:27 +0000 (16:37 +0530)]
secure_boot: enable chain of trust for PowerPC platforms

Chain of Trust is enabled for PowerPC platforms for Secure Boot.
CONFIG_BOARD_LATE_INIT is defined.
In board_late_init(), fsl_setenv_chain_of_trust() is called which
will perform the following:
- If boot mode is non-secure, return (No Change)
- If boot mode is secure, set the following environmet variables:
   bootdelay = 0 (To disable Boot Prompt)
   bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agosecure_boot: enable chain of trust for ARM platforms
Aneesh Bansal [Fri, 22 Jan 2016 11:07:26 +0000 (16:37 +0530)]
secure_boot: enable chain of trust for ARM platforms

Chain of Trust is enabled for ARM platforms (LS1021 and LS1043).
In board_late_init(), fsl_setenv_chain_of_trust() is called which
will perform the following:
- If boot mode is non-secure, return (No Change)
- If boot mode is secure, set the following environmet variables:
   bootdelay = 0 (To disable Boot Prompt)
   bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script)

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agosecure_boot: create function to determine boot mode
Aneesh Bansal [Fri, 22 Jan 2016 11:07:25 +0000 (16:37 +0530)]
secure_boot: create function to determine boot mode

A function is created to detrmine if the boot mode is secure
or non-secure for differnt SoC's.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agosecure_boot: split the secure boot functionality in two parts
Aneesh Bansal [Fri, 22 Jan 2016 11:07:24 +0000 (16:37 +0530)]
secure_boot: split the secure boot functionality in two parts

There are two phases in Secure Boot
1. ISBC: In BootROM, validate the BootLoader (U-Boot).
2. ESBC: In U-Boot, continuing the Chain of Trust by
         validating and booting LINUX.

For ESBC phase, there is no difference in SoC's based on ARM or
PowerPC cores.

But the exit conditions after ISBC phase i.e. entry conditions for
U-Boot are different for ARM and PowerPC.
PowerPC:

If Secure Boot is executed, a separate U-Boot target is required
which must be compiled with a diffrent Text Base as compared to
Non-Secure Boot. There are some LAW and TLB settings which are
required specifically for Secure Boot scenario.

ARM:
ARM based SoC's have a fixed memory map and exit conditions from
BootROM are same irrespective of boot mode (Secure or Non-Secure).

Thus the current Secure Boot functionlity has been split into
two parts:
CONFIG_CHAIN_OF_TRUST
This will have the following functionality as part of U-Boot:
1. Enable commands like esbc_validate, esbc_halt
2. Change the environment settings based on bootmode, determined
   at run time:
     - If bootmode is non-secure, no change
     - If bootmode is secure, set the following:
         - bootdelay = 0 (Don't give boot prompt)
         - bootcmd = Validate and execute the bootscript.

CONFIG_SECURE_BOOT
This is defined only for creating a different compile time target
for secure boot.

Traditionally, both these functionalities were defined under
CONFIG_SECURE_BOOT. This patch is aimed at removing the requirement
for a separate Secure Boot target for ARM based SoC's.
CONFIG_CHAIN_OF_TRUST will be defined and boot mode will be
determine at run time.

Another Security Requirement for running CHAIN_OF_TRUST is that
U-Boot environemnt must not be picked from flash/external memory.
This cannot be done based on bootmode at run time in current U-Boot
architecture. Once this dependency is resolved, no separate
SECURE_BOOT target will be required for ARM based SoC's.

Currently, the only code under CONFIG_SECURE_BOOT for ARM SoC's is
defining CONFIG_ENV_IS_NOWHERE

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agosecure_boot: include/configs: move definition of CONFIG_CMD_BLOB
Aneesh Bansal [Fri, 22 Jan 2016 11:07:23 +0000 (16:37 +0530)]
secure_boot: include/configs: move definition of CONFIG_CMD_BLOB

CONFIG_CMD_BLOB must be defined in case of Secure Boot. It was
earlier defined in all config files. The definition has been
moved to a common file which is included by all configs.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agosecure_boot: include/configs: make secure boot header file uniform
Aneesh Bansal [Fri, 22 Jan 2016 11:07:22 +0000 (16:37 +0530)]
secure_boot: include/configs: make secure boot header file uniform

The file fsl_secure_boot.h must be included in config file for
Secure Boot. This is not required to be protected by any macro.
CONFIG_FSL_CAAM must be defined and CONFIG_CMD_HASH should be
turned on.

The above was missing in some config files and all files have been
made uniform in this respect.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoppc: xilinx-ppc440-generic: Wire LL_TEMAC driver
Ricardo Ribalda Delgado [Tue, 26 Jan 2016 12:47:45 +0000 (13:47 +0100)]
ppc: xilinx-ppc440-generic: Wire LL_TEMAC driver

If the xparameters file contains a LL_TEMAC definition compile its
driver and the net commands.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: xilinx_ll_temac: Fix string overflow
Ricardo Ribalda Delgado [Tue, 26 Jan 2016 10:24:24 +0000 (11:24 +0100)]
net: xilinx_ll_temac: Fix string overflow

Size of this snprintf "lltemac.%lx" is bigger than 16 characters.
Replacing it with "ll_tem.%lx"

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
8 years agoppc: xilinx_ppc440_generic: Remove uncalled functions
Ricardo Ribalda Delgado [Tue, 26 Jan 2016 10:24:23 +0000 (11:24 +0100)]
ppc: xilinx_ppc440_generic: Remove uncalled functions

board_pre_init was not called because CONFIG_BOARD_EARLY_INIT_F was not
set. Remove unused function.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
8 years agoppc: xilinx_ppc405_generic: Remove uncalled functions
Ricardo Ribalda Delgado [Tue, 26 Jan 2016 10:24:22 +0000 (11:24 +0100)]
ppc: xilinx_ppc405_generic: Remove uncalled functions

board_pre_init was not called because CONFIG_BOARD_EARLY_INIT_F was not
set. Remove unused function.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
8 years agoppc: xilinx_ppc440_generic: Remove weak attributes
Ricardo Ribalda Delgado [Tue, 26 Jan 2016 10:24:21 +0000 (11:24 +0100)]
ppc: xilinx_ppc440_generic: Remove weak attributes

Now that the specific boards have been removed there is no need to
maintain the weak functions.

Fix also CamelCase to make checkpatch happy

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
8 years agoppc: xilinx_ppc405_generic: Remove weak attributes
Ricardo Ribalda Delgado [Tue, 26 Jan 2016 10:24:20 +0000 (11:24 +0100)]
ppc: xilinx_ppc405_generic: Remove weak attributes

Now that the specific boards have been removed there is no need to
maintain the weak functions.

Fix also CamelCase to make checkpatch happy

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
8 years agoppc: xilinx-ppc4xx: Port to DM serial
Ricardo Ribalda Delgado [Tue, 26 Jan 2016 10:24:19 +0000 (11:24 +0100)]
ppc: xilinx-ppc4xx: Port to DM serial

xilinx_uartlite has been ported to DM, this patch makes the
xilinx-ppc405-generic and the xilinx-ppc440-generic boards use the new
DM driver.

Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: zynqmp: Line up checkboard message
Michal Simek [Mon, 25 Jan 2016 10:04:21 +0000 (11:04 +0100)]
ARM: zynq: zynqmp: Line up checkboard message

Use space instead of tab in checkboard print to aligned
it with others boards.

Reported-by: David Glessner <david.glessner@rockwellcollins.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
8 years agoARM64: zynqmp: Define auto negotiation timeout
Siva Durga Prasad Paladugu [Tue, 5 Jan 2016 09:51:46 +0000 (15:21 +0530)]
ARM64: zynqmp: Define auto negotiation timeout

Define auto negotiation timeout as 20secs
the default 4secs might not be sufficient
always and hence defined for worst case.
It is observed that autoneg takes moretime
if connected to outside network and hence
increase it to 20secs.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Do not setup bootargs
Michal Simek [Thu, 14 Jan 2016 12:44:29 +0000 (13:44 +0100)]
ARM64: zynqmp: Do not setup bootargs

Bootargs will be taken from DTS files.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Dont use shortcut for setenv
Siva Durga Prasad Paladugu [Fri, 11 Sep 2015 06:27:25 +0000 (11:57 +0530)]
ARM64: zynqmp: Dont use shortcut for setenv

Dont use shortcut command for setenv as
it wont work now due introduction of new
command setexpr.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Modify the autoboot commands
Siva Durga Prasad Paladugu [Mon, 7 Sep 2015 05:33:47 +0000 (11:03 +0530)]
ARM64: zynqmp: Modify the autoboot commands

Modify DFU commands to use latest kernel offsets and sizes
as per modified partitions in the linux device tree.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Include GbE speed/duplex detection
Michal Simek [Thu, 24 Sep 2015 18:12:29 +0000 (20:12 +0200)]
ARM64: zynqmp: Include GbE speed/duplex detection

Get right speed/duplex via mii info.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable NATSEMI phys
Michal Simek [Wed, 23 Sep 2015 17:35:31 +0000 (19:35 +0200)]
ARM64: zynqmp: Enable NATSEMI phys

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Allow overwrite identification string
Michal Simek [Fri, 28 Aug 2015 11:34:37 +0000 (13:34 +0200)]
ARM64: zynqmp: Allow overwrite identification string

Keep default option there but allow overwrite it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Setup correct COUNTER_FREQUENCY for silicon
Michal Simek [Thu, 5 Nov 2015 07:32:14 +0000 (08:32 +0100)]
ARM64: zynqmp: Setup correct COUNTER_FREQUENCY for silicon

When U-Boot runs from EL3 system timer is setup based on this macro.
Software default freq for silicon is 100MHz but enable opton to rewrite
it. Emulation platform is using 4MHz.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Move memory setup to board file
Michal Simek [Mon, 5 Oct 2015 09:02:33 +0000 (11:02 +0200)]
ARM64: zynqmp: Move memory setup to board file

Setup memory size for ep108 in ep108 config file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable advance memory test by default
Michal Simek [Thu, 15 Oct 2015 12:34:28 +0000 (14:34 +0200)]
ARM64: zynqmp: Enable advance memory test by default

Temp space in at the beginning of OCM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Remove unneeded timer_init function
Michal Simek [Wed, 13 Jan 2016 11:47:04 +0000 (12:47 +0100)]
ARM64: zynqmp: Remove unneeded timer_init function

Empty weak function is used instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Fix bootmode SD_MODE1
Michal Simek [Fri, 6 Nov 2015 09:22:37 +0000 (10:22 +0100)]
ARM64: zynqmp: Fix bootmode SD_MODE1

When only sdhci1 IP is enabled and SD_MODE1 bootmode is selected
U-Boot using sdboot1 variable which refers to mmc dev 1.
But this device doesn't exist because only one controller is available.

This patch fix logic around sdboot mode with using sdbootdev internal
variable.

Reported-by: Chris Kohn <ckohn@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Differentiate EMMC boot mode
Michal Simek [Mon, 5 Oct 2015 13:59:38 +0000 (15:59 +0200)]
ARM64: zynqmp: Differentiate EMMC boot mode

Show also EMMC bootmode if selected. There is difference compare to SD
bootmode. Use the same bootcommand till better boot command is created.

Reported-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Show information about bootmode
Michal Simek [Sun, 20 Sep 2015 15:20:42 +0000 (17:20 +0200)]
ARM64: zynqmp: Show information about bootmode

Showing information about bootmode is very useful to make sure
that correct bootmode is selected.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add support for SD1 boot mode
Michal Simek [Mon, 5 Oct 2015 08:51:12 +0000 (10:51 +0200)]
ARM64: zynqmp: Add support for SD1 boot mode

SD1 boot mode is using different bootmode values.
Add support for this mode used on DC1.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Modify the SD and QSPI bootmode values
Siva Durga Prasad Paladugu [Fri, 13 Mar 2015 05:40:26 +0000 (11:10 +0530)]
ARM64: zynqmp: Modify the SD and QSPI bootmode values

Modify the SD bootmode value to 0x3 as per latest
spec. Also add new boot mode QSPI 32 bit boot mode

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: DT: Fix UART compatible string
Soren Brinkmann [Wed, 4 Nov 2015 19:18:09 +0000 (11:18 -0800)]
ARM64: zynqmp: DT: Fix UART compatible string

ZynqMP has r1p12 not r1p8. r1p12 contains break detection support.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Correct the watchdog timer interrupt number
Punnaiah Choudary Kalluri [Wed, 4 Nov 2015 07:04:17 +0000 (12:34 +0530)]
ARM64: zynqmp: Correct the watchdog timer interrupt number

Corrected the watchdog timer interrupt number.
Origin value was for CSUPMU watchdog.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Fix coding style in phy node
Michal Simek [Thu, 14 Jan 2016 12:11:51 +0000 (13:11 +0100)]
ARM64: zynqmp: Fix coding style in phy node

Trivial fix.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add initial support for the first silicon
Michal Simek [Thu, 20 Aug 2015 12:01:39 +0000 (14:01 +0200)]
ARM64: zynqmp: Add initial support for the first silicon

Add basic configuration for the first silicon.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Use the same U-Boot version with/without ATF
Michal Simek [Thu, 5 Nov 2015 07:34:35 +0000 (08:34 +0100)]
ARM64: zynqmp: Use the same U-Boot version with/without ATF

Remove SECURE_IOU option which is not needed. U-Boot itself can detect
which EL level it is on and based on that use do platform setup.
It also simplify usage because one Kconfig entry is gone.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Remove incorrect link to common config file
Michal Simek [Thu, 20 Aug 2015 13:21:48 +0000 (15:21 +0200)]
ARM64: zynqmp: Remove incorrect link to common config file

Link to zynqmp common file is incorrect. Fix it by removing the whole
link because it is visible from the file where to look at it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: ep: Define minimum sdhci frequency for ep
Siva Durga Prasad Paladugu [Tue, 5 Jan 2016 06:51:05 +0000 (12:21 +0530)]
ARM64: zynqmp: ep: Define minimum sdhci frequency for ep

Define minimum sdhci frequency for ep, as not defining
it causes the divisor to be 2048 as per sd version but
keeping clock very low on ep causes command failures.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Move spi node to aligned location
Michal Simek [Thu, 14 Jan 2016 12:09:16 +0000 (13:09 +0100)]
ARM: zynq: Move spi node to aligned location

Keep nodes aligned.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Fix defconfig for zybo
Michal Simek [Thu, 14 Jan 2016 13:42:28 +0000 (14:42 +0100)]
ARM: zynq: Fix defconfig for zybo

Change possition of SPI_FLASH to by align with savedefconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Fix all remaining zynq platform to use stdout-path
Michal Simek [Tue, 12 Jan 2016 12:56:44 +0000 (13:56 +0100)]
ARM: zynq: Fix all remaining zynq platform to use stdout-path

Fix console setup for all remaining zynq boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Clean DTSI coding style
Michal Simek [Thu, 14 Jan 2016 12:06:28 +0000 (13:06 +0100)]
ARM: zynq: Clean DTSI coding style

Fix minor indentation problems.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Reviewed-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Move FLASH_BAR to Kconfig
Michal Simek [Tue, 12 Jan 2016 12:44:29 +0000 (13:44 +0100)]
ARM: zynq: Move FLASH_BAR to Kconfig

Clean up config and use Kconfig more.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Enable SPI_FLASH for zc770 xm013 platform
Michal Simek [Thu, 14 Jan 2016 12:01:44 +0000 (13:01 +0100)]
ARM: zynq: Enable SPI_FLASH for zc770 xm013 platform

Enable SPI flash.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Define sys prompt for all Zynq boards
Siva Durga Prasad Paladugu [Mon, 11 Jan 2016 06:31:10 +0000 (12:01 +0530)]
ARM: zynq: Define sys prompt for all Zynq boards

Define CONFIG_SYS_PROMPT for all Zynq boards

It was removed by:
"kconfig: add config option for shell prompt"
(sha1: 181bd9dc61d2da88b78f1c1138a685dae39354d6)

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Do not select options if SPL is not enabled
Michal Simek [Wed, 13 Jan 2016 13:32:43 +0000 (14:32 +0100)]
ARM: zynq: Do not select options if SPL is not enabled

Zynq setups some default options for SPL but not all targets are
enabling SPL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Remove memory division by 2 for ECC case
Michal Simek [Tue, 5 Jan 2016 09:49:24 +0000 (10:49 +0100)]
ARM: zynq: Remove memory division by 2 for ECC case

For ECC case u-boot divided memory by 2 because one u-boot could be used
for both cases when ECC is off or on.
Remove this division and make sure that dts file contain the correct
memory size when ECC is enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: zynq_sdhci: Added qurik to disable high speed
Siva Durga Prasad Paladugu [Tue, 12 Jan 2016 09:42:16 +0000 (15:12 +0530)]
mmc: zynq_sdhci: Added qurik to disable high speed

Add quirk to disable high speed incase the high
speed was broken.This solves the issue where the
the controller is used in High Speed Mode and the
the hold time requirement for the JEDEC/MMC 4.41
specification is NOT met.
This timing issue is not on all boards and hence
provided config option to enable it when required.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Emil Lenchak <emill@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agommc: sdhci: Clear high speed if not supported
Siva Durga Prasad Paladugu [Tue, 12 Jan 2016 09:42:15 +0000 (15:12 +0530)]
mmc: sdhci: Clear high speed if not supported

Clear high speed bit if it was not supported by
the driver.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Emil Lenchak <emill@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agosdhci: zynq: Remove hardcoded value zero as min frequency
Siva Durga Prasad Paladugu [Tue, 5 Jan 2016 06:51:04 +0000 (12:21 +0530)]
sdhci: zynq: Remove hardcoded value zero as min frequency

Remove hardcoded value zero as min frequency and
use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ
defined in board config

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: zynq: Change MDC setup for arm64
Michal Simek [Tue, 8 Sep 2015 15:20:01 +0000 (17:20 +0200)]
net: zynq: Change MDC setup for arm64

MDC setting depends on pclk input clocks which varies across SoC. This
driver is used by xilinx zynq and zynqmp SOC.
Input clock frequence on silicon is 125MHz where divider 64 put
frequency below 2.5MHz requires by spec (125/64=1.95).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: phy: ti: Enable automatic crossover mode
Michal Simek [Mon, 19 Oct 2015 08:43:30 +0000 (10:43 +0200)]
net: phy: ti: Enable automatic crossover mode

Enable automatic crossover cable detection.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agoserial: zynq: Fix address reading from DM
Michal Simek [Tue, 12 Jan 2016 13:45:49 +0000 (14:45 +0100)]
serial: zynq: Fix address reading from DM

Use dev_get_addr() instead of reading reg base directly in the driver.
Core function is also more robust.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoserial: zynq: Extend compatible string list
Michal Simek [Thu, 14 Jan 2016 10:45:52 +0000 (11:45 +0100)]
serial: zynq: Extend compatible string list

ZynqMP is using updated core with cdns,uart-r1p12 compatible string.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agofpga: Fix compilation warnings
Michal Simek [Tue, 5 Jan 2016 12:51:48 +0000 (13:51 +0100)]
fpga: Fix compilation warnings

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agofpga: Add bitstream type BIT_NONE
Siva Durga Prasad Paladugu [Wed, 9 Dec 2015 13:16:42 +0000 (18:46 +0530)]
fpga: Add bitstream type BIT_NONE

Add bitstream type BIT_NONE to the bitstream type
enum. This might be useful while loading bitstreams
in respective drivers.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agofpga: xilinx: Check for substring in device ID validation
Siva Durga Prasad Paladugu [Mon, 11 Jan 2016 07:00:41 +0000 (12:30 +0530)]
fpga: xilinx: Check for substring in device ID validation

Check for substrings in deviceID validation check
so that it can support xa bitstreams also.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Fix board_init calling sequence
Michal Simek [Fri, 11 Dec 2015 14:01:28 +0000 (15:01 +0100)]
microblaze: Fix board_init calling sequence

board_init() is in final elf file but it is not called at all.
Use board_init_late() instead and call gpio_init() from it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Enable HUSH via Kconfig
Michal Simek [Fri, 11 Dec 2015 13:59:03 +0000 (14:59 +0100)]
microblaze: Enable HUSH via Kconfig

Cleanup board file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Read information about RAM from DT
Michal Simek [Fri, 11 Dec 2015 13:45:29 +0000 (14:45 +0100)]
microblaze: Read information about RAM from DT

Do not setup ram start/size in board file. Read it from DT instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Remove empty file - cpu.c
Michal Simek [Fri, 11 Dec 2015 12:17:35 +0000 (13:17 +0100)]
microblaze: Remove empty file - cpu.c

No need to have empty unused file in architecture code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Move CONFIG_NETCONSOLE to Kconfig
Michal Simek [Fri, 11 Dec 2015 12:16:16 +0000 (13:16 +0100)]
microblaze: Move CONFIG_NETCONSOLE to Kconfig

Cleanup board file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Remove CONFIG_FIT from board file
Michal Simek [Fri, 11 Dec 2015 12:12:42 +0000 (13:12 +0100)]
microblaze: Remove CONFIG_FIT from board file

And enable it via defconfig by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Remove systemace from board file
Michal Simek [Fri, 11 Dec 2015 12:06:55 +0000 (13:06 +0100)]
microblaze: Remove systemace from board file

Systemace is ancient IP which is not tested. Remove it from default
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Move eth configuration to Kconfig
Michal Simek [Fri, 11 Dec 2015 09:27:57 +0000 (10:27 +0100)]
microblaze: Move eth configuration to Kconfig

Cleanup board specific file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomicroblaze: Enable axi emac via Kconfig
Michal Simek [Wed, 9 Dec 2015 15:54:42 +0000 (16:54 +0100)]
microblaze: Enable axi emac via Kconfig

Enable driver by default for all platforms.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>