Heinrich Schuchardt [Wed, 7 Feb 2018 21:14:22 +0000 (22:14 +0100)]
efi_loader: implement missing bit blit operations in gop
With the patch all block image transfer operations of the
EFI_GRAPHICS_OUTPUT_PROTOCOL are supported.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sun, 18 Feb 2018 14:17:52 +0000 (15:17 +0100)]
efi_loader: implement event groups
If an event of a group event is signaled all other events of the same
group are signaled too.
Function efi_signal_event is renamed to efi_queue_event.
A new function efi_signal_event is introduced that checks if an event
belongs to a group and than signals all events of the group.
Event group notifciation is implemented for ExitBootServices,
InstallConfigurationTable, and ResetSystem.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sun, 18 Feb 2018 14:17:51 +0000 (15:17 +0100)]
efi_loader: define GUIDS for event groups
Event groups are used to signal multiple events at the same time.
They are identified by GUIDs. This patch provided the predefined
GUIDs of UEFI specification 2.7.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sun, 18 Feb 2018 14:17:50 +0000 (15:17 +0100)]
efi_loader: manage events in a linked list
Lift the limit on the number of events by using a linked list.
This also allows to have events with type == 0.
This patch is based on Rob's patch
efi_loader: fix events
https://lists.denx.de/pipermail/u-boot/2017-October/309348.html
Suggested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sun, 18 Feb 2018 14:17:49 +0000 (15:17 +0100)]
efi_loader: fix formatting errors
Fix formatting errors in efi_boottime.c indicated by
scripts/checkpatch.py.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sun, 18 Feb 2018 10:32:02 +0000 (11:32 +0100)]
efi_loader: clear signaled state in CheckEvent
CheckEvent must clear the signaled state.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 17 Feb 2018 23:08:00 +0000 (00:08 +0100)]
efi_loader: check parameter in InstallConfigurationTable
Check that parameter guid is not NULL. This avoids a possible NULL
pointer exception.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Mon, 19 Feb 2018 17:53:29 +0000 (18:53 +0100)]
efi_loader: correct input of special keys
Don't set unicode_char if scan_code is set.
Add support for page up, page down, and insert.
Correct input of function keys.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:29:04 +0000 (15:29 +0100)]
efi_selftest: check installation of the device tree
The unit test checks if a device tree is installed. It requires that the
'compatible' property of the root node exists. If available it prints the
'serial-number' property.
The serial-number property is derived from the environment variable
'serial#'. This can be used to check if the image_setup_libfdt() function
is executed.
A Python test is supplied. It sets a value for serial# and checks that the
selftest shows this as serial-number.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:29:03 +0000 (15:29 +0100)]
efi_loader: support device tree for bootefi selftest
The second argument of the bootefi command should always be usable to
specify a device tree. This was missing for bootefi selftest and
bootefi hello.
Proper error handling is added.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:29:02 +0000 (15:29 +0100)]
efi_loader: check initialization of EFI subsystem is successful
Up to now errors in the initialization of the EFI subsystems was not
checked.
If any initialization fails, leave the bootefi command.
We do not retry initialization because this would require to undo all prior
initalization steps.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:29:01 +0000 (15:29 +0100)]
efi_loader: do_bootefi_exec should always return an EFI status code
The return type of do_bootefi_exec() is efi_status_t. So in case
of an error we should always return an EFI status code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:29:00 +0000 (15:29 +0100)]
efi_loader: efi_get_time_init should return status code
All EFI initialization functions should return a status code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:28:59 +0000 (15:28 +0100)]
efi_loader: exit status for efi_reset_system_init
efi_reset_system_init provides the architecture or board specific
initialization of the EFI subsystem. Errors should be caught and
signalled by a return code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:28:58 +0000 (15:28 +0100)]
efi_loader: simplify calling efi_init_obj_list
efi_init_obj_list() should be executed only once.
Rather than having the caller check this variable and the callee set it,
move all access to the variable inside the function. This reduces the
logic needed to call efi_init_obj_list().
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:28:57 +0000 (15:28 +0100)]
efi_loader: consistently return efi_status_t efi_watchdog_register
efi_watchdog_register() should always return a status code and not
a boolean value.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:28:56 +0000 (15:28 +0100)]
efi_loader: return efi_status_t from efi_net_register
Consistently return status codes form efi_net_register().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:28:55 +0000 (15:28 +0100)]
efi_loader: return efi_status_t from efi_gop_register
All initialization routines should return a status code instead of
a boolean.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Convert warnings to debug() prints]
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:28:54 +0000 (15:28 +0100)]
efi_loader: efi_smbios_register should have a return value
Errors may occur inside efi_smbios_register().
- Return a status code.
- Remove unused variables.
- Use constants where applicable.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Fri, 2 Mar 2018 18:58:50 +0000 (19:58 +0100)]
efi_loader: provide new doc/README.uefi
Provides information about
- usage of the bootefi command
- overview of UEFI
- interaction between U-Boot and EFI drivers
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Leif Lindholm <leif.lindholm@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Fri, 2 Mar 2018 18:58:49 +0000 (19:58 +0100)]
efi_loader: delete doc/README.efi
Delete README.efi. It is replaced by a further patch.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Leif Lindholm [Fri, 9 Mar 2018 16:43:21 +0000 (17:43 +0100)]
efi_loader: Initial EFI_DEVICE_PATH_UTILITIES_PROTOCOL
Not complete, but enough for Shell.efi and SCT.efi. We'll implement the
rest as needed or once we have SCT running properly so there is a way to
validate the interface against the conformance test suite.
Initial skeleton written by Leif, and then implementation by Rob.
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
[Fill initial skeleton]
Signed-off-by: Rob Clark <robdclark@gmail.com>
[Rebase on v2018.03-rc1]
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Sat, 3 Mar 2018 14:41:37 +0000 (15:41 +0100)]
efi_loader: remove deprecated ConsoleControlProtocol
The console control protocol is not defined in the UEFI standard.
It exists in EDK2's EdkCompatiblityPkg package. But this package
is deprecated according to
https://github.com/tianocore/tianocore.github.io/wiki/Differences-between-EDK-and-EDK-II
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Heinrich Schuchardt [Wed, 7 Mar 2018 01:40:51 +0000 (02:40 +0100)]
efi_loader: parameter checks for LoadImage
Add parameter checks in efi_load_image().
Check memory allocation is successful in efi_load_image().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tom Rini [Tue, 3 Apr 2018 00:31:36 +0000 (20:31 -0400)]
Prepare v2018.05-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 2 Apr 2018 00:36:39 +0000 (20:36 -0400)]
Merge git://git.denx.de/u-boot-dm
Masahiro Yamada [Wed, 21 Mar 2018 09:03:35 +0000 (18:03 +0900)]
image.h: add forward declaration of struct fdt_region
This header needs to know 'fdt_region' is a struct for the
fit_region_make_list() prototype.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 21 Mar 2018 09:03:34 +0000 (18:03 +0900)]
fdt_region: remove unneeded fdt_internal.h inclusion
fdt_region.c does not depend on anything in libfdt_internal.h
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 21 Mar 2018 09:03:33 +0000 (18:03 +0900)]
libfdt: move FDT_RAMDISK_OVERHEAD to image-fdt.c
This macro is locally referenced in common/image-fdt.c
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Mon, 12 Mar 2018 13:53:33 +0000 (14:53 +0100)]
core: ofnode: Fix translation for #size-cells == 0
Commit 286ede6 ("drivers: core: Add translation in live tree case") made
dev_get_addr always use proper bus translations for addresses read from
the device tree. But this leads to problems with certain busses, e.g.
I2C busses, which run into an error during translation, and hence stop
working.
It turns out that of_translate_address() and fdt_translate_address()
stop the address translation with an error when they're asked to
translate addresses for busses where #size-cells == 0 (comment from
drivers/core/of_addr.c):
* Note: We consider that crossing any level with #size-cells == 0 to mean
* that translation is impossible (that is we are not dealing with a value
* that can be mapped to a cpu physical address). This is not really specified
* that way, but this is traditionally the way IBM at least do things
To fix this case, we check in both the live-tree and non-live tree-case,
whether the bus of the device whose address is about to be translated
has size-cell size zero. If this is the case, we just read the address
as a plain integer and return it, and only apply bus translations if the
size-cell size if greater than zero.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Reported-by: Martin Fuzzey <mfuzzey@parkeon.com>
Fixes: 286ede6 ("drivers: core: Add translation in live tree case")
Reviewed-by: Simon Glass <sjg@chromium.org>
Andy Yan [Thu, 1 Mar 2018 06:08:15 +0000 (14:08 +0800)]
dm: core: make fixed-clock dt scan live dt compatible
dm_scan_fdt_node can't work when live dt is active,
we should use dm_scan_fdt_live instead.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Heider [Thu, 15 Feb 2018 06:40:11 +0000 (07:40 +0100)]
fs: cbfs: fix locating the cbfs header
The value at the end of the rom is not a pointer, it is an offset
relative to the end of rom.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Andre Heider [Thu, 15 Feb 2018 06:40:10 +0000 (07:40 +0100)]
cmd: cbfs: fix reading the end_of_rom pointer for 64bit archs
The cast breaks the pointer on 64bit archs, so lets get rid of it.
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Kever Yang [Fri, 9 Feb 2018 02:56:24 +0000 (10:56 +0800)]
pinctrl-uclass: convert to use live dt
Use live dt interface for pinctrl_select_state_full()
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Fri, 9 Feb 2018 02:56:23 +0000 (10:56 +0800)]
core: add uclass_get_device_by_phandle_id() api
Add api for who can not get phandle from a device property.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tom Rini [Fri, 30 Mar 2018 22:18:22 +0000 (18:18 -0400)]
Merge git://git.denx.de/u-boot-marvell
Tom Rini [Fri, 30 Mar 2018 22:17:23 +0000 (18:17 -0400)]
Merge git://git.denx.de/u-boot-x86
Tom Rini [Fri, 30 Mar 2018 22:16:56 +0000 (18:16 -0400)]
Merge git://git.denx.de/u-boot-riscv
Ken Ma [Mon, 26 Mar 2018 07:57:32 +0000 (15:57 +0800)]
arm64: a37xx: defconfigs: enable PCI_CMD and E1000 driver
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Wilson Ding [Mon, 26 Mar 2018 07:57:31 +0000 (15:57 +0800)]
arm64: a37xx: dts: enable pcie port
This patch enabled PCIe port on both devel-board
and espressobin board.
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Wilson Ding [Mon, 26 Mar 2018 07:57:30 +0000 (15:57 +0800)]
arm64: a37xx: defconfigs: enable aardvark pcie driver
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Wilson Ding [Mon, 26 Mar 2018 07:57:29 +0000 (15:57 +0800)]
arm64: a37xx: pci: add support for aardvark pcie driver
This patch introduced the Aardvark PCIe driver based
driver model.
The PCIe driver is supposed to work in Root Complex
mode. It only supports X1 lane width.
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38725
Reviewed-by: Victor Gu <xigu@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Wilson Ding [Mon, 26 Mar 2018 07:57:28 +0000 (15:57 +0800)]
arm64: a37xx: populate pcie memory region
This patch added a new region of 32MiB AT 0xe800.0000
to Armada37x0's memory map. This region is supposed to
be mapped in MMU in order to enable the access to the
PCI I/O or MEM resources.
Signed-off-by: Wilson Ding <dingwei@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/38724
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Victor Gu <xigu@marvell.com>
Signed-off-by: Ken Ma <make@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:56:07 +0000 (15:56 +0800)]
arm64: a37xx: remove old pinctrl implementation
Since the new pinctrl/gpio driver is used, so this patch removes
the old board specific pin control settings.
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:56:06 +0000 (15:56 +0800)]
Revert "arm64: a37xx: dts: Add pin control nodes to DT"
The commit "arm64: mvebu: Add pinctrl nodes for Armada 3700" has
added new pinctrl nodes.
This reverts commit
f7cab0f95b05ec6a66fe4796b9ad44406d0cc864.
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:56:05 +0000 (15:56 +0800)]
doc: a37xx: Introduce pinctrl device tree binding
Reviewed-on: http://vgitil04.il.marvell.com:8080/43289
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:56:04 +0000 (15:56 +0800)]
arm64: a37xx: dts: Correct mpp definitions
This patch corrects below mpp definitions for armada 3720 DB board
and ESPRESSOBin board:
- "smi" pins group is added and "smi" function is set for eth0;
- Now pcie pins are used as gpio to implement PCIe function in
hardware, so "pcie" group function is changed to "gpio".
Reviewed-on: http://vgitil04.il.marvell.com:8080/43287
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:56:03 +0000 (15:56 +0800)]
arm64: a37xx: pinctrl: Correct mpp definitions
This patch corrects below mpp definitions:
- The sdio_sb group is composed of 6 pins and not 5;
- The rgmii group contains pins mpp2[17:6] and not mpp2[19:6];
- Pin of group "pmic0" is mpp1[6] but not mpp1[16];
- Pin of group "pmic1" is mpp1[7] but not mpp1[17];
- A new group "smi" is added in A0 with 2 pins - mpp2[19:18], its
bitmask is bit4;
- Group "pcie1" has 3 pins in A0 - mpp2[5:3], its bit mask is
bit5 | bit9 | bit10 but not bit4;
- Group "ptp" has 3 pins in A0 as Z1, but its bitmask is changed to
bit11 | bit12 | bit13.
Reviewed-on: http://vgitil04.il.marvell.com:8080/43288
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:56:02 +0000 (15:56 +0800)]
arm64: a37xx: pinctrl: Fix gpio pin offset in register
For armada_37xx_update_reg(), the parameter offset should be pointer so
that it can be updated, otherwise offset will keep old value, and then
when offset is larger than or equal to 32 the mask calculated by
"BIT(offset)" will be 0 in gpio chip hook functions, it's an error,
this patch set offset parameter of armada_37xx_update_reg() as pointer.
Reviewed-on: http://vgitil04.il.marvell.com:8080/43287
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:56:01 +0000 (15:56 +0800)]
arm64: a37xx: pinctrl: Fix the pin 23 on south bridge
Pin 23 on South bridge does not belong to the rgmii group. It belongs to
a separate group which can have 3 functions.
Due to this the fix also have to update the way the functions are
managed. Until now each groups used NB_FUNCS(which was 2) functions. For
the mpp23, 3 functions are available but it is the only group which needs
it, so on the loop involving NB_FUNCS an extra test was added to handle
only the functions added.
The bug was visible when the gpio regulator used the gpio 23, the whole
rgmii group was setup to gpio which broke the Ethernet support on the
Armada 3720 DB board. Thanks to this patch, the UHS SD cards (which need
the vqmmc) _and_ the Ethernet work again.
Reviewed-on: http://vgitil04.il.marvell.com:8080/43284
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:56:00 +0000 (15:56 +0800)]
arm64: a37xx: dts: Fix the number of GPIO on south bridge
The number of pins in South Bridge is 30 and not 29. There is a fix for
the driver for the pinctrl, but a fix is also need at device tree level
for the GPIO.
Reviewed-on: http://vgitil04.il.marvell.com:8080/43286
Reviewed-by: Hua Jing <jinghua@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:55:59 +0000 (15:55 +0800)]
arm64: a37xx: pinctrl: Fix number of pin in south bridge
On the south bridge we have pin from 0 to 29, so it gives 30 pins (and
not 29).
Reviewed-on: http://vgitil04.il.marvell.com:8080/43285
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:55:58 +0000 (15:55 +0800)]
arm64: a37xx: dts: Add additional pinctrl definition
Add mmc pins, pcie pins and sdio pins definition and do these pins'
configuration for DB board and espressobin board;
Add uart2 pins configuration for DB board.
Reviewed-on: http://vgitil04.il.marvell.com:8080/40914
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Tested-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:55:57 +0000 (15:55 +0800)]
arm64: a37xx: dts: Add pinctrl configuration for ESPRESSOBin board
Reviewed-on: http://vgitil04.il.marvell.com:8080/40913
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Tested-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:55:56 +0000 (15:55 +0800)]
arm64: a37xx: defconfig: Enable PINCTRL and GPIO support for ESPRESSOBin board
This patch enable the PINCTRL and GPIO support, including the GPIO
command on the Armada 3720 espressobin board.
Reviewed-on: http://vgitil04.il.marvell.com:8080/40746
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Wilson Ding <dingwei@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ken Ma [Mon, 26 Mar 2018 07:55:55 +0000 (15:55 +0800)]
arm64: a37xx: dts: add gpio head file including
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Mark Kettenis [Sat, 17 Mar 2018 08:34:27 +0000 (09:34 +0100)]
arm64: mvebu: a8k: Add distro boot support
The various load address values are taken from the a37xx configuration
and match the dowstream 'u-boot-2017.03-armada-17.10' release where
appropriate.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Alexander Graf [Thu, 15 Mar 2018 10:14:19 +0000 (11:14 +0100)]
kwbimage: Fix out of bounds access
The kwbimage format is reading beyond its header structure if it
misdetects a Xilinx Zynq image and tries to read it. Fix it by
sanity checking that the header we want to read fits inside our
file size.
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Mon, 19 Feb 2018 06:17:22 +0000 (08:17 +0200)]
configs: clearfog: enable random random MAC address
This makes the network devices usable when booting a blank board over
UART, with no pre-configured MAC address stored in the environment area.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Igal Liberman [Wed, 14 Feb 2018 17:25:23 +0000 (19:25 +0200)]
dm: pcie: designware: add correct ATU handling
Currently, ATU (address translation unit) implementation doesn't
support translate addresses > 32 bits.
This patch allows to configure ATU correctly for different
memory accesses (memory, configuration and IO).
The same approach is used in Linux Kernel.
Signed-off-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Ivan Gorinov [Tue, 27 Mar 2018 01:06:54 +0000 (18:06 -0700)]
x86: zImage: Pass working device tree data to the kernel
On x86 platforms, U-Boot does not pass Device Tree data to the kernel.
This prevents the kernel from using FDT loaded by U-Boot.
Read the working FDT address from the "fdtaddr" environment variable
and add a copy of the FDT data to the kernel setup_data list.
Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add #include <linux/libfdt.h> to zimage.c to fix build error]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bernhard Messerklinger [Thu, 15 Feb 2018 08:09:43 +0000 (09:09 +0100)]
x86: mmc: Fix mapping of BAR memory
Use dm_pci_map_bar function for BAR mapping. This has the advantage
of clearing BAR flags and and only accepting mapped memory.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Tue, 27 Mar 2018 07:46:06 +0000 (00:46 -0700)]
dm: pci: Avoid setting a PCI region that has 0 size
It makes no sense to set a PCI region that has 0 size.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Tue, 27 Mar 2018 07:46:05 +0000 (00:46 -0700)]
dm: pci: Check board information pointer in decode_regions()
PCI enumeration may happen very early on an x86 board. The board
information pointer should have been checked in decode_regions()
as its space may not be allocated yet.
With this commit, Intel Galileo board boots again.
Fixes: 664758c ("pci: Fix decode regions for memory banks")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Mon, 4 Dec 2017 15:33:26 +0000 (16:33 +0100)]
efi_stub: Fix GDT_NOTSYS check
The get_codeseg32() wants to know if a passed in descriptor has
flag GDT_NOTSYS set (desc & GDT_NOTSYS), not whether desc and
GDT_NOTSYS are not != 0 (desk && GDT_NOTSYS).
This is an obvious typo. Fix it up.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Rick Chen [Thu, 29 Mar 2018 02:08:33 +0000 (10:08 +0800)]
riscv: ae250: Support DT provided by the board at runtime
Enable CONFIG_OF_BOAD to support delivery dtb to u-boot
at run time instead of embedded.
There are two methods to delivery dtb.
1 Pass from loader:
When u-boot boot from RAM, gdb or loader can pass dtb
via a2 to u-boot dynamically. Of course gdb or loader
shall be in charge of dtb delivery.
2 Configure CONFIG_SYS_FDT_BASE:
It can be configured as RAM or ROM base statically,
no mater u-boot boot from RAM or ROM.
If it was configured as ROM base, dtb can be burned
into ROM(spi flash) by spi driver.
Meanwhile remove CONFIG_SKIP_LOWLEVEL_INIT which is
useless in nx25-ae250 configuration.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 20 Mar 2018 03:26:22 +0000 (11:26 +0800)]
configs: Drop CONFIG_MMC_NDS32
Remove CONFIG_MMC_NDS32 from the three config
(adp-ae3xx_defconfig, adp-ag101p_defconfig, nx25-ae250_defconfig).
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 20 Mar 2018 07:52:58 +0000 (15:52 +0800)]
mmc: ftsdc010: Merge nds32_mmc to ftsdc010
nsd32_mmc was created to support ftsdc010 dm.
It is not necessary to separate both, so merge it
to ftsdc010.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 20 Mar 2018 07:10:49 +0000 (15:10 +0800)]
mmc: ftsdc010: Migrate CONFIG_FTSDC010_SDIO to Kconfig
Convert CONFIG_FTSDC010_SDIO to Kconfig.
So CONFIG_FTSDC010_SDIO can also be
removed from config_whitelist.txt.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 20 Mar 2018 07:03:40 +0000 (15:03 +0800)]
Drop CONFIG_FTSDC010_NUMBER
CONFIG_FTSDC010_NUMBER was not used anymore,
can be removed now.
So CONFIG_FTSDC010_NUMBER
can also be removed from config_whitelist.txt.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 20 Mar 2018 06:06:38 +0000 (14:06 +0800)]
Drop CONFIG_FTSDC010_BASE
After drop non-dm code of ftsdc010, the sd register
base definition can be droppped now.
So CONFIG_FTSDC010_BASE and CONFIG_FTSDC010_BASE_LIST both
can be removed from config_whitelist.txt
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 20 Mar 2018 05:57:13 +0000 (13:57 +0800)]
board: Drop ftsdc010 non-dm code
Remove board_mmc_init() in adp-ag101p, adp-ae3xx
and nx25-ae250 boards.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 20 Mar 2018 06:30:52 +0000 (14:30 +0800)]
mmc: ftsdc010: Drop non-dm code
Only three defconfig(adp-ag101p_defconfig,
adp-ae3xx_defconfig, nx25-ae250_defconfig)
set CONFIG_FTSDC010=y. And they all also
enable CONFIG_DM_MMC. So the non-dm code
of ftsdc010 can be dropped now.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Thu, 15 Mar 2018 02:47:07 +0000 (10:47 +0800)]
nds32: dts: AG101P support sd High-Speed mode
Enable High-Speed mode with cap-sd-highspeed in dts
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Mon, 25 Dec 2017 09:05:39 +0000 (17:05 +0800)]
riscv: dts: AE250 support sd High-Speed mode
Enable High-Speed mode with cap-sd-highspeed in dts.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Mon, 25 Dec 2017 08:25:26 +0000 (16:25 +0800)]
mmc: ftsdc010: Support High-Speed mode
ftsdc010 dm driver has been disable High-Speed mode
as default to work around Andes AE3XX platform's problem,
because of it does not support High-Speed mode in
commit id
73cd56b2df213c629191139e5c6705e069b6214f.
But other platforms or SoCs maybe support this function.
So High-Speed mode can be enabled from dts with
cap-mmc-highspeed or cap-sd-highspeed property.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Tue, 13 Mar 2018 07:24:03 +0000 (15:24 +0800)]
doc: ae250: Describe riscv-linux booting via u-boot
Simply record riscv-linux booting steps and messages
from bbl via u-boot on QEMU in README.ae250.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Tue, 13 Mar 2018 05:37:29 +0000 (13:37 +0800)]
tools: mkimage: Support RISC-V arch
Add riscv uimage arch to support riscv-linux booting.
It can Convert riscv-linux to image which can be
booted by bootm command.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Tue, 13 Mar 2018 06:59:41 +0000 (14:59 +0800)]
riscv: bootm: Remove ATAGS
ATAGS is not supported and will be replaced
by DT in riscv-linux. So can be removed now.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Tue, 13 Mar 2018 06:48:33 +0000 (14:48 +0800)]
riscv: bootm: Support to boot riscv-linux
riscv-linux should use BBL (Berkeley bootloader) for
loading the Linux kernel.
U-Boot can play as FSBL(first stage bootloader)
to boot BBL and riscv-linux.
In BBL's init_first_hart(), it will pass dtb with a1.
So implement bootm to pass arguments to BBL correctly.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Mon, 12 Feb 2018 03:24:43 +0000 (11:24 +0800)]
riscv: checkpatch: Fix static const char * array declarations
It is reported by checkpatch.pl
WARNING: static const char * array
should probably be static const char * const
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Mon, 12 Feb 2018 03:21:28 +0000 (11:21 +0800)]
riscv: checkpatch: Fix missing a blank line after declarations
It is reported by checkpatch.pl
WARNING: Missing a blank line after declarations.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Mon, 12 Feb 2018 03:17:47 +0000 (11:17 +0800)]
riscv: checkpatch: Fix alignment should match open parenthesis
It is reported by checkpatch.pl.
CHECK: Alignment should match open parenthesis
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Mon, 12 Feb 2018 03:10:04 +0000 (11:10 +0800)]
riscv: checkpatch: Fix use of volatile
It is reported by checkpatch.pl
WARNING: Use of volatile is usually wrong: see
Documentation/process/volatile-considered-harmful.rst
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Rick Chen [Mon, 12 Feb 2018 03:07:58 +0000 (11:07 +0800)]
riscv: checkpatch: Fix Macro argument reuse
It is CHECK reported by checkpatch.pl
CHECK: Macro argument reuse 'PTE' - possible side-effects?
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Tom Rini [Thu, 29 Mar 2018 12:25:56 +0000 (08:25 -0400)]
Merge git://git.denx.de/u-boot-rockchip
Philipp Tomsich [Mon, 26 Mar 2018 17:59:10 +0000 (19:59 +0200)]
rockchip: sdhci: support 8bit bus-width
The Rockchip-specific SDHCI wrapper does not process the 'bus-width'
property in the SDHCI node. Consequently, the bus is always kept in
4bit mode, even if 8bit wide operation is available, supported and
requested in the DTS.
This change adds processing of the 'bus-width' property and sets the
host capability flag for an 8bit wide bus, if set to 8. As the logic
in sdhci.c does not support clearing the 4bit capability, we assume
that 4bit operation is always supported.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 26 Mar 2018 17:59:09 +0000 (19:59 +0200)]
rockchip: mmc: update MAINTAINERS
The Rockchip-specific wrappers to the DW-MMC and the SDHCI driver
were not covered as part of what's maintained by the architecture
maintainers. Add them here.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 26 Mar 2018 17:59:08 +0000 (19:59 +0200)]
rockchip: defconfig: puma-rk3399: enable DMA for SDHCI controller
For the RK3399-Q7, we have a fast eMMC connected in an 8 bit wide
configuration to the SDHCI controller (sdhci@
fe330000). Enable DMA
within the SDHCI driver to get the best performance out of it.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Mark Kettenis [Sat, 17 Mar 2018 08:48:25 +0000 (09:48 +0100)]
rockchip: rk3399: set fdtfile
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Alexander Kochetkov [Mon, 26 Feb 2018 11:27:38 +0000 (14:27 +0300)]
rockchip: clk: rk3188: update dpll settings to make EMAC work
The patch set dpll settings for 300MHz to values used by binary
blob[1]. With new values dpll still generate 300MHz clock, but
EMAC work. Probably with new values dpll generate more stable clock.
dpll on rk3188 provide clocks to DDR and EMAC. With current
dpll settings EMAC doesn't work on radxa rock. EMAC sends packets
to network, but it doesn't receive anything. ifconfig shows a lot
of framing errors.
[1] https://github.com/linux-rockchip/u-boot-rockchip/blob/u-boot-rk3288/
tools/rk_tools/3188_LPDDR2_300MHz_DDR3_300MHz_20130830.bin
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Punit Agrawal [Mon, 19 Mar 2018 17:36:07 +0000 (17:36 +0000)]
video: rk3288_mipi: Combine NULL check into IS_ERR_OR_NULL()
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Heinrich Schuchardt [Sun, 18 Mar 2018 14:25:41 +0000 (15:25 +0100)]
video: rk3288_mipi: check in rk_mipi_ofdata_to_platdata
The error checking should also catch the case that no range has beeen
defined.
syscon_get_first_range() returns NULL if no range is defined.
cf. rk3399_mipi.c
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Punit Agrawal [Mon, 19 Mar 2018 17:36:08 +0000 (17:36 +0000)]
video: rk3399_mipi: Combine NULL check into IS_ERR_OR_NULL()
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Heinrich Schuchardt [Sun, 18 Mar 2018 14:18:10 +0000 (15:18 +0100)]
video: rk3399_mipi: correct error checking
Pointers are never negative. Use macro IS_ERR() for checking.
cf. rk3288_mipi.c
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Heinrich Schuchardt [Sun, 18 Mar 2018 12:17:37 +0000 (13:17 +0100)]
usb: rockchip: remove duplicate assignement.
Assigning f_rkusb->reboot_flag twice doesn't make sense.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Heinrich Schuchardt [Sun, 18 Mar 2018 11:10:55 +0000 (12:10 +0100)]
driver: ram: rockchip: rk3399: missing counter increment
If we want to check the duration we need to increment the counter.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Alexander Kochetkov [Mon, 26 Feb 2018 14:27:56 +0000 (17:27 +0300)]
rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3188.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Alexander Kochetkov [Mon, 26 Feb 2018 14:27:55 +0000 (17:27 +0300)]
rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3036.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Mon, 12 Mar 2018 13:56:42 +0000 (14:56 +0100)]
rockchip: pinctrl: rk3399: add support for I2C[123467]
This adds support for the (to date unsupported) I2C controllers 1~4
and 6~7 (i.e. now all controllers except I2C5, which is not accessible
on the RK3399-Q7, are supported by pinctrl).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
projects / platform / kernel / u-boot.git / log