platform/upstream/armnn.git
3 years agoIVGCVSW-5382 TfLiteDelegate: Implement the Activation operators
David Monahan [Mon, 16 Nov 2020 15:53:03 +0000 (15:53 +0000)]
IVGCVSW-5382 TfLiteDelegate: Implement the Activation operators

 * Added TfLiteDelegate implementations for ReLu, Relu6, Logistic, and TanH
Activation Functions

Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: Id021b4ec9c10fd4357535fe2a665f32c053dad61

3 years agoIVGCVSW-5539 'Elementwise layers with const tensors are not connecting up'
Sadik Armagan [Tue, 17 Nov 2020 12:01:47 +0000 (12:01 +0000)]
IVGCVSW-5539 'Elementwise layers with const tensors are not connecting up'

* Added Constant Input support to ElementwiseBinary Layers

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I1d429fd7958fe2aa53f06c229a863243569c0d71

3 years agoMLCE-278-IVGCVSW-5530 FusedActivation issues
Mike Kelly [Tue, 17 Nov 2020 11:41:38 +0000 (11:41 +0000)]
MLCE-278-IVGCVSW-5530 FusedActivation issues

 * GetOverriddenDataType was returning incorrect quantization data
 * Optimized CpuAcc and GpuAcc SubGraphs fail validation on debug versions
   of ArmNN

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: Ie97935cc2af67bd9aeebc94b63dafa458bd1aa8c

3 years agoIVGCVSW-5486 TfLiteDelegate: Implement Concat and Mean operators
Matthew Sloyan [Fri, 13 Nov 2020 09:47:35 +0000 (09:47 +0000)]
IVGCVSW-5486 TfLiteDelegate: Implement Concat and Mean operators

 * Implemented Concatenation & Mean operator.
 * Added unit tests for Concatenation & Mean operator.
 * Added CompareOutputData function to TestUtils.hpp.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I31b7b1517a9ce041c3269f69f16a419f967d0fb0

3 years agoMLECO-1253 Adding ASR sample application using the PyArmNN api
Éanna Ó Catháin [Mon, 16 Nov 2020 14:12:11 +0000 (14:12 +0000)]
MLECO-1253 Adding ASR sample application using the PyArmNN api

Change-Id: I450b23800ca316a5bfd4608c8559cf4f11271c21
Signed-off-by: Éanna Ó Catháin <eanna.ocathain@arm.com>
3 years agoIVGCVSW-5530 'Cannot run SSD Mobilenet f16/uint8 on CpuRef via ExecuteNetwork'
Sadik Armagan [Mon, 16 Nov 2020 14:27:52 +0000 (14:27 +0000)]
IVGCVSW-5530 'Cannot run SSD Mobilenet f16/uint8 on CpuRef via ExecuteNetwork'

* Added FP16 DataType support to DetectionPostProcess
* For DetectionPostProcess layer output is always Float32 regardless of input type

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I21f63dd08f0863e9a98e105b3009bab3da1ab0c3

3 years agoIVGCVSW-5385 Use specific data-type instead of auto (Transpose TfLiteDelegate)
James Ward [Mon, 16 Nov 2020 18:46:12 +0000 (18:46 +0000)]
IVGCVSW-5385 Use specific data-type instead of auto (Transpose TfLiteDelegate)

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I0227c8af5ea70976973291614859d956e48d267a

3 years agoIVGCVSW-5465 ExecuteNetworkTestsDynamicBackends Bug Fix
Keith Davis [Thu, 12 Nov 2020 10:27:19 +0000 (10:27 +0000)]
IVGCVSW-5465 ExecuteNetworkTestsDynamicBackends Bug Fix

 * When invalid backend specified an ARMNNLOG should be invoked
   to fail more gracefully

Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: Iec34fbc03dbeeb66836b0d5e1dd381d021a379b1

3 years agoIVGCVSW-5463 Change cmake version for delegate to 3.7
Jan Eilers [Sun, 15 Nov 2020 14:44:43 +0000 (14:44 +0000)]
IVGCVSW-5463 Change cmake version for delegate to 3.7

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: Idb3f9018a22d0f63c0f993fdfd282a1195454ac9

3 years agoAdded SECURITY.md file
Mike Kelly [Mon, 16 Nov 2020 10:13:45 +0000 (10:13 +0000)]
Added SECURITY.md file

 * New file contains the security policy, vulnerability reporting procedure
   and a PGP key that can be used to create secure vulnerability reports.
 * Removed Security section from README.md

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: Ifdffdf81a7d2033a4fa323f081a7336504d67971

3 years agoIVGCVSW-5311 Debian Packaging - Host packages in public PPA
Francis Murtagh [Mon, 16 Nov 2020 14:43:37 +0000 (14:43 +0000)]
IVGCVSW-5311 Debian Packaging - Host packages in public PPA

 * Add guide to github README.md

Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I23df585ee24e90629f821af0c780ad40d8c20f97

3 years agoMLCE-278 issue with signed-int8 quantized model
Teresa Charlin [Sat, 14 Nov 2020 13:43:46 +0000 (13:43 +0000)]
MLCE-278 issue with signed-int8 quantized model

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I144ebfca524f4cdee9cc82eef3995c6b32bfc40b

3 years agoUpdate ACL pin to 17b7102b30e0159263d06d3a0816cd2998a13456
Teresa Charlin [Mon, 16 Nov 2020 17:30:03 +0000 (17:30 +0000)]
Update ACL pin to 17b7102b30e0159263d06d3a0816cd2998a13456

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I4e664e51e9f03f1a19830fde199a9c158dfaaa3d

3 years agoIVGCVSW-5508 Activate compiler warnings in ArmNN TfLite Delegate
Finn Williams [Fri, 13 Nov 2020 13:23:15 +0000 (13:23 +0000)]
IVGCVSW-5508 Activate compiler warnings in ArmNN TfLite Delegate

Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I1a8e2aa618ff693c61010e6150f3ca41b8ab1201

3 years agoUpdate ACL pin to 61ffda4839d6fe8cc165faae0ec7c9be1d528194
Nikhil Raj [Mon, 16 Nov 2020 10:31:40 +0000 (10:31 +0000)]
Update ACL pin to 61ffda4839d6fe8cc165faae0ec7c9be1d528194

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ib738b3e333540a683c452a927ab155e0775473e7

3 years agoIVGCVSW-5385 TfLiteDelegate: Implement the Transpose operator
James Ward [Mon, 9 Nov 2020 11:57:47 +0000 (11:57 +0000)]
IVGCVSW-5385 TfLiteDelegate: Implement the Transpose operator

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Iea3d7ecccb82d85ec2d2c5cfdcdaf692236a60aa

3 years agoIVGCVSW-5338 TfLiteDelegate: Implement the Convolution operators
Sadik Armagan [Fri, 13 Nov 2020 17:51:56 +0000 (17:51 +0000)]
IVGCVSW-5338 TfLiteDelegate: Implement the Convolution operators

* Add Convolution, DepthwiseConvolution and TransposeConvolution

Signed-off-by: Kevin May <kevin.may@arm.com>
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I797e42844dfee0cc80beb64eabc3111b96320daf

3 years agoIVGCVSW-5189 Fix error running EfficientNet-Lite on GpuAcc
Narumol Prangnawarat [Fri, 13 Nov 2020 18:00:23 +0000 (18:00 +0000)]
IVGCVSW-5189 Fix error running EfficientNet-Lite on GpuAcc

 * Correct datatype of QAsymmS8

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Id4987b91e06d87735254d3cdd5c9adbe11cc8870

3 years agoIVGCVSW-5328-5329 Fuse Activation Cleanup
Mike Kelly [Fri, 13 Nov 2020 15:26:41 +0000 (15:26 +0000)]
IVGCVSW-5328-5329 Fuse Activation Cleanup

 * Resolved the review items in the main review.

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I5da34b74ac204569ea2d210fb5a069beb7d0835b

3 years agoWrap FindBoost in if(BUILD_UNIT_TESTS) so that it can be excluded entirely
Matthew Bentham [Fri, 13 Nov 2020 12:04:01 +0000 (12:04 +0000)]
Wrap FindBoost in if(BUILD_UNIT_TESTS) so that it can be excluded entirely

Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Change-Id: Iabe1b10e53d393a19e681156c001d6a2e9eb835e

3 years agoIVGCVSW-5346 Update Major, Minor release versions
Teresa Charlin [Fri, 13 Nov 2020 09:26:28 +0000 (09:26 +0000)]
IVGCVSW-5346 Update Major, Minor release versions

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I10bae415c175f4f35f32829fc48473c2ca5fa1d8

3 years agoIVGCVSW-5328-5329 Fuse Activation
Mike Kelly [Thu, 12 Nov 2020 10:58:48 +0000 (10:58 +0000)]
IVGCVSW-5328-5329 Fuse Activation

 * Added Fused Activation Optimization to both CL and Neon backends.
 * Added Fused Activation support to all the CL and Neon workloads
   that support it.
 * Changed ProfilingTest network to be a Convolution layer
   followed by an Abs layer rather than an Activation layer.
 * Added IBackendInternal::OptimizeSubgraphView function that can accept a
   ModelOptions.
 * Network will now call OptimizeSubgraphView passing in the ModelOptions.

Signed-off-by: Keith Davis <keith.davis@arm.com>
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ib536ac3cbafc7d9b35c139ad9a65b7735262cd9d

3 years agoIVGCVSW-5495 Fix validation for per-channel quant
James Conroy [Thu, 12 Nov 2020 19:26:29 +0000 (19:26 +0000)]
IVGCVSW-5495 Fix validation for per-channel quant

* Now enter if block if bias OR weights have
  multiple quantization scales.

Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I5eba0ceac9b347d0e3467e86d72d587b749b9521

3 years agoUpdate ACL pin to d7341fb9e3b24b904edf7ac9d83e1e063bc77765
Teresa Charlin [Thu, 12 Nov 2020 22:22:31 +0000 (22:22 +0000)]
Update ACL pin to d7341fb9e3b24b904edf7ac9d83e1e063bc77765

* Use NEConvolutionLayer

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ieb81fafaf34a63be8daf297ebe1bb0e4079daf4e

3 years agoIVGCVSW-5396 TfLiteDelegate: Implement the Resize operators
Jan Eilers [Tue, 10 Nov 2020 18:43:23 +0000 (18:43 +0000)]
IVGCVSW-5396 TfLiteDelegate: Implement the Resize operators

* Added resize biliniear and nearest neighbour operator
  support to the tflite delegate

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Id0113d6b865ea282c6f4de55e8419a6244a35f0e

3 years agoUpdate ACL pin to 5f2fb59054aee2ec190d72accdb45f852caf4b87
Nikhil Raj [Thu, 12 Nov 2020 11:01:38 +0000 (11:01 +0000)]
Update ACL pin to 5f2fb59054aee2ec190d72accdb45f852caf4b87

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I573687e7b81cbbf56f6f578d12c59e3ed5cda2d8

3 years agoIVGCVSW-5504 'TfLiteDelegate: Introduce FP16 and BackendOptions'
Sadik Armagan [Wed, 11 Nov 2020 18:01:48 +0000 (18:01 +0000)]
IVGCVSW-5504 'TfLiteDelegate: Introduce FP16 and BackendOptions'

* Added BackendOptions creations of armnn_delegate
* Included armnn/third-party the armnn_delegate unit tests
* Updated the CreateConstTensor function

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I8e2099a465766b905bff701413307e5850b68e42

3 years agoIVGCVSW-5387 TfLiteDelegate: Implement the Pooling operators
Narumol Prangnawarat [Wed, 11 Nov 2020 11:33:03 +0000 (11:33 +0000)]
IVGCVSW-5387 TfLiteDelegate: Implement the Pooling operators

 * Add support for AveragePool2d and L2Pool2d operators
 * Unit tests

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ida3c2e80120bce2991035f143e9eb5b9480b0e4b

3 years agoIVGCVSW-5507 ExecuteNetwork fix
Jan Eilers [Wed, 11 Nov 2020 11:44:14 +0000 (11:44 +0000)]
IVGCVSW-5507 ExecuteNetwork fix

 * Allow multiple backends to be defined seperately like
   " --compute CpuAcc --compute CpuRef "

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Ic2a827f6e3463a7413c98a7eefacef8864c1e87b

3 years agoUpdate ACL pin to 087ee3d521c1137b0bc611579eb1b94cc7813fb2
Nikhil Raj [Wed, 11 Nov 2020 10:11:18 +0000 (10:11 +0000)]
Update ACL pin to 087ee3d521c1137b0bc611579eb1b94cc7813fb2

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I35db3c917c5651b100f61c3dca35cee2245dd676

3 years agoIVGCVSW-5389 'TfLiteDelegate: Implement the FullyConnected operator'
Sadik Armagan [Tue, 10 Nov 2020 21:18:41 +0000 (21:18 +0000)]
IVGCVSW-5389 'TfLiteDelegate: Implement the FullyConnected operator'

* Added FullyConnected operator support to delegate

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Iae9c0980a4bfd6aa4d90f107f329dfa782baeefe

3 years agoIVGCVSW-5387 TfLiteDelegate: Implement the Pooling operators
Narumol Prangnawarat [Mon, 9 Nov 2020 18:42:11 +0000 (18:42 +0000)]
IVGCVSW-5387 TfLiteDelegate: Implement the Pooling operators

 * Implement MaxPool2d operators
 * Add QAsymmS8 to armnn delegate
 * Unit tests

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I1815ade6ccda3e9331bd3a68e164be0f6947e9df

3 years agoIVGCVSW-5398 TfLiteDelegate: Implement the Quantization operators
Matthew Sloyan [Mon, 9 Nov 2020 12:25:05 +0000 (12:25 +0000)]
IVGCVSW-5398 TfLiteDelegate: Implement the Quantization operators

 * Enabled quantization operators DEQUANTIZE and QUANTIZE.
 * Implemented unit tests for quantization operators.
 * Added utils function for checking if affine quantization.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I84b5c75bda629d9234f5ed198b04f527705a54aa

3 years agoIVGCVSW-5380 'TfLiteDelegate: Implement the Comparison operators'
Sadik Armagan [Mon, 9 Nov 2020 08:26:22 +0000 (08:26 +0000)]
IVGCVSW-5380 'TfLiteDelegate: Implement the Comparison operators'

* Implemented Comparison Operators
* Added unit tests

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Icdc0f7c6a286a8364a2770b26d15e8958291dc2b

3 years agoIVGCVSW-5379 'TfLiteDelegate: Implement the ElementWiseBinary operators'
Sadik Armagan [Mon, 9 Nov 2020 08:38:30 +0000 (08:38 +0000)]
IVGCVSW-5379 'TfLiteDelegate: Implement the ElementWiseBinary operators'

* Enabled elementwise binary operators DIV, MAXIMUM, MINIMUM, MUL, SUB
* Implemented unit tests for elementwise binary operators

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I196998d53201a6e8888bb203eb640530b8feeac9

3 years agoUpdate ACL pin to 2cb05d9ee91880179ad2537cbf66229c7c2a2356
Nikhil Raj [Tue, 10 Nov 2020 10:24:22 +0000 (10:24 +0000)]
Update ACL pin to 2cb05d9ee91880179ad2537cbf66229c7c2a2356

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I4672cd8827f6c03243213a5f1ce45e8f1cd3044a

3 years agoIVGCVSW-5091 Add Logical ops frontend and ref impl
James Conroy [Fri, 6 Nov 2020 16:28:18 +0000 (16:28 +0000)]
IVGCVSW-5091 Add Logical ops frontend and ref impl

* Add frontend and reference implementation for logical
  ops NOT, AND, OR.
* Unary NOT uses existing ElementwiseUnary layer and
  ElementwiseUnary descriptor.
* Binary AND/OR uses new layer LogicalBinary and new
  LogicalBinary descriptor.
* Add serialization/deserializion support and add missing
  ElementwiseUnary deserializer code.
* Add additional Boolean decoder in BaseIterator.hpp.

Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: Id343b01174053a166de1b98b6175e04a5065f720

3 years agoIVGCVSW-5462 Link fmt statically
Jan Eilers [Thu, 29 Oct 2020 15:25:48 +0000 (15:25 +0000)]
IVGCVSW-5462 Link fmt statically

 * Fmt didn't get installed properly. Each component of an interface
   library needs to be installed separately.
 * Changed fmt to be a static library

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Ic69bc9536ee01eed7b434b1ff53150581ba60e00

3 years agoUpdate ACL pin to bef7fa27b0d231a8649952f60808132d109b6345
Nikhil Raj [Mon, 9 Nov 2020 10:06:17 +0000 (10:06 +0000)]
Update ACL pin to bef7fa27b0d231a8649952f60808132d109b6345

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I842bb25a5c4dfda7e195e71af41e829bc6c5ea21

3 years agoIVGCVSW-5327 Add to Layer a binary blob to host the activation layer info
Keith Davis [Fri, 23 Oct 2020 16:20:05 +0000 (17:20 +0100)]
IVGCVSW-5327 Add to Layer a binary blob to host the activation layer info

Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I0a07dea96a86849701ba387dbea148909a6d729b

3 years agoIVGCVSW-5315 Create FuseBatchNorm class
Mike Kelly [Thu, 5 Nov 2020 15:44:56 +0000 (15:44 +0000)]
IVGCVSW-5315 Create FuseBatchNorm class

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: Id0625c58dbeea79874bf986b70d136ed9390bf83

3 years agoCOMPMID-3639: (3RDPARTY_UPDATE) Move CL kernels to src
Francis Murtagh [Wed, 4 Nov 2020 13:33:41 +0000 (13:33 +0000)]
COMPMID-3639: (3RDPARTY_UPDATE) Move CL kernels to src

 * Change file Armnn GlobalConfig.cmake uses to find ARMCOMPUTE_INCLUDE
 * Original file has been moved and no longer visible

Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I91c1376124dad2b2db764f83c421a1cc110e5dd1

3 years agoRemove URL_HASH check for x264 lib
Éanna Ó Catháin [Thu, 5 Nov 2020 13:06:49 +0000 (13:06 +0000)]
Remove URL_HASH check for x264 lib

Change-Id: I45a98a1f3108397c31389901284967e1611d61f8
Signed-off-by: Éanna Ó Catháin <eanna.ocathain@arm.com>
3 years agoUpdate ACL pin to 770dfeb04b6fd89afde2005bd46caa6ff0858f3e
Nikhil Raj [Thu, 5 Nov 2020 10:07:30 +0000 (10:07 +0000)]
Update ACL pin to 770dfeb04b6fd89afde2005bd46caa6ff0858f3e

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I6a0b1c2fe3f98f2bce31296f732ddd914522a9c0

3 years agoUpdate ACL pin to ca6068594bcabcc392f30c8ff3188b03f4a35407
Teresa Charlin [Tue, 3 Nov 2020 14:09:41 +0000 (14:09 +0000)]
Update ACL pin to ca6068594bcabcc392f30c8ff3188b03f4a35407

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I6f71845179e22cc7b05e3d1e3adddea998962770

3 years agoIVGCVSW-5476 Fix Fuse_batchNorm_into_Conv2D_Float32_Test
Teresa Charlin [Sat, 31 Oct 2020 13:21:01 +0000 (13:21 +0000)]
IVGCVSW-5476 Fix Fuse_batchNorm_into_Conv2D_Float32_Test

* failing with no backends provided

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I55ebfc52268ad667e495831c64977338d003db99

3 years agoPrint out more information about the graph
Ayan Halder [Fri, 30 Oct 2020 10:58:54 +0000 (10:58 +0000)]
Print out more information about the graph

Besides, the layer name, type and backend, it is useful
to print the count of input/output tensors. Also, we could
print the tensor dimensions.

Signed-off-by: Ayan Halder <ayan.halder@arm.com>
Change-Id: I91ac09ae1d594e13f01e1db60dc531b16ae87dde

3 years agoIVGCVSW-5322 Fix segfault between Neon and Cl layers
Narumol Prangnawarat [Fri, 30 Oct 2020 16:06:55 +0000 (16:06 +0000)]
IVGCVSW-5322 Fix segfault between Neon and Cl layers

 * Fallback to memory copy if memory import is not supported
 * Remove direct compatibility between Neon and Cl Tensors
 * Unit tests fallback from Neon to Cl and Cl to Neon

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Iec00a77423fb23b37a6b1aefee1b2ec4d649efca

3 years agoIVGCVSW-5265 Removing more Boost references from test executables.
Colm Donelan [Fri, 30 Oct 2020 14:46:21 +0000 (14:46 +0000)]
IVGCVSW-5265 Removing more Boost references from test executables.

* Removed unused includes from InferenceModel.hpp.
* Replaced use of boost multi-array with vectors in YoloInferenceTest.

Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: Ieadf3471ed170b09859187c83616c8e249f94543

3 years agoIVGCVSW-5267 Remove boost from core android-nn-driver
James Ward [Fri, 30 Oct 2020 12:36:19 +0000 (12:36 +0000)]
IVGCVSW-5267 Remove boost from core android-nn-driver

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I19088511be05087f979aa285242dd18f093fc5da

3 years agoIVGCVSW-5266 Remove Boost from standalone dynamic backend
James Ward [Fri, 30 Oct 2020 09:54:21 +0000 (09:54 +0000)]
IVGCVSW-5266 Remove Boost from standalone dynamic backend

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I11e02826dd155bc722d6659d9b7e3053cad45b7f

3 years agoIVGCVSW-5468 Rewrite QuantizationDataSet.cpp to avoid use of CsvReader
James Ward [Thu, 29 Oct 2020 16:19:02 +0000 (16:19 +0000)]
IVGCVSW-5468 Rewrite QuantizationDataSet.cpp to avoid use of CsvReader

* Remove armnnUtils/CsvReader and usage
* Remove armnn/CsvReaderTest and usage
* Replace functionality in QuantizationDataSet.cpp

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I7213904482afa93ae6d607aa5e69117c8c34ea81

3 years agoIVGCVSW-5379 'TfLiteDelegate: Implement the ElementWiseBinary operators'
Sadik Armagan [Thu, 29 Oct 2020 16:14:54 +0000 (16:14 +0000)]
IVGCVSW-5379 'TfLiteDelegate: Implement the ElementWiseBinary operators'

* Implemented ADD operator
* Implemented FP32 unit tests for ADD operator

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Id7238749308855bd2b2118f4b6e60e765815c38f

3 years agoIVGCVSW-5267 Remove boost from core android-nn-driver
James Ward [Wed, 21 Oct 2020 08:32:46 +0000 (09:32 +0100)]
IVGCVSW-5267 Remove boost from core android-nn-driver

* WIP
!armnn:4246

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: I1b379b9e7f4397ca9b9189e423042469af382c09

3 years agoIVGCVSW-5265 Remove boost from core ArmNN CMake
Colm Donelan [Thu, 29 Oct 2020 11:39:14 +0000 (11:39 +0000)]
IVGCVSW-5265 Remove boost from core ArmNN CMake

 * Remove all but Boost_UNIT_TEST_FRAMEWORK_LIBRARY from
   ArmNN Cmake files.
 * Remove references to boost::fpc from old test applications.

Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: Ibb1261dee4b971d1788d2805528aa800a8b883ce

3 years agoIVGCVSW-5314 Create OptimizeForExclusiveConnection
Teresa Charlin [Thu, 15 Oct 2020 12:16:07 +0000 (13:16 +0100)]
IVGCVSW-5314 Create OptimizeForExclusiveConnection

* FuseBatchNorm class has been added to facilitate testing
* Only Convolution2D FP32 being fused

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I049c4770946ddca21b08516d4c9f4d0d22bf9b45

3 years agoUpdate ACL pin to 5a4284dc7d98a382d0fa492b64fabe430d5afdc6
Nikhil Raj [Thu, 29 Oct 2020 12:25:10 +0000 (12:25 +0000)]
Update ACL pin to 5a4284dc7d98a382d0fa492b64fabe430d5afdc6

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ife58d18880bc561bede5cd432befb632fe9dc9c9

3 years agoIVGCVSW-4995 Update BuildGuideAndroidNDK and BuildGuideCrossCompilation md files...
Nikhil Raj [Wed, 28 Oct 2020 12:54:19 +0000 (12:54 +0000)]
IVGCVSW-4995 Update BuildGuideAndroidNDK and BuildGuideCrossCompilation md files in ArmNN

* Updating the docs with latest changes made to protobuf, caffe and onnx

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I336ccf13ab38629399fdbdf70479d5fb07fa43fa

3 years agoUpdate ACL to 19a41bad7fbbc18fc9032753b234b1f7c632b2d5
Teresa Charlin [Tue, 27 Oct 2020 16:53:09 +0000 (16:53 +0000)]
Update ACL to 19a41bad7fbbc18fc9032753b234b1f7c632b2d5

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ia2388b54d72764ead8818e559843f46f8d76e245

3 years agoMove PyArmNN unit test resources for IDeserializer to external storage
Pavel Macenauer [Thu, 22 Oct 2020 08:07:59 +0000 (08:07 +0000)]
Move PyArmNN unit test resources for IDeserializer to external storage

Change-Id: I582acd5a852143b17ca19aebaf54ccf5c7b5df87
Signed-off-by: Pavel Macenauer <pavel.macenauer@nxp.com>
3 years agoIVGCVSW-5433 Remove boost::transform_iterator and make_transform_iterator
Finn Williams [Thu, 22 Oct 2020 15:53:35 +0000 (16:53 +0100)]
IVGCVSW-5433 Remove boost::transform_iterator and make_transform_iterator

Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I28aace7092cff5743353df1b1de8e7a4691554d3

3 years agoBugfix: Don't try to link pipeCommon if it's not being built
Francis Murtagh [Tue, 27 Oct 2020 16:53:25 +0000 (16:53 +0000)]
Bugfix: Don't try to link pipeCommon if it's not being built

 * If BUILD_TIMELINE_DECODER=0 it gave /usr/bin/ld: cannot find -lpipeCommon

Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: Ib10e894c54f32370a96b702a6f1b462fda31388b

3 years agoFix BackendHint missing when cloning a layer
Narumol Prangnawarat [Tue, 27 Oct 2020 18:07:04 +0000 (18:07 +0000)]
Fix BackendHint missing when cloning a layer

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I550fb59469af39f8fa3415843e973f06b18485e5

3 years agoIVGCVSW-5378 'TfLiteDelegate: Implement the ElementWiseUnary operators '
Sadik Armagan [Tue, 27 Oct 2020 17:30:18 +0000 (17:30 +0000)]
IVGCVSW-5378 'TfLiteDelegate: Implement the ElementWiseUnary operators '

* Moved ElementwiseUnary operators tests into single file
* Implemented FP32 test for supported ElementwiseUnary operators

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I4b7eab190c3c8edb50927b8e1e94dd353597efcb

3 years agoBugfix: Allow use of dynamic backendId in execute network
Francis Murtagh [Tue, 27 Oct 2020 15:20:40 +0000 (15:20 +0000)]
Bugfix: Allow use of dynamic backendId in execute network

 * Stops execute network rejecting backendId based on BackendRegistry
 * Dynamically loaded backends arent visible yet as runtime isn't initialized

Change-Id: I87adfd137b2225ab07f8c3e996db9565caf276eb
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
3 years agoIVGCVSW-5366 'Add a do nothing SubGraph class'
Sadik Armagan [Fri, 23 Oct 2020 16:14:43 +0000 (17:14 +0100)]
IVGCVSW-5366 'Add a do nothing SubGraph class'
IVGCVSW-5373 'Implement the ABS operator in the Delegate'

* Added a Switch statement into the VisitNode() function
* Separated the Visit functions into the categorized source files
* Implemented VisitElementwiseUnary() function
* Added tests for ABS and SQRT

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: If9654d0a8d8ff7dcd6fb5cbe0dc312941772affb

3 years agoUpdate ACL pin to 9ae06d4986bc3055f7786c1097b465bd321cf8eb
Teresa Charlin [Mon, 26 Oct 2020 18:55:11 +0000 (18:55 +0000)]
Update ACL pin to 9ae06d4986bc3055f7786c1097b465bd321cf8eb

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ie9e0e1e3096edbbff7cf05fe65e8eeeb819d59bf

3 years agoIVGCVSW-5077 Ensure ArmNN builds successfully with latest protobuf
Nikhil Raj [Fri, 9 Oct 2020 13:52:25 +0000 (14:52 +0100)]
IVGCVSW-5077 Ensure ArmNN builds successfully with latest protobuf

* Use the single parameter version of SetTotalBytesLimit()
* Update CMakeLists to turn off deprecated declarartions

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I2d360966743986872cfef40c2ab1a3505fc5d99a

3 years agoUpdate ACL pin to b333758b5e2b00ba7b36cc02c169605f55fb0251
Nikhil Raj [Wed, 7 Oct 2020 09:31:06 +0000 (10:31 +0100)]
Update ACL pin to b333758b5e2b00ba7b36cc02c169605f55fb0251

Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I2280e7fd77729c41086f7994fde182255159d83d

3 years agoGitHub#465 Fix NonMaxSuppression
antkillerfarm [Thu, 15 Oct 2020 03:02:07 +0000 (11:02 +0800)]
GitHub#465 Fix NonMaxSuppression

If visited flag set true, it should not be visited any more.
For example, if we put 10 boxes (ordered by score) into NonMaxSuppression:
* Step1: Suppose Box 2/3/6/8 are suppressed by Box 1. Box 4/5/7/9/10 survived.
* Step2: Correct way: We use Box 4 to suppress the survive boxes.
         Prior to this commit: Box 4 may be suppressed by Box 2,
          even Box 2 is already suppressed by Box 1...

Signed-off-by: Antkillerfarm <antkillerfarm@gmail.com>
Change-Id: I38d7a84287649827a16565748592fb562b4df5d5

3 years agoAdd IDeserializer support in pyarmnn
wangg [Wed, 26 Aug 2020 01:44:32 +0000 (01:44 +0000)]
Add IDeserializer support in pyarmnn

Resources required for new unit tests are included for review.

Signed-off-by: Guanqun Wang gemini910621@gmail.com
Change-Id: Iead6cb5beaf824a6f467ad9da4aede5719ebe4ec

3 years agoIVGCVSW-5284 Refactor ExecuteNetwork
Jan Eilers [Thu, 15 Oct 2020 17:34:43 +0000 (18:34 +0100)]
IVGCVSW-5284 Refactor ExecuteNetwork

 * Removed boost program options and replaced it with cxxopts
 * Unified adding, parsing and validation of program options
   into the struct ProgramOptions
 * Program options are now parsed directly into ExecuteNetworkParams
   which can be passed directly to MainImpl
 * Split NetworkExecutionUtils into header and source
 * Removed RunTest
 * Removed RunCsvTest
 * Removed RunClTuning
 * Moved MainImpl back to ExecuteNetwork.cpp
 * Added additional util functions
The functionality of ExecuteNetwork remains the same. Only
cl tuning runs need to be started separately
and there is no short option for fp16-turbo-mode because -h is
reserved in cxxopts to print help messages

Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Ib9689375c81e1a184c17bb3ea66c3550430bbe09

3 years agoIVGCVSW-5365 'Create the TfLite Delegate subdirectory in ArmNN'
Sadik Armagan [Mon, 19 Oct 2020 16:35:30 +0000 (17:35 +0100)]
IVGCVSW-5365 'Create the TfLite Delegate subdirectory in ArmNN'

* Created delegate sub-directory under armnn
* Created Delegate, ArmnnSubgraph and DelegateOptions classes
* Created cmake files.
* Integrated doctest (under MIT license) as testing framework

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: If725ebd62c40a97c783cdad22bca48709d44338c

3 years agoBugfix: fix typo in Pyarmnn README example code
Francis Murtagh [Thu, 15 Oct 2020 10:02:12 +0000 (11:02 +0100)]
Bugfix: fix typo in Pyarmnn README example code

Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: Ib2c219c976dd37e570681442e15e414cdb61b3f6

3 years agoIVGCVSW-5435 Add FloatingPointComparison to remove boost::math::fpc uses
Matthew Sloyan [Thu, 15 Oct 2020 12:53:27 +0000 (13:53 +0100)]
IVGCVSW-5435 Add FloatingPointComparison to remove boost::math::fpc uses

 * Added FloatingPointComparison.hpp and FloatingPointComparisonTest.cpp,
   which compares two floats and returns true if the values are
   within a specified or default tolerance of each other.
 * Also removed boost::math::fpc from test/TensorHelpers.hpp to validate.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I164c32eccd213c53bb1bc4f9cd4ee4838f1781c9

3 years agoIVGCVSW-5406 Update README.md with details of third party tools.
Colm Donelan [Wed, 14 Oct 2020 16:54:39 +0000 (17:54 +0100)]
IVGCVSW-5406 Update README.md with details of third party tools.

* Add Description, version and provenience to third party tools table.
* Update arm-security@arm.com email address.

Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: Id48f36ae2319688fafea9fc4757bc75b724b3d02

3 years agoIVGCVSW-5280 Switch tests/InferenceTest and derived tests over to cxxopts
James Ward [Mon, 12 Oct 2020 13:17:36 +0000 (14:17 +0100)]
IVGCVSW-5280 Switch tests/InferenceTest and derived tests over to cxxopts

* refactor AddCommandLineOptions() functions to allow checking of required options
* add CxxoptsUtils.hpp file for convenience functions
!referencetests:268500

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Ica954b210b2981b7cd10995f0d75fcb2a2f7b443

3 years agoIVGCVSW-5335 Added Documentation for fast_math
Mike Kelly [Wed, 14 Oct 2020 10:48:21 +0000 (11:48 +0100)]
IVGCVSW-5335 Added Documentation for fast_math

 * Added Documentation for fast_math to CLBackendModelContext
 * Added Documentation for fast_math to NeonBackendModelContext

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: I43a0568ae6914e074a80130a051e5d9bb849f2ba

3 years agoIVGCVSW-5434 Remove boost/preprocessor.hpp
Jim Flynn [Tue, 13 Oct 2020 13:40:29 +0000 (14:40 +0100)]
IVGCVSW-5434 Remove boost/preprocessor.hpp

Change-Id: I51462d18ce0be4b88a23453cfdd16510f30dd1e3
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
3 years agoIVGCVSW-4489 Remove remaining occurrence of boost::format
Matthew Sloyan [Mon, 12 Oct 2020 14:03:01 +0000 (15:03 +0100)]
IVGCVSW-4489 Remove remaining occurrence of boost::format

 * Replaced with fmt::format in Descriptors.cpp.
 * Removed remaining boost/format headers in ArmNN codebase.
 * Removed additional boost header in Network.cpp

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: Ib98b83bf4ec99ef98ce7a3635ec0dd478c3e43e1

3 years agoBugfix: Correctly parse the armnn_includes by separating with space
Francis Murtagh [Mon, 12 Oct 2020 15:45:49 +0000 (16:45 +0100)]
Bugfix: Correctly parse the armnn_includes by separating with space

 * Stops generate_wrap reading as -I/usr/local/include-I/usr/include
 * Allows generation using system headers

Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I501c473b0f624f80ebccfade7b009a74bdcb2d0c

3 years agoIVGCVSW-5335 Documentation for fast_math
Mike Kelly [Thu, 8 Oct 2020 11:19:01 +0000 (12:19 +0100)]
IVGCVSW-5335 Documentation for fast_math

 * Changed documentation for fast_math to add warning about possibly reduction in precision.

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: If954471efc6aef702e8490585571815d9e19b3fc

3 years agoLoad dynamic backends for YoloV3
Derek Lamberti [Thu, 17 Sep 2020 12:58:18 +0000 (13:58 +0100)]
Load dynamic backends for YoloV3

* Optional cmd option to dump optimized model to dot
* Optional cmd option to specify dynamic backends path
* input is now optional and must exist if given
* comparison files now optional and must exist if given

Change-Id: I1499c9eb715be3cacdba2c227e1a93dd997f355d
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
3 years agoIVGCVSW-5287 Switch tests/MultipleNetworksCifar10 over to cxxopts
James Ward [Mon, 5 Oct 2020 16:11:23 +0000 (17:11 +0100)]
IVGCVSW-5287 Switch tests/MultipleNetworksCifar10 over to cxxopts

Signed-off-by: James Ward <james.ward@arm.com>
Change-Id: Ia4ff69f2c8dd538ad7845053dc7a690f434c381c

3 years agoIVGCVSW-5279 Switch armnnQuantizer over to cxxopts
Matthew Sloyan [Thu, 8 Oct 2020 15:41:47 +0000 (16:41 +0100)]
IVGCVSW-5279 Switch armnnQuantizer over to cxxopts

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I79f12ba33b3ca58cdc4be531ffbf72fa20690792

3 years agoIVGCVSW-5291 Fix for Yolov3 producing 0s on Neon
David Monahan [Fri, 9 Oct 2020 11:30:04 +0000 (12:30 +0100)]
IVGCVSW-5291 Fix for Yolov3 producing 0s on Neon

Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I9331d590e71fc479979c11be9dc750d6435f12bc

3 years agoIVGCVSW-5173 'Upgrade from v1.15 of tensorflow to v2.3'
Sadik Armagan [Fri, 9 Oct 2020 12:39:17 +0000 (13:39 +0100)]
IVGCVSW-5173 'Upgrade from v1.15 of tensorflow to v2.3'

* Fixed the tensorflow build issue.

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I608c55fdf76ff4d436434c0a50b5368923d2ddb4

3 years agoIVGCVSW-5282 Switch tests/TfLiteMobilenetQuantized-Armnn over to cxxopts
Matthew Sloyan [Mon, 28 Sep 2020 11:58:14 +0000 (12:58 +0100)]
IVGCVSW-5282 Switch tests/TfLiteMobilenetQuantized-Armnn over to cxxopts

 * Required update to cxxopts v3.0 for unrecognised options to work.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: If1803731474e42580d663c802a1f3ff240fadffe

3 years agoIVGCVSW-5363 Add Unmap layer and Unmap workload
Jim Flynn [Thu, 8 Oct 2020 10:42:30 +0000 (11:42 +0100)]
IVGCVSW-5363 Add Unmap layer and Unmap workload

Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Change-Id: Ie5ecfa67e4763d0c058905592fe2e2fd7315f85c

3 years agoIVGCVSW-5286 Switch tests/ModelAccuracyTool-Armnn over to cxxopts
Matthew Sloyan [Tue, 6 Oct 2020 09:03:21 +0000 (10:03 +0100)]
IVGCVSW-5286 Switch tests/ModelAccuracyTool-Armnn over to cxxopts

 * Fixed two code errors which were causing compiler issues.
 * Added support for multiple input and output tensors.

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I298e4bf52a0b41349adab60295e0f22da3cc057b

3 years agoRemove Resize from list of layers that need padding in Neon
Teresa Charlin [Tue, 6 Oct 2020 11:11:39 +0000 (12:11 +0100)]
Remove Resize from list of layers that need padding in Neon

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I054f0b71d4e9581c637fa09e40f6b661e58e39f3

3 years agoIVGCVSW-5405 Remove boost::make_iterator_range and boost::to_upper_copy
Matthew Sloyan [Tue, 6 Oct 2020 09:45:32 +0000 (10:45 +0100)]
IVGCVSW-5405 Remove boost::make_iterator_range and boost::to_upper_copy

 * Removed from ModelAccuracyTool-Armnn and ImageCSVFileGenerator
 * Fixed formatting in ImageCSVFileGenerator

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I09dfca27813582cc48f46d0507680368ed823a9c

3 years agoIVGCVSW-5362 Add Map layer and Map workload
Jim Flynn [Tue, 6 Oct 2020 09:14:50 +0000 (10:14 +0100)]
IVGCVSW-5362 Add Map layer and Map workload

Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Id2227c58809b84c7a7af61f7c0d88ad7d45ce558

3 years agoIVGCVSW-4488 Update cxxopts to version 3.0
Matthew Sloyan [Tue, 6 Oct 2020 15:06:07 +0000 (16:06 +0100)]
IVGCVSW-4488 Update cxxopts to version 3.0

 * Required to fix issue in TfLiteMobilenetQuantized-Armnn.cpp

Signed-off-by: Matthew Sloyan <matthew.sloyan@arm.com>
Change-Id: I3a465f62e3d656c9626113da6223e4fa26b535a6

3 years agoIVGCVSW-5213 Switch armnnConverter over to cxxopts
Colm Donelan [Tue, 6 Oct 2020 14:15:33 +0000 (15:15 +0100)]
IVGCVSW-5213 Switch armnnConverter over to cxxopts

* Swap out boost::program_options  with cxxopts.
* Remove const from argv declaration to conform to cxxopts.
* Clean up CLI handling around multiple inputs and shapes.
  Each input must be specified with its own -i param.
  Each corresponding -s parameter must be specified too.

Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: I01c2683dbca51b2322c98913731ac82a59e400a5

3 years agoIVGCVSW-5173 'Upgrade from v1.15 of tensorflow to v2.3'
Sadik Armagan [Thu, 1 Oct 2020 16:12:17 +0000 (17:12 +0100)]
IVGCVSW-5173 'Upgrade from v1.15 of tensorflow to v2.3'

* Updated the generate_tensorflow_protobuf script to search for .proto
  files in tensorflow directory instead of getting from a file
* Updated BuildGuideAndroidNDK.md to clone Tensorflow 2.3.1

Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I8d2b0f0a04327f930784648e9e8f7f25895d53d1

3 years agoIVGCVSW-5407 Failing Unittest
Mike Kelly [Mon, 5 Oct 2020 11:12:49 +0000 (12:12 +0100)]
IVGCVSW-5407 Failing Unittest

 * The number of error and warning messages will vary depending on the device but will always be greater than 0.

Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: Iee1d12e60d8c88c9116083d7274cea2ec23cb032

3 years agoUpdate ACL pin to fc2f6d0427e1d886fcccc68867d1af1ccd96608b
Teresa Charlin [Mon, 5 Oct 2020 08:53:18 +0000 (09:53 +0100)]
Update ACL pin to fc2f6d0427e1d886fcccc68867d1af1ccd96608b

* Set use_padding to false in neon workload

Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ia5367de331efe1d28dea4dfbefc0713720da81f9

3 years agoPyArmNN Updates
Éanna Ó Catháin [Thu, 10 Sep 2020 12:02:37 +0000 (13:02 +0100)]
PyArmNN Updates

* Updated setup.py to raise error on mandatory ext
* Updated examples section of main readme
* Added readme to img class
* Moved img class to new subdir

Change-Id: Iea5f6d87c97e571b8ca5636268231506538840c7
Signed-off-by: Éanna Ó Catháin <eanna.ocathain@arm.com>
Signed-off-by: Jakub Sujak <jakub.sujak@arm.com>
3 years agoIVGCVSW-5297 Remove boost::format from rest of ArmNN.
Colm Donelan [Wed, 9 Sep 2020 11:48:16 +0000 (12:48 +0100)]
IVGCVSW-5297 Remove boost::format from rest of ArmNN.

* Replacing calls to boost:format with fmt:format.
* TensorUtils.cpp added outputShape.reserve call.

Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: I4b2ed0f72039df824a2adca9309b8a9bbb158c5b