Eric Botcazou [Wed, 14 Aug 2019 09:52:43 +0000 (09:52 +0000)]
[Ada] Further cleanup in inlining machinery
No practical functional changes.
2019-08-14 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* inline.adb (Add_Pending_Instantiation): Use greater-or-equal
in the comparison against the maximum number of instantiations.
From-SVN: r274471
Ed Schonberg [Wed, 14 Aug 2019 09:52:39 +0000 (09:52 +0000)]
[Ada] Do not crash with -gnatR3 on Ghost aspects
2019-08-14 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* sem_aux.adb (Next_Rep_Item): If a node in the rep chain
involves a Ghost aspect it may have been replaced by a null
statement; use the original node to find next Rep_Item.
* repinfo.adb (List_Entities): Do not list an Ignored
Ghost_Entity, for which information may have been deleted.
From-SVN: r274470
Bob Duff [Wed, 14 Aug 2019 09:52:34 +0000 (09:52 +0000)]
[Ada] Warn about unknown condition in Compile_Time_Warning
The compiler now warns if the condition in a pragma Compile_Time_Warning
or Compile_Time_Error does not have a compile-time-known value. The
warning is not given for pragmas in a generic template, but is given for
pragmas in an instance.
The -gnatw_c and -gnatw_C switches turn the warning on and off. The
default is on.
2019-08-14 Bob Duff <duff@adacore.com>
gcc/ada/
* sem_prag.ads, sem_prag.adb
(Process_Compile_Time_Warning_Or_Error): In parameterless
version, improve detection of whether we are in a generic unit
to cover the case of an instance within a generic unit.
(Process_Compile_Time_Warning_Or_Error): Rename the
two-parameter version to be
Validate_Compile_Time_Warning_Or_Error, and do not export it.
Issue a warning if the condition is not known at compile time.
The key point is that the warning must be given only for pragmas
deferred to the back end, because the back end discovers
additional values that are known at compile time. Previous
changes in this ticket have enabled this by deferring to the
back end without checking for special cases such as 'Size.
(Validate_Compile_Time_Warning_Or_Error): Rename to be
Defer_Compile_Time_Warning_Error_To_BE.
* warnsw.ads, warnsw.adb (Warn_On_Unknown_Compile_Time_Warning):
Add new switches -gnatw_c and -gnatw_C to control the above
warning.
* doc/gnat_ugn/building_executable_programs_with_gnat.rst:
Document new switches.
* gnat_ugn.texi: Regenerate.
gcc/testsuite/
* gnat.dg/warn27.adb: New testcase.
From-SVN: r274469
Eric Botcazou [Wed, 14 Aug 2019 09:52:29 +0000 (09:52 +0000)]
[Ada] Further cleanup in the inlining machinery
2019-08-14 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_ch12.adb (Might_Inline_Subp): Rework comment and restrict
the shortcut based on Is_Inlined to the back-end inlining case.
From-SVN: r274468
Bob Duff [Wed, 14 Aug 2019 09:52:24 +0000 (09:52 +0000)]
[Ada] Incorrect error on inline protected function
This patch fixes a bug where if a protected function has a pragma
Inline, and has no local variables, and the body consists of a single
extended_return_statement, and the result type is an indefinite
composite subtype, and inlining is enabled, the compiler gives an error,
even though the program is legal.
2019-08-14 Bob Duff <duff@adacore.com>
gcc/ada/
* inline.adb (Check_And_Split_Unconstrained_Function): Ignore
protected functions to get rid of spurious error. The
transformation done by this procedure triggers legality errors
in the generated code in this case.
gcc/testsuite/
* gnat.dg/inline19.adb, gnat.dg/inline19.ads: New testcase.
From-SVN: r274467
Bob Duff [Wed, 14 Aug 2019 09:52:20 +0000 (09:52 +0000)]
[Ada] Defer processing of unknown CTW/E conditions to the back end
2019-08-14 Bob Duff <duff@adacore.com>
gcc/ada/
* sem_prag.adb (Process_Compile_Time_Warning_Or_Error): Defer
processing to the back end in all cases where the pragma's
condition is not known at compile time during the front end
(except in generics), as opposed to detecting 'Size attributes
and the like. This ensures that we take advantage of whatever
can be compile-time known after running the back end, as opposed
to having the front end guess what the back end can do. Remove
a little duplicated code at the call site.
* gnat1drv.adb (Post_Compilation_Validation_Checks): Unlock the
Elists while in Validate_Compile_Time_Warning_Errors, because it
does analysis and name resolution, which sometimes involves
adding Elists.
From-SVN: r274466
Eric Botcazou [Wed, 14 Aug 2019 09:52:15 +0000 (09:52 +0000)]
[Ada] Compiler speedup with inlining across units
This change is aimed at speeding up the inlining across units done by
the Ada compiler when -gnatn is specified and in the presence of units
instantiating a lot of generic packages.
The current implementation is as follows: when a generic package is
being instantiated, the compiler scans its spec for the presence of
subprograms with an aspect/pragma Inline and, upon finding one,
schedules the instantiation of its body. That's not very efficient
because the compiler doesn't know yet if one of those inlined
subprograms will eventually be called from the main unit.
The new implementation arranges for the compiler to instantiate the body
on demand, i.e. when it encounters a call to one of the inlined
subprograms. That's still not optimal because, at this point, the
compiler has not yet computed whether the call itself is reachable from
the main unit (it will do this computation at the very end of the
processing, just before sending the inlined units to the code generator)
but that's nevertheless a net progress.
The patch also enhances the -gnatd.j option to make it output the list
of instances "inlined" this way. The following package is a simple
example:
with Q;
procedure P is
begin
Q.Proc;
end;
package Q is
procedure Proc;
pragma Inline (Proc);
end Q;
with G;
package body Q is
package My_G is new G (1);
procedure Proc is
Val : constant Integer := My_G.Func;
begin
if Val /= 1 then
raise Program_Error;
end if;
end;
end Q;
generic
Value : Integer;
package G is
function Func return Integer;
pragma Inline (Func);
end G;
package body G is
function Func return Integer is
begin
return Value;
end;
end G;
2019-08-14 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* einfo.ads (Is_Called): Document new usage on E_Package
entities.
* einfo.adb (Is_Called): Accept E_Package entities.
(Set_Is_Called): Likewise.
* exp_ch6.adb (Expand_Call_Helper): Move code dealing with
instances for back-end inlining to Add_Inlined_Body.
* inline.ads: Remove with clauses for Alloc and Table.
(Pending_Instantiations): Move to...
* inline.adb: Add with clauses for Alloc, Uintp, Table and
GNAT.HTable.
(Backend_Instances): New variable.
(Pending_Instantiations): ...here.
(Called_Pending_Instantiations): New table.
(Node_Table_Size): New constant.
(Node_Header_Num): New subtype.
(Node_Hash): New function.
(To_Pending_Instantiations): New hash table.
(Add_Inlined_Body): Bail out early for subprograms in the main
unit or subunit. Likewise if the Is_Called flag is set. If the
subprogram is an instance, invoke Add_Inlined_Instance. Call
Set_Is_Called earlier. If the subrogram is within an instance,
invoke Add_Inlined_Instance. Also deal with the case where the
call itself is within an instance.
(Add_Inlined_Instance): New procedure.
(Add_Inlined_Subprogram): Remove conditions always fulfilled.
(Add_Pending_Instantiation): Move the defence against ludicruous
number of instantiations to here. When back-end inlining is
enabled, associate an instantiation with its index in table and
mark a few selected kinds of instantiations as always needed.
(Initialize): Set Backend_Instances to No_Elist.
(Instantiate_Body): New procedure doing the work extracted
from...
(Instantiate_Bodies): ...here. When back-end inlining is
enabled, loop over Called_Pending_Instantiations instead of
Pending_Instantiations.
(Is_Nested): Minor tweak.
(List_Inlining_Info): Also list the contents of
Backend_Instances.
* sem_ch12.adb (Might_Inline_Subp): Return early if Is_Inlined
is set and otherwise set it before returning true.
(Analyze_Package_Instantiation): Remove the defence against
ludicruous number of instantiations. Invoke
Remove_Dead_Instance instead of doing the removal manually if
there is a guaranteed ABE.
From-SVN: r274465
Gary Dismukes [Wed, 14 Aug 2019 09:52:10 +0000 (09:52 +0000)]
[Ada] Equality for nonabstract type derived from interface treated as abstract
The compiler was creating an abstract function for the equality
operation of a (nonlimited) interface type, and that could result in
errors on generic instantiations that are passed nonabstract types
derived from the interface type along with the derived type's inherited
equality operation (complaining about an abstract subprogram being
passed to a nonabstract formal). The "=" operation of an interface is
supposed to be nonabstract (a direct consequence of the rule in RM
4.5.2(6-7)), so we now create an expression function rather than an
abstract function. The function returns False, but the result is
unimportant since a function of an abstract type can never actually be
invoked (its arguments must generally be class-wide, since there can be
no objects of the type, and calling it will dispatch).
2019-08-14 Gary Dismukes <dismukes@adacore.com>
gcc/ada/
* exp_ch3.adb (Predef_Spec_Or_Body): For an equality operation
of an interface type, create an expression function (that
returns False) rather than declaring an abstract function.
* freeze.adb (Check_Inherited_Conditions): Set Needs_Wrapper to
False unconditionally at the start of the loop creating wrappers
for inherited operations.
gcc/testsuite/
* gnat.dg/equal11.adb, gnat.dg/equal11_interface.ads,
gnat.dg/equal11_record.adb, gnat.dg/equal11_record.ads: New
testcase.
From-SVN: r274464
Bob Duff [Wed, 14 Aug 2019 09:52:06 +0000 (09:52 +0000)]
[Ada] Strengthen Locked flag
This patch strengthens the Locked flag, by Asserting that it is False on
operations that might cause reallocation.
No change in behavior (except in the presence of compiler bugs), so no
test.
2019-08-14 Bob Duff <duff@adacore.com>
gcc/ada/
* table.adb: Assert that the table is not locked when increasing
Last, even if it doesn't cause reallocation. In other words,
assert that on operations that MIGHT cause reallocation.
* table.ads: Fix comment accordingly.
From-SVN: r274463
Arnaud Charlet [Wed, 14 Aug 2019 09:52:01 +0000 (09:52 +0000)]
[Ada] Remove documentation of gnatelim
2019-08-14 Arnaud Charlet <charlet@adacore.com>
gcc/ada/
* doc/gnat_ugn/gnat_and_program_execution.rst: Remove
documentation of gnatelim.
From-SVN: r274462
Bob Duff [Wed, 14 Aug 2019 09:51:57 +0000 (09:51 +0000)]
[Ada] Tweak the sloc of Compile_Time_Warning warnings
2019-08-14 Bob Duff <duff@adacore.com>
gcc/ada/
* sem_prag.adb (Validate_Compile_Time_Warning_Error): Attach the
warning to the Sloc of the first pragma argument, rather than to
the pragma itself. This is to make pragmas processed after the
back end use the same Sloc as pragmas processed earlier, in the
front end. There's no reason for this discrepancy, and it
hinders further work on this ticket.
From-SVN: r274461
Bob Duff [Wed, 14 Aug 2019 09:51:52 +0000 (09:51 +0000)]
[Ada] Minor: remove a ??? comment
Minor: remove the ??? comment for the Inside_A_Generic flag. The current
name is clear and concise, even though we are noun-ing the adjective
"generic".
2019-08-14 Bob Duff <duff@adacore.com>
gcc/ada/
* sem.ads (Inside_A_Generic): Remove the ??? comment.
From-SVN: r274460
Eric Botcazou [Wed, 14 Aug 2019 09:51:48 +0000 (09:51 +0000)]
[Ada] Remove obsolete Pending_Descriptor table and related bits
The table has been unused for a while. No functional changes.
2019-08-14 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* inline.ads (Pending_Descriptor): Delete.
* inline.adb (Initialize): Do not initialize it.
* sem_ch12.adb (Delay_Descriptors): Delete.
(Analyze_Package_Instantiation): Call
Set_Delay_Subprogram_Descriptors instead of Delay_Descriptors
throughout.
From-SVN: r274459
Bob Duff [Wed, 14 Aug 2019 09:51:43 +0000 (09:51 +0000)]
[Ada] Spurious error in discriminated aggregate
This patch fixes a bug in which a spurious error is given on an
aggregate of a type derived from a subtype with a constrained
discriminant.
2019-08-14 Bob Duff <duff@adacore.com>
gcc/ada/
* exp_aggr.adb (Init_Hidden_Discriminants): Avoid processing the
wrong discriminant, which could be of the wrong type.
gcc/testsuite/
* gnat.dg/discr57.adb: New testcase.
From-SVN: r274458
Eric Botcazou [Wed, 14 Aug 2019 09:51:39 +0000 (09:51 +0000)]
[Ada] Fix internal error on inlined subprogram instance
This fixes a long-standing oddity in the procedure analyzing the
instantiation of a generic subprogram, which would set the
Is_Generic_Instance flag on the enclosing package generated for the
instantiation but only to reset it a few lines below. Now this flag is
relied upon by the machinery which computes the set of public entities
to be exposed by a package.
2019-08-14 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_ch12.adb (Analyze_Instance_And_Renamings): Do not reset
the Is_Generic_Instance flag previously set on the package
generated for the instantiation of a generic subprogram.
gcc/testsuite/
* gnat.dg/generic_inst11.adb, gnat.dg/generic_inst11_pkg.adb,
gnat.dg/generic_inst11_pkg.ads: New testcase.
From-SVN: r274457
Ed Schonberg [Wed, 14 Aug 2019 09:51:34 +0000 (09:51 +0000)]
[Ada] Crash on quantified expression in disabled assertion
The defining identifier of a quantified expression may be the freeze
point of its type. If the quantified expression appears in an assertion
that is disavbled, the freeze node for that type may appear in a tree
that will be discarded when the enclosing pragma is elaborated. To
ensure that the freeze node is reachable for subsquent uses we must
generate its freeze node explicitly when the quantified expression is
analyzed.
2019-08-14 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* exp_ch4.adb (Expand_N_Quantified_Expression): Freeze
explicitly the type of the loop parameter.
gcc/testsuite/
* gnat.dg/assert2.adb, gnat.dg/assert2.ads: New testcase.
From-SVN: r274456
Javier Miranda [Wed, 14 Aug 2019 09:51:29 +0000 (09:51 +0000)]
[Ada] Sem_Util: fix a bug in New_Copy_Tree
No impact on GCC-based compilation.
2019-08-14 Javier Miranda <miranda@adacore.com>
gcc/ada/
* sem_util.adb (New_Copy_Tree.Copy_Node_With_Replacement):
Update the Chars attribute of identifiers.
From-SVN: r274455
Yannick Moy [Wed, 14 Aug 2019 09:51:25 +0000 (09:51 +0000)]
[Ada] Expose part of ownership checking for use in GNATprove
GNATprove needs to be able to call a subset of the ownership legality
rules from marking. This is provided by a new function
Sem_SPARK.Is_Legal.
There is no impact on compilation.
2019-08-14 Yannick Moy <moy@adacore.com>
gcc/ada/
* sem_spark.adb, sem_spark.ads (Is_Legal): New function exposed
for use in GNATprove, to test legality rules not related to
permissions.
(Check_Declaration_Legality): Extract the part of
Check_Declaration that checks rules not related to permissions.
(Check_Declaration): Call the new Check_Declaration_Legality.
(Check_Type_Legality): Rename of Check_Type. Introduce
parameters to force or not checking, and update a flag detecting
illegalities.
(Check_Node): Ignore attribute references in statement position.
From-SVN: r274454
Yannick Moy [Wed, 14 Aug 2019 09:51:21 +0000 (09:51 +0000)]
[Ada] Check SPARK restriction on Old/Loop_Entry with pointers
--#! r336866
--#! no-mail
SPARK RM rule 3.10(14) restricts the use of Old and Loop_Entry
attributes on prefixes of an owning or observing type (i.e. a type with
access inside).
There is no impact on compilation.
2019-08-14 Yannick Moy <moy@adacore.com>
gcc/ada/
* sem_spark.adb (Check_Old_Loop_Entry): New procedure to check
correct use of Old and Loop_Entry.
(Check_Node): Check subprogram contracts.
(Check_Pragma): Check Loop_Variant.
(Check_Safe_Pointers): Apply checking to library-level
subprogram declarations as well, in order to check their
contract.
From-SVN: r274453
Yannick Moy [Wed, 14 Aug 2019 09:51:16 +0000 (09:51 +0000)]
[Ada] Fix spurious ownership error in GNATprove
Like Is_Path_Expression, function Is_Subpath_Expression should consider
the possibility that the subpath is a type conversion or type
qualification over the actual subpath node. This avoids spurious
ownership errors in GNATprove.
There is no impact on compilation.
2019-08-14 Yannick Moy <moy@adacore.com>
gcc/ada/
* sem_spark.adb (Is_Subpath_Expression): Take into account
conversion and qualification.
From-SVN: r274452
Eric Botcazou [Wed, 14 Aug 2019 09:51:12 +0000 (09:51 +0000)]
[Ada] Fix discrepancy in mechanism tracking private and full views
This fixes a discrepancy in the mechanism tracking the private and full
views of entities when entering and leaving scopes. This mechanism
records private entities that are dependent on other private entities,
so that the exchange done on entering and leaving scopes can be
propagated.
The propagation is done recursively on entering child units, but it was
not done recursively on leaving them, which would leave the dependency
chains in a uncertain state in this case. That's mostly visible when
inlining across units is enabled for code involving a lot of generic
units.
2019-08-14 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_ch7.adb (Install_Private_Declarations)
<Swap_Private_Dependents>: Do not rely solely on the
Is_Child_Unit flag on the unit to recurse.
(Uninstall_Declarations) <Swap_Private_Dependents>: New
function. Use it to recurse on the private dependent entities
for child units.
gcc/testsuite/
* gnat.dg/inline18.adb, gnat.dg/inline18.ads,
gnat.dg/inline18_gen1-inner_g.ads, gnat.dg/inline18_gen1.adb,
gnat.dg/inline18_gen1.ads, gnat.dg/inline18_gen2.adb,
gnat.dg/inline18_gen2.ads, gnat.dg/inline18_gen3.adb,
gnat.dg/inline18_gen3.ads, gnat.dg/inline18_pkg1.adb,
gnat.dg/inline18_pkg1.ads, gnat.dg/inline18_pkg2-child.ads,
gnat.dg/inline18_pkg2.ads: New testcase.
From-SVN: r274451
Javier Miranda [Wed, 14 Aug 2019 09:51:07 +0000 (09:51 +0000)]
[Ada] Fix a recent ACATS regression (c552001)
2019-08-14 Javier Miranda <miranda@adacore.com>
gcc/ada/
* exp_aggr.adb (Is_CCG_Supported_Aggregate): Return False for
arrays with bounds not known at compile time.
From-SVN: r274450
Ed Schonberg [Wed, 14 Aug 2019 09:51:00 +0000 (09:51 +0000)]
[Ada] Crash on precondition involving quantified expression
This patch fixes a compiler abort on a precondition whose condition
includes a quantified expression.
2019-08-14 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* sem_util.adb (New_Copy_Tree, Visit_Entity): A quantified
expression includes the implicit declaration of the loop
parameter. When a quantified expression is copied during
expansion, for example when building the precondition code from
the generated pragma, a new loop parameter must be created for
the new tree, to prevent duplicate declarations for the same
symbol.
gcc/testsuite/
* gnat.dg/predicate12.adb, gnat.dg/predicate12.ads: New
testcase.
From-SVN: r274449
Yannick Moy [Wed, 14 Aug 2019 09:50:55 +0000 (09:50 +0000)]
[Ada] Fix failing assertions on SPARK elaboration
Checking of SPARK elaboration rules may lead to assertion failures on a
compiler built with assertions. Now fixed.
There is no impact on compilation.
2019-08-14 Yannick Moy <moy@adacore.com>
gcc/ada/
* sem_disp.adb (Check_Dispatching_Operation): Update assertion
for the separate declarations created in GNATprove mode.
* sem_disp.ads (Is_Overriding_Subprogram): Update comment.
* sem_elab.adb (SPARK_Processor): Fix test for checking of
overriding primitives.
From-SVN: r274448
Eric Botcazou [Wed, 14 Aug 2019 09:50:51 +0000 (09:50 +0000)]
[Ada] Small internal improvements to the inlining machinery
No functional changes.
2019-08-14 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* inline.adb (Add_Inlined_Body): Tweak comments.
(List_Inlining_Info): Also list information about non-main
units.
From-SVN: r274447
Gary Dismukes [Wed, 14 Aug 2019 09:50:46 +0000 (09:50 +0000)]
[Ada] Illegal selection of first object in a task type's body not detected
The compiler was improperly allowing selection of an object declared
within a task body when the prefix was of the task type, specifically in
the case where the object was the very first declared in the body
(selections of later body declarations were being flagged). The flag
Is_Private_Op was only set at the point of the first "private"
declaration of the type in cases where the first declaration's name
didn't match the selector.
2019-08-14 Gary Dismukes <dismukes@adacore.com>
gcc/ada/
* sem_ch4.adb (Analyze_Selected_Component): In the case where
the prefix is of a concurrent type, and the selected entity
matching the selector is the first private declaration of the
type (such as the first local variable in a task's body), set
Is_Private_Op.
gcc/testsuite/
* gnat.dg/task5.adb: New testcase.
From-SVN: r274446
Piotr Trojanek [Wed, 14 Aug 2019 09:44:21 +0000 (09:44 +0000)]
[Ada] Minor refactoring in Einfo
2019-08-14 Piotr Trojanek <trojanek@adacore.com>
gcc/ada/
* einfo.adb (Is_Generic_Actual_Subprogram): Replace repeated
calls to Ekind with Ekind_In.
From-SVN: r274445
Richard Biener [Wed, 14 Aug 2019 09:38:15 +0000 (09:38 +0000)]
re PR testsuite/91419 (gcc.dg/tree-ssa/pr91091-2.c, ssa-fre-61.c, ssa-fre-61.c with r273232)
2019-08-14 Richard Biener <rguenther@suse.de>
PR testsuite/91419
* lib/target-supports.exp (natural_alignment_32): Amend target
list based on BIGGEST_ALIGNMENT.
(natural_alignment_64): Targets not natural_alignment_32 cannot
be natural_alignment_64.
* gcc.dg/tree-ssa/pr91091-2.c: XFAIL for !natural_alignment_32.
* gcc.dg/tree-ssa/ssa-fre-77.c: Likewise.
* gcc.dg/tree-ssa/ssa-fre-61.c: Require natural_alignment_32.
From-SVN: r274444
Richard Sandiford [Wed, 14 Aug 2019 09:28:49 +0000 (09:28 +0000)]
[AArch64] Add support for SVE absolute comparisons
This patch adds support for floating-point absolute comparisons
FACLT and FACLE (aliased as FACGT and FACGE with swapped operands).
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/iterators.md (SVE_COND_FP_ABS_CMP): New iterator.
* config/aarch64/aarch64-sve.md (*aarch64_pred_fac<cmp_op><mode>):
New pattern.
gcc/testsuite/
* gcc.target/aarch64/sve/vcond_21.c: New test.
* gcc.target/aarch64/sve/vcond_21_run.c: Likewise.
From-SVN: r274443
Richard Sandiford [Wed, 14 Aug 2019 09:22:23 +0000 (09:22 +0000)]
[AArch64] Use SVE MOV /M of scalars
This patch uses MOV /M to optimise selects between a duplicated
scalar variable and a vector.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
gcc/
* config/aarch64/aarch64-sve.md (*aarch64_sel_dup<mode>): New pattern.
gcc/testsuite/
* g++.target/aarch64/sve/dup_sel_1.C: New test.
* g++.target/aarch64/sve/dup_sel_2.C: Likewise.
* g++.target/aarch64/sve/dup_sel_3.C: Likewise.
* g++.target/aarch64/sve/dup_sel_4.C: Likewise.
* g++.target/aarch64/sve/dup_sel_5.C: Likewise.
* g++.target/aarch64/sve/dup_sel_6.C: Likewise.
Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
From-SVN: r274442
Richard Sandiford [Wed, 14 Aug 2019 09:18:14 +0000 (09:18 +0000)]
[AArch64] Make more use of SVE conditional constant moves
This patch extends the SVE UNSPEC_SEL patterns so that they can use:
(1) MOV /M of a duplicated integer constant
(2) MOV /M of a duplicated floating-point constant bitcast to an integer,
accepting the same constants as (1)
(3) FMOV /M of a duplicated floating-point constant
(4) MOV /Z of a duplicated integer constant
(5) MOV /Z of a duplicated floating-point constant bitcast to an integer,
accepting the same constants as (4)
(6) MOVPRFXed FMOV /M of a duplicated floating-point constant
We already handled (4) with a special pattern; the rest are new.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
gcc/
* config/aarch64/aarch64.c (aarch64_bit_representation): New function.
(aarch64_print_vector_float_operand): Also handle 8-bit floats.
(aarch64_print_operand): Add support for %I.
(aarch64_sve_dup_immediate_p): Handle scalars as well as vectors.
Bitcast floating-point constants to the corresponding integer constant.
(aarch64_float_const_representable_p): Handle vectors as well
as scalars.
(aarch64_expand_sve_vcond): Make sure that the operands are valid
for the new vcond_mask_<mode><vpred> expander.
* config/aarch64/predicates.md (aarch64_sve_dup_immediate): Also
test aarch64_float_const_representable_p.
(aarch64_sve_reg_or_dup_imm): New predicate.
* config/aarch64/aarch64-sve.md (vec_extract<vpred><Vel>): Use
gen_vcond_mask_<mode><vpred> instead of
gen_aarch64_sve_dup<mode>_const.
(vcond_mask_<mode><vpred>): Turn into a define_expand that
accepts aarch64_sve_reg_or_dup_imm and aarch64_simd_reg_or_zero
for operands 1 and 2 respectively. Force operand 2 into a
register if operand 1 is a register. Fold old define_insn...
(aarch64_sve_dup<mode>_const): ...and this define_insn...
(*vcond_mask_<mode><vpred>): ...into this new pattern. Handle
floating-point constants that can be moved as integers. Add
alternatives for MOV /M and FMOV /M.
(vcond<mode><v_int_equiv>, vcondu<mode><v_int_equiv>)
(vcond<mode><v_fp_equiv>): Accept nonmemory_operand for operands
1 and 2 respectively.
* config/aarch64/constraints.md (Ufc): Handle vectors as well
as scalars.
(vss): New constraint.
gcc/testsuite/
* gcc.target/aarch64/sve/vcond_18.c: New test.
* gcc.target/aarch64/sve/vcond_18_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_19.c: Likewise.
* gcc.target/aarch64/sve/vcond_19_run.c: Likewise.
* gcc.target/aarch64/sve/vcond_20.c: Likewise.
* gcc.target/aarch64/sve/vcond_20_run.c: Likewise.
Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
From-SVN: r274441
Richard Sandiford [Wed, 14 Aug 2019 09:14:31 +0000 (09:14 +0000)]
[AArch64] Add support for SVE F{MAX,MIN}NM immediate
This patch uses the immediate forms of FMAXNM and FMINNM for
unconditional arithmetic.
The same rules apply to FMAX and FMIN, but we only generate those
via the ACLE.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/predicates.md (aarch64_sve_float_maxmin_immediate)
(aarch64_sve_float_maxmin_operand): New predicates.
* config/aarch64/constraints.md (vsB): New constraint.
(vsM): Fix typo.
* config/aarch64/iterators.md (sve_pred_fp_rhs2_operand): Use
aarch64_sve_float_maxmin_operand for UNSPEC_COND_FMAXNM and
UNSPEC_COND_FMINNM.
* config/aarch64/aarch64-sve.md (<maxmin_uns><SVE_F:mode>3):
Use aarch64_sve_float_maxmin_operand for operand 2.
(*<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): Likewise.
Add alternatives for the constant forms.
gcc/testsuite/
* gcc.target/aarch64/sve/fmaxnm_1.c: New test.
* gcc.target/aarch64/sve/fminnm_1.c: Likewise.
From-SVN: r274440
Richard Sandiford [Wed, 14 Aug 2019 09:10:05 +0000 (09:10 +0000)]
[AArch64] Add support for SVE [SU]{MAX,MIN} immediate
This patch adds support for the immediate forms of SVE SMAX, SMIN, UMAX
and UMIN. SMAX and SMIN take the same range as MUL, so the patch
basically just moves and generalises the existing MUL patterns.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/constraints.md (vsb): New constraint.
(vsm): Generalize description.
* config/aarch64/iterators.md (SVE_INT_BINARY_IMM): New code
iterator.
(sve_imm_con): Handle smax, smin, umax and umin.
(sve_imm_prefix): New code attribute.
* config/aarch64/predicates.md (aarch64_sve_vsb_immediate)
(aarch64_sve_vsb_operand): New predicates.
(aarch64_sve_mul_immediate): Rename to...
(aarch64_sve_vsm_immediate): ...this.
(aarch64_sve_mul_operand): Rename to...
(aarch64_sve_vsm_operand): ...this.
* config/aarch64/aarch64-sve.md (mul<mode>3): Generalize to...
(<SVE_INT_BINARY_IMM:optab><SVE_I:mode>3): ...this.
(*mul<mode>3, *post_ra_mul<mode>3): Generalize to...
(*<SVE_INT_BINARY_IMM:optab><SVE_I:mode>3)
(*post_ra_<SVE_INT_BINARY_IMM:optab><SVE_I:mode>3): ...these and
add movprfx support for the immediate alternatives.
(<su><maxmin><mode>3, *<su><maxmin><mode>3): Delete in favor
of the above.
(*<SVE_INT_BINARY_SD:optab><SVE_SDI:mode>3): Fix incorrect predicate
for operand 3.
gcc/testsuite/
* gcc.target/aarch64/sve/smax_1.c: New test.
* gcc.target/aarch64/sve/smin_1.c: Likewise.
* gcc.target/aarch64/sve/umax_1.c: Likewise.
* gcc.target/aarch64/sve/umin_1.c: Likewise.
From-SVN: r274439
Richard Sandiford [Wed, 14 Aug 2019 09:06:12 +0000 (09:06 +0000)]
[AArch64] Add support for SVE CNOT
This patch adds support for predicated and unpredicated CNOT
(logical NOT on integers). In RTL terms, this is a select between
1 and 0 in which the predicate is fed by a comparison with zero.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/predicates.md (aarch64_simd_imm_one): New predicate.
* config/aarch64/aarch64-sve.md (*cnot<mode>): New pattern.
(*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.
gcc/testsuite/
* gcc.target/aarch64/sve/cnot_1.c: New test.
* gcc.target/aarch64/sve/cond_cnot_1.c: Likewise.
* gcc.target/aarch64/sve/cond_cnot_1_run.c: Likewise.
* gcc.target/aarch64/sve/cond_cnot_2.c: Likewise.
* gcc.target/aarch64/sve/cond_cnot_2_run.c: Likewise.
* gcc.target/aarch64/sve/cond_cnot_3.c: Likewise.
* gcc.target/aarch64/sve/cond_cnot_3_run.c: Likewise.
From-SVN: r274438
Richard Sandiford [Wed, 14 Aug 2019 09:02:47 +0000 (09:02 +0000)]
[AArch64] Add support for SVE CLS and CLZ
This patch adds support for unpredicated SVE CLS and CLZ. A later patch
will add support for predicated unary integer arithmetic.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/iterators.md (SVE_INT_UNARY): Add clrsb and clz.
(optab, sve_int_op): Handle them.
* config/aarch64/aarch64-sve.md: Expand comment.
gcc/testsuite/
* gcc.target/aarch64/vect-clz.c: Force SVE off.
* gcc.target/aarch64/sve/clrsb_1.c: New test.
* gcc.target/aarch64/sve/clrsb_1_run.c: Likewise.
* gcc.target/aarch64/sve/clz_1.c: Likewise.
* gcc.target/aarch64/sve/clz_1_run.c: Likewise.
From-SVN: r274437
Richard Sandiford [Wed, 14 Aug 2019 08:58:40 +0000 (08:58 +0000)]
[AArch64] Use SVE ADR to optimise shift-add sequences
This patch uses SVE ADR to optimise shift-and-add and uxtw-and-add
sequences.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/predicates.md (const_1_to_3_operand): New predicate.
* config/aarch64/aarch64-sve.md (*aarch64_adr_uxtw)
(*aarch64_adr<mode>_shift, *aarch64_adr_shift_uxtw): New patterns.
gcc/testsuite/
* gcc.target/aarch64/sve/adr_1.c: New test.
* gcc.target/aarch64/sve/adr_1_run.c: Likewise.
* gcc.target/aarch64/sve/adr_2.c: Likewise.
* gcc.target/aarch64/sve/adr_2_run.c: Likewise.
* gcc.target/aarch64/sve/adr_3.c: Likewise.
* gcc.target/aarch64/sve/adr_3_run.c: Likewise.
* gcc.target/aarch64/sve/adr_4.c: Likewise.
* gcc.target/aarch64/sve/adr_4_run.c: Likewise.
* gcc.target/aarch64/sve/adr_5.c: Likewise.
* gcc.target/aarch64/sve/adr_5_run.c: Likewise.
From-SVN: r274436
Paolo Carlini [Wed, 14 Aug 2019 08:56:58 +0000 (08:56 +0000)]
decl.c (grokdeclarator): Use id_loc and EXPR_LOCATION in a few error messages.
/cp
2019-08-08 Paolo Carlini <paolo.carlini@oracle.com>
* decl.c (grokdeclarator): Use id_loc and EXPR_LOCATION in
a few error messages.
/testsuite
2019-08-08 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/cpp0x/enum20.C: Test location(s) too.
* g++.dg/other/friend3.C: Likewise.
* g++.dg/parse/dtor5.C: Likewise.
* g++.dg/parse/friend7.C: Likewise.
* g++.dg/template/error22.C: Likewise.
* g++.old-deja/g++.brendan/err-msg5.C: Likewise.
From-SVN: r274435
Richard Sandiford [Wed, 14 Aug 2019 08:54:33 +0000 (08:54 +0000)]
[AArch64] Handle more SVE predicate constants
This patch handles more predicate constants by using TRN1, TRN2
and EOR. For now, only one operation is allowed before we fall
back to loading from memory or doing an integer move and a compare.
The EOR support includes the important special case of an inverted
predicate.
The real motivating case for this is the ACLE svdupq function,
which allows a repeating 16-bit predicate to be built from
individual scalar booleans. It's not easy to test properly
before that support is merged.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor)
(aarch64_expand_sve_const_pred_trn): New functions.
(aarch64_expand_sve_const_pred_1): Add a recurse_p parameter and
use the above functions when the parameter is true.
(aarch64_expand_sve_const_pred): Update call accordingly.
* config/aarch64/aarch64-sve.md (*aarch64_sve_<perm_insn><mode>):
Rename to...
(@aarch64_sve_<perm_insn><mode>): ...this.
gcc/testsuite/
* gcc.target/aarch64/sve/peel_ind_1.c: Look for an inverted .B VL1.
* gcc.target/aarch64/sve/peel_ind_2.c: Likewise .S VL7.
From-SVN: r274434
Paolo Carlini [Wed, 14 Aug 2019 08:54:16 +0000 (08:54 +0000)]
decl.c (grokdeclarator): Check here for typedef a function definition or a member function definition.
/cp
2019-08-14 Paolo Carlini <paolo.carlini@oracle.com>
* decl.c (grokdeclarator): Check here for typedef a function
definition or a member function definition.
(start_function): Adjust.
(grokmethod): Likewise.
/testsuite
2019-08-14 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/parse/typedef9.C: Test locations too.
From-SVN: r274433
Paolo Carlini [Wed, 14 Aug 2019 08:53:28 +0000 (08:53 +0000)]
decl.c (grokdeclarator): Check here for typedef a function definition or a member function definition.
/cp
2019-08-14 Paolo Carlini <paolo.carlini@oracle.com>
* decl.c (grokdeclarator): Check here for typedef a function
definition or a member function definition.
(start_function): Adjust.
(grokmethod): Likewise.
/testsuite
2019-08-14 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/parse/typedef9.C: Test locations too.
From-SVN: r274432
Paolo Carlini [Wed, 14 Aug 2019 08:50:55 +0000 (08:50 +0000)]
decl.c (grokdeclarator): Check here for typedef a function definition or a member function definition.
/cp
2019-08-14 Paolo Carlini <paolo.carlini@oracle.com>
* decl.c (grokdeclarator): Check here for typedef a function
definition or a member function definition.
(start_function): Adjust.
(grokmethod): Likewise.
/testsuite
2019-08-14 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/parse/typedef9.C: Test locations too.
From-SVN: r274431
Martin Liska [Wed, 14 Aug 2019 08:50:24 +0000 (10:50 +0200)]
Refresh LOCAL_PATCHES
2019-08-14 Martin Liska <mliska@suse.cz>
* LOCAL_PATCHES: Refresh based on what was committed.
From-SVN: r274430
Richard Sandiford [Wed, 14 Aug 2019 08:50:10 +0000 (08:50 +0000)]
[AArch64] Rework SVE integer comparisons
The remaining uses of UNSPEC_MERGE_PTRUE were in integer comparison
patterns. These aren't actually merging operations but zeroing ones,
although there's no practical difference when the predicate is a PTRUE.
All comparisons produced by expand are predicated on a PTRUE,
although we try to pattern-match a compare-and-AND as a predicated
comparison during combine.
Like previous patches, this one rearranges things in a way that works
better with the ACLE, where the initial predicate might or might not
be a PTRUE. The new patterns use UNSPEC_PRED_Z to represent zeroing
predication, with a aarch64_sve_ptrue_flag to record whether the
predicate is all-true (as for UNSPEC_PTEST).
See the block comment in the patch for more details.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64-protos.h (aarch64_sve_same_pred_for_ptest_p):
Declare.
* config/aarch64/aarch64.c (aarch64_sve_same_pred_for_ptest_p)
(aarch64_sve_emit_int_cmp): New functions.
(aarch64_convert_sve_data_to_pred): Use aarch64_sve_emit_int_cmp.
(aarch64_sve_cmp_operand_p, aarch64_emit_sve_ptrue_op_cc): Delete.
(aarch64_expand_sve_vec_cmp_int): Use aarch64_sve_emit_int_cmp.
* config/aarch64/aarch64.md (UNSPEC_MERGE_PTRUE): Delete.
(UNSPEC_PRED_Z): New unspec.
(set_clobber_cc_nzc): Delete.
* config/aarch64/aarch64-sve.md: Add a block comment about
UNSPEC_PRED_Z.
(*cmp<SVE_INT_CMP:cmp_op><mode>): Rename to...
(@aarch64_pred_cmp<SVE_INT_CMP:cmp_op><mode>): ...this, replacing
the old pattern with that name. Use UNSPEC_PRED_Z instead of
UNSPEC_MERGE_PTRUE.
(*cmp<SVE_INT_CMP:cmp_op><mode>_cc): Use UNSPEC_PRED_Z instead of
UNSPEC_MERGE_PTRUE. Use aarch64_sve_same_pred_for_ptest_p to
check for compatible predicates.
(*cmp<cmp_op><SVE_INT_CMP:mode>_ptest): Likewise.
(*cmp<cmp_op><mode>_and): Match a known-ptrue UNSPEC_PRED_Z instead
of UNSPEC_MERGE_PTRUE. Split into the new form of predicated
comparisons above.
From-SVN: r274429
Martin Liska [Wed, 14 Aug 2019 08:47:50 +0000 (10:47 +0200)]
Fix a test-case scan pattern.
2019-08-14 Martin Liska <mliska@suse.cz>
* c-c++-common/asan/memcmp-1.c: There's a new function in the
stack-trace on the top. So shift expected output in stack
trace.
From-SVN: r274428
Martin Liska [Wed, 14 Aug 2019 08:47:36 +0000 (10:47 +0200)]
Reapply all revisions mentioned in LOCAL_PATCHES.
2019-08-14 Martin Liska <mliska@suse.cz>
* asan/asan_globals.cpp (CheckODRViolationViaIndicator): Reapply
patch from trunk.
(CheckODRViolationViaPoisoning): Likewise.
(RegisterGlobal): Likewise.
* asan/asan_mapping.h: Likewise.
* sanitizer_common/sanitizer_linux_libcdep.cpp (defined): Likewise.
* sanitizer_common/sanitizer_mac.cpp (defined): Likewise.
* sanitizer_common/sanitizer_platform_limits_linux.cpp (defined): Likewise.
* sanitizer_common/sanitizer_platform_limits_posix.h (defined): Likewise.
* sanitizer_common/sanitizer_stacktrace.cpp (GetCanonicFrame): Likewise.
* ubsan/ubsan_handlers.cpp (__ubsan::__ubsan_handle_cfi_bad_icall): Likewise.
(__ubsan::__ubsan_handle_cfi_bad_icall_abort): Likewise.
* ubsan/ubsan_handlers.h (struct CFIBadIcallData): Likewise.
(struct CFICheckFailData): Likewise.
(RECOVERABLE): Likewise.
* ubsan/ubsan_platform.h: Likewise.
From-SVN: r274427
Martin Liska [Wed, 14 Aug 2019 08:47:11 +0000 (10:47 +0200)]
Libsanitizer merge from trunk r368656.
2019-08-14 Martin Liska <mliska@suse.cz>
PR sanitizer/89832
PR sanitizer/91325
* All source files: Merge from upstream 368656.
From-SVN: r274426
Richard Sandiford [Wed, 14 Aug 2019 08:45:49 +0000 (08:45 +0000)]
[AArch64] Use "x" predication for SVE integer arithmetic patterns
The SVE patterns used an UNSPEC_MERGE_PTRUE unspec to attach a predicate
to an otherwise unpredicated integer arithmetic operation. As its name
suggests, this was designed to be a wrapper used for merging instructions
in which the predicate is known to be a PTRUE.
This unspec dates from the very early days of the port and nothing has
ever taken advantage of the PTRUE guarantee for arithmetic (as opposed
to comparisons). This patch replaces it with the less stringent
guarantee that:
(a) the values of inactive lanes don't matter and
(b) it is valid to make extra lanes active if there's a specific benefit
Doing this makes the patterns suitable for the ACLE _x functions, which
have the above semantics.
See the block comment in the patch for more details.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.md (UNSPEC_PRED_X): New unspec.
* config/aarch64/aarch64-sve.md: Add a section describing it.
(@aarch64_pred_mov<mode>, @aarch64_pred_mov<mode>)
(<SVE_INT_UNARY:optab><mode>2, *<SVE_INT_UNARY:optab><mode>2)
(aarch64_<su>abd<mode>_3, mul<SVE_I:mode>3, *mul<SVE_I:mode>3)
(<su>mul<mode>3_highpart, *<su>mul<mode>3_highpart)
(<SVE_INT_BINARY:optab><mode>3, *<SVE_INT_BINARY:optab><mode>3)
(*bic<mode>3, v<ASHIFT:optab><mode>3, *v<ASHIFT:optab><mode>3)
(<su><maxmin><mode>3, *<su><maxmin><mode>3, *madd<SVE_I:mode>)
(*msub<SVE_I:mode>3, *aarch64_sve_rev64<mode>)
(*aarch64_sve_rev32<mode>, *aarch64_sve_rev16vnx16qi): Use
UNSPEC_PRED_X instead of UNSPEC_MERGE_PTRUE.
* config/aarch64/aarch64-sve2.md (<u>avg<mode>3_floor)
(<u>avg<mode>3_ceil, *<sur>h<addsub><mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_split_sve_subreg_move)
(aarch64_evpc_rev_local): Update accordingly.
From-SVN: r274425
Richard Sandiford [Wed, 14 Aug 2019 08:39:48 +0000 (08:39 +0000)]
[AArch64] Rearrange SVE conversion patterns
The SVE int<->float conversion patterns need to handle various
combinations of modes, making sure that the predicate mode is based
on the widest element size. We did this using separate patterns for
conversions involving:
- HF (converting to/from [HSD]I, predicated based on the int operand)
- SF (converting to/from [SD]I, predicated based on the int operand)
- DF (converting to/from [SD]I, predicated based on the float operand)
This worked, and meant that there were no redundant patterns. However,
the ACLE needs various new predicated patterns too, and having three
versions of each one seemed excessive.
This patch instead splits the patterns into two groups rather than three.
For conversions to integers:
- truncating (predicated based on the source type, DF->SI only)
- non-truncating (predicated based on the destination type)
For conversions from integers:
- extending (predicated based on the destination type, SI->DF only)
- non-extending (predicated based on the source type)
This means that we still don't create pattern names for the invalid
combinations DF<->HI and SF<->HI. The downside is that we need to
use C conditions to exclude the SI<->DF case from the non-truncating/
non-extending patterns. We therefore have two pattern names for SI<->DF,
but genconditions ensures that the invalid one always has the value
CODE_FOR_nothing.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/iterators.md (VNx4SI_ONLY, VNx2DF_ONLY): New mode
iterators.
(SVE_BHSI, SVE_SDI): Tweak comment.
(SVE_HSDI): Likewise. Fix definition.
(SVE_SDF): New mode iterator.
(elem_bits): New mode attribute.
(SVE_COND_FCVT): New int iterator.
* config/aarch64/aarch64-sve.md
(*<SVE_COND_ICVTF:optab>v16hsf<SVE_HSDI:mode>2)
(*<SVE_COND_ICVTF:optab>vnx4sf<SVE_SDI:mode>2)
(*<SVE_COND_ICVTF:optab>vnx2df<SVE_SDI:mode>2): Merge into...
(*aarch64_sve_<SVE_COND_ICVTF:optab>_nontrunc<SVE_F:mode><SVE_HSDI:mode>)
(*aarch64_sve_<SVE_COND_ICVTF:optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>):
...these new patterns.
(*<SVE_COND_FCVTI:optab><SVE_HSDI:mode>vnx8hf2)
(*<SVE_COND_FCVTI:optab><SVE_SDI:mode>vnx4sf2)
(aarch64_sve_<SVE_COND_FCVTI:optab><SVE_SDI:mode>vnx2df2):
Merge into...
(*aarch64_sve_<SVE_COND_FCVTI:optab>_nonextend<SVE_HSDI:mode><SVE_F:mode>)
(aarch64_sve_<SVE_COND_FCVTI:optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>):
...these new patterns.
(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Update accordingly.
(*trunc<Vwide><SVE_SDF:mode>2): Replace with...
(*aarch64_sve_<SVE_COND_FCVT:optab>_trunc<SVE_SDF:mode><SVE_HSF:mode>):
...this new pattern.
(aarch64_sve_extend<SVE_HSDF:mode><Vwide>2): Replace with...
(aarch64_sve_<SVE_COND_FCVT:optab>_nontrunc<SVE_HSF:mode><SVE_SDF:mode>):
...this new pattern.
(vec_unpacks_<perm_hilo>_<mode>): Update accordingly.
From-SVN: r274424
Richard Sandiford [Wed, 14 Aug 2019 08:34:12 +0000 (08:34 +0000)]
[AArch64] Use unspecs for SVE conversions involving floats
This patch changes the SVE FP<->FP and FP<->INT patterns so that
they use unspecs rather than rtx codes, continuing the series
to make the patterns work with predicates that might not be all-true.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.md (UNSPEC_FLOAT_CONVERT): Delete.
* config/aarch64/iterators.md (UNSPEC_COND_FCVT, UNSPEC_COND_FCVTZS)
(UNSPEC_COND_FCVTZU, UNSPEC_COND_SCVTF, UNSPEC_COND_UCVTF): New
unspecs.
(optab, su): Handle them.
(SVE_COND_FCVTI, SVE_COND_ICVTF): New int iterators.
* config/aarch64/aarch64-sve.md
(<fix_trunc_optab><SVE_F:mode><v_int_equiv>2): Replace with...
(<SVE_COND_FCVTI:optab><SVE_F:mode><v_int_equiv>2): ...this.
(*<fix_trunc_optab>v16hsf<:SVE_HSDImode>2): Replace with...
(*<SVE_COND_FCVTI:optab>v16hsf<SVE_F:mode>2): ...this.
(*<fix_trunc_optab>vnx4sf<SVE_SDI:mode>2): Replace with...
(*<SVE_COND_FCVTI:optab>vnx4sf<SVE_SDI:mode>2): ...this.
(*<fix_trunc_optab>vnx2df<SVE_SDI:mode>2): Replace with...
(*<SVE_COND_FCVTI:optab>vnx2df<SVE_SDI:mode>2): ...this.
(vec_pack_<su>fix_trunc_vnx2df): Use SVE_COND_FCVTI instead of
FIXUORS.
(<FLOATUORS:optab><v_int_equiv><SVE_F:mode>2): Replace with...
(<SVE_COND_ICVTF:optab><v_int_equiv><SVE_F:mode>2): ...this.
(*<FLOATUORS:optab><SVE_HSDI:mode>vnx8hf2): Replace with...
(*<SVE_COND_ICVTF:optab><SVE_HSDI:mode>vnx8hf2): ...this.
(*<FLOATUORS:optab><SVE_SDI:mode>vnx4sf2): Replace with...
(*<SVE_COND_ICVTF:optab><SVE_SDI:mode>vnx4sf2): ...this.
(aarch64_sve_<FLOATUORS:optab><SVE_SDI:mode>vnx2df2): Replace with...
(aarch64_sve_<SVE_COND_ICVTF:optab><SVE_SDI:mode>vnx2df2): ...this.
(vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Pass a GP strictness
operand to aarch64_sve_<SVE_COND_ICVTF:optab><SVE_SDI:mode>vnx2df2.
(vec_pack_trunc_<SVE_HSF:Vwide>, *trunc<Vwide><SVE_HSF:mode>2)
(aarch64_sve_extend<mode><Vwide>2): Use UNSPEC_COND_FCVT instead
of UNSPEC_FLOAT_CONVERT.
(vec_unpacks_<perm_hilo>_<mode>): Pass a GP strictness operand to
aarch64_sve_extend<mode><Vwide>2.
From-SVN: r274423
Richard Biener [Wed, 14 Aug 2019 08:31:54 +0000 (08:31 +0000)]
re PR rtl-optimization/91154 (456.hmmer regression on Haswell caused by r272922)
2019-08-14 Richard Biener <rguenther@suse.de>
PR target/91154
* config/i386/i386-features.c
(dimode_scalar_chain::compute_convert_gain): Compute and dump
individual instruction gain. Fix reg-reg copy GRP cost. Use
ix86_cost->sse_op for vector instruction costs.
From-SVN: r274422
Richard Sandiford [Wed, 14 Aug 2019 08:29:56 +0000 (08:29 +0000)]
[AArch64] Rework SVE FP comparisons
This patch rewrites the SVE FP comparisons so that they always use
unspecs and so that they have an additional operand to indicate
whether the predicate is known to be a PTRUE. It's part of a series
that rewrites the SVE FP patterns so that they can cope with non-PTRUE
predicates.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/iterators.md (UNSPEC_COND_FCMUO): New unspec.
(cmp_op): Handle it.
(SVE_COND_FP_CMP): Rename to...
(SVE_COND_FP_CMP_I0): ...this.
(SVE_FP_CMP): Remove.
* config/aarch64/aarch64-sve.md
(*fcm<SVE_FP_CMP:cmp_op><SVE_F:mode>): Replace with...
(*fcm<SVE_COND_FP_CMP_I0:cmp_op><SVE_F:mode>): ...this new pattern,
using unspecs to represent the comparison.
(*fcmuo<SVE_F:mode>): Use UNSPEC_COND_FCMUO.
(*fcm<cmp_op><mode>_and_combine, *fcmuo<mode>_and_combine): Update
accordingly.
* config/aarch64/aarch64.c (aarch64_emit_sve_ptrue_op): Delete.
(aarch64_unspec_cond_code): Move after integer code. Handle
UNORDERED.
(aarch64_emit_sve_predicated_cond): Replace with...
(aarch64_emit_sve_fp_cond): ...this new function.
(aarch64_emit_sve_or_conds): Replace with...
(aarch64_emit_sve_or_fp_conds): ...this new function.
(aarch64_emit_sve_inverted_cond): Replace with...
(aarch64_emit_sve_invert_fp_cond): ...this new function.
(aarch64_expand_sve_vec_cmp_float): Update accordingly.
From-SVN: r274421
Richard Sandiford [Wed, 14 Aug 2019 08:25:56 +0000 (08:25 +0000)]
[AArch64] Add support for SVE HF vconds
We were missing vcond patterns that had HF comparisons and HI or HF data.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/iterators.md (SVE_HSD): New mode iterator.
(V_FP_EQUIV, v_fp_equiv): Handle VNx8HI and VNx8HF.
* config/aarch64/aarch64-sve.md (vcond<mode><v_fp_equiv>): Use
SVE_HSD instead of SVE_SD.
gcc/testsuite/
* gcc.target/aarch64/sve/vcond_17.c: New test.
* gcc.target/aarch64/sve/vcond_17_run.c: Likewise.
From-SVN: r274420
Richard Sandiford [Wed, 14 Aug 2019 08:21:01 +0000 (08:21 +0000)]
[AArch64] Commonise some SVE FP patterns
This patch uses a single expander for generic FP binary optabs
that map to predicated SVE instructions. This makes them consistent
with the associated conditional optabs, which already work this way.
The patch also generalises the division handling to be one example
of a register-only predicated FP operation. The ACLE patches will
add FMULX to the same category.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
gcc/
* config/aarch64/iterators.md (SVE_COND_FP_BINARY_REG): New int
iterator.
(sve_pred_fp_rhs1_operand, sve_pred_fp_rhs1_operand): New int
attributes.
* config/aarch64/aarch64-sve.md (add<SVE_F:mode>3, sub<SVE_F:mode>3)
(mul<SVE_F:mode>3, div<SVE_F:mode>3)
(<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3): Merge into...
(<SVE_COND_FP_BINARY:optab><SVE_F:mode>3): ...this new expander.
(*div<SVE_F:mode>3): Generalize to...
(*<SVE_COND_FP_BINARY:optab><SVE_F:mode>3): ...this.
Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
From-SVN: r274419
Richard Sandiford [Wed, 14 Aug 2019 08:16:04 +0000 (08:16 +0000)]
[AArch64] Add a "GP strictness" operand to SVE FP unspecs
This patch makes the SVE unary, binary and ternary FP unspecs
take a new "GP strictness" operand that indicates whether the
predicate has to be taken literally, or whether it is valid to
make extra lanes active (up to and including using a PTRUE).
This again is laying the groundwork for the ACLE patterns,
in which the value can depend on the FP command-line flags.
At the moment it's only needed for addition, subtraction and
multiplication, which have unpredicated forms that can only
be used when operating on all lanes is safe. But in future
it might be useful for optimising predicate usage.
The strict mode requires extra alternatives for addition,
subtraction and multiplication, but I've left those for the
main ACLE patch.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
gcc/
* config/aarch64/aarch64.md (SVE_RELAXED_GP, SVE_STRICT_GP): New
constants.
* config/aarch64/predicates.md (aarch64_sve_gp_strictness): New
predicate.
* config/aarch64/aarch64-protos.h (aarch64_sve_pred_dominates_p):
Declare.
* config/aarch64/aarch64.c (aarch64_sve_pred_dominates_p): New
function.
* config/aarch64/aarch64-sve.md: Add a block comment about the
handling of predicated FP operations.
(<SVE_COND_FP_UNARY:optab><SVE_F:mode>2, add<SVE_F:mode>3)
(sub<SVE_F:mode>3, mul<SVE_F:mode>3, div<SVE_F:mode>3)
(<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3)
(<SVE_COND_FP_MAXMIN_PUBLIC:maxmin_uns><SVE_F:mode>3)
(<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4): Add an SVE_RELAXED_GP
operand.
(cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>)
(cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>): Add an SVE_STRICT_GP
operand.
(*<SVE_COND_FP_UNARY:optab><SVE_F:mode>2)
(*cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>_2)
(*cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>_3)
(*cond_<SVE_COND_FP_BINARY:optab><SVE_F:mode>_any)
(*fabd<SVE_F:mode>3, *div<SVE_F:mode>3)
(*<SVE_COND_FP_MAXMIN_PUBLIC:optab><SVE_F:mode>3)
(*<SVE_COND_FP_TERNARY:optab><SVE_F:mode>4)
(*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_2)
(*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_4)
(*cond_<SVE_COND_FP_TERNARY:optab><SVE_F:mode>_any): Match the
strictness operands. Use aarch64_sve_pred_dominates_p to check
whether the predicate on the conditional operation is suitable
for merging. Split patterns into the canonical equal-predicate form.
(*add<SVE_F:mode>3, *sub<SVE_F:mode>3, *mul<SVE_F:mode>3): Likewise.
Restrict the unpredicated alternatives to SVE_RELAXED_GP.
Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
From-SVN: r274418
Richard Sandiford [Wed, 14 Aug 2019 08:11:54 +0000 (08:11 +0000)]
[AArch64] Use unspecs for remaining SVE FP binary ops
Another patch in the series to make the SVE FP patterns use unspecs,
so that they can accurately describe cases in which the predicate
isn't a PTRUE.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
gcc/
* config/aarch64/aarch64-sve.md (add<mode>3, *add<mode>3)
(sub<mode>3, *sub<mode>3, *fabd<mode>3, mul<mode>3, *mul<mode>3)
(div<mode>3, *div<mode>3): Use SVE_COND_FP_* unspecs instead of
rtx codes.
(cond_<optab><mode>, *cond_<optab><mode>_2, *cond_<optab><mode>_3)
(*cond_<optab><mode>_any): Add the predicate to the SVE_COND_FP_*
unspecs.
Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
From-SVN: r274417
Richard Sandiford [Wed, 14 Aug 2019 08:08:08 +0000 (08:08 +0000)]
[AArch64] Don't rely on REG_EQUAL notes to combine SVE BIC
This patch generalises the SVE BIC pattern so that it doesn't
rely on REG_EQUAL notes. The danger with relying on the notes
is that an optimisation could for example replace the original
(not ...) note with an (unspec ... UNSPEC_MERGE_PTRUE) in which
the predicate is a constant. That's a legitimate change and
could even be useful in some situations.
The patch also makes the operand order match the SVE operand order in
both the vector and predicate BIC patterns, which makes things easier
for the ACLE.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
gcc/
* config/aarch64/aarch64-sve.md (bic<mode>3): Rename to...
(*bic<SVE_I:mode>3): ...this. Match the form that an SVE inverse
actually has, rather than relying on REG_EQUAL notes.
Make the insn operand order match the SVE operand order.
(*<nlogical><PRED_ALL:mode>3): Make the insn operand order match
the SVE operand order.
Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
From-SVN: r274416
Richard Sandiford [Wed, 14 Aug 2019 08:03:26 +0000 (08:03 +0000)]
[AArch64] Canonicalise SVE predicate constants
This patch makes sure that we build all SVE predicate constants as
VNx16BI before RA, to encourage similar constants to be reused
between modes. This is also useful for the ACLE, where the single
predicate type svbool_t is always a VNx16BI.
Also, and again to encourage reuse, the patch makes us use a .B PTRUE
for all ptrue-predicated operations, rather than (for example) using
a .S PTRUE for 32-bit operations and a .D PTRUE for 64-bit operations.
The only current case in which a .H, .S or .D operation needs to be
predicated by a "strict" .H/.S/.D PTRUE is the PTEST in a conditional
branch, which an earlier patch fixed to use an appropriate VNx16BI
constant.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_target_reg): New function.
(aarch64_emit_set_immediate): Likewise.
(aarch64_ptrue_reg): Build a VNx16BI constant and then bitcast it.
(aarch64_pfalse_reg): Likewise.
(aarch64_convert_sve_data_to_pred): New function.
(aarch64_sve_move_pred_via_while): Take an optional target register
and the required register mode.
(aarch64_expand_sve_const_pred_1): New function.
(aarch64_expand_sve_const_pred): Likewise.
(aarch64_expand_mov_immediate): Build an all-true predicate
if the significant bits of the immediate are all true. Use
aarch64_expand_sve_const_pred for all compile-time predicate constants.
(aarch64_mov_operand_p): Force predicate constants to be VNx16BI
before register allocation.
* config/aarch64/aarch64-sve.md (*vec_duplicate<mode>_reg): Use
a VNx16BI PTRUE when splitting the memory alternative.
(vec_duplicate<mode>): Update accordingly.
(*pred_cmp<cmp_op><mode>): Rename to...
(@aarch64_pred_cmp<cmp_op><mode>): ...this.
gcc/testsuite/
* gcc.target/aarch64/sve/spill_4.c: Expect all ptrues to be .Bs.
* gcc.target/aarch64/sve/single_1.c: Likewise.
* gcc.target/aarch64/sve/single_2.c: Likewise.
* gcc.target/aarch64/sve/single_3.c: Likewise.
* gcc.target/aarch64/sve/single_4.c: Likewise.
From-SVN: r274415
Richard Sandiford [Wed, 14 Aug 2019 07:58:30 +0000 (07:58 +0000)]
[AArch64] Rework SVE PTEST patterns
This patch reworks the rtl representation of the SVE PTEST operation
so that:
- the governing predicate is always VNx16BI (and so all bits are defined)
- it is still possible to pattern-match the governing predicate in the
mode that it had previously
- a new hint operand says whether the governing predicate is known to be
all true for the element size of interest, rather than this being part
of the unspec name.
These changes make it easier to handle more flag-setting instructions
as part of the ACLE work.
See the comment in aarch64-sve.md for more details.
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64-protos.h (aarch64_ptrue_all): Declare.
* config/aarch64/aarch64.c (aarch64_ptrue_all): New function.
* config/aarch64/aarch64.md (UNSPEC_PTEST_PTRUE): Delete.
(UNSPEC_PTEST): New unspec.
(SVE_MAYBE_NOT_PTRUE, SVE_KNOWN_PTRUE): New constants.
* config/aarch64/iterators.md (data_bytes): New mode attribute.
* config/aarch64/predicates.md (aarch64_sve_ptrue_flag): New predicate.
* config/aarch64/aarch64-sve.md: Add a new section describing the
handling of UNSPEC_PTEST.
(pred_<LOGICAL:optab><PRED_ALL:mode>3): Rename to...
(@aarch64_pred_<LOGICAL:optab><PRED_ALL:mode>_z): ...this.
(ptest_ptrue<mode>): Replace with...
(aarch64_ptest<mode>): ...this new pattern.
(cbranch<mode>4): Update after above changes.
(*<LOGICAL:optab><PRED_ALL:mode>3_cc): Use UNSPEC_PTEST instead of
UNSPEC_PTEST_PTRUE.
(*cmp<SVE_INT_CMP:cmp_op><SVE_I:mode>_cc): Likewise.
(*cmp<SVE_INT_CMP:cmp_op><SVE_I:mode>_ptest): Likewise.
(*while_ult<GPI:mode><PRED_ALL:mode>_cc): Likewise.
From-SVN: r274414
Steven G. Kargl [Wed, 14 Aug 2019 04:22:31 +0000 (04:22 +0000)]
re PR fortran/87991 (ICE in gfc_constructor_append_expr, at fortran/constructor.c:135)
2019-08-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/87991
* resolve.c (check_data_variable): data-stmt-object with pointer
attribute requires a data-stmt-value with the target attribute.
2019-08-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/87991
* gfortran.dg/pr87991.f90: New test.
From-SVN: r274412
Xiong Hu Luo [Wed, 14 Aug 2019 02:18:33 +0000 (02:18 +0000)]
Enable math functions linking with static library for LTO
In LTO mode, if static library and dynamic library contains same
function and both libraries are passed as arguments, linker will link
the function in dynamic library no matter the sequence. This patch
will output LTO symbol node as UNDEF if BUILT_IN_NORMAL function FNDECL
is a math function, then the function in static library will be linked
first if its sequence is ahead of the dynamic library.
gcc/ChangeLog
2019-08-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
PR lto/91287
* builtins.c (builtin_with_linkage_p): New function.
* builtins.h (builtin_with_linkage_p): New function.
* symtab.c (write_symbol): Remove redundant assert.
* lto-streamer-out.c (symtab_node::output_to_lto_symbol_table_p):
Remove FIXME and use builtin_with_linkage_p.
From-SVN: r274411
GCC Administrator [Wed, 14 Aug 2019 00:16:19 +0000 (00:16 +0000)]
Daily bump.
From-SVN: r274410
Richard Sandiford [Tue, 13 Aug 2019 21:35:20 +0000 (21:35 +0000)]
Use checking forms of DECL_FUNCTION_CODE (PR 91421)
We were shoe-horning all built-in enumerations (including frontend
and target-specific ones) into a field of type built_in_function. This
was accessed as either an lvalue or an rvalue using DECL_FUNCTION_CODE.
The obvious danger with this (as was noted by several ??? comments)
is that the ranges have nothing to do with each other, and targets can
easily have more built-in functions than generic code. But my patch to
make the field bigger was the straw that finally made the problem visible.
This patch therefore:
- replaces the field with a plain unsigned int
- turns DECL_FUNCTION_CODE into an rvalue-only accessor that checks
that the function really is BUILT_IN_NORMAL
- adds corresponding DECL_MD_FUNCTION_CODE and DECL_FE_FUNCTION_CODE
accessors for BUILT_IN_MD and BUILT_IN_FRONTEND respectively
- adds DECL_UNCHECKED_FUNCTION_CODE for places that need to access the
underlying field (should be low-level code only)
- adds new helpers for setting the built-in class and function code
- makes DECL_BUILT_IN_CLASS an rvalue-only accessor too, since all
assignments should go through the new helpers
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR middle-end/91421
* tree-core.h (function_decl::function_code): Change type to
unsigned int.
* tree.h (DECL_FUNCTION_CODE): Rename old definition to...
(DECL_UNCHECKED_FUNCTION_CODE): ...this.
(DECL_BUILT_IN_CLASS): Make an rvalue macro only.
(DECL_FUNCTION_CODE): New function. Assert that the built-in class
is BUILT_IN_NORMAL.
(DECL_MD_FUNCTION_CODE, DECL_FE_FUNCTION_CODE): New functions.
(set_decl_built_in_function, copy_decl_built_in_function): Likewise.
(fndecl_built_in_p): Change the type of the "name" argument to
unsigned int.
* builtins.c (expand_builtin): Move DECL_FUNCTION_CODE use
after check for DECL_BUILT_IN_CLASS.
* cgraphclones.c (build_function_decl_skip_args): Use
set_decl_built_in_function.
* ipa-param-manipulation.c (ipa_modify_formal_parameters): Likewise.
* ipa-split.c (split_function): Likewise.
* langhooks.c (add_builtin_function_common): Likewise.
* omp-simd-clone.c (simd_clone_create): Likewise.
* tree-streamer-in.c (unpack_ts_function_decl_value_fields): Likewise.
* config/darwin.c (darwin_init_cfstring_builtins): Likewise.
(darwin_fold_builtin): Use DECL_MD_FUNCTION_CODE instead of
DECL_FUNCTION_CODE.
* fold-const.c (operand_equal_p): Compare DECL_UNCHECKED_FUNCTION_CODE
instead of DECL_FUNCTION_CODE.
* lto-streamer-out.c (hash_tree): Use DECL_UNCHECKED_FUNCTION_CODE
instead of DECL_FUNCTION_CODE.
* tree-streamer-out.c (pack_ts_function_decl_value_fields): Likewise.
* print-tree.c (print_node): Use DECL_MD_FUNCTION_CODE when
printing DECL_BUILT_IN_MD. Handle DECL_BUILT_IN_FRONTEND.
* config/aarch64/aarch64-builtins.c (aarch64_expand_builtin)
(aarch64_fold_builtin, aarch64_gimple_fold_builtin): Use
DECL_MD_FUNCTION_CODE instead of DECL_FUNCTION_CODE.
* config/aarch64/aarch64.c (aarch64_builtin_reciprocal): Likewise.
* config/alpha/alpha.c (alpha_expand_builtin, alpha_fold_builtin):
(alpha_gimple_fold_builtin): Likewise.
* config/arc/arc.c (arc_expand_builtin): Likewise.
* config/arm/arm-builtins.c (arm_expand_builtin): Likewise.
* config/avr/avr-c.c (avr_resolve_overloaded_builtin): Likewise.
* config/avr/avr.c (avr_expand_builtin, avr_fold_builtin): Likewise.
* config/bfin/bfin.c (bfin_expand_builtin): Likewise.
* config/c6x/c6x.c (c6x_expand_builtin): Likewise.
* config/frv/frv.c (frv_expand_builtin): Likewise.
* config/gcn/gcn.c (gcn_expand_builtin_1): Likewise.
(gcn_expand_builtin): Likewise.
* config/i386/i386-builtins.c (ix86_builtin_reciprocal): Likewise.
(fold_builtin_cpu): Likewise.
* config/i386/i386-expand.c (ix86_expand_builtin): Likewise.
* config/i386/i386.c (ix86_fold_builtin): Likewise.
(ix86_gimple_fold_builtin): Likewise.
* config/ia64/ia64.c (ia64_fold_builtin): Likewise.
(ia64_expand_builtin): Likewise.
* config/iq2000/iq2000.c (iq2000_expand_builtin): Likewise.
* config/mips/mips.c (mips_expand_builtin): Likewise.
* config/msp430/msp430.c (msp430_expand_builtin): Likewise.
* config/nds32/nds32-intrinsic.c (nds32_expand_builtin_impl): Likewise.
* config/nios2/nios2.c (nios2_expand_builtin): Likewise.
* config/nvptx/nvptx.c (nvptx_expand_builtin): Likewise.
* config/pa/pa.c (pa_expand_builtin): Likewise.
* config/pru/pru.c (pru_expand_builtin): Likewise.
* config/riscv/riscv-builtins.c (riscv_expand_builtin): Likewise.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Likewise.
* config/rs6000/rs6000-call.c (htm_expand_builtin): Likewise.
(altivec_expand_dst_builtin, altivec_expand_builtin): Likewise.
(rs6000_gimple_fold_builtin, rs6000_expand_builtin): Likewise.
* config/rs6000/rs6000.c (rs6000_builtin_md_vectorized_function)
(rs6000_builtin_reciprocal): Likewise.
* config/rx/rx.c (rx_expand_builtin): Likewise.
* config/s390/s390-c.c (s390_resolve_overloaded_builtin): Likewise.
* config/s390/s390.c (s390_expand_builtin): Likewise.
* config/sh/sh.c (sh_expand_builtin): Likewise.
* config/sparc/sparc.c (sparc_expand_builtin): Likewise.
(sparc_fold_builtin): Likewise.
* config/spu/spu-c.c (spu_resolve_overloaded_builtin): Likewise.
* config/spu/spu.c (spu_expand_builtin): Likewise.
* config/stormy16/stormy16.c (xstormy16_expand_builtin): Likewise.
* config/tilegx/tilegx.c (tilegx_expand_builtin): Likewise.
* config/tilepro/tilepro.c (tilepro_expand_builtin): Likewise.
* config/xtensa/xtensa.c (xtensa_fold_builtin): Likewise.
(xtensa_expand_builtin): Likewise.
gcc/ada/
PR middle-end/91421
* gcc-interface/trans.c (gigi): Call set_decl_buillt_in_function.
(Call_to_gnu): Use DECL_FE_FUNCTION_CODE instead of DECL_FUNCTION_CODE.
gcc/c/
PR middle-end/91421
* c-decl.c (merge_decls): Use copy_decl_built_in_function.
gcc/c-family/
PR middle-end/91421
* c-common.c (resolve_overloaded_builtin): Use
copy_decl_built_in_function.
gcc/cp/
PR middle-end/91421
* decl.c (duplicate_decls): Use copy_decl_built_in_function.
* pt.c (declare_integer_pack): Use set_decl_built_in_function.
gcc/d/
PR middle-end/91421
* intrinsics.cc (maybe_set_intrinsic): Use set_decl_built_in_function.
gcc/jit/
PR middle-end/91421
* jit-playback.c (new_function): Use set_decl_built_in_function.
gcc/lto/
PR middle-end/91421
* lto-common.c (compare_tree_sccs_1): Use DECL_UNCHECKED_FUNCTION_CODE
instead of DECL_FUNCTION_CODE.
* lto-symtab.c (lto_symtab_merge_p): Likewise.
From-SVN: r274404
Richard Sandiford [Tue, 13 Aug 2019 21:35:10 +0000 (21:35 +0000)]
Protect some checks of DECL_FUNCTION_CODE
This patch protects various uses of DECL_FUNCTION_CODE that didn't
obviously check for BUILT_IN_NORMAL first (either directly or in callers).
They could therefore trigger for functions that either aren't built-ins
or are a different kind of built-in.
Also, the patch removes a redundant GIMPLE_CALL check from
optimize_stdarg_builtin, since it gave the impression that the stmt
was less well checked than it actually is.
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
PR middle-end/91421
* attribs.c (decl_attributes): Check the DECL_BUILT_IN_CLASS
before the DECL_FUNCTION_CODE.
* calls.c (maybe_warn_alloc_args_overflow): Use fndecl_built_in_p
to check for a BUILT_IN_ALLOCA call.
* ipa-cp.c (ipa_get_indirect_edge_target_1): Likewise for
BUILT_IN_UNREACHABLE. Don't check for a FUNCTION_TYPE.
* ipa-devirt.c (possible_polymorphic_call_target_p): Likewise.
* ipa-prop.c (try_make_edge_direct_virtual_call): Likewise.
* gimple-ssa-isolate-paths.c (is_addr_local): Check specifically
for BUILT_IN_NORMAL functions.
* trans-mem.c (expand_block_edges): Use gimple_call_builtin_p to
test for BUILT_IN_TM_ABORT.
* tree-ssa-ccp.c (optimize_stack_restore): Use fndecl_built_in_p
to check for a BUILT_IN_STACK_RESTORE call.
(optimize_stdarg_builtin): Remove redundant check for GIMPLE_CALL.
* tree-ssa-threadedge.c
(record_temporary_equivalences_from_stmts_at_dest): Check for a
BUILT_IN_NORMAL decl before checking its DECL_FUNCTION_CODE.
* tree-vect-patterns.c (vect_recog_pow_pattern): Use a positive
test for a BUILT_IN_NORMAL call instead of a negative test for
an internal function call.
gcc/c/
PR middle-end/91421
* c-decl.c (header_for_builtin_fn): Take a FUNCTION_DECL instead
of a built_in_function.
(diagnose_mismatched_decls, implicitly_declare): Update accordingly.
From-SVN: r274403
Richard Sandiford [Tue, 13 Aug 2019 21:33:51 +0000 (21:33 +0000)]
Optimise constant IFN_WHILE_ULTs
This patch is a combination of two changes that have to be
committed as a single unit:
(1) Try to fold IFN_WHILE_ULTs with constant arguments to a VECTOR_CST
(which is always possible for fixed-length vectors but is not
necessarily so for variable-length vectors)
(2) Make the SVE port recognise constants that map to PTRUE VLn,
which includes those generated by the new fold.
(2) can't be tested without (1) and (1) would be a significant
pessimisation without (2).
The target-specific parts also start moving towards doing predicate
manipulation in a canonical VNx16BImode form, using rtx_vector_builders.
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* tree.h (build_vector_a_then_b): Declare.
* tree.c (build_vector_a_then_b): New function.
* fold-const-call.c (fold_while_ult): Likewise.
(fold_const_call): Use it to handle IFN_WHILE_ULT.
* config/aarch64/aarch64-protos.h (AARCH64_FOR_SVPATTERN): New macro.
(aarch64_svpattern): New enum.
* config/aarch64/aarch64-sve.md (mov<PRED_ALL:mode>): Pass
constants through aarch64_expand_mov_immediate.
(*aarch64_sve_mov<PRED_ALL:mode>): Use aarch64_mov_operand rather
than general_operand as the predicate for operand 1.
(while_ult<GPI:mode><PRED_ALL:mode>): Add a '@' marker.
* config/aarch64/aarch64.c (simd_immediate_info::PTRUE): New
insn_type.
(simd_immediate_info::simd_immediate_info): New overload that
takes a scalar_int_mode and an svpattern.
(simd_immediate_info::u): Add a "pattern" field.
(svpattern_token): New function.
(aarch64_get_sve_pred_bits, aarch64_widest_sve_pred_elt_size)
(aarch64_partial_ptrue_length, aarch64_svpattern_for_vl)
(aarch64_sve_move_pred_via_while): New functions.
(aarch64_expand_mov_immediate): Try using
aarch64_sve_move_pred_via_while for predicates that contain N ones
followed by M zeros but that do not correspond to a VLnnn pattern.
(aarch64_sve_pred_valid_immediate): New function.
(aarch64_simd_valid_immediate): Use it instead of dealing directly
with PTRUE and PFALSE.
(aarch64_output_sve_mov_immediate): Handle new simd_immediate_info
forms.
gcc/testsuite/
* gcc.target/aarch64/sve/spill_2.c: Increase iteration counts
beyond the range of a PTRUE.
* gcc.target/aarch64/sve/while_6.c: New test.
* gcc.target/aarch64/sve/while_7.c: Likewise.
* gcc.target/aarch64/sve/while_8.c: Likewise.
* gcc.target/aarch64/sve/while_9.c: Likewise.
* gcc.target/aarch64/sve/while_10.c: Likewise.
From-SVN: r274402
Steven G. Kargl [Tue, 13 Aug 2019 20:13:59 +0000 (20:13 +0000)]
re PR fortran/88072 (gfortran crashes with an internal compiler error)
2019-08-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88072
* gfortran.dg/unlimited_polymorphic_28.f90: Fix error message. Left
out of previous commit!
From-SVN: r274400
Steven G. Kargl [Tue, 13 Aug 2019 20:10:25 +0000 (20:10 +0000)]
re PR fortran/88072 (gfortran crashes with an internal compiler error)
2019-08-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88072
* misc.c (gfc_typename): Do not point to something that ought not to
be pointed at.
2019-08-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88072
* gfortran.dg/pr88072.f90: New test.
* gfortran.dg/unlimited_polymorphic_28.f90: Fix error message.
From-SVN: r274399
Iain Sandoe [Tue, 13 Aug 2019 19:03:46 +0000 (19:03 +0000)]
[Darwin] There is no need to distinguish PIC/non-PIC symbol stubs.
So we can use a single flag for both, and rename this now, before a confusing
name gets into the wild.
gcc/
2019-08-13 Iain Sandoe <iain@sandoe.co.uk>
* config/darwin.c (machopic_indirect_call_target): Rename symbol stub
flag.
(darwin_override_options): Likewise.
* config/darwin.h: Likewise.
* config/darwin.opt: Likewise.
* config/i386/i386.c (output_pic_addr_const): Likewise.
* config/rs6000/darwin.h: Likewise.
* config/rs6000/rs6000.c (rs6000_call_darwin_1): Likewise.
* config/i386/darwin.h (TARGET_MACHO_PICSYM_STUBS): Rename to ...
... this TARGET_MACHO_SYMBOL_STUBS.
(FUNCTION_PROFILER):Likewise.
* config/i386/i386.h: Likewise.
gcc/testsuite/
2019-08-13 Iain Sandoe <iain@sandoe.co.uk>
* obj-c++.dg/stubify-1.mm: Rename symbol stub option.
* obj-c++.dg/stubify-2.mm: Likewise.
* objc.dg/stubify-1.m: Likewise.
* objc.dg/stubify-2.m: Likewise.
From-SVN: r274397
Thomas Koenig [Tue, 13 Aug 2019 18:49:02 +0000 (18:49 +0000)]
re PR fortran/90563 (Out of bounds error when compiling with -Wextra)
2013-08-13 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/90563
* gfortran.dg/do_subsript_5.f90: Correct test.
From-SVN: r274396
Thomas Koenig [Tue, 13 Aug 2019 18:43:00 +0000 (18:43 +0000)]
re PR fortran/90563 (Out of bounds error when compiling with -Wextra)
2013-08-13 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/90563
* frontend-passes.c (insert_index): Suppress errors while
simplifying the resulting expression.
2013-08-13 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/90563
* gfortran.dg/do_subsript_5.f90: New test.
From-SVN: r274394
Steven G. Kargl [Tue, 13 Aug 2019 18:35:33 +0000 (18:35 +0000)]
re PR fortran/89647 (Host associated procedure unable to be used as binding target)
2019-08-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/89647
resolve.c (resolve_typebound_procedure): Allow host associated
procedure to be a binding target. While here, wrap long line.
2019-08-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/89647
* gfortran.dg/pr89647.f90: New test.
From-SVN: r274393
Uros Bizjak [Tue, 13 Aug 2019 18:16:29 +0000 (20:16 +0200)]
i386.md (ix86_expand_vector_extract): Use vec_extr path for TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
* config/i386/i386.md (ix86_expand_vector_extract) <case E_V2SImode>:
Use vec_extr path for TARGET_MMX_WITH_SSE && TARGET_SSE4_1.
<case E_V8QImode>: Ditto.
* config/i386/mmx.md (*mmx_pextrw_zext): Rename from mmx_pextrw.
Use SWI48 mode iterator. Use %k to output operand 0.
(*mmx_pextrw): New insn pattern.
(*mmx_pextrb): Ditto.
(*mmx_pextrb_zext): Ditto.
From-SVN: r274389
Steven G. Kargl [Tue, 13 Aug 2019 18:06:08 +0000 (18:06 +0000)]
re PR fortran/87993 (ICE in gfc_constructor_first, at fortran/constructor.c:234)
2019-08-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/87993
* expr.c (gfc_simplify_expr): Simplifcation of an array with a kind
type inquiry suffix yields a constant expression.
2019-08-13 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/87993
* gfortran.dg/pr87993.f90: New test.
From-SVN: r274388
Jonathan Wakely [Tue, 13 Aug 2019 16:21:51 +0000 (17:21 +0100)]
Improve documentation of target hooks for libc functions
* target.def (libc_has_function, libc_has_fast_function): Improve
documentation strings.
* doc/tm.texi: Regenerate.
From-SVN: r274387
Caroline Tice [Tue, 13 Aug 2019 16:11:20 +0000 (09:11 -0700)]
Fix PR other/91396 static linke error with -fvtable-verify
Fix a bug where linking with -fvtable-verify and
-static causes the linker to complain about multiple definitions of
things in the vtv_end*.o files (once from the .o file and once from
libvtv.a).
2019-08-12 Caroline Tice <cmtice@google.com>
PR other/91396
* config/gnu-user.h (GNU_USER_TARGET_ENDFILE_SPEC): Only add the
vtv_end.o or vtv_end_preinit.o files if !static.
From-SVN: r274386
Martin Sebor [Tue, 13 Aug 2019 15:55:40 +0000 (15:55 +0000)]
PR c/80619 - bad fix-it hint for GCC %lu directive with int argument: %wu
gcc/c-family/ChangeLog:
PR c/80619
* c-format.c (printf_length_specs): Set FMT_LEN_w for "w".
(asm_fprintf_length_spec): Same.
* c-format.h (format_lengths): Add FMT_LEN_w.
gcc/testsuite/ChangeLog:
PR c/80619
* gcc.dg/format/pr80619.c: New test.
From-SVN: r274385
Uros Bizjak [Tue, 13 Aug 2019 15:17:49 +0000 (17:17 +0200)]
test_summary: Do not escape "=".
* test_summary: Do not escape "=".
From-SVN: r274384
Thomas Koenig [Tue, 13 Aug 2019 15:08:10 +0000 (15:08 +0000)]
re PR fortran/90561 (ICE in gimplify_var_or_parm_decl, at gimplify.c:2747)
2019-08-13 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/90561
* trans.h (gfc_evaluate_now_function_scope): New function.
* trans.c (gfc_evaluate_now_function_scope): New function.
* trans-expr.c (gfc_trans_assignment): Use it.
2019-08-13 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/90561
* gfortran.dg/deferred_character_34.f90: New test.
From-SVN: r274383
Marek Polacek [Tue, 13 Aug 2019 15:05:48 +0000 (15:05 +0000)]
PR c++/90473 - wrong code with nullptr in default argument.
* call.c (null_ptr_cst_p): Update quote from the standard.
* decl.c (check_default_argument): Don't return nullptr when the arg
has side-effects.
* g++.dg/cpp0x/nullptr42.C: New test.
From-SVN: r274382
Marek Polacek [Tue, 13 Aug 2019 15:02:30 +0000 (15:02 +0000)]
* cp-tree.h (DECL_MUTABLE_P): Use FIELD_DECL_CHECK.
From-SVN: r274381
Mark Eggleston [Tue, 13 Aug 2019 13:38:17 +0000 (13:38 +0000)]
Add my name to MAINTAINERS.
From-SVN: r274380
Olivier Hainque [Tue, 13 Aug 2019 11:16:18 +0000 (11:16 +0000)]
Adjust placement of protoype for tablejump_casesi_pattern
So it appears next to the prototype of tablejump_p, matching
the definition placement in rtlanal.c.
From-SVN: r274378
Olivier Hainque [Tue, 13 Aug 2019 11:04:52 +0000 (11:04 +0000)]
Handle casesi dispatch tablejumps in create_trace_edges (as well)
* rtlanal.c (tablejump_casesi_pattern): New function, to
determine if a tablejump insn is a casesi dispatcher. Extracted
from patch_jump_insn.
* rtl.h (tablejump_casesi_pattern): Declare.
* cfgrtl.c (patch_jump_insn): Use it.
* dwarf2cfi.c (create_trace_edges): Use it.
testsuite/
* gnat.dg/casesi.ad[bs], test_casesi.adb: New test.
From-SVN: r274377
Wilco Dijkstra [Tue, 13 Aug 2019 10:46:44 +0000 (10:46 +0000)]
[AArch64] Fix PR81800
PR81800 is about the lrint inline giving spurious FE_INEXACT exceptions.
The previous change for PR81800 didn't fix this: when lrint is disabled
in the backend, the midend will simply use llrint. This actually makes
things worse since llrint now also ignores FE_INVALID exceptions!
The fix is to disable lrint/llrint on double if the size of a long is
smaller (ie. ilp32).
gcc/
PR target/81800
* gcc/config/aarch64/aarch64.md (lrint): Disable lrint pattern if GPF
operand is larger than a long int.
testsuite/
PR target/81800
* gcc.target/aarch64/no-inline-lrint_3.c: New test.
From-SVN: r274376
Richard Sandiford [Tue, 13 Aug 2019 10:40:02 +0000 (10:40 +0000)]
[AArch64] Improve SVE constant moves
If there's no SVE instruction to load a given constant directly, this
patch instead tries to use an Advanced SIMD constant move and then
duplicates the constant to fill an SVE vector. The main use of this
is to support constants in which each byte is in { 0, 0xff }.
Also, the patch prefers a simple integer move followed by a duplicate
over a load from memory, like we already do for Advanced SIMD. This is
a useful option to have and would be easy to turn off via a tuning
parameter if necessary.
The patch also extends the handling of wide LD1Rs to big endian,
whereas previously we punted to a full LD1RQ.
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* machmode.h (opt_mode::else_mode): New function.
(opt_mode::else_blk): Use it.
* config/aarch64/aarch64-protos.h (aarch64_vq_mode): Declare.
(aarch64_full_sve_mode, aarch64_sve_ld1rq_operand_p): Likewise.
(aarch64_gen_stepped_int_parallel): Likewise.
(aarch64_stepped_int_parallel_p): Likewise.
(aarch64_expand_mov_immediate): Remove the optional gen_vec_duplicate
argument.
* config/aarch64/aarch64.c
(aarch64_expand_sve_widened_duplicate): Delete.
(aarch64_expand_sve_dupq, aarch64_expand_sve_ld1rq): New functions.
(aarch64_expand_sve_const_vector): Rewrite to handle more cases.
(aarch64_expand_mov_immediate): Remove the optional gen_vec_duplicate
argument. Use early returns in the !CONST_INT_P handling.
Pass all SVE data vectors to aarch64_expand_sve_const_vector rather
than handling some inline.
(aarch64_full_sve_mode, aarch64_vq_mode): New functions, split out
from...
(aarch64_simd_container_mode): ...here.
(aarch64_gen_stepped_int_parallel, aarch64_stepped_int_parallel_p)
(aarch64_sve_ld1rq_operand_p): New functions.
* config/aarch64/predicates.md (descending_int_parallel)
(aarch64_sve_ld1rq_operand): New predicates.
* config/aarch64/constraints.md (UtQ): New constraint.
* config/aarch64/aarch64.md (UNSPEC_REINTERPRET): New unspec.
* config/aarch64/aarch64-sve.md (mov<SVE_ALL:mode>): Remove the
gen_vec_duplicate from call to aarch64_expand_mov_immediate.
(@aarch64_sve_reinterpret<mode>): New expander.
(*aarch64_sve_reinterpret<mode>): New pattern.
(@aarch64_vec_duplicate_vq<mode>_le): New pattern.
(@aarch64_vec_duplicate_vq<mode>_be): Likewise.
(*sve_ld1rq<Vesize>): Replace with...
(@aarch64_sve_ld1rq<mode>): ...this new pattern.
gcc/testsuite/
* gcc.target/aarch64/sve/init_2.c: Expect ld1rd to be used
instead of a full vector load.
* gcc.target/aarch64/sve/init_4.c: Likewise.
* gcc.target/aarch64/sve/ld1r_2.c: Remove constants that no longer
need to be loaded from memory.
* gcc.target/aarch64/sve/slp_2.c: Expect the same output for
big and little endian.
* gcc.target/aarch64/sve/slp_3.c: Likewise. Expect 3 of the
doubles to be moved via integer registers rather than loaded
from memory.
* gcc.target/aarch64/sve/slp_4.c: Likewise but for 4 doubles.
* gcc.target/aarch64/sve/spill_4.c: Expect 16-bit constants to be
loaded via an integer register rather than from memory.
* gcc.target/aarch64/sve/const_1.c: New test.
* gcc.target/aarch64/sve/const_2.c: Likewise.
* gcc.target/aarch64/sve/const_3.c: Likewise.
From-SVN: r274375
Wilco Dijkstra [Tue, 13 Aug 2019 10:39:22 +0000 (10:39 +0000)]
[AArch64] Increase default function alignment
With -mcpu=generic the function alignment is currently 8, however almost all
supported cores prefer 16 or higher, so increase the default to 16:12.
This gives ~0.2% performance increase on SPECINT2017, while codesize is 0.12%
larger.
gcc/
* config/aarch64/aarch64.c (generic_tunings): Set function alignment to
16:12.
From-SVN: r274374
Jozef Lawrynowicz [Tue, 13 Aug 2019 10:31:17 +0000 (10:31 +0000)]
MSP430: Read MCU data from external file
gcc/ChangeLog:
2019-08-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/msp430/driver-msp430.c (msp430_set_driver_var): New.
* config/msp430/msp430-devices.c (canonicalize_path_dirsep): New.
(msp430_check_path_for_devices): New.
(parse_devices_csv_1): New.
(parse_devices_csv): New.
(msp430_extract_mcu_data): Try to find devices.csv and search for the
MCU data in devices.csv before using the hard-coded data.
Warn if devices.csv isn't found and the MCU wasn't found in the
hard-coded data either.
* config/msp430/msp430.h (DRIVER_SELF_SPECS): Call
msp430_set_driver_var for -mno-warn-devices-csv and -mdevices-csv-loc.
Search for devices.csv on -I and -L paths.
(EXTRA_SPEC_FUNCTIONS): Add msp430_check_path_for_devices and
msp430_set_driver_var.
* config/msp430/msp430.opt: Add -mwarn-devices-csv and
-mdevices-csv-loc=.
* doc/invoke.texi (-mmcu): Document that -I and -L paths are
searched for devices.csv.
(mwarn-devices-csv): Document option.
gcc/testsuite/ChangeLog:
2019-08-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* gcc.target/msp430/msp430.exp (msp430_device_permutations_runtest):
Handle csv-* and bad-devices-* tests.
* gcc.target/msp430/devices/README: Document how bad-devices-* tests
work.
* gcc.target/msp430/devices/bad-devices-1.c: New test.
* gcc.target/msp430/devices/bad-devices-2.c: Likewise.
* gcc.target/msp430/devices/bad-devices-3.c: Likewise.
* gcc.target/msp430/devices/bad-devices-4.c: Likewise.
* gcc.target/msp430/devices/bad-devices-5.c: Likewise.
* gcc.target/msp430/devices/bad-devices-6.c: Likewise.
* gcc.target/msp430/devices/csv-device-order.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_00.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_01.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_02.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_04.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_08.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_10.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_11.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_12.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_14.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_18.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_20.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_21.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_22.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_24.c: Likewise.
* gcc.target/msp430/devices/csv-msp430_28.c: Likewise.
* gcc.target/msp430/devices/csv-msp430fr5969.c: Likewise.
* gcc.target/msp430/devices/hard-foo.c: Likewise.
* gcc.target/msp430/devices/bad-devices-1.csv: New test support file.
* gcc.target/msp430/devices/bad-devices-2.csv: Likewise.
* gcc.target/msp430/devices/bad-devices-3.csv: Likewise.
* gcc.target/msp430/devices/bad-devices-4.csv: Likewise.
* gcc.target/msp430/devices/bad-devices-5.csv: Likewise.
* gcc.target/msp430/devices/bad-devices-6.csv: Likewise.
* gcc.target/msp430/devices/devices.csv: Likewise.
From-SVN: r274373
Richard Sandiford [Tue, 13 Aug 2019 10:21:37 +0000 (10:21 +0000)]
[AArch64] Use simd_immediate_info for SVE predicate constants
This patch makes predicate constants use the normal simd_immediate_info
machinery, rather than treating PFALSE and PTRUE as special cases.
This makes it easier to add other types of predicate constant later.
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64-protos.h (aarch64_output_ptrue): Delete.
* config/aarch64/aarch64-sve.md (*aarch64_sve_mov<PRED_ALL:mode>):
Use a single Dn alternative instead of separate Dz and Dm
alternatives. Use aarch64_output_sve_move_immediate.
* config/aarch64/aarch64.c (aarch64_sve_element_int_mode): New
function.
(aarch64_simd_valid_immediate): Fill in the simd_immediate_info
for predicates too.
(aarch64_output_sve_mov_immediate): Handle predicate modes.
(aarch64_output_ptrue): Delete.
From-SVN: r274372
Richard Sandiford [Tue, 13 Aug 2019 10:18:28 +0000 (10:18 +0000)]
[AArch64] Make simd_immediate_info INDEX explicit
This patch tweaks the representation of SVE INDEX instructions in
simd_immediate_info so that it's easier to add new types of
constant on top.
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.c (simd_immediate_info::insn_type): Add
INDEX.
(simd_immediate_info::value, simd_immediate_info::step)
(simd_immediate_info::modifier, simd_immediate_info::shift): Replace
with...
(simd_immediate_info::u): ...this new union.
(simd_immediate_info::simd_immediate_info): Update accordingly.
(aarch64_output_simd_mov_immediate): Likewise.
(aarch64_output_sve_mov_immediate): Likewise.
From-SVN: r274371
Jozef Lawrynowicz [Tue, 13 Aug 2019 10:05:53 +0000 (10:05 +0000)]
MSP430: Consolidate handling of hard-coded MCU data
gcc/ChangeLog:
2019-08-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* gcc/config.gcc (msp430*-*-*): Add msp430-devices.o to extra_objs and
extra_gcc_objs.
* gcc/config/msp430/driver-msp430.c: Remove msp430_mcu_data.
(msp430_select_cpu): New spec function.
(msp430_select_hwmult_lib): Use msp430_extract_mcu_data to extract
MCU data.
* gcc/config/msp430/msp430-devices.c: New file.
* gcc/config/msp430/msp430-devices.h: New file.
* gcc/config/msp430/msp430.c: Remove msp430_mcu_data.
(msp430_option_override): Use msp430_extract_mcu_data to extract
MCU data.
(msp430_use_f5_series_hwmult): Likewise.
(use_32bit_hwmult): Likewise.
(msp430_no_hwmult): Likewise.
* gcc/config/msp430/msp430.h (ASM_SPEC): Don't pass -mmcu to the
assembler.
(DRIVER_SELF_SPECS): Call msp430_select_cpu if -mmcu is used without
and -mcpu option.
(EXTRA_SPEC_FUNCTIONS): Add msp430_select_cpu.
* gcc/config/msp430/t-msp430: Add rule to build msp430-devices.o.
Remove hard-coded MCU multilib data.
gcc/testsuite/ChangeLog:
2019-08-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* gcc.target/msp430/msp430.exp
(check_effective_target_msp430_430_selected): New.
(check_effective_target_msp430_430x_selected): New.
(check_effective_target_msp430_mlarge_selected): New.
(check_effective_target_msp430_hwmul_not_none): New.
(check_effective_target_msp430_hwmul_not_16bit): New.
(check_effective_target_msp430_hwmul_not_32bit): New.
(check_effective_target_msp430_hwmul_not_f5): New.
(msp430_get_opts): New.
(msp430_device_permutations_runtest): New.
* gcc.target/msp430/devices/README: New file.
* gcc.target/msp430/devices-main.c: New test.
* gcc.target/msp430/devices/hard-
cc430f5123.c: Likewise.
* gcc.target/msp430/devices/hard-foo.c: Likewise.
* gcc.target/msp430/devices/hard-msp430afe253.c: Likewise.
* gcc.target/msp430/devices/hard-msp430cg4616.c: Likewise.
* gcc.target/msp430/devices/hard-msp430f4783.c: Likewise.
* gcc.target/msp430/devices/hard-rf430frl154h_rom.c: Likewise.
From-SVN: r274370
Richard Sandiford [Tue, 13 Aug 2019 09:50:35 +0000 (09:50 +0000)]
[AArch64] Make aarch64_classify_vector_mode use a switch statement
aarch64_classify_vector_mode used properties of a mode to test whether
the mode was a single Advanced SIMD vector, a single SVE vector, or a
tuple of SVE vectors. That works well for current trunk and is simpler
than checking for modes by name.
However, for the ACLE and for planned autovec improvements, we also
need partial SVE vector modes that hold:
- half of the available 32-bit elements
- a half or quarter of the available 16-bit elements
- a half, quarter, or eighth of the available 8-bit elements
These should be packed in memory and unpacked in registers. E.g.
VNx2SI has half the number of elements of VNx4SI, and so is half the
size in memory. When stored in registers, each VNx2SI element occupies
the low 32 bits of a VNx2DI element, with the upper bits being undefined.
The upshot is that:
GET_MODE_SIZE (VNx4SImode) == 2 * GET_MODE_SIZE (VNx2SImode)
since GET_MODE_SIZE must always be the memory size. This in turn means
that for fixed-length SVE, some partial modes can have the same size as
Advanced SIMD modes. We then need to be specific about which mode we're
dealing with.
This patch prepares for that by switching based on the mode instead
of querying properties.
A later patch makes sure that Advanced SIMD modes always win over
partial SVE vector modes in normal queries.
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64.c (aarch64_classify_vector_mode): Switch
based on the mode instead of testing properties of it.
From-SVN: r274368
Richard Sandiford [Tue, 13 Aug 2019 09:49:36 +0000 (09:49 +0000)]
[AArch64] Add a "y" constraint for V0-V7
Some indexed SVE FCMLA operations have a 3-bit register field that
requires one of Z0-Z7. This patch adds a public "y" constraint for that.
The patch also documents "x", which is again intended to be a public
constraint.
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* doc/md.texi: Document the x and y constraints for AArch64.
* config/aarch64/aarch64.h (FP_LO8_REGNUM_P): New macro.
(FP_LO8_REGS): New reg_class.
(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Add an entry for FP_LO8_REGS.
* config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
(aarch64_regno_regclass, aarch64_class_max_nregs): Handle FP_LO8_REGS.
* config/aarch64/predicates.md (aarch64_simd_register): Use
FP_REGNUM_P instead of checking the classes manually.
* config/aarch64/constraints.md (y): New constraint.
gcc/testsuite/
* gcc.target/aarch64/asm-x-constraint-1.c: New test.
* gcc.target/aarch64/asm-y-constraint-1.c: Likewise.
From-SVN: r274367
Richard Sandiford [Tue, 13 Aug 2019 09:38:39 +0000 (09:38 +0000)]
[AArch64] Make <perm_insn> the complete mnemonic
The Advanced SIMD and SVE permute patterns both split the permute
operation into a base name and a hilo suffix. That works well, but it
means that for "@" patterns, we need to pass the permute code twice,
once for the base name and once for the suffix.
Having a unified name avoids that and also makes the definitions
slightly simpler.
2019-08-13 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/iterators.md (perm_insn): Include the "1"/"2" suffix.
(perm_hilo): Remove UNSPEC_ZIP*, UNSEPC_TRN* and UNSPEC_UZP*.
* config/aarch64/aarch64-simd.md
(aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): Rename to..
(aarch64_<PERMUTE:perm_insn><mode>): ...this and remove perm_hilo
from the asm template.
* config/aarch64/aarch64-sve.md
(aarch64_<perm_insn><perm_hilo><PRED_ALL:mode>): Rename to..
(aarch64_<perm_insn><PRED_ALL:mode>): ...this and remove perm_hilo
from the asm template.
(aarch64_<perm_insn><perm_hilo><SVE_ALL:mode>): Rename to..
(aarch64_<perm_insn><SVE_ALL:mode>): ...this and remove perm_hilo
from the asm template.
* config/aarch64/aarch64-simd-builtins.def: Update comment.
From-SVN: r274366
Janne Blomqvist [Tue, 13 Aug 2019 09:04:18 +0000 (12:04 +0300)]
PR fortran/91414 Bugfix for previous commit
Correctly fill master_seed from os_seed.
From-SVN: r274365
Janne Blomqvist [Tue, 13 Aug 2019 08:24:43 +0000 (11:24 +0300)]
PR fortran/91414: Improved PRNG
Update the PRNG from xorshift1024* to xoshiro256** by the same
author. For details see
http://prng.di.unimi.it/
and the paper at
https://arxiv.org/abs/1805.01407
Also the seeding is slightly improved, by reading only 8 bytes from
the operating system and using the simple splitmix64 PRNG to fill in
the rest of the PRNG state (as recommended by the xoshiro author),
instead of reading the entire state from the OS.
Regtested on x86_64-pc-linux-gnu, Ok for trunk?
gcc/fortran/ChangeLog:
2019-08-13 Janne Blomqvist <jb@gcc.gnu.org>
PR fortran/91414
* check.c (gfc_check_random_seed): Reduce seed_size.
* intrinsic.texi (RANDOM_NUMBER): Update to match new PRNG.
gcc/testsuite/ChangeLog:
2019-08-13 Janne Blomqvist <jb@gcc.gnu.org>
PR fortran/91414
* gfortran.dg/random_seed_1.f90: Update to match new seed size.
libgfortran/ChangeLog:
2019-08-13 Janne Blomqvist <jb@gcc.gnu.org>
PR fortran/91414
* intrinsics/random.c (prng_state): Update state struct.
(master_state): Update to match new size.
(get_rand_state): Update to match new PRNG.
(rotl): New function.
(xorshift1024star): Replace with prng_next.
(prng_next): New function.
(jump): Update for new PRNG.
(lcg_parkmiller): Replace with splitmix64.
(splitmix64): New function.
(getosrandom): Fix return value, simplify.
(init_rand_state): Use getosrandom only to get 8 bytes, splitmix64
to fill rest of state.
(random_r4): Update to new function and struct names.
(random_r8): Likewise.
(random_r10): Likewise.
(random_r16): Likewise.
(arandom_r4): Liekwise.
(arandom_r8): Likewise.
(arandom_r10): Likwewise.
(arandom_r16): Likewise.
(xor_keys): Reduce size to match new PRNG.
(random_seed_i4): Update to new function and struct names, remove
special handling of variable p used in previous PRNG.
(random_seed_i8): Likewise.
From-SVN: r274361
Eric Botcazou [Tue, 13 Aug 2019 08:08:52 +0000 (08:08 +0000)]
[Ada] Remove unused component in record type
The component has been unused for a while. No functional changes.
2019-08-13 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* ali.ads (Linker_Option_Record): Remove Original_Pos component.
* ali.adb (Scan_ALI): Do not set it.
From-SVN: r274360
Eric Botcazou [Tue, 13 Aug 2019 08:08:47 +0000 (08:08 +0000)]
[Ada] Build full derivation for private concurrent type
This extends the processing done for the derivation of private
discriminated types to concurrent types, which is now required because
this derivation is no longer redone when a subtype of the derived
concurrent type is built.
This increases the number of entities generated internally in the
compiler but this case is sufficiently rare as not to be a real concern.
2019-08-13 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_ch3.adb (Build_Derived_Concurrent_Type): Add a couple of
local variables and use them. When the derived type fully
constrains the parent type, rewrite it as a subtype of an
implicit (unconstrained) derived type instead of the other way
around.
(Copy_And_Build): Deal with concurrent types and use predicates.
(Build_Derived_Private_Type): Build the full derivation if
needed for concurrent types too.
(Build_Derived_Record_Type): Add marker comment.
(Complete_Private_Subtype): Use predicates.
gcc/testsuite/
* gnat.dg/discr56.adb, gnat.dg/discr56.ads,
gnat.dg/discr56_pkg1.adb, gnat.dg/discr56_pkg1.ads,
gnat.dg/discr56_pkg2.ads: New testcase.
From-SVN: r274359
Ed Schonberg [Tue, 13 Aug 2019 08:08:40 +0000 (08:08 +0000)]
[Ada] Legality rule on ancestors of type extensions in generic bodies
This patch adds an RM reference for the rule that in a generic body a
type extension cannot have ancestors that are generic formal types. The
patch also extends the check to interface progenitors that may appear in
a derived type declaration or private extension declaration.
2019-08-13 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* sem_ch3.adb (Check_Generic_Ancestor): New subprogram,
aubsidiary to Build_Derived_Record_Type. to enforce the rule
that a type extension declared in a generic body cznnot have an
ancestor that is a generic formal (RM 3.9.1 (4/2)). The rule
applies to all ancestors of the type, including interface
progenitors.
gcc/testsuite/
* gnat.dg/tagged4.adb: New testcase.
From-SVN: r274358
Eric Botcazou [Tue, 13 Aug 2019 08:08:32 +0000 (08:08 +0000)]
[Ada] Fix spurious instantiation error on private record type
This change was initially aimed at fixing a spurious instantiation error
due to a disambiguation issue which happens when a generic unit with two
formal type parameters is instantiated on a single actual type that is
private.
The compiler internally sets the Is_Generic_Actual_Type flag on the
actual subtypes built for the instantiation in order to ease the
disambiguation, but it would fail to set it on the full view if the
subtypes are private. The change makes it so that the flag is properly
set and reset on the full view in this case.
But this uncovered an issue in Subtypes_Statically_Match, which was
relying on a stalled Is_Generic_Actual_Type flag set on a full view
outside of the instantiation to return a positive answer. This bypass
was meant to solve an issue arising with a private discriminated record
type whose completion is a discriminated record type itself derived from
a private discriminated record type, which is used as actual type in an
instantiation in another unit, and the instantiation is used in a child
unit of the original unit. In this case, the private and full views of
the generic actual type are swapped in the child unit, but there was a
mismatch between the chain of full and underlying full views of the
private discriminated record type and that of the generic actual type.
This secondary issue is solved by avoiding to skip the full view in the
preparation of the completion of the private subtype and by directly
constraining the underlying full view of the full view of the base type
instead of building an underlying full view from scratch.
2019-08-13 Eric Botcazou <ebotcazou@adacore.com>
gcc/ada/
* sem_ch3.adb (Build_Underlying_Full_View): Delete.
(Complete_Private_Subtype): Do not set the full view on the
private subtype here. If the full base is itself derived from
private, do not re-derive the parent type but instead constrain
an existing underlying full view.
(Prepare_Private_Subtype_Completion): Do not get to the
underlying full view, if any. Set the full view on the private
subtype here.
(Process_Full_View): Likewise.
* sem_ch12.adb (Check_Generic_Actuals): Also set
Is_Generic_Actual_Type on the full view if the type of the
actual is private.
(Restore_Private_Views): Also reset Is_Generic_Actual_Type on
the full view if the type of the actual is private.
* sem_eval.adb (Subtypes_Statically_Match): Remove bypass for
generic actual types.
gcc/testsuite/
* gnat.dg/generic_inst10.adb, gnat.dg/generic_inst10_pkg.ads:
New testcase.
From-SVN: r274357
Javier Miranda [Tue, 13 Aug 2019 08:08:27 +0000 (08:08 +0000)]
[Ada] Wrong dispatching call in type with aspect Implicit_Dereference
When a record type with an an access to class-wide type discriminant
has aspect Implicit_Dereference, and the discriminant is used as the
controlling argument of a dispatching call, the compiler may generate
wrong code to dispatch the call.
2019-08-13 Javier Miranda <miranda@adacore.com>
gcc/ada/
* sem_res.adb (Resolve_Selected_Component): When the type of the
component is an access to a class-wide type and the type of the
context is an access to a tagged type the relevant type is that
of the component (since in such case we may need to generate
implicit type conversions or dispatching calls).
gcc/testsuite/
* gnat.dg/tagged3.adb, gnat.dg/tagged3_pkg.adb,
gnat.dg/tagged3_pkg.ads: New testcase.
From-SVN: r274356
Ed Schonberg [Tue, 13 Aug 2019 08:08:22 +0000 (08:08 +0000)]
[Ada] Do not remove side-effects in an others_clause with function calls
An aggregate can be handled by the backend if it consists of static
constants of an elementary type, or null. If a component is a type
conversion we must preanalyze and resolve it to determine whether the
ultimate value is in one of these categories. Previously we did a full
analysis and resolution of the expression for the component, which could
lead to a removal of side-effects, which is semantically incorrect if
the expression includes functions with side-effects (e.g. a call to a
random generator).
2019-08-13 Ed Schonberg <schonberg@adacore.com>
gcc/ada/
* exp_aggr.adb (Aggr_Assignment_OK_For_Backend): Preanalyze
expression, rather do a full analysis, to prevent unwanted
removal of side effects which mask the intent of the expression.
gcc/testsuite/
* gnat.dg/aggr27.adb: New testcase.
From-SVN: r274355
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