Jason Ekstrand [Mon, 14 Sep 2015 22:36:24 +0000 (15:36 -0700)]
i965/fs_surface_builder: Only apply predicate to components that exist
In certain conditions, we have to do bounds-checking in the shader for
image_load_store. The way this works for image loads is that we do a
predicated load and then emit a series of selects, one per component,
that gives us 0 or the loaded value depending on whether or not you're
in bounds. However, we were hard-coding 4 components which may not be
correct. Instead, we should be using size which is the number of
components read.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Jason Ekstrand [Mon, 14 Sep 2015 21:18:13 +0000 (14:18 -0700)]
i965/fs: Only read output_components many components when writing an output
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jason Ekstrand [Mon, 14 Sep 2015 22:09:00 +0000 (15:09 -0700)]
i965/fs: Set output_components for lowered clip distance outputs
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Nanley Chery [Thu, 27 Aug 2015 23:05:22 +0000 (16:05 -0700)]
mesa/teximage: restrict GL_ETC1_RGB8_OES support to GLES
According to the extensions table and our glext headers,
OES_compressed_ETC1_RGB8_texture is only supported in
GLES1 and GLES2. Since we may give users a GLES3 context
when a GLES2 context is requested, we also allow this
extension for GLES3 as well.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Nanley Chery [Thu, 10 Sep 2015 17:48:46 +0000 (10:48 -0700)]
mesa/extensions: restrict GL_OES_EGL_image to GLES
Driver vendors do this as well. The extension specification
lists GLES 1.1 or 2.0 as requirements.
Reviewed-by: Chad Versace <chad.versace@intel.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Nanley Chery [Thu, 27 Aug 2015 23:05:22 +0000 (16:05 -0700)]
mesa/extensions: restrict luminance alpha formats to API_OPENGL_COMPAT
According the GL 3.1 spec, luminance alpha formats are deprecated.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Thomas Hellstrom [Tue, 15 Sep 2015 06:40:07 +0000 (23:40 -0700)]
gallium/svga: Enable PIPE_FORMAT_L8_UNORM for vgpu10
It's extensively used by XA for a8- and planar yuv component surfaces.
This fixes broken XA yuv blits using vgpu10 contexts.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Emil Velikov [Thu, 10 Sep 2015 13:41:38 +0000 (14:41 +0100)]
egl/dri2: don't leak the fd on dri2_terminate
Currently the check was incorrect as it did not consider the (unlikely)
case of fd == 0. In order to fix this we should first correctly
initialize it to -1, as the swrast implementations leave it set to zero
(props to calloc()).
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Boyan Ding <boyan.j.ding@gmail.com>
Emil Velikov [Mon, 7 Sep 2015 08:53:53 +0000 (09:53 +0100)]
egl/dri2/drm: compact existing device mgmt
Move the fcntl(dupfd_cloexec) to the else branch where it belongs.
Otherwise it's not immediately obvious that the code is hit, only when
an existing device is used.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Boyan Ding <boyan.j.ding@gmail.com>
Matt Turner [Wed, 15 Jul 2015 16:00:41 +0000 (09:00 -0700)]
egl/dri2: Close file descriptor on error.
v2: [Emil Velikov]
Rework the error path to a common goto, close only if we own the fd.
v3; [Emil Velikov]
Always close the fd (we either opened the device or dup'd) (Boyan, Ian)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Boyan Ding <boyan.j.ding@gmail.com>
Ray Strode [Fri, 28 Aug 2015 18:50:21 +0000 (14:50 -0400)]
gbm: convert gbm bo format to fourcc format on dma-buf import
At the moment if a gbm buffer is imported and the gbm buffer
has an old-style GBM_BO_FORMAT format, the import will crash,
since it's passed directly to DRI functions that expect
a fourcc format (as provided by the newer GBM_FORMAT
definitions)
This commit addresses the problem in two ways:
1) it prevents invalid formats from leading to a crash by
returning EINVAL if the image couldn't be created
2) it translates GBM_BO_FORMAT formats into the comparable
GBM_FORMAT formats.
Reference: https://bugzilla.gnome.org/show_bug.cgi?id=753531
CC: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Alejandro Piñeiro [Mon, 14 Sep 2015 18:16:25 +0000 (20:16 +0200)]
docs: document INTEL_DEBUG 'optimizer' envvar
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kristian Høgsberg Kristensen [Sat, 5 Sep 2015 00:09:40 +0000 (17:09 -0700)]
i965: Move perf_debug code to brw_codegen_*_prog()
We're trying to avoid a libdrm dependency in the core compiler, so let's
move the perf_debug code one level up from the brw_*_emit() helpers to
the brw_codegen_*_prog() helpers.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
Kristian Høgsberg Kristensen [Fri, 4 Sep 2015 23:55:03 +0000 (16:55 -0700)]
i965: Move brw_fs_precompile() to brw_wm.c
All other precompile functions live in the brw_<stage>.c files, make fs
follow the convention.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
Kristian Høgsberg Kristensen [Fri, 4 Sep 2015 23:35:34 +0000 (16:35 -0700)]
i965: Move compute shader code around
This moves the compute shader code around in order to make the way the
code is split up more consistent. There should be no functional changes.
Typically we have a few files per stage:
brw_vs.c, brw_wm.c brw_gs.c:
code to drive code generation and implement precompiling and
cache search.
genX_<stage>_state.c
gen specific implementation of the state emission for the shader
stage.
The brw_*_emit() functions are all in the same files as the visitor
classes they use (with the exception of VS, which may use either vec4 or
fs).
To make compute follow this convention, we move the brw_cs_emit()
function into brw_fs.cpp. We can then rename brw_cs.cpp to brw_cs.c and
do this in C like the other similar files. Finally, move state setup
and atoms to gen7_cs_state.c.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Kristian Høgsberg Kristensen <krh@bitplanet.net>
Anuj Phogat [Fri, 24 Jul 2015 22:53:58 +0000 (15:53 -0700)]
meta: Abort meta pbo path if TexSubImage need signed unsigned conversion
See similar fix for Readpixels in mesa commit 0d20790. Jason suggested
we need that for TexSubImage as well.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Ilia Mirkin [Fri, 11 Sep 2015 03:58:17 +0000 (23:58 -0400)]
nvc0/ir: start offset at texBindBase for txq, like regular texturing
Curiously this has no actual effect. I think it's because the first 8
textures are bound in multiple slots for some reason. However seems
prudent to use these the same way as regular texturing, esp in the case
where there are more than 8 textures bound.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Eric Anholt [Mon, 14 Sep 2015 15:21:07 +0000 (11:21 -0400)]
vc4: Fix build from recent NIR cleanups.
Antia Puentes [Mon, 14 Sep 2015 07:50:59 +0000 (09:50 +0200)]
i965/vec4_nir: Load constants as integers
Loads constants using integer as their register type, like it is
done in FS backend.
No shader-db changes in HSW.
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91716
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Antia Puentes [Wed, 5 Aug 2015 13:57:33 +0000 (15:57 +0200)]
i965/vec4: Fix saturation errors when coalescing registers
If the register types do not match and the instruction
that contains the final destination is saturated, register
coalescing generated non-equivalent code.
This did not happen when using IR because types usually
matched, but it is visible in nir-vec4.
For example,
mov vgrf7:D vgrf2:D
mov.sat m4:F vgrf7:F
is coalesced to:
mov.sat m4:D vgrf2:D
The patch prevents coalescing in such scenario, unless the
instruction we want to coalesce into is a MOV (without type
conversion implied). In that case, the patch sets the register
types to the type of the final destination.
Shader-db results in HSW (only vec4 instructions shown):
total instructions in shared programs: 1754415 -> 1754416 (0.00%)
instructions in affected programs: 74 -> 75 (1.35%)
helped: 0
HURT: 1
GAINED: 0
LOST: 0
Only one extra instruction in one of the shaders, that comes from
eliminating a saturation error by preventing register coalesce.
Cc: "10.6 11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Tapani Pälli [Mon, 14 Sep 2015 05:50:51 +0000 (08:50 +0300)]
docs: cleanups + mark some work as done
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 14 Sep 2015 05:07:05 +0000 (01:07 -0400)]
docs: only astc ldr required for ES3.2, not hdr
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ilia Mirkin [Fri, 11 Sep 2015 01:44:45 +0000 (21:44 -0400)]
st/mesa: emit TXQS, support ARB_shader_texture_image_samples
The image component of the ext is a no-op since there is no image support
in gallium (yet).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Ilia Mirkin [Fri, 11 Sep 2015 02:33:34 +0000 (22:33 -0400)]
r600g: add support for TXQS tgsi opcode
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Ilia Mirkin [Fri, 11 Sep 2015 02:07:27 +0000 (22:07 -0400)]
nv50/ir: add support for TXQS tgsi opcode
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 11 Sep 2015 21:29:49 +0000 (17:29 -0400)]
gallium: add PIPE_CAP_TGSI_TXQS to let st know if TXQS is supported
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Ilia Mirkin [Fri, 11 Sep 2015 01:37:23 +0000 (21:37 -0400)]
tgsi: add a TXQS opcode to retrieve the number of texture samples
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Jordan Justen [Mon, 17 Aug 2015 23:32:42 +0000 (16:32 -0700)]
glsl/cs: Initialize gl_LocalInvocationIndex in main()
We initialize gl_LocalInvocationIndex based on the extension spec
formula:
gl_LocalInvocationIndex =
gl_LocalInvocationID.z * gl_WorkGroupSize.x * gl_WorkGroupSize.y +
gl_LocalInvocationID.y * gl_WorkGroupSize.x +
gl_LocalInvocationID.x;
https://www.opengl.org/registry/specs/ARB/compute_shader.txt
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Jordan Justen [Mon, 17 Aug 2015 22:49:44 +0000 (15:49 -0700)]
glsl/cs: Exclude gl_LocalInvocationIndex from builtin variable stripping
We lower gl_LocalInvocationIndex based on the extension spec formula:
gl_LocalInvocationIndex =
gl_LocalInvocationID.z * gl_WorkGroupSize.x * gl_WorkGroupSize.y +
gl_LocalInvocationID.y * gl_WorkGroupSize.x +
gl_LocalInvocationID.x;
https://www.opengl.org/registry/specs/ARB/compute_shader.txt
We need to set this variable in main(), even if gl_LocalInvocationIndex
is not referenced by the shader. (It may be used by a linked shader.)
Therefore, we can't eliminate it as a dead variable.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Jordan Justen [Mon, 17 Aug 2015 21:35:44 +0000 (14:35 -0700)]
glsl/cs: Initialize gl_GlobalInvocationID in main()
We initialize gl_GlobalInvocationID based on the extension spec
formula:
gl_GlobalInvocationID =
gl_WorkGroupID * gl_WorkGroupSize + gl_LocalInvocationID
https://www.opengl.org/registry/specs/ARB/compute_shader.txt
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Jordan Justen [Mon, 17 Aug 2015 19:22:34 +0000 (12:22 -0700)]
glsl: Move link_get_main_function_signature to a common location
Also rename to _mesa_get_main_function_signature.
We will call it near the end of compilation to insert some code into
main for initializing some compute shader global variables.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Jordan Justen [Mon, 17 Aug 2015 19:30:25 +0000 (12:30 -0700)]
glsl/cs: Don't strip gl_GlobalInvocationID and dependencies
We lower gl_GlobalInvocationID based on the extension spec formula:
gl_GlobalInvocationID =
gl_WorkGroupID * gl_WorkGroupSize + gl_LocalInvocationID
https://www.opengl.org/registry/specs/ARB/compute_shader.txt
We need to set this variable in main(), even if gl_GlobalInvocationID
is not referenced by the shader. (It may be used by a linked shader.)
Therefore, we can't eliminate these as dead variables.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Jordan Justen [Fri, 13 Mar 2015 18:39:53 +0000 (11:39 -0700)]
i965/nir: Support gl_WorkGroupID variable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Fri, 10 Oct 2014 15:28:24 +0000 (08:28 -0700)]
i965/cs: Initialize gl_WorkGroupID variable from payload
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Fri, 13 Mar 2015 18:37:03 +0000 (11:37 -0700)]
nir: Add gl_WorkGroupID system variable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Fri, 10 Oct 2014 15:28:24 +0000 (08:28 -0700)]
glsl/cs: Add gl_WorkGroupID variable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Fri, 13 Mar 2015 18:34:48 +0000 (11:34 -0700)]
i965/nir: Support gl_LocalInvocationID variable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Sat, 22 Nov 2014 03:14:41 +0000 (19:14 -0800)]
i965/cs: Initialize gl_LocalInvocationID from payload
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Fri, 10 Oct 2014 15:33:23 +0000 (08:33 -0700)]
i965/cs: Initialize gl_LocalInvocationID in push constant data
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Sat, 22 Nov 2014 02:47:49 +0000 (18:47 -0800)]
i965/cs: Reserve local invocation id in payload regs
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Jordan Justen [Fri, 13 Mar 2015 18:32:43 +0000 (11:32 -0700)]
nir: Add gl_LocalInvocationID variable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Fri, 10 Oct 2014 15:28:24 +0000 (08:28 -0700)]
glsl/cs: Add gl_LocalInvocationID variable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Krzesimir Nowak [Sat, 12 Sep 2015 14:17:00 +0000 (08:17 -0600)]
softpipe: Change faces type to uint
This is to avoid needless float<->int conversions, since all
face-related computations are made on integers. Spotted by Emil
Velikov.
Reviewed-by: Brian Paul <brianp@vmware.com>
Rob Clark [Sun, 13 Sep 2015 15:22:51 +0000 (11:22 -0400)]
freedreno/ir3: fix compile warn after
1807a08e
New enum to add to switch so compiler doesn't complain.
commit
1807a08e4f35b014f2a80d1e88dd74a9f096d7a5
Author: Ilia Mirkin <imirkin@alum.mit.edu>
AuthorDate: Thu Aug 27 23:05:03 2015 -0400
Commit: Ilia Mirkin <imirkin@alum.mit.edu>
CommitDate: Thu Sep 10 17:38:33 2015 -0400
nir: add nir_texop_texture_samples and convert from glsl
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Sun, 13 Sep 2015 15:21:28 +0000 (11:21 -0400)]
freedreno/ir3: fix compile break after
a4aa25be
Following commit dropped the unused memctx arg:
commit
a4aa25be1e0a27b1a6a6b0bcf576beb9dfe1ea7a
Author: Jason Ekstrand <jason.ekstrand@intel.com>
AuthorDate: Wed Sep 9 13:24:35 2015 -0700
Commit: Jason Ekstrand <jason.ekstrand@intel.com>
CommitDate: Fri Sep 11 09:21:20 2015 -0700
nir: Remove the mem_ctx parameter from ssa_def_rewrite_uses
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Thu, 10 Sep 2015 20:06:05 +0000 (16:06 -0400)]
nir: add nir_channel() to get at single components of vec's
Rather than make yet another copy of channel(), let's move it into nir.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Rob Clark [Wed, 9 Sep 2015 22:28:55 +0000 (18:28 -0400)]
tgsi/scan: add support to figure out max nesting depth
Sometimes a useful thing for compilers (or, for example, tgsi_to_nir) to
know. And pretty trivial for scan to figure this out for us.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Kai Wasserbäch [Sat, 12 Sep 2015 08:39:50 +0000 (10:39 +0200)]
r600: Fix llvm build since const buffer changes
In commit
f9caabe8f1bff86d19b53d9ecba5c72b238d9e23:
One place in r600_llvm.c was forgotten when replacing
R600_UCP_CONST_BUFFER with R600_BUFFER_INFO_CONST_BUFFER.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91985
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Signed-off-by: Dave Airlie <airlied@gmail.com>
Jason Ekstrand [Thu, 10 Sep 2015 23:19:42 +0000 (16:19 -0700)]
i965/vec4: Don't reswizzle hardware registers
Cc: "11.0 10.6" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91719
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Thu, 10 Sep 2015 23:19:22 +0000 (16:19 -0700)]
i965/emit: Add assertions for accumulator restrictions
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Emil Velikov [Sat, 12 Sep 2015 12:50:33 +0000 (13:50 +0100)]
docs: add news item and link release notes for 11.0.0
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 12 Sep 2015 12:32:56 +0000 (13:32 +0100)]
docs: add sha256 checksums for 11.0.0
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
c4bae5792bb5515da42e23f166f5ba5d68f79615)
Emil Velikov [Sat, 12 Sep 2015 09:33:49 +0000 (10:33 +0100)]
docs: Update 11.0.0 release notes
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit
4f1e500150be2e82a2d7eb954f7198cc0c5cbec1)
Glenn Kennard [Fri, 11 Sep 2015 10:42:23 +0000 (12:42 +0200)]
r600: Enable fp64 on chips with native support
Cypress/Cayman/Aruba, earlier r6xx/r7xx chips only support a subset
of the needed fp64 ops, and don't do GL4 anyway.
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Glenn Kennard [Fri, 11 Sep 2015 10:42:22 +0000 (12:42 +0200)]
r600g: Support I2D/U2D/D2I/D2U
Only for Cypress/Cayman/Aruba, older chips have only partial fp64 support.
Uses float intermediate values so only accurate for int24 range, which
matches what the blob does.
Signed-off-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 11 Sep 2015 03:43:53 +0000 (04:43 +0100)]
r600g: lower number of driver const buffers
I'm going to want a driver constant buffer for tess to coordinate
LDS storage, so before I go tackling that I decided to merge the
clip/samplepos and texture info buffers into one. So I can steal
the spare one.
This creates a single constant buffer between the two, with
clip/samplepos taking up a reserved 128 bytes at the start.
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 11 Sep 2015 02:11:43 +0000 (03:11 +0100)]
r600: define some values for the fetch constant offsets.
This just puts these in one place and #defines them.
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Thomas Helland [Wed, 12 Aug 2015 13:07:57 +0000 (15:07 +0200)]
docs: Update with GLES3.2 entries and status
V2: -Change to "not started" for most entries
-Add status for multisample_2d_array
-Change shader_multisample_interpolation to "not_stared"
V3 (idr): Move the GLES 3.2 section after the "Additional functions"
section from GLES 3.1. Note that GL_KHR_texture_compression_astc_hdr is
done for i965 on gen9+ hardware. Note that GL_OES_shader_io_blocks is
based on some features from GLSL 1.50.
Signed-off-by: Thomas Helland <thomashelland90@gmail.com>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> [v2]
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Krzesimir Nowak [Fri, 11 Sep 2015 18:07:42 +0000 (20:07 +0200)]
softpipe: Constify variables
This commit makes a lot of variables constant - this is basically done
by moving the computation to variable definition. Some of them are
moved into lower scopes (like in img_filter_2d_ewa).
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Krzesimir Nowak [Fri, 11 Sep 2015 18:07:41 +0000 (20:07 +0200)]
softpipe: Constify sp_tgsi_sampler
Add a small inline function doing the casting - this is to make sure
we don't do a cast from some completely unrelated type. This commit
does not make tgsi_sampler parameters const in vfuncs themselves for
now - probably llvmpipe would need looking at before making such a
change.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Krzesimir Nowak [Fri, 11 Sep 2015 18:07:40 +0000 (20:07 +0200)]
softpipe: Constify sampler and view parameters in mip filters
Those functions actually could always take them as constants.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Krzesimir Nowak [Fri, 11 Sep 2015 18:07:39 +0000 (20:07 +0200)]
softpipe: Constify sampler and view parameters in img filters
Those functions actually could always take them as constants.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Krzesimir Nowak [Fri, 11 Sep 2015 18:07:38 +0000 (20:07 +0200)]
tgsi, softpipe: Constify tgsi_sampler in query_lod vfunc
A followup from previous commit - since all functions called by
query_lod take pointers to const sp_sampler_view and const sp_sampler,
which are taken from tgsi_sampler subclass, we can the tgsi_sampler as
const itself now.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Krzesimir Nowak [Fri, 11 Sep 2015 18:07:37 +0000 (20:07 +0200)]
softpipe: Constify some sampler and view parameters
This is to prepare for making tgsi_sampler parameter in query_lod a
const too. These functions do not modify anything in either sampler or
view anymore.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Krzesimir Nowak [Fri, 11 Sep 2015 18:07:36 +0000 (20:07 +0200)]
softpipe: Move the faces array from view to filter_args
With that, sp_sampler_view instances are not abused anymore as a local
storage, so we can later make them constant.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Jason Ekstrand [Wed, 9 Sep 2015 23:03:10 +0000 (16:03 -0700)]
nir/from_ssa: Use instr_rewrite_dest
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Jason Ekstrand [Wed, 9 Sep 2015 22:58:25 +0000 (15:58 -0700)]
nir: Add a function for rewriting instruction destinations
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Jason Ekstrand [Wed, 9 Sep 2015 22:58:08 +0000 (15:58 -0700)]
nir: Only unlink sources that are actually valid
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Jason Ekstrand [Wed, 9 Sep 2015 20:24:35 +0000 (13:24 -0700)]
nir: Remove the mem_ctx parameter from ssa_def_rewrite_uses
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Jason Ekstrand [Wed, 9 Sep 2015 20:18:29 +0000 (13:18 -0700)]
nir: Fix a bunch of ralloc parenting errors
As of
a10d4937, we would really like things associated with an instruction
to be allocated out of that instruction and not out of the shader. In
particular, you should be passing the instruction that will ultimately be
holding the source into nir_src_copy rather than an arbitrary memory
context.
We also change the prototypes of nir_dest_copy and nir_alu_src/dest_copy to
explicitly take an instruction so we catch this earlier in the future.
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Jason Ekstrand [Thu, 10 Sep 2015 20:56:08 +0000 (13:56 -0700)]
nir/lower_outputs_to_temporaries: Reparent the output name
We copy the output, make the old output the temporary, and give the
temporary a new name. The copy keeps the pointer to the old name. This
works just fine up until the point where we lower things to SSA and delete
the old variable and, with it, the name. Instead, we should re-parent to
the copy.
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Alejandro Piñeiro [Fri, 11 Sep 2015 10:21:13 +0000 (12:21 +0200)]
i965/vec4: check writemask when bailing out at register coalesce
opt_register_coalesce stopped to check previous instructions to
coalesce with if somebody else was writing on the same
destination. This can be optimized to check if somebody else was
writing to the same channels of the same destination using the
writemask.
Shader DB results (taking into account only vec4):
total instructions in shared programs: 1781593 -> 1734957 (-2.62%)
instructions in affected programs: 1238390 -> 1191754 (-3.77%)
helped: 12782
HURT: 0
GAINED: 0
LOST: 0
v2: removed some parenthesis, fixed indentation, as suggested by
Matt Turner
v3: added brackets, for consistency, as suggested by Eduardo Lima
Reviewed-by: Matt Turner <mattst88@gmail.com>
Brian Paul [Thu, 10 Sep 2015 18:26:18 +0000 (12:26 -0600)]
tgsi,softpipe: capitalize the tgsi_sampler_control enum values
We use capitalized enum values everywhere else.
This improves understanding a bit too.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Kenneth Graunke [Tue, 18 Aug 2015 09:07:47 +0000 (02:07 -0700)]
nir: Store some geometry shader data in nir_shader.
This makes it possible for NIR shaders to know the number of output
vertices and the number of invocations. Drivers could also access
these directly without going through gl_program.
We should probably add InputType and OutputType here too, but currently
those are stored as GL_* enums, and I wanted to avoid using those in
NIR, as I suspect Vulkan/SPIR-V will use different enums. (We should
probably make our own.)
We could add VerticesIn, but it's easily computable from the input
topology, so I'm not sure whether it's worth it. It's also currently
not stored in gl_shader (only gl_shader_program), which would require
changes to the glsl_to_nir interface or require us to store it there.
This is a bit of duplication of data...ideally, we would factor these
substructs out of gl_program, gl_shader_program, and nir_shader, creating
a gl_geometry_info class...but it would need to go in a new place (in
src/glsl?) that isn't mtypes.h nor nir.h.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Kenneth Graunke [Tue, 12 May 2015 08:53:24 +0000 (01:53 -0700)]
nir/builder: Add nir_load_var() and nir_store_var() helpers.
These provide a convenient way to do simple variable loads and stores.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Kenneth Graunke [Wed, 12 Nov 2014 07:16:13 +0000 (23:16 -0800)]
glsl: Use hash tables for opt_constant_propagation() kill sets.
Cuts compile/link time of the fragment shader in #91857 by 19%
(16.28 -> 13.05).
I didn't bother with the acp sets because they're smaller, but it
might be worth doing as well.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91857
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Kenneth Graunke [Sat, 5 Sep 2015 07:51:33 +0000 (00:51 -0700)]
i965: Use hash tables for brw_fs_vector_splitting().
Cuts compile/link time of the fragment shader in #91857 by 25%
(21.64 -> 16.28).
v2: Drop unnecessary _mesa_hash_table_destroy call, and use
refs.ht->entries == 0 rather than ad-hoc checking (suggested by
Timothy Arceri).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91857
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Kenneth Graunke [Sat, 5 Sep 2015 07:22:57 +0000 (00:22 -0700)]
glsl: Use hash tables in opt_constant_variable().
Cuts compile/link time of the fragment shader in bug #91857 by 31%
(31.79 -> 21.64). It has over 8,000 variables so linked lists are
terrible.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91857
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Wed, 9 Sep 2015 17:27:04 +0000 (10:27 -0700)]
meta: Use result of texture coordinate clamping operation
Previously the result of the complicated clamp() expression just dropped
on the floor: clamp does not modify any of its parameters. Looking at
the surrounding code, I believe this is supposed to modify the value of
tex_coord.
This change (along with a change to avoid the use of
brw_blorp_framebuffer) does not affect any existing piglit tests. I'm
not sure what this clamp is trying to accomplish, so I'm not sure how to
write a test to exercise this path.
I also noticed another bug in this code. There is no way the array
texture case could possibly work. This will generate code for the
TEXEL_FETCH macro like:
#define TEXEL_FETCH(coord) texelFetch(texSampler, ivec3(coord), sample_map[int(2 * fract(coord.x))]);
Since the coord parameter of this macro is a vec2 at all invocations, no
expansion of this macro will even compile.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Wed, 2 Sep 2015 23:06:58 +0000 (16:06 -0700)]
meta: Always bind the texture
We may have been called from glGenerateTextureMipmap with CurrentUnit
still set to 0, so we don't know when we can skip binding the texture.
Assume that _mesa_BindTexture will be fast if we're rebinding the same
texture.
v2: Remove currentTexUnitSave because it is now unused. Suggested by
both Neil and Anuj.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91847
Cc: "11.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ian Romanick [Wed, 2 Sep 2015 22:44:04 +0000 (15:44 -0700)]
i915, i965: Silence unused parameter warnings in intel_batchbuffer_advance
These only occurred in release builds, but they occurred in every file
that included intel_batchbuffer.h. Lots of spam. :(
intel_batchbuffer.h: In function 'intel_batchbuffer_advance':
intel_batchbuffer.h:153:47: warning: unused parameter 'brw' [-Wunused-parameter]
intel_batchbuffer_advance(struct brw_context *brw)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ian Romanick [Wed, 2 Sep 2015 22:11:34 +0000 (15:11 -0700)]
i915: Silence unused parameter warning in intel_miptree_create_layout
The for_bo parameter of intel_miptree_create_layout appears to be unused
since 27eedca when Eric removed some Gen5 code (after the i915 and i965
drivers parted ways).
intel_mipmap_tree.c: In function 'old_intel_miptree_create_layout':
intel_mipmap_tree.c:77:35: warning: unused parameter 'for_bo' [-Wunused-parameter]
bool for_bo)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ian Romanick [Wed, 2 Sep 2015 22:04:59 +0000 (15:04 -0700)]
i915, i965: Silence unused parameter warnings in intel_miptree_unmap_gtt
intel_mipmap_tree.c: In function 'intel_miptree_unmap_gtt':
intel_mipmap_tree.c:777:34: warning: unused parameter 'map' [-Wunused-parameter]
struct intel_miptree_map *map,
^
intel_mipmap_tree.c:778:17: warning: unused parameter 'level' [-Wunused-parameter]
unsigned int level,
^
intel_mipmap_tree.c:779:17: warning: unused parameter 'slice' [-Wunused-parameter]
unsigned int slice)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ian Romanick [Wed, 2 Sep 2015 22:01:18 +0000 (15:01 -0700)]
i915: Silence unused parameter warnings
intel_mipmap_tree.c: In function 'old_intel_miptree_unmap_raw':
intel_mipmap_tree.c:726:51: warning: unused parameter 'intel' [-Wunused-parameter]
intel_miptree_unmap_raw(struct intel_context *intel,
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ian Romanick [Wed, 2 Sep 2015 21:56:18 +0000 (14:56 -0700)]
i915: Remove prototype for nonexistent brw_miptree_layout
Hasn't existed in the i915 source since the i915 and i965 drivers parted
ways.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ian Romanick [Wed, 2 Sep 2015 21:43:18 +0000 (14:43 -0700)]
i965: Make intel_miptree_map_raw static
This hasn't been used outside intel_mipmap_tree.c since d5d4ba9 started
using meta instead of the blitter for PBO TexSubImage. While we're
here, remove the unused brw parameter from the function formerly known
as intel_miptree_unmap_raw.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ian Romanick [Wed, 2 Sep 2015 21:33:59 +0000 (14:33 -0700)]
i915, i965: Silence unused parameter warnings in intel_mipmap_tree.h
These only occurred in release builds, but they occurred in every file
that included intel_mipmap_tree.h. Lots of spam. :(
intel_mipmap_tree.h: In function 'intel_miptree_check_level_layer':
intel_mipmap_tree.h:595:59: warning: unused parameter 'mt' [-Wunused-parameter]
intel_miptree_check_level_layer(struct intel_mipmap_tree *mt,
^
intel_mipmap_tree.h:596:42: warning: unused parameter 'level' [-Wunused-parameter]
uint32_t level,
^
intel_mipmap_tree.h:597:42: warning: unused parameter 'layer' [-Wunused-parameter]
uint32_t layer)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Ian Romanick [Wed, 2 Sep 2015 21:02:18 +0000 (14:02 -0700)]
i965: Silence unused parameter warnings in intel_mipmap_tree.c
The target parameter of compute_msaa_layout appears to be unused since
83b83fb when support for CMS textures was added for Gen7.
The brw parameter of intel_get_non_msrt_mcs_alignment appears to be
unused since e92fbdc when the GEN check (along with the "can we fast
clear" decision) was moved to a different function.
intel_mipmap_tree.c: In function 'compute_msaa_layout':
intel_mipmap_tree.c:62:73: warning: unused parameter 'target' [-Wunused-parameter]
compute_msaa_layout(struct brw_context *brw, mesa_format format, GLenum target,
^
intel_mipmap_tree.c: In function 'intel_get_non_msrt_mcs_alignment':
intel_mipmap_tree.c:143:54: warning: unused parameter 'brw' [-Wunused-parameter]
intel_get_non_msrt_mcs_alignment(struct brw_context *brw,
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Ian Romanick [Wed, 9 Sep 2015 17:33:52 +0000 (10:33 -0700)]
i965: Silence unused parameter warnings in intel_fbo.c
intel_fbo.c: In function 'intel_alloc_window_storage':
intel_fbo.c:415:48: warning: unused parameter 'ctx' [-Wunused-parameter]
intel_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
^
intel_fbo.c: In function 'intel_nop_alloc_storage':
intel_fbo.c:428:74: warning: unused parameter 'rb' [-Wunused-parameter]
intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
^
intel_fbo.c:429:32: warning: unused parameter 'internalFormat' [-Wunused-parameter]
GLenum internalFormat, GLuint width, GLuint height)
^
intel_fbo.c:429:55: warning: unused parameter 'width' [-Wunused-parameter]
GLenum internalFormat, GLuint width, GLuint height)
^
intel_fbo.c:429:69: warning: unused parameter 'height' [-Wunused-parameter]
GLenum internalFormat, GLuint width, GLuint height)
^
intel_fbo.c: In function 'intel_blit_framebuffer_with_blitter':
intel_fbo.c:790:61: warning: unused parameter 'filter' [-Wunused-parameter]
GLbitfield mask, GLenum filter)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Dave Airlie [Fri, 4 Sep 2015 00:24:39 +0000 (01:24 +0100)]
st/mesa: set the vbuffer to NULL if we are skipping it
If we skip a vbuffer we need to make sure we NULL out
the contents, otherwise when it gets passed to the driver
it will get confused.
This was hit by:
GL41-CTS.gpu_shader_fp64.varyings
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Jordan Justen [Wed, 5 Nov 2014 08:47:41 +0000 (00:47 -0800)]
i965/cs: Enable barrier in MEDIA_INTERFACE_DESCRIPTOR
Enable barrier in MEDIA_INTERFACE_DESCRIPTOR if the program uses the
barrier() GLSL function.
On Ivy Bridge and Haswell, this allows the piglit test
tests/spec/arb_compute_shader/execution/simple-barrier-atomics.shader_test
to pass. On gen8, this enables a similar test with a local group size
of 896 to pass.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Thu, 12 Mar 2015 05:54:20 +0000 (22:54 -0700)]
i965/cs: Emit texture surfaces to enable CS sampling
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Sat, 4 Oct 2014 02:07:45 +0000 (19:07 -0700)]
i965: Set up sampler state for compute shaders
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Sat, 4 Oct 2014 02:05:32 +0000 (19:05 -0700)]
i965/fs: Set first_non_payload_grf in assign_curb_setup
first_non_payload_grf may be updated in assign_urb_setup for FS or
assign_vs_urb_setup for VS.
We need to set this in assign_curb_setup for compute shaders since cs
does not have an assign_cs_urb_setup like assign_urb_setup (fs) or
assign_vs_urb_setup (vs).
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Sat, 4 Oct 2014 02:01:24 +0000 (19:01 -0700)]
i965: Support compute shaders in is_scalar_shader_stage()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jordan Justen [Sat, 4 Oct 2014 01:58:39 +0000 (18:58 -0700)]
i965: Support CS in update_stage_texture_surfaces
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Ilia Mirkin [Wed, 12 Aug 2015 00:38:48 +0000 (20:38 -0400)]
i965: enable ARB_shader_texture_image_samples
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ilia Mirkin [Fri, 28 Aug 2015 03:34:47 +0000 (23:34 -0400)]
i965: add handling for imageSamples
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ilia Mirkin [Fri, 28 Aug 2015 03:27:50 +0000 (23:27 -0400)]
nir: convert glsl imageSamples into a new intrinsic
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ilia Mirkin [Fri, 28 Aug 2015 03:22:18 +0000 (23:22 -0400)]
glsl: add support for the imageSamples function
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>