Simon Pilgrim [Tue, 22 Feb 2022 11:52:45 +0000 (11:52 +0000)]
[GISel] Silence 'sideeffect in assertion' coverity warnings. NFCI.
Use llvm::enumerate to keep track of index.
Kerry McLaughlin [Tue, 22 Feb 2022 10:49:34 +0000 (10:49 +0000)]
[LoopVectorize] Support conditional in-loop vector reductions
Extends getReductionOpChain to look through Phis which may be part of
the reduction chain. adjustRecipesForReductions will now also create a
CondOp for VPReductionRecipe if the block is predicated and not only if
foldTailByMasking is true.
Changes were required in tryToBlend to ensure that we don't attempt
to convert the reduction Phi into a select by returning a VPBlendRecipe.
The VPReductionRecipe will create a select between the Phi and the reduction.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D117580
Ilya Nozhkin [Tue, 22 Feb 2022 11:48:32 +0000 (12:48 +0100)]
[lldb] Fix race condition between lldb-vscode and stop hooks executor
The race is between these two pieces of code that are executed in two separate
lldb-vscode threads (the first is in the main thread and another is in the
event-handling thread):
```
// lldb-vscode.cpp
g_vsc.debugger.SetAsync(false);
g_vsc.target.Launch(launch_info, error);
g_vsc.debugger.SetAsync(true);
```
```
// Target.cpp
bool old_async = debugger.GetAsyncExecution();
debugger.SetAsyncExecution(true);
debugger.GetCommandInterpreter().HandleCommands(GetCommands(), exc_ctx,
options, result);
debugger.SetAsyncExecution(old_async);
```
The sequence that leads to the bug is this one:
1. Main thread enables synchronous mode and launches the process.
2. When the process is launched, it generates the first stop event.
3. This stop event is catched by the event-handling thread and DoOnRemoval
is invoked.
4. Inside DoOnRemoval, this thread runs stop hooks. And before running stop
hooks, the current synchronization mode is stored into old_async (and
right now it is equal to "false").
5. The main thread finishes the launch and returns to lldb-vscode, the
synchronization mode is restored to asynchronous by lldb-vscode.
6. Event-handling thread finishes stop hooks processing and restores the
synchronization mode according to old_async (i.e. makes the mode synchronous)
7. And now the mode is synchronous while lldb-vscode expects it to be
asynchronous. Synchronous mode forbids the process to broadcast public stop
events, so, VS Code just hangs because lldb-vscode doesn't notify it about
stops.
So, this diff makes the target intercept the first stop event if the process is
launched in the synchronous mode, thus preventing stop hooks execution.
The bug is only present on Windows because other platforms already
intercept this event using their own hijacking listeners.
So, this diff also fixes some problems with lldb-vscode tests on Windows to make
it possible to run the related test. Other tests still can't be enabled because
the debugged program prints something into stdout and LLDB can't intercept this
output and redirect it to lldb-vscode properly.
Reviewed By: jingham
Differential Revision: https://reviews.llvm.org/D119548
Nikita Popov [Tue, 22 Feb 2022 11:25:30 +0000 (12:25 +0100)]
[MergeICmps] Don't call comesBefore() if in different blocks (PR53959)
Only call comesBefore() if the instructions are in the same block.
Otherwise make a conservative assumption.
Fixes https://github.com/llvm/llvm-project/issues/53959.
Alexander Batashev [Tue, 22 Feb 2022 11:04:21 +0000 (14:04 +0300)]
[mlir][spirv] Fix SPIR-V spec parser
Header class in SPIR-V HTML spec has changed. Update script to reflect that.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D120179
Arjun P [Tue, 22 Feb 2022 08:48:55 +0000 (08:48 +0000)]
[MLIR][Presburger] rename get*LexMin -> find*LexMin
This reflects the fact that we are performing some non-trivial computations
here. Also, this is more uniform in line with findIntegerSample.
Max Kazantsev [Tue, 22 Feb 2022 09:54:27 +0000 (16:54 +0700)]
[SCEV] Do not erase LoopUsers. PR53969
This patch fixes a logical error in how we work with `LoopUsers` map.
It maps a loop onto a set of AddRecs that depend on it. The Addrecs
are added to this map only once when they are created and put to
the UniqueSCEVs` map.
The only purpose of this map is to make sure that, whenever we forget
a loop, all (directly or indirectly) dependent SCEVs get forgotten too.
Current code erases SCEVs from dependent set of a given loop whenever
we forget this loop. This is not a correct behavior due to the following scenario:
1. We have a loop `L` and an AddRec `AR` that depends on it;
2. We modify something in the loop, but don't destroy it. We still call forgetLoop on it;
3. `AR` is no longer dependent on `L` according to `LoopUsers`. It is erased from
ValueExprMap` and `ExprValue map, but still exists in UniqueSCEVs;
4. We can later request the very same AddRec for the very same loop again, and get existing
SCEV `AR`.
5. Now, `AR` exists and is used again, but its notion that it depends on `L` is lost;
6. Then we decide to delete `L`. `AR` will not be forgotten because we have lost it;
7. Just you wait when you run into a dangling pointer problem, or any other kind of problem
because an active SCEV is now referecing a non-existent loop.
The solution to this is to stop erasing values from `LoopUsers`. Yes, we will maybe forget something
that is already not used, but it's cheap.
This fixes a functional bug and potentially may have negative compile time impact on methods with
huge or numerous loops.
Differential Revision: https://reviews.llvm.org/D120303
Reviewed By: nikic
Sven van Haastregt [Tue, 22 Feb 2022 10:15:40 +0000 (10:15 +0000)]
[OpenCL] opencl-c.h: use uint/ulong consistently
Most places already seem to use the short spelling instead of
'unsigned int/long', so perform the following substitutions:
s/unsigned int /uint /g
s/unsigned long /ulong /g
This simplifies completeness comparisons against OpenCLBuiltins.td.
Differential Revision: https://reviews.llvm.org/D120032
Jay Foad [Tue, 22 Feb 2022 09:40:05 +0000 (09:40 +0000)]
[StructurizeCFG] Precommit test case for D120312
Iain Sandoe [Mon, 29 Nov 2021 08:05:56 +0000 (08:05 +0000)]
[C++20][Modules][2/8] Add enumerations for partition modules and stream them.
This is an initial enabling patch for module partition support.
We add enumerations for partition interfaces/implementations.
This means that the module kind enumeration now occupies three
bits, so the AST streamer is adjusted for this. Adding one bit there
seems preferable to trying to overload the meanings of existing
kinds (and we will also want to add a C++20 header unit case later).
Differential Revision: https://reviews.llvm.org/D114714
Sunho Kim [Tue, 22 Feb 2022 09:59:36 +0000 (09:59 +0000)]
[AARCH64][DAGCombine] Add combine for negation of CSEL absolute value pattern.
This folds a negation through a csel, which can come up during the
lowering of negative abs.
Fixes https://github.com/llvm/llvm-project/issues/51558.
Differential Revision: https://reviews.llvm.org/D112204
David Spickett [Thu, 17 Feb 2022 11:57:26 +0000 (11:57 +0000)]
[libcxx][ci] Switch to CMAKE_CXX_COMPILER_TARGET for Arm bots
As suggested by the cmake warning:
CMake Warning at <...>/llvm-project/libcxx-ci/libcxx/CMakeLists.txt:289 (message):
LIBCXX_TARGET_TRIPLE is deprecated, please use CMAKE_CXX_COMPILER_TARGET instead
Depends on D119948
Differential Revision: https://reviews.llvm.org/D120038
David Spickett [Wed, 16 Feb 2022 15:47:16 +0000 (15:47 +0000)]
[libcxx][CI] Set Arm triples to match native clang build's default
We were using:
armv8-linux-gnueabihf
But for a native clang build the default target is:
armv8l-linux-gnueabihf
(ditto for v7)
Add the "l" to the target triples and update the one test
that is unsupported to look for the various possible names.
armv(7 or 8)(m or l, optionally)
The UNSUPPORTED does not include aarch64 because aarch64 Linux
(and others that follow Arm's AAPCS64) use quad precision for
long double where arm64 (darwin) does not:
https://developer.apple.com/documentation/xcode/writing-arm64-code-for-apple-platforms
https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#811arithmetic-types
Reviewed By: rovka
Differential Revision: https://reviews.llvm.org/D119948
David Sherwood [Tue, 22 Feb 2022 09:36:52 +0000 (09:36 +0000)]
Sunho Kim [Tue, 22 Feb 2022 09:26:47 +0000 (09:26 +0000)]
[NFC][AARCH64] Add test cases for negation of select
Add tests to demonstrate new dag combine pattern.
Differential Revision: https://reviews.llvm.org/D120214
David Sherwood [Mon, 21 Feb 2022 10:38:08 +0000 (10:38 +0000)]
[InstCombine] Bail out of load-store forwarding for scalable vector types
This patch fixes an invalid TypeSize->uint64_t implicit conversion in
FoldReinterpretLoadFromConst. If the size of the constant is scalable
we bail out of the optimisation for now.
Tests added here:
Transforms/InstCombine/load-store-forward.ll
Differential Revision: https://reviews.llvm.org/D120240
tyb0807 [Thu, 3 Feb 2022 22:30:41 +0000 (22:30 +0000)]
[ARM][AArch64] Add missing v8.x checks
Summary:
This patch adds checks that were missing in clang for Armv8.5/6/7-A. These include:
* ACLE macro defines for AArch32.
* Handling of crypto and SM4, SHA and AES feature flags on clang's driver.
Reviewers: dmgreen, SjoerdMeijer, tmatheson
Differential Revision: https://reviews.llvm.org/D116153
Nikita Popov [Tue, 22 Feb 2022 08:53:32 +0000 (09:53 +0100)]
[GlobalStatus] Keep Visited set in isSafeToDestroyConstant()
Constants cannot be cyclic, but they can be tree-like. Keep a
visited set to ensure we do not degenerate to exponential run-time.
This fixes the problem reported in https://reviews.llvm.org/D117223#3335482,
though I haven't been able to construct a concise test case for
the issue. This requires a combination of dead constants and the
kind of constant expression tree that textual IR cannot represent
(because the textual representation, unlike the in-memory
representation, is also exponential in size).
Sam McCall [Mon, 21 Feb 2022 21:42:35 +0000 (22:42 +0100)]
[Format] Remove unused LineContainsContinuedForLoopSection. NFC
Differential Revision: https://reviews.llvm.org/D120282
Matthias Springer [Tue, 22 Feb 2022 08:39:04 +0000 (17:39 +0900)]
[mlir][bufferize] Do not assert destination passing style for non-bufferizable ops
Matthias Springer [Tue, 22 Feb 2022 08:14:03 +0000 (17:14 +0900)]
[mlir][bufferize][NFC] Rename `comprehensive-function-bufferize` to `one-shot-bufferize`
The related functionality is moved over to the bufferization dialect. Test cases are cleaned up a bit.
Differential Revision: https://reviews.llvm.org/D120191
jacquesguan [Wed, 19 Jan 2022 07:32:06 +0000 (15:32 +0800)]
[RISCV] Add patterns for vector widening integer reduction instructions
Add patterns for vector widening integer reduction instructions.
Differential Revision: https://reviews.llvm.org/D117643
Brad Smith [Tue, 22 Feb 2022 05:20:46 +0000 (00:20 -0500)]
[Driver][OpenBSD] Add comments for C++ tests
Brad Smith [Tue, 22 Feb 2022 04:44:18 +0000 (23:44 -0500)]
[Driver][OpenBSD] Test tweaking and clean up
owenca [Tue, 8 Feb 2022 06:58:50 +0000 (22:58 -0800)]
[clang-format] Add option to insert braces after control statements
Adds a new option InsertBraces to insert the optional braces after
if, else, for, while, and do in C++.
Differential Revision: https://reviews.llvm.org/D120217
Brad Smith [Tue, 22 Feb 2022 04:11:13 +0000 (23:11 -0500)]
[Driver][OpenBSD] Pass sysroot to the linker
Tanya Lattner [Tue, 22 Feb 2022 02:58:48 +0000 (18:58 -0800)]
Update references to the mailing lists that have moved to Discourse.
Shafik Yaghmour [Tue, 22 Feb 2022 02:46:12 +0000 (18:46 -0800)]
[LLDB] Remove recursive include of GDBRemoteCommunicationServerCommon.h
GDBRemoteCommunicationServerCommon.h includes itself, removing this include.
Differential Revision: https://reviews.llvm.org/D120105
Joseph Huber [Mon, 21 Feb 2022 17:40:16 +0000 (12:40 -0500)]
[OpenMP] Ensure offloading sections do not have SHF_ALLOC flag
We use offloading sections in the new Clang driver scheme to embed
device code into the host. We later use these sections to link the
device image, after which point they are completely unused and should
not be loaded into memory if they are still in the executable.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D120275
Lian Wang [Tue, 22 Feb 2022 02:20:32 +0000 (02:20 +0000)]
[RISCV] Add more tests for SHLFI and UNSHFLI aliaes in Zbp extension
RV32/RV64:
zip.n/zip2.b/zip.b/zip4.h/zip2.h/zip.h
unzip.n/unzip2.b/unzip.b/unzip4.h/unzip2.h/unzip.h
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D120241
Jessica Paquette [Wed, 16 Feb 2022 20:50:31 +0000 (12:50 -0800)]
[MachineOutliner][AArch64] NFC: Split MBBs into "outlinable ranges"
We found a case in the Swift benchmarks where the MachineOutliner introduces
about a 20% compile time overhead in comparison to building without the
MachineOutliner.
The origin of this slowdown is that the benchmark has long blocks which incur
lots of LRU checks for lots of candidates.
Imagine a case like this:
```
bb:
i1
i2
i3
...
i123456
```
Now imagine that all of the outlining candidates appear early in the block, and
that something like, say, NZCV is defined at the end of the block.
The outliner has to check liveness for certain registers across all candidates,
because outlining from areas where those registers are used is unsafe at call
boundaries.
This is fairly wasteful because in the previously-described case, the outlining
candidates will never appear in an area where those registers are live.
To avoid this, precalculate areas where we will consider outlining from.
Anything outside of these areas is mapped to illegal and not included in the
outlining search space. This allows us to reduce the size of the outliner's
suffix tree as well, giving us a potential memory win.
By precalculating areas, we can also optimize other checks too, like whether
or not LR is live across an outlining candidate.
Doing all of this is about a 16% compile time improvement on the case.
This is likely useful for other targets (e.g. ARM + RISCV) as well, but for now,
this only implements the AArch64 path. The original "is the MBB safe" method
still works as before.
Stanislav Mekhanoshin [Mon, 21 Feb 2022 19:22:11 +0000 (11:22 -0800)]
[AMDGPU] Remove redundand check in the SILoadStoreOptimizer
Differential Revision: https://reviews.llvm.org/D120268
Zakk Chen [Mon, 21 Feb 2022 22:31:14 +0000 (14:31 -0800)]
[RISCV] Optimize tail agnostic vmv.s.x which don't need to select tail value.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D120250
Michael Gottesman [Mon, 21 Feb 2022 20:07:31 +0000 (12:07 -0800)]
[move-function] Make test more generally by removing unneeded line.
Otherwise this is can be sensitive in the face of changes in register names.
I also gardened the test case a little to make it look a little nicer.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D120276
Vang Thao [Mon, 21 Feb 2022 22:14:25 +0000 (14:14 -0800)]
[AMDGPU] Regenerate tests to include -NEXT. NFC.
LLVM GN Syncbot [Mon, 21 Feb 2022 22:08:44 +0000 (22:08 +0000)]
[gn build] Port
68f4131c94d4
Nikolas Klauser [Mon, 21 Feb 2022 22:07:02 +0000 (23:07 +0100)]
[libc++][ranges] Add ranges::in_found_result
Reviewed By: Quuxplusone, #libc
Spies: libcxx-commits, mgorny
Differential Revision: https://reviews.llvm.org/D119763
Nikolas Klauser [Mon, 21 Feb 2022 21:56:14 +0000 (22:56 +0100)]
[libc++] Replace [[no_unique_addredd]] with _LIBCPP_NO_UNIQUE_ADDRESS in __algorithm/min_max_result.h
LLVM GN Syncbot [Mon, 21 Feb 2022 21:52:37 +0000 (21:52 +0000)]
[gn build] Port
807766be3a89
Nikolas Klauser [Mon, 21 Feb 2022 21:48:36 +0000 (22:48 +0100)]
[libc++][ranges] Add ranges::min_max_result
Reviewed By: Quuxplusone, #libc
Spies: libcxx-commits, mgorny
Differential Revision: https://reviews.llvm.org/D119751
Sanjay Patel [Mon, 21 Feb 2022 20:19:23 +0000 (15:19 -0500)]
[x86] add tests for rmw add with cmov; NFC
Petr Hosek [Mon, 21 Feb 2022 21:23:39 +0000 (13:23 -0800)]
[CMake][Fuchsia] Disable assertions and analyzer for stage 1
We don't need these in the first stage compiler and disabling these
helps a bit with the compile time and runtime performance.
Differential Revision: https://reviews.llvm.org/D120280
Groverkss [Mon, 21 Feb 2022 20:57:26 +0000 (02:27 +0530)]
[MLIR][Presburger] Add support for IntegerRelation
This patch adds a class to represent a relation in Presburger Library.
This patch only adds the skeleton class. Functionality from IntegerPolyhedron
will be moved to IntegerRelation in later patches to make it easier to review.
This patch is a part of a series of patches adding support for relations in
Presburger Library.
Reviewed By: arjunp
Differential Revision: https://reviews.llvm.org/D120156
Martin Storsjö [Thu, 13 Jan 2022 10:28:41 +0000 (10:28 +0000)]
[libcxx] [test] Fix the thousands_sep expectation for fr_FR locales on Windows
Windows uses U+00A0 NO-BREAK SPACE as thousands separator in the
fr_FR locale.
Differential Revision: https://reviews.llvm.org/D120090
Martin Storsjö [Tue, 18 Jan 2022 09:33:08 +0000 (09:33 +0000)]
[libcxx] [test] Fix moneypunct grouping tests on Windows
For grouping strings, "\3" and "\3\3" are equivalent.
Differential Revision: https://reviews.llvm.org/D120091
Arjun P [Mon, 21 Feb 2022 19:04:12 +0000 (19:04 +0000)]
[MLIR][Presburger] Support finding integer lexmin in IntegerPolyhedron
Note: this does not yet support PrebsurgerSets.
Reviewed By: Groverkss
Differential Revision: https://reviews.llvm.org/D120239
Paweł Bylica [Mon, 21 Feb 2022 19:27:47 +0000 (20:27 +0100)]
[NFC][DAGCombine] Use isOperandOf() in combineCarryDiamond
Pre-commit for https://reviews.llvm.org/D118362.
George Koehler [Mon, 21 Feb 2022 20:15:53 +0000 (15:15 -0500)]
[libunwind] Further fix for 32-bit PowerPC processors without AltiVec
https://reviews.llvm.org/D91906 did most of the work necessary to fix libunwind on
32-bit PowerPC processors without AltiVec, but there was one more piece necessary.
Reviewed By: luporl
Differential Revision: https://reviews.llvm.org/D120197
Alexey Bataev [Fri, 26 Mar 2021 19:43:25 +0000 (12:43 -0700)]
[OPENMP]Fix PR49366: crash on VLAs in task untied regions.
We need to capture the local variables into a record in task untied
regions but clang does not support record with VLA data members.
Differential Revision: https://reviews.llvm.org/D99436
Craig Topper [Mon, 21 Feb 2022 19:52:57 +0000 (11:52 -0800)]
[RISCV] Teach shouldSinkOperands to sink splat operands of vp.fma intrinsics.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D120167
Kristof Beyls [Wed, 16 Feb 2022 13:53:18 +0000 (14:53 +0100)]
Create office hours documentation.
Differential Revision: https://reviews.llvm.org/D120036
Shilei Tian [Mon, 21 Feb 2022 16:47:02 +0000 (11:47 -0500)]
[Clang][OpenMP] Add Sema support for atomic compare capture
This patch adds Sema support for `atomic compare capture`.
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D120200
Casey Carter [Wed, 29 Dec 2021 22:26:30 +0000 (14:26 -0800)]
[libcxx][test] array and basic_string_view iterators are not portably pointers
Fixup tests that believe them to be so. Most notably including some heavy refactoring in `std/iterators/iterator.primitives/iterator.traits/cxx20_iterator_traits.compile.pass.cpp`, which now detects pointers and validates that `iterator_concept` is present only for pointers.
Differential Revision: https://reviews.llvm.org/D117368
Nico Weber [Mon, 21 Feb 2022 18:29:37 +0000 (13:29 -0500)]
Revert "[ArgPromotion] Regenerate test checks for crash.ll - removed ALL_NEWPM prefix."
This reverts commit
52577cd26f26f6428c72395e7337af3fc84bc6f6.
Breaks check-llvm, see comments on https://reviews.llvm.org/D120207
Benjamin Kramer [Mon, 21 Feb 2022 17:37:19 +0000 (18:37 +0100)]
[MLIR][PDL] Fix C++20 build. concept is a new keyword. NFC.
Florian Hahn [Mon, 21 Feb 2022 16:54:02 +0000 (16:54 +0000)]
[MemCpyOpt] Check all access for MemoryUses in writtenBetween.
Currently writtenBetween can miss clobbers of Loc between End and Start,
if End is a MemoryUse.
To guarantee we see all write clobbers of Loc between Start and End
for MemoryUses, restrict to Start and End being in the same block
and check all accesses between them.
This fixes 2 mis-compiles illustrated in
llvm/test/Transforms/MemCpyOpt/memcpy-byval-forwarding-clobbers.ll
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D119929
Shilei Tian [Mon, 21 Feb 2022 16:40:01 +0000 (11:40 -0500)]
[Clang][OpenMP] Fix wrong form of 'cond-update-stmt' in atomic_ast_print.cpp
In `clang/test/OpenMP/atomic_ast_print.cpp` for `atomic compare capture`,
it was using 'cond-expr-stmt' instead of 'cond-update-stmt'. The spec only supports
'cond-update-stmt'.
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D120252
David Green [Mon, 21 Feb 2022 16:24:58 +0000 (16:24 +0000)]
[ARM] Addition SSAT/USAT tests for min/max patterns. NFC
Valery Pykhtin [Sun, 20 Feb 2022 12:15:31 +0000 (15:15 +0300)]
[ArgPromotion] Regenerate test checks for crash.ll - removed ALL_NEWPM prefix.
Rename %tmp => %temp IR values to avoid update warning.
Reviewed by Nikita Popov
Differential revision: https://reviews.llvm.org/D120207
fuzzypixelz [Mon, 21 Feb 2022 15:53:27 +0000 (07:53 -0800)]
[MLIR] replace C++ function type defintion in the C API's Interfaces.h
Clearly this something of a typo, and it obviously doesn't even compile.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D120247
David Green [Mon, 21 Feb 2022 15:44:30 +0000 (15:44 +0000)]
[AArch64] Alter mull shuffle(ext(..)) combine to work on buildvectors
We have a combine for converting mul(dup(ext(..)), ...) into
mul(ext(dup(..)), ..), for allowing more uses of smull and umull
instructions. Currently it looks for vector insert and shuffle vectors
to detect the element that we can convert to a vector extend. Not all
cases will have a shufflevector/insert element though.
This started by extending the recognition to buildvectors (with elements
that may be individually extended). The new method seems to cover all
the cases that the old method captured though, as the shuffle will
eventually be lowered to buildvectors, so the old method has been
removed to keep the code a little simpler. The new code detects legal
build_vector(ext(a), ext(b), ..), converting them to ext(build_vector(a,
b, ..)) providing all the extends/types match up.
Differential Revision: https://reviews.llvm.org/D120018
Matt Arsenault [Fri, 18 Feb 2022 21:22:20 +0000 (16:22 -0500)]
MIR: Start diagnosing too many operands on an instruction
Previously this would just assert which was annoying and didn't point
to the specific instruction/operand.
Sanjay Patel [Mon, 21 Feb 2022 14:26:07 +0000 (09:26 -0500)]
[InstSimplify] add tests for funnel shift with redundant shift; NFC
Sanjay Patel [Mon, 21 Feb 2022 14:07:59 +0000 (09:07 -0500)]
[AArch64][RISCV][x86] add tests for funnel shift with shift logic; NFC
Sven van Haastregt [Mon, 21 Feb 2022 13:55:29 +0000 (13:55 +0000)]
Fix llvm-objcopy shared lib build
Fix after
ddf528b7a092 ("[llvm-objcopy][COFF] Fix section name
encoding", 2022-02-21) caused "undefined reference to
`llvm::COFF::encodeSectionName" failures.
Simon Pilgrim [Mon, 21 Feb 2022 13:44:36 +0000 (13:44 +0000)]
[X86] use-cr-result-of-dom-icmp-st.ll - add checks without -cgp-icmp-eq2icmp-st flag
Shilei Tian [Mon, 21 Feb 2022 13:20:26 +0000 (08:20 -0500)]
[Clang][Sema] Check unexpected else statement in cond-update-stmt
In 'cond-update-stmt', `else` statement is not expected. This patch adds
the check in Sema.
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D120225
Max Kazantsev [Mon, 21 Feb 2022 13:10:42 +0000 (20:10 +0700)]
[SCEV][NFC] Replace contains+insert check with insert.second
Simon Pilgrim [Mon, 21 Feb 2022 13:07:51 +0000 (13:07 +0000)]
[DAG] visitBSWAP - pull out repeated SDLoc. NFC
Cleanup for D120192
Kito Cheng [Mon, 21 Feb 2022 12:43:40 +0000 (20:43 +0800)]
[NFC][RISCV] Fix path checking issue if default sysroot is given
Sam McCall [Fri, 11 Feb 2022 11:09:57 +0000 (12:09 +0100)]
[clangd] Treat 'auto' params as deduced if there's a single instantiation.
This makes hover/go-to-definition/expand-auto etc work for auto params in many
common cases.
This includes when a generic lambda is passed to a function accepting
std::function. (The tests don't use this case, it requires a lot of setup).
Note that this doesn't affect the AST of the function body itself, cause its
nodes not to be dependent, improve code completion etc.
(These sort of improvements seem possible, in a similar "if there's a single
instantiation, traverse it instead of the primary template" way).
Fixes https://github.com/clangd/clangd/issues/493
Fixes https://github.com/clangd/clangd/issues/1015
Differential Revision: https://reviews.llvm.org/D119537
Tom Stellard [Mon, 21 Feb 2022 12:02:55 +0000 (04:02 -0800)]
issue-subscriber: Fix handling of labels with spaces
Fixes #53288
Reviewed By: mehdi_amini, asl, Quuxplusone
Differential Revision: https://reviews.llvm.org/D117745
Alex Zinenko [Wed, 19 Jan 2022 12:43:24 +0000 (13:43 +0100)]
[mlir] Annotate methods on a correct class in PybindAdaptors.h
The `.def` and `.def_property_readonly` functions in PybindAdaptors.h should
construct the functions as method of the current class rather than as method of
pybind11:none(), which is an object and not even a class.
Depends On D117658
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D117659
LLVM GN Syncbot [Mon, 21 Feb 2022 11:51:36 +0000 (11:51 +0000)]
[gn build] Port
85f4023e731c
Nicolas Miller [Sat, 19 Feb 2022 18:28:38 +0000 (20:28 +0200)]
[llvm-objcopy][COFF] Fix section name encoding
The section name encoding for `llvm-objcopy` had two main issues, the
first is that the size used for the `snprintf` in the original code is
incorrect because `snprintf` adds a null byte, so this code was only
able to encode offsets of 6 digits - `/`, `\0` and 6 digits of the
offset - rather than the 7 digits it should support.
And the second part is that it didn't support the base64 encoding for
offsets larger than 7 digits.
This issue specifically showed up when using the `clang-offload-bundler`
with a binary containing a lot of symbols/sections, since it uses
`llvm-objcopy` to add the sections containing the offload code.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D118692
Nicolas Miller [Sat, 19 Feb 2022 18:29:08 +0000 (20:29 +0200)]
[COFF] Move section name encoding into BinaryFormat
Large COFF section names are moved into the string table and the
section header field is the offset into the string table encoded in
ASCII for offset smaller than 7 digits and in base64 for larger
offsets.
The operation of taking the string table offsets is done in a few
places in the codebase, so it is helpful to move this operation into
`BinaryFormat` so that it can be shared everywhere it's done.
So this patch takes the implementation of this operation from
`llvm/lib/MC/WinCOFFObjectWriter.cpp` and moves it into `BinaryFormat`.
Reviewed By: jhenderson, rnk
Differential Revision: https://reviews.llvm.org/D118793
Max Kazantsev [Mon, 21 Feb 2022 11:39:04 +0000 (18:39 +0700)]
[Test] Move test for PR53969 to LoopDeletion folder where it truly belongs
Sven van Haastregt [Mon, 21 Feb 2022 11:29:10 +0000 (11:29 +0000)]
[OpenCL] opencl-c.h: remove arg names from atomics; NFC
This simplifies completeness comparisons against OpenCLBuiltins.td and
also makes the header no longer "claim" the identifiers "success",
"failure", "desired", "value".
Differential Revision: https://reviews.llvm.org/D119560
Florian Hahn [Mon, 21 Feb 2022 10:52:09 +0000 (10:52 +0000)]
Revert "[AArch64][GlobalISel] Optimize conjunctions of compares to conditional compares."
This reverts commit
2a46450849de6904fc64f9a65303b20ca7fc9dbd.
This triggers the following assertion in an internal project:
Assertion failed: (VRegInfo[Reg.id()].first.is<const TargetRegisterClass
*>() && "Register class not set, wrong accessor"), function getRegClass,
file MachineRegisterInfo.h, line 646.
I'll work with the author directly to get a reproducer.
Jay Foad [Fri, 28 Jan 2022 13:49:12 +0000 (13:49 +0000)]
[AMDGPU] SILoadStoreOptimizer: avoid unbounded register pressure increases
Previously when combining two loads this pass would sink the
first one down to the second one, putting the combined load
where the second one was. It would also sink any intervening
instructions which depended on the first load down to just
after the combined load.
For example, if we started with this sequence of
instructions (code flowing from left to right):
X A B C D E F Y
After combining loads X and Y into XY we might end up with:
A B C D E F XY
But if B D and F depended on X, we would get:
A C E XY B D F
Now if the original code had some short disjoint live ranges
from A to B, C to D and E to F, in the transformed code
these live ranges will be long and overlapping. In this way
a single merge of two loads could cause an unbounded
increase in register pressure.
To fix this, change the way the way that loads are moved in
order to merge them so that:
- The second load is moved up to the first one. (But when
merging stores, we still move the first store down to the
second one.)
- Intervening instructions are never moved.
- Instead, if we find an intervening instruction that would
need to be moved, give up on the merge. But this case
should now be pretty rare because normal stores have no
outputs, and normal loads only have address register
inputs, but these will be identical for any pair of loads
that we try to merge.
As well as fixing the unbounded register pressure increase
problem, moving loads up and stores down seems like it
should usually be a win for memory latency reasons.
Differential Revision: https://reviews.llvm.org/D119006
Max Kazantsev [Mon, 21 Feb 2022 10:48:08 +0000 (17:48 +0700)]
[Test] Add failing test for PR53969
Benjamin Kramer [Mon, 21 Feb 2022 10:43:40 +0000 (11:43 +0100)]
Increase the limit on parser diagnostics
We're really close to the limit
$ grep -c DIAG tools/clang/include/clang/Basic/DiagnosticParseKinds.inc
598
Jay Foad [Fri, 18 Feb 2022 11:55:09 +0000 (11:55 +0000)]
[StableHashing] Hash vregs with multiple defs
This allows stableHashValue to be used on Machine IR that is
not in SSA form.
Differential Revision: https://reviews.llvm.org/D120121
Rainer Orth [Mon, 21 Feb 2022 10:23:15 +0000 (11:23 +0100)]
[DebugInfo][test] XFAIL DebugInfo/Generic/no-empty-child-vars.ll on SPARC
`DebugInfo/Generic/no-empty-child-vars.ll` `FAIL`s on SPARC. As discussed
in D95617 <https://reviews.llvm.org/D95617>, this is yet another instance
of Issue #46473.
As was done for other failures due to this bug, this patch `XFAIL`s the test.
Tested on `sparcv9-sun-solaris2.11`.
Differential Revision: https://reviews.llvm.org/D120238
Lian Wang [Mon, 21 Feb 2022 09:58:55 +0000 (09:58 +0000)]
[RISCV] Add tests for SHFLI and UNSHFLI aliases in Zbp extension
Supplement tests alias of SHFLI and UNSHFLI instructions.
RV32: zip8/zip4/zip2/unzip8/unzip4/unzip2
RV64: zip8.w/zip4.w/zip2.w/zip.w/zip8/zip4/zip2/zip/
unzip8.w/unzip4.w/unzip2.w/unzip.w/unzip8/unzip4/unzip2/unzip
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D120015
Simon Moll [Mon, 21 Feb 2022 09:37:47 +0000 (10:37 +0100)]
[VE] v512i1 mask arithmetic isel
Packed vector and mask registers (v512) are composed of two v256
subregisters that occupy the even and odd element positions. We add
packing support SDNodes (vec_unpack_lo|hi and vec_pack) and splitting of
v512i1 mask arithmetic ops with those.
Reviewed By: kaz7
Differential Revision: https://reviews.llvm.org/D120053
Iain Sandoe [Thu, 11 Feb 2021 00:15:56 +0000 (00:15 +0000)]
[C++20][Modules][1/8] Track valid import state.
In C++20 modules imports must be together and at the start of the module.
Rather than growing more ad-hoc flags to test state, this keeps track of the
phase of of a valid module TU (first decl, global module frag, module,
private module frag). If the phasing is broken (with some diagnostic) the
pattern does not conform to a valid C++20 module, and we set the state
accordingly.
We can thus issue diagnostics when imports appear in the wrong places and
decouple the C++20 modules state from other module variants (modules-ts and
clang modules). Additionally, we attempt to diagnose wrong imports before
trying to find the module where possible (the latter will generally emit an
unhelpful diagnostic about the module not being available).
Although this generally simplifies the handling of C++20 module import
diagnostics, the motivation was that, in particular, it allows detecting
invalid imports like:
import module A;
int some_decl();
import module B;
where being in a module purview is insufficient to identify them.
Differential Revision: https://reviews.llvm.org/D118893
Fangrui Song [Mon, 21 Feb 2022 08:39:26 +0000 (00:39 -0800)]
[ELF] Replace uncompressed InputSectionBase::data() with rawData. NFC
In many call sites we know uncompression cannot happen (non-SHF_ALLOC, or the
data (even if compressed) must have been uncompressed by a previous pass).
Prefer rawData in these cases. data() increases code size and prevents
optimization on rawData.
Matthias Springer [Mon, 21 Feb 2022 08:13:13 +0000 (17:13 +0900)]
[mlir][linalg][bufferize][NFC] Move interface impl to Linalg Transforms
This is for consistency with other dialects.
Differential Revision: https://reviews.llvm.org/D120190
Prateek Gupta [Thu, 3 Feb 2022 15:55:30 +0000 (15:55 +0000)]
[MLIR][LINALG] Add canonicalization pattern in `linalg.generic` op for static shape inference.
This commit adds canonicalization pattern in `linalg.generic` op
for static shape inference. If any of the inputs or outputs have
static shape or is casted from a tensor of static shape, then
shapes of all the inputs and outputs can be inferred by using the
affine map of the static shape input/output.
Signed-Off-By: Prateek Gupta <prateek@nod-labs.com>
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D118929
Shraiysh Vaishay [Mon, 21 Feb 2022 07:20:58 +0000 (12:50 +0530)]
[mlir][OpenMP] Added assemblyFormat for SectionsOp
This patch adds assemblyFormat for omp.sections operation.
Some existing functions have been altered to fit the custom directive
in assemblyFormat. This has led to their callsites to get modified too,
but those will be removed in later patches, when other operations get
their assemblyFormat. All operations were not changed in one patch for
ease of review.
Reviewed By: Mogball
Differential Revision: https://reviews.llvm.org/D120176
Kito Cheng [Mon, 21 Feb 2022 06:06:19 +0000 (14:06 +0800)]
[RISCV] Fix the include search path order between sysroot and resource folder (Recommit again)
Resource folder[1] should include before sysroot[2] in general (Linux clang
toolchain, BareMetal clang toolchain, and GCC using that order), and that
prevent sysroot's header file override resource folder's one, this change is
reference from BareMetal::AddClangSystemIncludeArgs@BareMetal.cpp[3].
And also fix the behavior of `-nobuiltininc`.
[1] Include path from resource folder is something like this: `<toolchain-path>/lib/clang/13.0.0/include/`
[2] Include path from sysroot is something like this: `<toolchain-path>/riscv32-unknown-elf/include`
[3] https://github.com/llvm/llvm-project/blob/llvmorg-13.0.1/clang/lib/Driver/ToolChains/BareMetal.cpp#L193
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D119837
The recommit fixes the Windows build failure due to path issue.
Kito Cheng [Mon, 21 Feb 2022 06:56:50 +0000 (14:56 +0800)]
Revert "[RISCV] Fix the include search path order between sysroot and resource folder (Recommit)"
This reverts commit
47b1fa5fc48821eefefd157ed4af2f2cf3bacef4.
Craig Topper [Mon, 21 Feb 2022 06:35:30 +0000 (22:35 -0800)]
[ARM] Remove unused lowerABS function. NFC
This function was added in D49837, but no setOperationAction call
was added with it. The code is equivalent to what is done by the
default ExpandIntRes_ABS implementation when ADDCARRY is supported.
Test case added to verify this. There was some existing coverage
from Thumb2 MVE tests, but they started from vectors.
Kito Cheng [Mon, 21 Feb 2022 06:06:19 +0000 (14:06 +0800)]
[RISCV] Fix the include search path order between sysroot and resource folder (Recommit)
Resource folder[1] should include before sysroot[2] in general (Linux clang
toolchain, BareMetal clang toolchain, and GCC using that order), and that
prevent sysroot's header file override resource folder's one, this change is
reference from BareMetal::AddClangSystemIncludeArgs@BareMetal.cpp[3].
And also fix the behavior of `-nobuiltininc`.
[1] Include path from resource folder is something like this: `<toolchain-path>/lib/clang/13.0.0/include/`
[2] Include path from sysroot is something like this: `<toolchain-path>/riscv32-unknown-elf/include`
[3] https://github.com/llvm/llvm-project/blob/llvmorg-13.0.1/clang/lib/Driver/ToolChains/BareMetal.cpp#L193
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D119837
The recommit fixes the Windows build failure due to path issue.
Kito Cheng [Mon, 21 Feb 2022 06:25:49 +0000 (14:25 +0800)]
Revert "[RISCV] Fix the include search path order between sysroot and resource folder"
This reverts commit
079d13668bf1b7f929f1897af90f64caae41c81d.
Kito Cheng [Mon, 21 Feb 2022 06:06:19 +0000 (14:06 +0800)]
[RISCV] Fix the include search path order between sysroot and resource folder
Resource folder[1] should include before sysroot[2] in general (Linux clang
toolchain, BareMetal clang toolchain, and GCC using that order), and that
prevent sysroot's header file override resource folder's one, this change is
reference from BareMetal::AddClangSystemIncludeArgs@BareMetal.cpp[3].
And also fix the behavior of `-nobuiltininc`.
[1] Include path from resource folder is something like this: `<toolchain-path>/lib/clang/13.0.0/include/`
[2] Include path from sysroot is something like this: `<toolchain-path>/riscv32-unknown-elf/include`
[3] https://github.com/llvm/llvm-project/blob/llvmorg-13.0.1/clang/lib/Driver/ToolChains/BareMetal.cpp#L193
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D119837
Craig Topper [Mon, 21 Feb 2022 05:11:21 +0000 (21:11 -0800)]
[SelectionDAG][RISCV][ARM][PowerPC][X86][WebAssembly] Change default abs expansion to use sra (X, size(X)-1); sub (xor (X, Y), Y).
Previous we used sra (X, size(X)-1); xor (add (X, Y), Y).
By placing sub at the end, we allow RISCV to combine sign_extend_inreg
with it to form subw.
Some X86 tests for Z - abs(X) seem to have improved as well.
Other targets look to be a wash.
I had to modify ARM's abs matching code to match from sub instead of
xor. Maybe instead ISD::ABS should be made legal. I'll try that in
parallel to this patch.
This is an alternative to D119099 which was focused on RISCV only.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D119171
Serguei Katkov [Fri, 18 Feb 2022 11:10:14 +0000 (18:10 +0700)]
[STATEPOINT] Mark LR is early-clobber implicit def.
LR is modified at the moment of the call and before any use is read.
Reviewers: reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D120114
esmeyi [Mon, 21 Feb 2022 02:51:10 +0000 (21:51 -0500)]
Reland [XCOFF][llvm-objdump] change the priority of symbols with the same address by symbol types.
Fix the Buildbot failure #19373.
Differential Revision: https://reviews.llvm.org/D117642