Always set DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT correctly

When profiling is disabled force DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT
for each function to one. This information is then preserved
through LTO.

With this patch for LTO builds -pg needs to be set on both the
LTO final link and the original source build, to allow -pg
(or -pg -fentry) to be active for that source file. This allows
to build large projects mostly with -pg, except for a few files,
and still use LTO.

gcc/:

2014-09-15  Andi Kleen  <ak@linux.intel.com>

* function.c (allocate_struct_function): Force
DECL_NO_INSTRUMENT_FUNCTION_ENTRY_EXIT to one when
profiling is disabled.

From-SVN: r215284

pt.c (lookup_template_class_1): Splice out abi_tag attribute if necessary.

* pt.c (lookup_template_class_1): Splice out abi_tag attribute if
necessary.  Call inherit_targ_abi_tags here.
* class.c (check_bases_and_members): Not here.
(inherit_targ_abi_tags): Check CLASS_TYPE_P.
* cp-tree.h: Declare inherit_targ_abi_tags.

From-SVN: r215283

Replace INSN_DELETED_P with rtx_insn member functions

gcc/

* cfgrtl.c, combine.c, config/arc/arc.c, config/mcore/mcore.c,
config/rs6000/rs6000.c, config/sh/sh.c, cprop.c, dwarf2out.c,
emit-rtl.c, final.c, function.c, gcse.c, jump.c, reg-stack.c,
reload1.c, reorg.c, resource.c, sel-sched-ir.c: Replace INSN_DELETED_P
macro with statically checked member functions.
* rtl.h (rtx_insn::deleted): New method.
(rtx_insn::set_deleted): Likewise.
(rtx_insn::set_undeleted): Likewise.
(INSN_DELETED_P): Remove.

From-SVN: r215282

use rtx_insn * more

gcc/ChangeLog:

2014-09-15  Trevor Saunders  <tsaunders@mozilla.com>

* config/mn10300/mn10300.c (mn10300_insert_setlb_lcc): Assign the
result of emit_jump_insn_before to a new variable.
* jump.c (mark_jump_label): Change the type of insn to rtx_insn *.
(mark_jump_label_1): Likewise.
(mark_jump_label_asm): Likewise.
* reload1.c (gen_reload): Change type of tem to rtx_insn *.
* rtl.h (mark_jump_label): Adjust.

From-SVN: r215281

Daily bump.

From-SVN: r215280

re PR fortran/56408 (Fix dependency handling of testsuite/gfortran.dg)

PR fortran/56408
* gfortran.dg/dg.exp (gfortran_test_path, gfortran_aux_module_flags):
New global vars.
(dg-compile-aux-modules): New procedure.
* gfortran.dg/binding_label_tests_10.f03: Remove comment
and keep-modules.
* gfortran.dg/binding_label_tests_10_main.f03: Remove comment,
use dg-compile-aux-modules.
* gfortran.dg/binding_label_tests_11.f03: Remove comment
and keep-modules.
* gfortran.dg/binding_label_tests_11_main.f03: Remove comment,
use dg-compile-aux-modules.
* gfortran.dg/binding_label_tests_13.f03: Remove comment
and keep-modules.
* gfortran.dg/binding_label_tests_13_main.f03: Remove comment,
use dg-compile-aux-modules.
* gfortran.dg/binding_label_tests_26a.f90: Remove comment
and keep-modules.
* gfortran.dg/binding_label_tests_26b.f90: Remove comment,
use dg-compile-aux-modules.
* gfortran.dg/class_45a.f03: Remove keep-modules.
* gfortran.dg/class_45b.f03: Use dg-compile-aux-modules
and cleanup-modules.
* gfortran.dg/class_4a.f03: Use dg-do link, use
dg-additional-sources and cleanup-modules, remove keep-modules
and update comment.
* gfortran.dg/class_4b.f03: Don't compile anywhere, remove
keep-modules, adjust comment.
* gfortran.dg/class_4c.f03: Don't compile anywhere, remove
dg-additional-sources and cleanup-modules.
* gfortran.dg/coarray_29_1.f90: Remove keep-modules and
associated comment.
* gfortran.dg/coarray_29_2.f90: Use dg-compile-aux-modules,
remove comment.
* gfortran.dg/test_common_binding_labels_2.f03: Remove keep-modules.
* gfortran.dg/test_common_binding_labels_2_main.f03: Remove comment,
use dg-compile-aux-modules.
* gfortran.dg/test_common_binding_labels_3.f03: Remove keep-modules.
* gfortran.dg/test_common_binding_labels_3_main.f03: Remove comment,
use dg-compile-aux-modules.
* gfortran.dg/whole_file_28.f90: Remove comment and keep-modules.
* gfortran.dg/whole_file_29.f90: Remove comment, use
dg-compile-aux-modules.
* gfortran.dg/whole_file_30.f90: Remove comment and keep-modules.
* gfortran.dg/whole_file_31.f90: Remove comment, use
dg-compile-aux-modules.

From-SVN: r215275

Do not diagnose lambda default arguments in c++14 modes.

* parser.c (cp_parser_lambda_declarator_opt): Make the pedwarn
conditional.

From-SVN: r215274

Makefile.in (dg_target_exps): Remove.

gcc/
* Makefile.in (dg_target_exps): Remove.
(check_gcc_parallelize): Change to just an upper bound number.
(check-%-subtargets): Always print the non-parallelized goals.
(check_p_vars, check_p_comma, check_p_subwork): Remove.
(check_p_count, check_p_numbers0, check_p_numbers1, check_p_numbers2,
check_p_numbers3, check_p_numbers4, check_p_numbers5,
check_p_numbers6): New variables.
(check_p_numbers): Set to sequence from 1 to 9999.
(check_p_subdirs): Set to sequence from 1 to minimum of
$(check_p_count) and either GCC_TEST_PARALLEL_SLOTS env var if set,
or 128.
(check-%, check-parallel-%): Rewritten so that for parallelized
testing each job runs all the *.exp files, with
GCC_RUNTEST_PARALLELIZE_DIR set in environment.
gcc/go/
* Make-lang.in (check_go_parallelize): Change to just an upper bound
number.
gcc/fortran/
* Make-lang.in (check_gfortran_parallelize): Change to just an upper
bound number.
gcc/cp/
* Make-lang.in (check_g++_parallelize): Change to just an upper bound
number.
gcc/objc/
* Make-lang.in (check_objc_parallelize): Change to just an upper
bound number.
gcc/ada/
* gcc-interface/Make-lang.in (check_acats_numbers0,
check_acats_numbers1, check_acats_numbers2, check_acats_numbers3,
check_acats_numbers4, check_acats_numbers5, check_acats_numbers6,
check_acats_numbers, check_acats_subdirs): New variables.
(check_acats_targets): Use $(check_acats_subdirs).
(check-acats, check-acats%): Rewritten so that for parallelized
testing each job runs all the chapters files, with
GCC_RUNTEST_PARALLELIZE_DIR set in environment.  Prepare the support
directory sequentially and share it.
(check-acats-subtargets): Always print just check-acats.
gcc/testsuite/
* lib/gcc-defs.exp (gcc_parallel_test_run_p,
gcc_parallel_test_enable): New procedures.  If
GCC_RUNTEST_PARALLELIZE_DIR is set in environment, override
runtest_file_p to invoke also gcc_parallel_test_run_p.
* g++.dg/guality/guality.exp (check_guality): Save/restore
test_counts array around the body of the procedure.
* gcc.dg/guality/guality.exp (check_guality): Likewise.
* g++.dg/plugin/plugin.exp: Run all the tests serially
by the first parallel runtest encountering it.
* gcc.dg/plugin/plugin.exp: Likewise.
* gcc.misc-tests/matrix1.exp: Likewise.
* gcc.misc-tests/dhry.exp: Likewise.
* gcc.misc-tests/acker1.exp: Likewise.
* gcc.misc-tests/linkage.exp: Likewise.
* gcc.misc-tests/mg.exp: Likewise.
* gcc.misc-tests/mg-2.exp: Likewise.
* gcc.misc-tests/sort2.exp: Likewise.
* gcc.misc-tests/sieve.exp: Likewise.
* gcc.misc-tests/options.exp: Likewise.
* gcc.misc-tests/help.exp: Likewise.
* go.test/go-test.exp (go-gc-tests): Use
gcc_parallel_test_enable {0, 1} around all handling of
each test.
* objc.dg/gnu-encoding/gnu-encoding.exp: Likewise.
* ada/acats/run_all.sh: Parallelize using mkdir inside of
a shared directory.  Avoid forking and expr uses if
shell supports $(()).
libstdc++-v3/
* testsuite/Makefile.am (check_p_numbers0, check_p_numbers1,
check_p_numbers2, check_p_numbers3, check_p_numbers4,
check_p_numbers5, check_p_numbers6, check_p_numbers,
check_p_subdirs): New variables.
(check_DEJAGNU_normal_targets): Use check_p_subdirs.
(check-DEJAGNU): Rewritten so that for parallelized
testing each job runs all the *.exp files, with
GCC_RUNTEST_PARALLELIZE_DIR set in environment.
* testsuite/Makefile.in: Regenerated.
* testsuite/lib/libstdc++.exp (gcc_parallel_test_run_p,
gcc_parallel_test_enable): New procedures.  If
GCC_RUNTEST_PARALLELIZE_DIR is set in environment, override
runtest_file_p to invoke also gcc_parallel_test_run_p.
* testsuite/libstdc++-abi/abi.exp: Run all the tests serially
by the first parallel runtest encountering it.  Fix up path
of the extract_symvers script.
* testsuite/libstdc++-xmethods/xmethods.exp: Run all the tests
serially by the first parallel runtest encountering it.  Run
dg-finish even in case of error.

From-SVN: r215273

c.opt (Wpsabi): Use LangEnabledBy.

gcc/c-family/ChangeLog:

2014-09-15  Manuel López-Ibáñez  <manu@gcc.gnu.org>

* c.opt (Wpsabi): Use LangEnabledBy.
* c-opts.c (c_common_handle_option): Do not handle here.

From-SVN: r215272

Instruction attributes take an rtx_insn *

gcc/ChangeLog:
* config/arc/arc-protos.h (arc_attr_type): Strengthen param from
rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.
* config/arc/arc.c (arc_print_operand): Use methods of
"final_sequence" for clarity, and to enable strengthening of
locals "jump" and "delay" from rtx to rtx_insn *.
(arc_adjust_insn_length): Strengthen local "prev" from rtx to
rtx_insn *; use method of rtx_sequence for typesafety.
(arc_get_insn_variants): Use insn method of rtx_sequence for
typesafety.
(arc_pad_return): Likewise.
(arc_attr_type): Strengthen param from rtx to rtx_insn *.
(arc_sets_cc_p): Likewise.  Also, convert a GET_CODE check to a
dyn_cast to rtx_sequence *, using insn method for typesafety.
* config/arc/arc.h (ADJUST_INSN_LENGTH): Add checked casts to
rtx_sequence * and use insn method when invoking get_attr_length.
* config/bfin/bfin.c (type_for_anomaly): Strengthen param from rtx
to rtx_insn *.  Replace a GET_CODE check with a dyn_cast to
rtx_sequence *, introducing a local "seq", using its insn method
from typesafety and clarity.
(add_sched_insns_for_speculation): Strengthen local "next" from
rtx to rtx_insn *.
* config/c6x/c6x.c (get_insn_side): Likewise for param "insn".
(predicate_insn): Likewise.
* config/cris/cris-protos.h (cris_notice_update_cc): Likewise for
second param.
* config/cris/cris.c (cris_notice_update_cc): Likewise.
* config/epiphany/epiphany-protos.h
(extern void epiphany_insert_mode_switch_use): Likewise for param
"insn".
(get_attr_sched_use_fpu): Likewise for param.
* config/epiphany/epiphany.c (epiphany_insert_mode_switch_use):
Likewise for param "insn".
* config/epiphany/mode-switch-use.c (insert_uses): Likewise for
param "insn" of "target_insert_mode_switch_use" callback.
* config/frv/frv.c (frv_insn_unit): Likewise for param "insn".
(frv_issues_to_branch_unit_p): Likewise.
(frv_pack_insn_p): Likewise.
(frv_compare_insns): Strengthen locals "insn1" and "insn2" from
const rtx * (i.e. mutable rtx_def * const *) to
rtx_insn * const *.
* config/i386/i386-protos.h (standard_sse_constant_opcode):
Strengthen first param from rtx to rtx_insn *.
(output_fix_trunc): Likewise.
* config/i386/i386.c (standard_sse_constant_opcode): Likewise.
(output_fix_trunc): Likewise.
(core2i7_first_cycle_multipass_filter_ready_try): Likewise for
local "insn".
(min_insn_size): Likewise for param "insn".
(get_mem_group): Likewise.
(is_cmp): Likewise.
(get_insn_path): Likewise.
(get_insn_group): Likewise.
(count_num_restricted): Likewise.
(fits_dispatch_window): Likewise.
(add_insn_window): Likewise.
(add_to_dispatch_window): Likewise.
(debug_insn_dispatch_info_file): Likewise.
* config/m32c/m32c-protos.h (m32c_output_compare): Likewise for
first param.
* config/m32c/m32c.c (m32c_compare_redundant): Likewise for param
"cmp" and local "prev".
(m32c_output_compare): Likewise for param "insn".
* config/m32r/predicates.md (define_predicate "small_insn_p"): Add
a checked cast to rtx_insn * on "op" after we know it's an INSN_P.
(define_predicate "large_insn_p"): Likewise.
* config/m68k/m68k-protos.h (m68k_sched_attr_size): Strengthen
param from rtx to rtx_insn *.
(attr_op_mem m68k_sched_attr_op_mem): Likewise.
* config/m68k/m68k.c (sched_get_attr_size_int): Likewise.
(m68k_sched_attr_size): Likewise.
(sched_get_opxy_mem_type): Likewise for param "insn".
(m68k_sched_attr_op_mem): Likewise.
(sched_mem_operand_p): Likewise.
* config/mep/mep-protos.h (mep_multi_slot): Likewise for param.
* config/mep/mep.c (mep_multi_slot): Likewise.
* config/mips/mips-protos.h (mips_output_sync_loop): Likewise for
first param.
(mips_sync_loop_insns): Likewise.
* config/mips/mips.c (mips_print_operand_punctuation): Use insn
method of "final_sequence" for typesafety.
(mips_process_sync_loop): Strengthen param "insn" from rtx to
rtx_insn *.
(mips_output_sync_loop): Likewise.
(mips_sync_loop_insns): Likewise.
(mips_74k_agen_init): Likewise.
(mips_sched_init): Use NULL rather than NULL_RTX when working with
insns.
* config/nds32/nds32-fp-as-gp.c (nds32_symbol_load_store_p):
Strengthen param "insn" from rtx to rtx_insn *.
* config/nds32/nds32.c (nds32_target_alignment): Likewise for
local "insn".
* config/pa/pa-protos.h (pa_insn_refs_are_delayed): Likewise for
param.
* config/pa/pa.c (pa_output_function_epilogue): Likewise for local
"insn".  Use method of rtx_sequence for typesafety.
(branch_to_delay_slot_p): Strengthen param "insn" from rtx to
rtx_insn *.
(branch_needs_nop_p): Likewise.
(use_skip_p): Likewise.
(pa_insn_refs_are_delayed): Likewise.
* config/rl78/rl78.c (rl78_propogate_register_origins): Likewise
for locals "insn", "ninsn".
* config/rs6000/rs6000.c (is_microcoded_insn): Likewise for param
"insn".
(is_cracked_insn): Likewise.
(is_branch_slot_insn): Likewise.
(is_nonpipeline_insn): Likewise.
(insn_terminates_group_p): Likewise.
(insn_must_be_first_in_group): Likewise.
(insn_must_be_last_in_group): Likewise.
(force_new_group): Likewise for param "next_insn".
* config/s390/s390.c (s390_get_sched_attrmask): Likewise for param
"insn".
(s390_sched_score): Likewise.
* config/sh/sh-protos.h (output_branch): Likewise for param 2.
(rtx sfunc_uses_reg): Likewise for sole param.
* config/sh/sh.c (sh_print_operand): Use insn method of
final_sequence for typesafety.
(output_branch): Strengthen param "insn" from rtx to rtx_insn *.
Use insn method of final_sequence for typesafety.
(sfunc_uses_reg): Strengthen param "insn" from rtx to rtx_insn *.
* config/sparc/sparc-protos.h (eligible_for_call_delay): Likewise
for param.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/sparc/sparc.c (eligible_for_call_delay): Likewise.
(eligible_for_return_delay): Likewise.
(eligible_for_sibcall_delay): Likewise.
* config/stormy16/stormy16-protos.h
(xstormy16_output_cbranch_hi): Likewise for final param.
(xstormy16_output_cbranch_si): Likewise.
* config/stormy16/stormy16.c (xstormy16_output_cbranch_hi): LIkewise.
(xstormy16_output_cbranch_si): Likewise.
* config/v850/v850-protos.h (notice_update_cc): Likewise.
* config/v850/v850.c (notice_update_cc): Likewise.

* final.c (get_attr_length_1): Strengthen param "insn" and param
of "fallback_fn" from rtx to rtx_insn *, eliminating a checked cast.
(get_attr_length): Strengthen param "insn" from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
(shorten_branches): Likewise for signature of locals "length_fun"
and "inner_length_fun".  Introduce local rtx_sequence * "seqn"
from a checked cast and use its methods for clarity and to enable
strengthening local "inner_insn" from rtx to rtx_insn *.
* genattr.c (gen_attr): When writing out the prototypes of the
various generated "get_attr_" functions, strengthen the params of
the non-const functions from rtx to rtx_insn *.
Similarly, strengthen the params of insn_default_length,
insn_min_length, insn_variable_length_p, insn_current_length.
(main): Similarly, strengthen the param of num_delay_slots,
internal_dfa_insn_code, insn_default_latency, bypass_p,
insn_latency, min_issue_delay, print_reservation,
insn_has_dfa_reservation_p and of the "internal_dfa_insn_code" and
"insn_default_latency" callbacks.  Rename hook_int_rtx_unreachable
to hook_int_rtx_insn_unreachable.
* genattrtab.c (write_attr_get): When writing out the generated
"get_attr_" functions, strengthen the param "insn" from rtx to
rtx_insn *, eliminating a checked cast.
(make_automaton_attrs): When writing out prototypes of
"internal_dfa_insn_code_", "insn_default_latency_" functions
and the "internal_dfa_insn_code" and "insn_default_latency"
callbacks, strengthen their params from rtx to rtx_insn *
* genautomata.c (output_internal_insn_code_evaluation): When
writing out code, add a checked cast from rtx to rtx_insn * when
invoking DFA_INSN_CODE_FUNC_NAME aka dfa_insn_code.
(output_dfa_insn_code_func): Strengthen param of generated
function "dfa_insn_code_enlarge" from rtx to rtx_insn *.
(output_trans_func): Likewise for generated function
"state_transition".
(output_internal_insn_latency_func): When writing out generated
function "internal_insn_latency", rename params from "insn" and
"insn2" to "insn_or_const0" and "insn2_or_const0".  Reintroduce
locals "insn" and "insn2" as rtx_insn * with checked casts once
we've proven that we're not dealing with const0_rtx.
(output_insn_latency_func):  Strengthen param of generated
function "insn_latency" from rtx to rtx_insn *.
(output_print_reservation_func): Likewise for generated function
"print_reservation".
(output_insn_has_dfa_reservation_p): Likewise for generated
function "insn_has_dfa_reservation_p".
* hooks.c (hook_int_rtx_unreachable): Rename to...
(hook_int_rtx_insn_unreachable): ...this, and strengthen param
from rtx to rtx_insn *.
* hooks.h (hook_int_rtx_unreachable): Likewise.
(extern int hook_int_rtx_insn_unreachable): Likewise.
* output.h (get_attr_length): Strengthen param from rtx to rtx_insn *.
(get_attr_min_length): Likewise.
* recog.c (get_enabled_alternatives): Likewise.
* recog.h (alternative_mask get_enabled_alternatives): Likewise.
* reorg.c (find_end_label): Introduce local rtx "pat" and
strengthen local "insn" from rtx to rtx_insn *.
(redundant_insn): Use insn method of "seq" rather than element for
typesafety; strengthen local "control" from rtx to rtx_insn *.
* resource.c (mark_referenced_resources): Add checked cast to
rtx_insn * within INSN/JUMP_INSN case.
(mark_set_resources): Likewise.
* sel-sched.c (estimate_insn_cost): Strengthen param "insn" from
rtx to rtx_insn *.

From-SVN: r215271

The various TARGET_ASM_..._MAX_SKIP hooks take an insn

gcc/ChangeLog:
* config/rs6000/rs6000.c (rs6000_loop_align_max_skip): Strengthen
param "label" from rtx to rtx_insn *.
* config/rx/rx.c (rx_max_skip_for_label): Likewise for param "lab"
and local "op".
* doc/tm.texi (TARGET_ASM_JUMP_ALIGN_MAX_SKIP): Autogenerated changes.
(TARGET_ASM_LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP): Likewise.
(TARGET_ASM_LOOP_ALIGN_MAX_SKIP): Likewise.
(TARGET_ASM_LABEL_ALIGN_MAX_SKIP): Likewise.
* final.c (default_label_align_after_barrier_max_skip): Strengthen
param from rtx to rtx_insn *.
(default_loop_align_max_skip): Likewise.
(default_label_align_max_skip): Likewise.
(default_jump_align_max_skip): Likewise.
* target.def (label_align_after_barrier_max_skip): Likewise.
(loop_align_max_skip): Likewise.
(label_align_max_skip): Likewise.
(jump_align_max_skip): Likewise.
* targhooks.h (default_label_align_after_barrier_max_skip):
Likewise.
(default_loop_align_max_skip): Likewise.
(default_label_align_max_skip): Likewise.
(default_jump_align_max_skip): Likewise.

From-SVN: r215270

The TARGET_CAN_FOLLOW_JUMP hook takes insns

gcc/ChangeLog:
* config/arc/arc.c (arc_can_follow_jump): Strengthen both params
from const_rtx to const rtx_insn *.  Update union members from rtx
to rtx_insn *.
* doc/tm.texi (TARGET_CAN_FOLLOW_JUMP): Autogenerated change.
* hooks.c (hook_bool_const_rtx_const_rtx_true): Rename to...
(hook_bool_const_rtx_insn_const_rtx_insn_true): ...this, and
strengthen both params from const_rtx to const rtx_insn *.
* hooks.h (hook_bool_const_rtx_const_rtx_true): Likewise.
(hook_bool_const_rtx_insn_const_rtx_insn_true): Likewise.
* reorg.c (follow_jumps): Strengthen param "jump" from rtx to
rtx_insn *.
* target.def (can_follow_jump): Strengthen both params from
const_rtx to const rtx_insn *, and update default implementation
from hook_bool_const_rtx_const_rtx_true to
hook_bool_const_rtx_insn_const_rtx_insn_true.

From-SVN: r215269

deps_start_bb takes an insn

gcc/ChangeLog:
* sched-deps.c (deps_start_bb): Strengthen param "head" and local
"insn" from rtx to rtx_insn *.
* sched-int.h (deps_start_bb): Likewise for 2nd param.

From-SVN: r215268

longlong.h: Add __udiv_w_sdiv prototype.

2014-09-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

* longlong.h: Add __udiv_w_sdiv prototype.

From-SVN: r215266

AVX-512. Extend vcvtps2ph insn patterns.

gcc/
* config/i386/sse.md
(define_insn "vcvtph2ps<mask_name>"): Add masking.
(define_insn "*vcvtph2ps_load<mask_name>"): Ditto.
(define_insn "vcvtph2ps256<mask_name>"): Ditto.
(define_expand "vcvtps2ph_mask"): New.
(define_insn "*vcvtps2ph<mask_name>"): Add masking.
(define_insn "*vcvtps2ph_store<mask_name>"): Ditto.
(define_insn "vcvtps2ph256<mask_name>"): Ditto.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215263

AVX-512. Extend ashrv insn patterns.

gcc/
* config/i386/sse.md (define_mode_iterator VI248_AVX512BW_AVX512VL):
New.
(define_mode_iterator VI24_AVX512BW_1): Ditto.
(define_insn "<mask_codefor>ashr<mode>3<mask_name>"): Ditto.
(define_insn "<mask_codefor>ashrv2di3<mask_name>"): Ditto.
(define_insn "ashr<VI248_AVX512BW_AVX512VL:mode>3<mask_name>"): Enable
also for TARGET_AVX512VL.
(define_expand "ashrv2di3"): Update to enable TARGET_AVX512VL.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215262

regex.h (basic_regex): Rename _Ch_typeraits template parameters to _Ch_traits.

* include/bits/regex.h (basic_regex): Rename _Ch_typeraits template
parameters to _Ch_traits.

From-SVN: r215261

[AArch64] Fix force_simd macro in vdup_lane_2

gcc/

* gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit simd mov.

From-SVN: r215260

doc/install.texi: add documentation for --disable-libsanitizer

This patch adds an item for --disable-libsanitizer to the configuration
documentation.
The option is especially useful during bisection, because it reduces
build time a lot.

2014-09-15  Markus Trippelsdorf  <markus@trippelsdorf.de>

* doc/install.texi (Options specification): add
--disable-libsanitizer item.

From-SVN: r215259

Daily bump.

From-SVN: r215257

re PR target/61407 (Build errors on latest OS X 10.10 Yosemite with Xcode 6 on GCC 4.8.3)

PR target/61407

* config/darwin-c.c (version_as_macro): Added extra 0 for OS X 10.10
and above.
* config/darwin-driver.c (darwin_find_version_from_kernel): Removed
kernel version check to avoid incrementing it after every major OS X
release.
(darwin_default_min_version): Avoid static memory buffer.

* gcc.dg/darwin-minversion-1.c: Fixed formatting
* gcc.dg/darwin-minversion-2.c: Fixed formatting
* gcc.dg/darwin-minversion-3.c: Fixed formatting
* gcc.dg/darwin-minversion-4.c: Added test for OS X 10.10

Co-Authored-By: Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
From-SVN: r215251

Daily bump.

From-SVN: r215250

Fix mistake in commit 215237

From-SVN: r215242

tree.c (need_assembler_name_p): Store C++ type mangling only for aggregates.

* tree.c (need_assembler_name_p): Store C++ type mangling only
for aggregates.

From-SVN: r215238

* MAINTAINERS: Move myself to reviewers (Fortran).

From-SVN: r215237

re PR fortran/63252 (tree_class_check_failed)

2014-09-13  Tobias Burnus  <burnus@net-b.de>

        PR fortran/63252
        * trans-decl.c (gfc_build_builtin_function_decls): Fix
        caf_unlock declaration.

From-SVN: r215236

re PR c++/60862 (bad location in invalid conversion error)

PR c++/60862
* parser.c (cp_parser_postfix_expression) <case CPP_OPEN_PAREN>: Set
location of a call expression.

* g++.dg/diagnostic/pr60862.C: New test.

From-SVN: r215235

tree.c (protected_set_expr_location): Don't check whether T is non-null here.

* tree.c (protected_set_expr_location): Don't check whether T is
non-null here.

From-SVN: r215234

Daily bump.

From-SVN: r215233

msp430.md (extendhipsi2): Use 20-bit form of RLAM/RRAM.

* config/msp430/msp430.md (extendhipsi2): Use 20-bit form of RLAM/RRAM.
(extend_and_shift1_hipsi2): Likewise.
(extend_and_shift2_hipsi2): Likewise.

From-SVN: r215229

re PR c++/63201 (Full specialization of a member variable template of a class template does not work)

PR c++/63201
* decl.c (start_decl): Handle specialization of member variable
template.
* pt.c (check_explicit_specialization): Adjust error.

From-SVN: r215226

deque (__gnu_debug::deque): Make base class C++11 allocator aware.

* include/debug/deque (__gnu_debug::deque): Make base class C++11
allocator aware.

From-SVN: r215223

params 2 and 3 of reg_set_between_p

gcc/ChangeLog:
* config/alpha/alpha.c (alpha_ra_ever_killed): Replace NULL_RTX
with NULL when dealing with an insn.
* config/sh/sh.c (sh_reorg): Strengthen local "last_float_move"
from rtx to rtx_insn *.
* rtl.h (reg_set_between_p): Strengthen params 2 and 3 from
const_rtx to const rtx_insn *.
* rtlanal.c (reg_set_between_p): Likewise, removing a checked cast.

From-SVN: r215222

re PR libstdc++/59603 (std::random_shuffle tries to swap element with itself)

PR libstdc++/59603
* include/bits/stl_algo.h (random_shuffle): Prevent self-swapping.
* testsuite/25_algorithms/random_shuffle/59603.cc: New.

From-SVN: r215219

fix ChangeLog typo

From-SVN: r215218

fix assert in hash_table pch routines

gcc/ChangeLog:

2014-09-12  Trevor Saunders  <tsaunders@mozilla.com>

* hash-table.h (gt_pch_nx): don't call gt_pch_note_object within an
assert.

From-SVN: r215216

Remove LIBGCC2_HAS_?F_MODE target macros.

This patch removes the LIBGCC2_HAS_{SF,DF,XF,TF}_MODE target macros,
replacing them by predefines with -fbuilding-libgcc, together with a
target hook that can influence those predefines when needed.

The new default is that a floating-point mode is supported in libgcc
if (a) it passes the scalar_mode_supported_p hook (otherwise it's not
plausible for it to be supported in libgcc) and (b) it's one of those
four modes (since those are the modes for which libgcc hardcodes the
possibility of support).  The target hook can override the default
choice (in either direction) for modes that pass
scalar_mode_supported_p (although overriding in the direction of
returning true when the default would return false only makes sense if
all relevant functions are specially defined in libgcc for that
particular target).

The previous default settings depended on various settings such as
LIBGCC2_LONG_DOUBLE_TYPE_SIZE, as well as targets defining the above
target macros if the default wasn't correct.

The default scalar_mode_supported_p only declares a floating-point
mode to be supported if it matches one of float / double / long
double.  This means that in most cases where a mode is only supported
conditionally in libgcc (TFmode only supported if it's the mode of
long double, most commonly), the default gets things right.  Overrides
were needed in the following cases:

* SFmode would always have been supported in libgcc (the condition was
  BITS_PER_UNIT == 8, true for all current targets), but pdp11
  defaults to 64-bit float, and in that case SFmode would fail
  scalar_mode_supported_p.  I don't know if libgcc actually built for
  pdp11 (and the port may well no longer be being used), but this
  patch adds a scalar_mode_supported_p hook to it to ensure SFmode is
  treated as supported.

* Certain i386 and ia64 targets need the new hook to match the
  existing cases for when XFmode or TFmode support is present in
  libgcc.  For i386, the hook can always declare XFmode to be
  supported - the cases where it's not are the cases where long double
  is TFmode, in which case XFmode fails scalar_mode_supported_p[*] -
  but TFmode support needs to be conditional.  (And of the targets not
  defining LIBGCC2_HAS_TF_MODE before this patch, some defined
  LONG_DOUBLE_TYPE_SIZE to 64, so ensuring LIBGCC2_HAS_TF_MODE would
  always be false, while others did not define it, so allowing it to
  be true in the -mlong-double-128 case.  This patch matches that
  logic, although I suspect all the latter targets would have been
  broken if you tried to enable -mlong-double-128 by default, for lack
  of the soft-fp TFmode support in libgcc, which is separately
  configured.)

  [*] I don't know if it's deliberate not to support __float80 at all
  with -mlong-double-128.

In order to implement the default version of the new hook,
insn-modes.h was made to contain macros such as HAVE_TFmode for each
machine mode, so the default hook can contain conditionals on whether
XFmode and TFmode exist (to match the hardcoding of a list of modes in
libgcc).  This is also used in fortran/trans-types.c; previously it
had a conditional on defined(LIBGCC2_HAS_TF_MODE) (a bit dubious,
since it ignored the value of the macro), which is replaced by testing
defined(HAVE_TFmode), in conjunction with requiring
targetm.libgcc_floating_mode_supported_p.

(Fortran is testing something stronger than that hook: not only is
libgcc support required, but also libm or equivalent.  Thus, it has a
test for ENABLE_LIBQUADMATH_SUPPORT in the case that the mode is
TFmode and that's not the same as any of the three standard types.
The old and new tests are intended to accept exactly the same set of
modes for all targets.)

Apart from the four target macros eliminated by this patch, it gets us
closer to eliminating LIBGCC2_LONG_DOUBLE_TYPE_SIZE as well, though a
few more places using that macro need changing first.

Bootstrapped with no regressions on x86_64-unknown-linux-gnu; also
built cc1 for crosses to ia64-elf and pdp11-none as a minimal test of
changes for those targets.

gcc:
* target.def (libgcc_floating_mode_supported_p): New hook.
* targhooks.c (default_libgcc_floating_mode_supported_p): New
function.
* targhooks.h (default_libgcc_floating_mode_supported_p): Declare.
* doc/tm.texi.in (LIBGCC2_HAS_DF_MODE, LIBGCC2_HAS_XF_MODE)
(LIBGCC2_HAS_TF_MODE): Remove.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): New @hook.
* doc/tm.texi: Regenerate.
* genmodes.c (emit_insn_modes_h): Define HAVE_%smode for each
machine mode.
* system.h (LIBGCC2_HAS_SF_MODE, LIBGCC2_HAS_DF_MODE)
(LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE): Poison.
* config/i386/cygming.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/darwin.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/djgpp.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/dragonfly.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/freebsd.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/gnu-user-common.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/i386-interix.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p): New
function.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/sol2.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/vx-common.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/hpux.h (LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE):
Remove.
* config/ia64/ia64.c (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P):
New macro.
(ia64_libgcc_floating_mode_supported_p): New function.
* config/ia64/linux.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
(IA64_NO_LIBGCC_TFMODE): Define.
* config/msp430/msp430.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/pdp11/pdp11.c (TARGET_SCALAR_MODE_SUPPORTED_P): New
macro.
(pdp11_scalar_mode_supported_p): New function.
* config/rl78/rl78.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/rx/rx.h (LIBGCC2_HAS_DF_MODE): Remove.

gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_HAS_%s_MODE__
macros for floating-point modes.

gcc/fortran:
* trans-types.c (gfc_init_kinds): Check
targetm.libgcc_floating_mode_supported_p for floating-point
modes.  Check HAVE_TFmode instead of LIBGCC2_HAS_TF_MODE.

libgcc:
* libgcc2.h (LIBGCC2_HAS_SF_MODE): Define using
__LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* config/libbid/bid_gcc_intrinsics.h
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* fixed-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_SF_MODE): Define using __LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.

From-SVN: r215215

re PR middle-end/63237 (error: invalid operand in unary operation)

2014-09-12  Richard Biener  <rguenther@suse.de>

PR middle-end/63237
* gimple-fold.c (get_maxval_strlen): Gimplify string length.

* g++.dg/torture/pr63237.C: New testcase.

From-SVN: r215212

tree.c (integer_each_onep): New function.

2014-09-12  Marc Glisse  <marc.glisse@inria.fr>

gcc/
* tree.c (integer_each_onep): New function.
* tree.h (integer_each_onep): Declare it.
* fold-const.c (fold_binary_loc): Use it for ~A + 1 to -A and
-A - 1 to ~A.  Disable (X & 1) ^ 1, (X ^ 1) & 1 and ~X & 1 to
(X & 1) == 0 for vector and complex.
gcc/testsuite/
* gcc.dg/vec-andxor1.c: New file.

From-SVN: r215209

[AArch64] Add regmove_costs for Cortex-A57 and A53

2014-09-12  Wilco Dijkstra  <wdijkstr@arm.com>

  * gcc/config/aarch64/aarch64.c: (cortexa57_regmove_cost): New cost table for
  A57.
  (cortexa53_regmove_cost): New cost table for A53.  Increase GP2FP/FP2GP cost
  to spilling from integer to FP registers.

From-SVN: r215208

[AArch64] Fix cost for Q register moves

2014-09-12  Wilco Dijkstra  <wdijkstr@arm.com>

  * gcc/config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
  move handling.
  (generic_regmove_cost): Undo raised FP2FP move cost as Q register moves are
  now handled correctly.

From-SVN: r215207

[AArch64] Add cost handling of CALLER_SAVE_REGS and POINTER_REGS

2014-09-12  Wilco Dijkstra  <wdijkstr@arm.com>

  * gcc/config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost handling
  of CALLER_SAVE_REGS and POINTER_REGS.

From-SVN: r215206

[Ree] Ensure inserted copy don't change the number of hard registers

2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

  gcc/
    * ree.c (combine_reaching_defs): Ensure inserted copy don't change the
    number of hard registers.

From-SVN: r215205

AVX-512. Extend vpternlog, valign, vrotate insns.

gcc/
* config/i386/sse.md
(define_mode_iterator VI48_AVX512VL): New.
(define_expand "<avx512>_vternlog<mode>_maskz"): Rename from
"avx512f_vternlog<mode>_maskz" and update mode iterator.
(define_insn "<avx512>_vternlog<mode><sd_maskz_name>"): Rename
from "avx512f_vternlog<mode><sd_maskz_name>" and update mode iterator.
(define_insn "<avx512>_vternlog<mode>_mask"): Rename from
"avx512f_vternlog<mode>_mask" and update mode iterator.
(define_insn "<mask_codefor><avx512>_align<mode><mask_name>"): Rename
from "<mask_codefor>avx512f_align<mode><mask_name>" and update mode
iterator.
(define_insn "<avx512>_<rotate>v<mode><mask_name>"): Rename from
"avx512f_<rotate>v<mode><mask_name>" and update mode iterator.
(define_insn "<avx512>_<rotate><mode><mask_name>"): Rename from
"avx512f_<rotate><mode><mask_name>" and update mode iterator.
(define_insn "clz<mode>2<mask_name>"): Use VI48_AVX512VL mode iterator.
(define_insn "<mask_codefor>conflict<mode><mask_name>"): Ditto.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215203

AVX-512.  Extend max/min insn patterns.

gcc/
* config/i386/sse.md (VI128_256): Delete.
(define_mode_iterator VI124_256): New.
(define_mode_iterator VI124_256_AVX512F_AVX512BW): Ditto.
(define_expand "<code><mode>3<mask_name><round_name>"): Delete.
(define_expand "<code><VI124_256_AVX512F_AVX512BW:mode>3"): New.
(define_insn "*avx2_<code><VI124_256:mode>3"): Rename from
"*avx2_<code><mode>3<mask_name><round_name>" and update mode iterator.
(define_expand "<code><VI48_AVX512VL:mode>3_mask"): New.
(define_insn "*avx512bw_<code><VI48_AVX512VL:mode>3<mask_name>"): Ditto.
(define_insn "<mask_codefor><code><mode>3<mask_name>"): Update mode
iterator.
(define_expand "<code><VI8_AVX2:mode>3"): Update pettern generation
in presence of AVX-512.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215202

AVX-512. Extend gather insn patterns.

gcc/
* config/i386/sse.md
(define_expand "<avx512>_gathersi<mode>"): Rename from
"avx512f_gathersi<mode>".
(define_insn "*avx512f_gathersi<mode>"): Use VI48F.
(define_insn "*avx512f_gathersi<mode>_2"): Ditto.
(define_expand "<avx512>_gatherdi<mode>"): Rename from
"avx512f_gatherdi<mode>".
(define_insn "*avx512f_gatherdi<mode>"): Use VI48F.
(define_insn "*avx512f_gatherdi<mode>_2"): Use VI48F, add 128/256-bit
wide versions.
(define_expand "<avx512>_scattersi<mode>"): Rename from
"avx512f_scattersi<mode>".
(define_insn "*avx512f_scattersi<mode>"): Use VI48F.
(define_expand "<avx512>_scatterdi<mode>"): Rename from
"avx512f_scatterdi<mode>".
(define_insn "*avx512f_scatterdi<mode>"): Use VI48F.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215201

ira.h (ira_finish_once): Delete.

gcc/
* ira.h (ira_finish_once): Delete.
* ira-int.h (target_ira_int::~target_ira_int): Declare.
(target_ira_int::free_ira_costs): Likewise.
(target_ira_int::free_register_move_costs): Likewise.
(ira_finish_costs_once): Delete.
* ira.c (free_register_move_costs): Replace with...
(target_ira_int::free_register_move_costs): ...this new function.
(target_ira_int::~target_ira_int): Define.
(ira_init): Call free_register_move_costs as a member function rather
than a global function.
(ira_finish_once): Delete.
* ira-costs.c (free_ira_costs): Replace with...
(target_ira_int::free_ira_costs): ...this new function.
(ira_init_costs): Call free_ira_costs as a member function rather
than a global function.
(ira_finish_costs_once): Delete.
* target-globals.c (target_globals::~target_globals): Call the
target_ira_int destructor.
* toplev.c: Include lra.h.
(finalize): Call lra_finish_once rather than ira_finish_once.

From-SVN: r215200

Daily bump.

From-SVN: r215199

common.opt (flto-odr-type-merging): New flag.

* common.opt (flto-odr-type-merging): New flag.
* ipa-deivrt.c (hash_type_name): Use ODR names for hasing if availale.
(types_same_for_odr): Likewise.
(odr_subtypes_equivalent_p): Likewise.
(add_type_duplicate): Do not walk type variants.
(register_odr_type): New function.
* ipa-utils.h (register_odr_type): Declare.
(odr_type_p): New function.
* langhooks.c (lhd_set_decl_assembler_name): Do not compute
TYPE_DECLs
* doc/invoke.texi (-flto-odr-type-merging): Document.
* tree.c (need_assembler_name_p): Compute ODR names when asked
for it.
* tree.h (DECL_ASSEMBLER_NAME): Update comment.

* lto.c (lto_read_decls): Register ODR types.

From-SVN: r215196

Also turn off OPTION_MASK_ABI_X32 for -m16

PR target/63228
* config/i386/i386.c (ix86_option_override_internal): Also turn
off OPTION_MASK_ABI_X32 for -m16.

From-SVN: r215194

rs6000.md (rs6000_mftb_<mode>): Use mode iterator GPR instead of P.

2014-09-11  Segher Boessenkool  <segher@kernel.crashing.org>

* config/rs6000/rs6000.md (rs6000_mftb_<mode>): Use mode iterator
GPR instead of P.

From-SVN: r215193

re PR target/58757 (Advertise the lack of denormal support on alpha without -mieee)

2014-09-11  Marc Glisse  <marc.glisse@inria.fr>

PR target/58757
gcc/c-family/
* c-cppbuiltin.c (builtin_define_float_constants): Correct
__*_DENORM_MIN__ without denormals.
gcc/
* ginclude/float.h (FLT_TRUE_MIN, DBL_TRUE_MIN, LDBL_TRUE_MIN):
Directly forward to __*_DENORM_MIN__.
gcc/testsuite/
* gcc.dg/c11-true_min-1.c: New testcase.

From-SVN: r215191

Introduce LABEL_REF_LABEL

gcc/ChangeLog:
2014-09-11  David Malcolm  <dmalcolm@redhat.com>

* rtl.h (LABEL_REF_LABEL): New macro.

* alias.c (rtx_equal_for_memref_p): Use LABEL_REF_LABEL in place
of XEXP (, 0), where we know that we have a LABEL_REF.
* cfgbuild.c (make_edges): Likewise.
(purge_dead_tablejump_edges): Likewise.
* cfgexpand.c (convert_debug_memory_address): Likewise.
* cfgrtl.c (patch_jump_insn): Likewise.
* combine.c (distribute_notes): Likewise.
* cse.c (hash_rtx_cb): Likewise.
(exp_equiv_p): Likewise.
(fold_rtx): Likewise.
(check_for_label_ref): Likewise.
* cselib.c (rtx_equal_for_cselib_1): Likewise.
(cselib_hash_rtx): Likewise.
* emit-rtl.c (mark_label_nuses): Likewise.
* explow.c (convert_memory_address_addr_space): Likewise.
* final.c (output_asm_label): Likewise.
(output_addr_const): Likewise.
* gcse.c (add_label_notes): Likewise.
* genconfig.c (walk_insn_part): Likewise.
* genrecog.c (validate_pattern): Likewise.
* ifcvt.c (cond_exec_get_condition): Likewise.
(noce_emit_store_flag): Likewise.
(noce_get_alt_condition): Likewise.
(noce_get_condition): Likewise.
* jump.c (maybe_propagate_label_ref): Likewise.
(mark_jump_label_1): Likewise.
(redirect_exp_1): Likewise.
(rtx_renumbered_equal_p): Likewise.
* lra-constraints.c (operands_match_p): Likewise.
* reload.c (operands_match_p): Likewise.
(find_reloads): Likewise.
* reload1.c (set_label_offsets): Likewise.
* reorg.c (get_branch_condition): Likewise.
* rtl.c (rtx_equal_p_cb): Likewise.
(rtx_equal_p): Likewise.
* rtlanal.c (reg_mentioned_p): Likewise.
(rtx_referenced_p): Likewise.
(get_condition): Likewise.
* sched-vis.c (print_value): Likewise.
* varasm.c (const_hash_1): Likewise.
(compare_constant): Likewise.
(const_rtx_hash_1): Likewise.
(output_constant_pool_1): Likewise.

From-SVN: r215190

htm.md (tabort, [...]): Use xor instead of minus.

2014-09-11  Segher Boessenkool  <segher@kernel.crashing.org>

* config/rs6000/htm.md (tabort, tabortdc, tabortdci, tabortwc,
tabortwci, tbegin, tcheck, tend, trechkpt, treclaim, tsr): Use xor
instead of minus.
* config/rs6000/vector.md (cr6_test_for_zero_reverse,
cr6_test_for_lt_reverse): Ditto.

From-SVN: r215187

re PR c++/61489 (Wrong warning with -Wmissing-field-initializers.)

2014-09-11  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/61489
* doc/invoke.texi ([-Wmissing-field-initializers]): Update.

/cp
2014-09-11  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/61489
* typeck2.c (process_init_constructor_record): Do not warn about
missing field initializer if EMPTY_CONSTRUCTOR_P (init).

/testsuite
2014-09-11  Paolo Carlini  <paolo.carlini@oracle.com>

PR c++/61489
* g++.dg/warn/Wmissing-field-initializers-1.C: New.
* g++.old-deja/g++.other/warn5.C: Adjust.

From-SVN: r215186

[AArch64] Simplify vreinterpret for float64x1_t using casts.

* config/aarch64/aarch64-builtins.c (aarch64_types_unop_su_qualifiers,
TYPES_REINTERP_SU, aarch64_types_unop_sp_qualifiers, TYPE_REINTERP_SP,
aarch64_types_unop_us_qualifiers, TYPES_REINTERP_US,
aarch64_types_unop_ps_qualifiers, TYPES_REINTERP_PS, BUILTIN_VD):
Delete.

(aarch64_fold_builtin): Remove all reinterpret cases.

* config/aarch64/aarch64-protos.h (aarch64_simd_reinterpret): Delete.

* config/aarch64/aarch64-simd-builtins.def (reinterpret*) : Delete.

* config/aarch64/aarch64-simd.md (aarch64_reinterpretv8qi<mode>,
aarch64_reinterpretv4hi<mode>, aarch64_reinterpretv2si<mode>,
aarch64_reinterpretv2sf<mode>, aarch64_reinterpretdi<mode>,
aarch64_reinterpretv1df<mode>, aarch64_reinterpretv16qi<mode>,
aarch64_reinterpretv8hi<mode>, aarch64_reinterpretv4si<mode>,
aarch64_reinterpretv4sf<mode>, aarch64_reinterpretv2di<mode>,
aarch64_reinterpretv2df<mode>): Delete.

* config/aarch64/aarch64.c (aarch64_simd_reinterpret): Delete.

* config/aarch64/arm_neon.h (vreinterpret_p8_f64,
vreinterpret_p16_f64, vreinterpret_f32_f64, vreinterpret_f64_f32,
vreinterpret_f64_p8, vreinterpret_f64_p16, vreinterpret_f64_s8,
vreinterpret_f64_s16, vreinterpret_f64_s32, vreinterpret_f64_u8,
vreinterpret_f64_u16, vreinterpret_f64_u32, vreinterpret_s64_f64,
vreinterpret_u64_f64, vreinterpret_s8_f64, vreinterpret_s16_f64,
vreinterpret_s32_f64, vreinterpret_u8_f64, vreinterpret_u16_f64,
vreinterpret_u32_f64): Use cast.

* config/aarch64/iterators.md (VD_RE): Delete.

From-SVN: r215180

[AArch64] Replace temporary inline assembler for vset_lane

* config/aarch64/arm_neon.h (aarch64_vset_lane_any): New (*2).
(vset_lane_f32, vset_lane_f64, vset_lane_p8, vset_lane_p16,
vset_lane_s8, vset_lane_s16, vset_lane_s32, vset_lane_s64,
vset_lane_u8, vset_lane_u16, vset_lane_u32, vset_lane_u64,
vsetq_lane_f32, vsetq_lane_f64, vsetq_lane_p8, vsetq_lane_p16,
vsetq_lane_s8, vsetq_lane_s16, vsetq_lane_s32, vsetq_lane_s64,
vsetq_lane_u8, vsetq_lane_u16, vsetq_lane_u32, vsetq_lane_u64):
Replace inline assembler with __aarch64_vset_lane_any.

From-SVN: r215179

[AArch64 Testsuite] Add execution test of vset(q?)_lane intrinsics.

* gcc.target/aarch64/vset_lane_1.c: New test.

From-SVN: r215177

[AArch64] Cheap fix for argument types of vmull_high_lane_{us}{16,32}

gcc/

* config/aarch64/arm_neon.h (vmull_high_lane_s16): Fix argument
types.
(vmull_high_lane_s32): Likewise.
(vmull_high_lane_u16): Likewise.
(vmull_high_lane_u32): Likewise.

From-SVN: r215176

re PR c++/63139 (Class-scope typedef overwrites typedef of previously defined class)

PR c++/63139
* pt.c (tsubst_pack_expansion): Simplify substitution into T....
(tsubst): Don't throw away PACK_EXPANSION_EXTRA_ARGS.

From-SVN: r215171

re PR c++/58678 (pykde4-4.11.2 link error (devirtualization too trigger happy))

PR c++/58678
* ipa-devirt.c (ipa_devirt): Don't check DECL_COMDAT.

From-SVN: r215168

re PR libstdc++/63219 (Superfluous template parameter in match_result::format overload)

PR libstdc++/63219
* include/bits/regex.h (match_results::format): Remove stray template
parameter.
* include/bits/regex_compiler.h (_RegexTranslator::_RegexTranslator):
Remove parameter name to avoid -Wunused-parameter warning.
* include/bits/regex_executor.h (_State_info::_State_info): Reorder
mem-initializers to avoid -Wreorder warning.
* include/bits/regex_executor.tcc (_Executor::_M_word_boundary):
Remove parameter name to avoid -Wunused-parameter warning.
* include/bits/regex_scanner.tcc (_Scanner::_M_advance): Add braces
to avoid -Wempty-body warning when not in debug mode.

From-SVN: r215160

Fix declarations in some tests.

* gcc.dg/compat/struct-by-value-13_main.c (struct_by_value_13_x):
Fix declaration.
* gcc.dg/compat/struct-by-value-16a_main.c (struct_by_value_16a_x):
Fix declaration.
* gcc.dg/compat/struct-by-value-17a_main.c (struct_by_value_17a_x):
Fix declaration.
* gcc.dg/compat/struct-by-value-18a_main.c (struct_by_value_18a_x):
Fix declaration.

From-SVN: r215158

linux64.S: Emit .note.GNU-stack even when POWERPC64 is not defined.

* src/powerpc/linux64.S: Emit .note.GNU-stack even when
POWERPC64 is not defined.
* src/powerpc/linux64_closure.S: Likewise.  Also test _CALL_ELF == 2.

From-SVN: r215155

re PR target/63223 ([avr] Make jumptables work with -Wl,--section-start,.text=)

gcc/
PR target/63223
* config/avr/avr.md (*tablejump.3byte-pc): New insn.
(*tablejump): Restrict to !AVR_HAVE_EIJMP_EICALL.  Add void clobber.
(casesi): Expand to *tablejump.3byte-pc if AVR_HAVE_EIJMP_EICALL.
libgcc/
PR target/63223
* config/avr/libgcc.S (__tablejump2__): Rewrite to use RAMPZ, ELPM
and R24 as needed.  Make work for all devices and .text locations.
(__do_global_ctors, __do_global_dtors): Use word addresses.
(__tablejump__, __tablejump_elpm__): Remove functions.
* t-avr (LIB1ASMFUNCS): Remove _tablejump, _tablejump_elpm.
Add _tablejump2.
(XICALL, XIJMP): New macros.

From-SVN: r215152

AVX-512. Add vperm[it]2 insns support.

gcc/
* config/i386/sse.md
(define_expand "<avx512>_vpermi2var<VI48F:mode>3_maskz"): Rename from
"avx512f_vpermi2var<mode>3_maskz" and update mode iterator.
(define_expand "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_maskz"):
New.
(define_insn "<avx512>_vpermi2var<VI48F:mode>3<sd_maskz_name>"): Rename
from "avx512f_vpermi2var<mode>3<sd_maskz_name>" and update mode
iterator.
(define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
New.
(define_insn "<avx512>_vpermi2var<VI48F:mode>3_mask"): Rename from
"avx512f_vpermi2var<mode>3_mask" and update mode iterator.
(define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_mask"): New.
(define_expand "<avx512>_vpermt2var<VI48F:mode>3_maskz"): Rename from
"avx512f_vpermt2var<mode>3_maskz" and update mode iterator.
(define_expand "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_maskz"): New.
(define_insn "<avx512>_vpermt2var<VI48F:mode>3<sd_maskz_name>"): Rename
from "avx512f_vpermt2var<mode>3<sd_maskz_name>" and update mode
iterator.
(define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
New.
(define_insn "<avx512>_vpermt2var<VI48F:mode>3_mask"): Rename from
"avx512f_vpermt2var<mode>3_mask" and update mode iterator.
(define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_mask"): New.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215151

varpool.c (varpool_node::ctor_useable_for_folding_p): Do not try to access removed nodes.

* varpool.c (varpool_node::ctor_useable_for_folding_p): Do not try
to access removed nodes.

From-SVN: r215150

re PR middle-end/63186 (Undefined .L* symbols because of fnsplit)

PR tree-optimization/63186
* ipa-split.c (test_nonssa_use): Skip nonforced labels.
(mark_nonssa_use): Likewise.
(verify_non_ssa_vars): Verify all header blocks for label
definitions.

* gcc.dg/pr63186.c: New testcase.

From-SVN: r215149

AVX-512. Extend vpermvar insn patterns.

gcc/
* config/i386/sse.md
(define_mode_attr avx2_avx512): Rename from avx2_avx512bw.
(define_mode_iterator VI48F_256_512): Extend to AVX-512VL.
(define_insn "<avx2_avx512>_permvar<mode><mask_name>"): Rename from
"<avx2_avx512f>_permvar<mode><mask_name>".
(define_insn "<avx512>_permvar<mode><mask_name>"): New.
(define_insn "<avx2_avx512>_ashrv<VI48_AVX512F_AVX512VL:mode><mask_name>"):
Rename from "<avx2_avx512f>_ashrv<mode><mask_name>".
(define_insn "<avx2_avx512>_ashrv<VI2_AVX512VL:mode><mask_name>"):
Ditto.
(define_insn "<avx2_avx512>_<shift_insn>v<VI48_AVX512F:mode><mask_name>"):
Rename from "<avx2_avx512bw>_<shift_insn>v<mode><mask_name>".
(define_insn "<avx2_avx512>_<shift_insn>v<VI2_AVX512VL:mode><mask_name>"):
Rename from "<avx2_avx512bw>_<shift_insn>v<mode><mask_name>".

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215148

Daily bump.

From-SVN: r215147

vsx.md (vsx_fmav4sf4): Use correct constraints for V2DF, V4SF, DF, and DI modes.

2014-09-10  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/vsx.md (vsx_fmav4sf4): Use correct constraints for
V2DF, V4SF, DF, and DI modes.
(vsx_fmav2df2): Likewise.
(vsx_float_fix_<mode>2): Likewise.
(vsx_reduc_<VEC_reduc_name>_v2df_scalar): Likewise.

From-SVN: r215138

Fix PR target/63209.

From-SVN: r215136

i386.exp: Only run vect-args.c tests if runtest_file_p says they should be run.

* gcc.target/i386/i386.exp: Only run vect-args.c tests
if runtest_file_p says they should be run.

From-SVN: r215135

re PR ipa/61659 (Extra undefined symbol because of devirtualization)

PR c++/61659
* decl.c (grokfndecl): Don't set DECL_COMDAT on static inlines.
(duplicate_decls, start_decl): Likewise.
* pt.c (check_explicit_specialization): Likewise.
(push_template_decl_real): Or static templates.

From-SVN: r215134

error_for_asm and warning_for_asm take const rtx_insn *

gcc/ChangeLog:
2014-09-10  David Malcolm  <dmalcolm@redhat.com>

* final.c (this_is_asm_operands): Strengthen this variable from
rtx to const rtx_insn *.
* output.h (this_is_asm_operands): Likewise.
* rtl-error.c (location_for_asm): Strengthen param "insn" from
const_rtx to const rtx_insn *.
(diagnostic_for_asm): Likewise.
* rtl-error.h (error_for_asm): Likewise.
(warning_for_asm): Likewise.

From-SVN: r215133

insn_extract takes an rtx_insn

gcc/ChangeLog:
2014-09-10  David Malcolm  <dmalcolm@redhat.com>

* genextract.c (print_header): When writing out insn_extract to
insn-extract.c, strengthen the param "insn" from rtx to rtx_insn *.
* recog.h (insn_extract): Strengthen the param from rtx to
rtx_insn *.

From-SVN: r215132

[AArch64 Testsuite] Add a test of the vst[234](q?) intrinics

        * gcc.target/aarch64/vstN_1.c: New test.

From-SVN: r215129

hook.in: Load the xmethods.

2014-09-10  Siva Chandra Reddy  <sivachandra@google.com>

* python/hook.in: Load the xmethods.
* python/Makefile.am (nobase_python_DATA): Add xmethods.py.
* python/Makefile.in: Regenerated.
* python/libstdcxx/v6/xmethods.py: New file.
* testsuite/lib/gdb-test.exp (gdb_version_check_xmethods): New
function.
(gdb-test): New optional argument LOAD_XMETHODS.  Load xmethods
python script if LOAD_XMETHODS is true.
* testsuite/libstdc++-xmethods/unique_ptr.cc: New file.
* testsuite/libstdc++-xmethods/vector.cc: New file.
* testsuite/libstdc++-xmethods/xmethods.exp: New file.

From-SVN: r215128

install.texi (Prerequisites): Note Tcl 8.6 bug fixed in 8.6.1.

* doc/install.texi (Prerequisites): Note Tcl 8.6 bug fixed in
8.6.1.

From-SVN: r215127

[AArch64 Testsuite] Add a test of the vldN_lane intrinsic

        * gcc.target/aarch64/vldN_lane_1.c: New test.

From-SVN: r215126

cgraphunit.c (expand_thunk): If not expanding, set analyzed flag.

2014-09-10  Martin Jambor  <mjambor@suse.cz>

* cgraphunit.c (expand_thunk): If not expanding, set analyzed flag.
(analyze): Do not set analyze flag if expand_thunk returns false;.
(create_wrapper): Likewise.
* cgraphclones.c (duplicate_thunk_for_node): Likewise.

From-SVN: r215123

re PR middle-end/61654 (ICE in release_function_body, at cgraph.c:1699)

2014-09-10  Martin Jambor  <mjambor@suse.cz>

PR ipa/61654
* cgraphclones.c (duplicate_thunk_for_node): Copy arguments of the
new decl properly.  Analyze the new thunk if it is expanded.

gcc/testsuite/
* g++.dg/ipa/pr61654.C: New test.

From-SVN: r215122

coretypes.h (struct _dont_use_rtx_insn_here_, rtx_insn): Define.

* coretypes.h (struct _dont_use_rtx_insn_here_, rtx_insn)
[USED_FOR_TARGET]: Define.

From-SVN: r215121

MIPS: Do not reload unallocated FP_REGS pseudos via GR_REGS

gcc/

* config/mips/mips.c (mips_secondary_reload_class): Handle
regno < 0 case.

From-SVN: r215120

Fix ICE in bitmap routines with LRA and inline assembly language

gcc/

* lra-lives.c (process_bb_lives): Replace assignment with bitwise OR
assignment.

From-SVN: r215119

flag-types.h (enum sanitize_code): Add SANITIZE_NONNULL_ATTRIBUTE and SANITIZE_RETURNS_NONNULL_ATTRIBUTE...

gcc/
* flag-types.h (enum sanitize_code): Add SANITIZE_NONNULL_ATTRIBUTE
and SANITIZE_RETURNS_NONNULL_ATTRIBUTE, or them into SANITIZE_UNDEFINED.
* opts.c (common_handle_option): Handle SANITIZE_NONNULL_ATTRIBUTE and
SANITIZE_RETURNS_NONNULL_ATTRIBUTE and disable
flag_delete_null_pointer_checks for them.
* sanitizer.def (BUILT_IN_UBSAN_HANDLE_NONNULL_ARG,
BUILT_IN_UBSAN_HANDLE_NONNULL_ARG_ABORT,
BUILT_IN_UBSAN_HANDLE_NONNULL_RETURN,
BUILT_IN_UBSAN_HANDLE_NONNULL_RETURN_ABORT): New.
* ubsan.c (instrument_bool_enum_load): Set *gsi back to
stmt's iterator.
(instrument_nonnull_arg, instrument_nonnull_return): New functions.
(pass_ubsan::gate): Return true even for SANITIZE_NONNULL_ATTRIBUTE
or SANITIZE_RETURNS_NONNULL_ATTRIBUTE.
(pass_ubsan::execute): Call instrument_nonnull_{arg,return}.
* doc/invoke.texi (-fsanitize=nonnull-attribute,
-fsanitize=returns-nonnull-attribute): Document.
gcc/testsuite/
* c-c++-common/ubsan/attrib-3.c: New test.
* c-c++-common/ubsan/nonnull-1.c: New test.
* c-c++-common/ubsan/nonnull-2.c: New test.
* c-c++-common/ubsan/nonnull-3.c: New test.
* c-c++-common/ubsan/nonnull-4.c: New test.
* c-c++-common/ubsan/nonnull-5.c: New test.
libsanitizer/
* ubsan/ubsan_handlers.cc, ubsan/ubsan_handlers.h: Cherry pick
upstream r215485, r217389, r217391 and r217400.

From-SVN: r215118

ubsan.h (struct ubsan_mismatch_data): Removed.

* ubsan.h (struct ubsan_mismatch_data): Removed.
(ubsan_create_data): Remove MISMATCH argument, add LOCCNT argument.
* ubsan.c (ubsan_source_location): For unknown locations,
pass { NULL, 0, 0 } instead of { "<unknown>", x, y }.
(ubsan_create_data): Remove MISMATCH argument, add LOCCNT argument.
Allow more than one location and arbitrary extra arguments passed
in ... instead of through MISMATCH pointer.
(ubsan_instrument_unreachable, ubsan_expand_bounds_ifn,
ubsan_expand_null_ifn, ubsan_build_overflow_builtin,
instrument_bool_enum_load, ubsan_instrument_float_cast): Adjust
callers.
c-family/
* c-ubsan.c (ubsan_instrument_division, ubsan_instrument_shift,
ubsan_instrument_vla, ubsan_instrument_return): Adjust
ubsan_create_data callers.
(ubsan_instrument_bounds): Don't emit UBSAN_BOUNDS at all if
index is constant or BIT_AND_EXPR with constant mask and is
small enough for the bound.
* c-gimplify.c (ubsan_walk_array_refs_r): For ADDR_EXPR of
ARRAY_REF, make sure the inner ARRAY_REF is not walked again.

From-SVN: r215117

AVX-512. Add patterns for compress, expand.

gcc/
* config/i386/sse.md
(define_mode_iterator VI48F): New.
(define_insn "<avx512>_compress<mode>_mask"): Rename from
"avx512f_compress<mode>_mask" and update mode iterator.
(define_insn "<avx512>_compressstore<mode>_mask"): Rename from
"avx512f_compressstore<mode>_mask" and update mode iterator.
(define_expand "<avx512>_expand<mode>_maskz"): Rename from
"avx512f_expand<mode>_maskz" and update mode iterator.
(define_insn "<avx512>_expand<mode>_mask"): Rename from
"avx512f_expand<mode>_mask" and update mode iterator.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215108

AVX-512. Add reduce, range, fpclass insn patterns.

gcc/
* config/i386/i386.c
(ix86_expand_args_builtin): Handle avx512dq_rangepv8df_mask_round,
avx512dq_rangepv16sf_mask_round, avx512dq_rangepv4df_mask,
avx512dq_rangepv8sf_mask, avx512dq_rangepv2df_mask,
avx512dq_rangepv4sf_mask.
* config/i386/sse.md
(define_c_enum "unspec"): Add UNSPEC_REDUCE, UNSPEC_FPCLASS,
UNSPEC_RANGE.
(define_insn "<mask_codefor>reducep<mode><mask_name>"): New.
(define_insn "reduces<mode>"): Ditto.
(define_insn "avx512dq_rangep<mode><mask_name><round_saeonly_name>"):
Ditto.
(define_insn "avx512dq_ranges<mode><round_saeonly_name>"): Ditto.
(define_insn "avx512dq_fpclass<mode><mask_scalar_merge_name>"): Ditto.
(define_insn "avx512dq_vmfpclass<mode>"): Ditto..

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215107

AVX-512. Update float unspecs: storeu, rcp14, rsqrt14, scalef, getexp, fixupimm, rndscale, getmant.

gcc/
* config/i386/i386.c
(avx512f_vgetmantv2df_round): Rename from "avx512f_getmantv2df_round".
(avx512f_vgetmantv4sf_round): Rename from "avx512f_vgetmantv4sf_round".
(ix86_expand_args_builtin): Handle avx512vl_getmantv8sf_mask,
avx512vl_getmantv4df_mask, avx512vl_getmantv4sf_mask,
avx512vl_getmantv2df_mask.
(ix86_expand_round_builtin): Handle avx512f_vgetmantv2df_round,
avx512f_vgetmantv4sf_round.
* config/i386/sse.md
(define_insn "<avx512>_storeu<ssemodesuffix><avxsizesuffix>_mask"):
Rename from "avx512f_storeu<ssemodesuffix>512_mask" and update
mode iterator.
(define_insn "<mask_codefor>rcp14<mode><mask_name>"): Use VF_AVX512VL.
(define_insn "<mask_codefor>rsqrt14<mode><mask_name>"): Ditto.
(define_insn "<avx512>_scalef<mode><mask_name><round_name>"): Rename
from "avx512f_scalef<mode><mask_name><round_name>" and update mode
iterator..
(define_insn "<avx512>_getexp<mode><mask_name><round_saeonly_name>"):
Rename from "avx512f_getexp<mode><mask_name><round_saeonly_name>" and
update mode iterator.
(define_expand
"<avx512>_fixupimm<mode>_maskz<round_saeonly_expand_name>"): Rename from
"avx512f_fixupimm<mode>_maskz<round_saeonly_expand_name>" and update
mode iterator.
(define_insn
"<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>"): Rename
from "avx512f_fixupimm<mode><sd_maskz_name><round_saeonly_name>" and
update mode iterator.
(define_insn "<avx512>_fixupimm<mode>_mask<round_saeonly_name>"): Rename
from "avx512f_fixupimm<mode>_mask<round_saeonly_name>" and update mode
iterator..
(define_insn
"<avx512>_rndscale<mode><mask_name><round_saeonly_name>"): rename from
"avx512f_rndscale<mode><mask_name><round_saeonly_name>" and update
mode iterator..
(define_insn "<avx512>_getmant<mode><mask_name><round_saeonly_name>"):
Rename from "avx512f_getmant<mode><mask_name><round_saeonly_name>" and
update mode iterator.
(define_insn "avx512f_vgetmant<mode><round_saeonly_name>"): Rename from
"avx512f_getmant<mode><round_saeonly_name>".

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215106

re PR lto/63166 (ICE (LTO): ipa_intraprocedural_devirtualization, at ipa-prop.c:2611)

PR ipa/63166
* ipa-prop.c (compute_known_type_jump_func): Fix conditional.

* g++.dg/lto/pr63166_0.ii: New testcase.
* g++.dg/lto/pr63166_1.ii: New testcase.

From-SVN: r215105

AVX-512. Extend FMA patterns.

gcc/
* config/i386/sse.md (define_mode_iterator VF_AVX512VL): New.
(define_mode_iterator FMAMODEM): Allow 128/256bit EVEX version.
(define_mode_iterator FMAMODE_AVX512): New.
(define_mode_iterator FMAMODE): Remove conditions.
(define_expand "fma4i_fmadd_<mode>"): Use FMAMODE_AVX512 mode iterator.
(define_expand "<avx512>_fmadd_<mode>_maskz<round_expand_name>"): Rename
from "<avx512>_fmadd_<mode>_maskz<round_expand_name>" and use VF_AVX512VL
mode iterator.
(define_mode_iterator FMAMODE_NOVF512): Remove.
(define_insn "*fma_fmadd_<mode>"): Rename from
"<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>" and use
FMAMODE mode iterator.
(define_mode_iterator VF_SF_AVX512VL): New.
(define_insn "<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fmadd_<mode>_mask<round_name>"): Rename from
"avx512f_fmadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fmadd_<mode>_mask3<round_name>"): Rename from
"avx512f_fmadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "*fma_fmsub_<mode>"): Rename from
"<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>" and use
FMAMODE mode iterator.
(define_insn "<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fmsub_<mode>_mask<round_name>"): Rename from
"avx512f_fmsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fmsub_<mode>_mask3<round_name>"): Rename from
"avx512f_fmsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "*fma_fnmadd_<mode>"): Rename from
"<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>" and
use FMAMODE mode iterator.
(define_insn "<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fnmadd_<mode>_mask<round_name>"): Rename from
"avx512f_fnmadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fnmadd_<mode>_mask3<round_name>"): Rename from
"avx512f_fnmadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "*fma_fnmsub_<mode>"): Rename from
"<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>" and use
FMAMODE mode iterator.
(define_insn "<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fnmsub_<mode>_mask<round_name>"): Rename from
"avx512f_fnmsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fnmsub_<mode>_mask3<round_name>"): Rename from
"avx512f_fnmsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_expand "<avx512>_fmaddsub_<mode>_maskz<round_expand_name>"):
Rename from "avx512f_fmaddsub_<mode>_maskz<round_expand_name>" and
use VF_AVX512VL mode iterator.
(define_insn "*fma_fmaddsub_<mode>"): Rename from
"<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>" and
remove subst usage.
(define_insn "<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fmaddsub_<mode>_mask<round_name>"): Rename from
"avx512f_fmaddsub_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fmaddsub_<mode>_mask3<round_name>"): Rename from
"avx512f_fmaddsub_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "*fma_fmsubadd_<mode>"): Rename from
"<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>" and
remove usage of subst.
(define_insn "<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>"):
Use VF_SF_AVX512VL mode iterator.
(define_insn "<avx512>_fmsubadd_<mode>_mask<round_name>"): Rename from
"avx512f_fmsubadd_<mode>_mask<round_name>" and use VF_AVX512VL mode
iterator.
(define_insn "<avx512>_fmsubadd_<mode>_mask3<round_name>"): Rename from
"avx512f_fmsubadd_<mode>_mask3<round_name>" and use VF_AVX512VL mode
iterator.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215104

re PR libgcc/56846 (_Unwind_Backtrace on ARM and noexcept)

2014-09-10  Tony Wang  <tony.wang@arm.com>

    libstdc++-v3/
    PR target/56846
    * libsupc++/eh_personality.cc (PERSONALITY_FUNCTION):
    Return with CONTINUE_UNWINDING when the state pattern
    contains: _US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND

From-SVN: r215101

revert: calls.c (precompute_arguments): Check promoted_for_signed_and_unsigned_p and set the promoted mode.

gcc/ChangeLog:

2014-09-10  Kugan Vivekanandarajah  <kuganv@linaro.org>

Revert r213751:
* calls.c (precompute_arguments): Check
 promoted_for_signed_and_unsigned_p and set the promoted mode.
(promoted_for_signed_and_unsigned_p): New function.
(expand_expr_real_1): Check promoted_for_signed_and_unsigned_p
and set the promoted mode.
* expr.h (promoted_for_signed_and_unsigned_p): New function definition.
* cfgexpand.c (expand_gimple_stmt_1): Call emit_move_insn if
SUBREG is promoted with SRP_SIGNED_AND_UNSIGNED.

From-SVN: r215100

Daily bump.

From-SVN: r215099

opth-gen.awk: Generate mapping from cpp message reasons to the options that enable them.

gcc/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

* opth-gen.awk: Generate mapping from cpp message reasons to the
options that enable them.
* doc/options.texi (CppReason): Document.

gcc/c-family/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

* c.opt: Add CppReason to various flags.
(Wdate-time): Re-sort.
* c-common.c: Include c-common.h earlier.
(struct reason_option_codes_t): Delete.
(c_option_controlling_cpp_error): Prefix global type and struct
with cpp_.

From-SVN: r215095

invoke.texi (Wnormalized=): Update.

gcc/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

* doc/invoke.texi (Wnormalized=): Update.

libcpp/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

* include/cpplib.h (struct cpp_options): Declare warn_normalize as
int instead of enum.

gcc/c-family/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

* c.opt (Wnormalized): New.
(Wnormalized=): Use Enum and Reject Negative.
* c-opts.c (c_common_handle_option): Do not handle Wnormalized here.

gcc/testsuite/ChangeLog:

2014-09-09  Manuel López-Ibáñez  <manu@gcc.gnu.org>

* gcc.dg/cpp/warn-normalized-3.c: Delete useless dg-prune-output.

From-SVN: r215093

Fix pad status check.

2014-09-10  Janne Blomqvist  <jb@gcc.gnu.org>

* io/transfer.c (read_block_form): Fix pad status check (found by
Thomas Schwinge with -Wlogical-not-parentheses).

From-SVN: r215092

re PR target/63195 (stage3 build/gengtype miscompiled)

2014-09-09  Segher Boessenkool  <segher@kernel.crashing.org>

PR target/63195
* config/rs6000/rs6000.md (*bool<mode>3): Allow only register
operands.  Split off the constant operand alternative to ...
(*bool<mode>3_imm): New.

From-SVN: r215091

Make std::deque meet C++11 allocator requirements.

* include/bits/deque.tcc (deque::operator=(const deque&)): Handle
allocator propagation.
(deque::emplace_front, deque::emplace_back): Use allocator traits.
(deque::_M_push_back_aux, deque::_M_push_front_aux): Likewise.
(deque::_M_pop_back_aux, deque::_M_pop_front_aux): Likewise.
* include/bits/stl_deque.h (__deque_buf_size): Add constexpr.
(_Deque_iterator): Handle allocators with custom pointers.
(_Deque_base): Likewise. Use allocator traits.
(deque): Likewise. Add allocator-extended constructors.
(deque::_M_move_assign1, deque::_M_move_assign2): Implement move
assignment via tag dispatching.
(deque::_M_replace_map): Replace existing data.
* include/debug/deque (deque): Add allocator-extended constructors.
* include/profile/deque (deque): Likewise.
* testsuite/23_containers/deque/allocator/copy.cc: New.
* testsuite/23_containers/deque/allocator/copy_assign.cc: New.
* testsuite/23_containers/deque/allocator/ext_ptr.cc: New.
* testsuite/23_containers/deque/allocator/minimal.cc: New.
* testsuite/23_containers/deque/allocator/move.cc: New.
* testsuite/23_containers/deque/allocator/move_assign-2.cc: New.
* testsuite/23_containers/deque/allocator/move_assign.cc: New.
* testsuite/23_containers/deque/allocator/noexcept.cc: New.
* testsuite/23_containers/deque/allocator/swap.cc: New.
* testsuite/23_containers/deque/requirements/dr438/assign_neg.cc:
Adjust dg-error line number.
* testsuite/23_containers/deque/requirements/dr438/
constructor_1_neg.cc: Likewise.
* testsuite/23_containers/deque/requirements/dr438/
constructor_2_neg.cc: Likewise.
* testsuite/23_containers/deque/requirements/dr438/insert_neg.cc:
Likewise.
* testsuite/23_containers/vector/52591.cc: Test both the propagating
and always-equal cases.

From-SVN: r215090