Eric Anholt [Tue, 9 Aug 2011 21:35:38 +0000 (14:35 -0700)]
i965/vs: Add support for loops.
This is copied from brw_fs.cpp, instead of doing the temporary IR
generation that ir_to_mesa does. Fixes glsl-vs-loop and friends.
Eric Anholt [Tue, 9 Aug 2011 19:30:41 +0000 (12:30 -0700)]
i965/vs: Add support for ir_binop_pow.
Fixes vs-pow-float-float.
Eric Anholt [Tue, 9 Aug 2011 18:00:28 +0000 (11:00 -0700)]
i965/vs: Respect the gen6 limitation that math opcodes can't be align16.
Fixes vs-acos-vec3 and friends.
Eric Anholt [Tue, 9 Aug 2011 17:57:09 +0000 (10:57 -0700)]
i965/vs: Fix implementation of ir_unop_any.
We were inheriting whatever previous predicate existed.
Eric Anholt [Mon, 8 Aug 2011 22:56:11 +0000 (15:56 -0700)]
i965/vs: Slightly improve the trivial reg allocator to skip unused regs.
This fixes most of the regressions in the vs array test set from the
varying array indexing work, since the giant array that was originally
allocated in virtual GRF space never gets used and is only ever
read/stored from scratch space.
Eric Anholt [Mon, 8 Aug 2011 00:09:12 +0000 (17:09 -0700)]
i965: Add gen6 disassembly for DP render cache messages.
Eric Anholt [Sun, 7 Aug 2011 20:38:50 +0000 (13:38 -0700)]
i965/vs: Enable variable array indexing in the VS.
Eric Anholt [Sun, 7 Aug 2011 20:36:11 +0000 (13:36 -0700)]
i965/vs: Add support for scratch read/write codegen.
Eric Anholt [Sun, 7 Aug 2011 20:16:06 +0000 (13:16 -0700)]
i965: Make some EU emit code for DP read/write messages non-static.
We keep building these strange interfaces for DP read/write where
there's a helper function with some partially-specific,
partially-general controls, which is used in exactly one place in code
generation. Making these public will let us set up those instructions
in the one place they're to be generated.
Eric Anholt [Sun, 7 Aug 2011 19:15:26 +0000 (12:15 -0700)]
i965/vs: Move virtual GRFs with array accesses to them to scratch space.
Eric Anholt [Sun, 7 Aug 2011 22:21:25 +0000 (15:21 -0700)]
i965/vs: Reserve MRF 14/15 for array loads/register unspilling.
Eric Anholt [Sun, 7 Aug 2011 17:59:39 +0000 (10:59 -0700)]
i965/vs: Track the variable index of array accesses.
This isn't used currently, as we lower all array accesses.
Eric Anholt [Sun, 7 Aug 2011 17:47:54 +0000 (10:47 -0700)]
i965: Add remaining scratch space setup emit to unit states.
Eric Anholt [Sun, 7 Aug 2011 17:44:15 +0000 (10:44 -0700)]
i965: Set up allocation of a VS scratch space if required.
Eric Anholt [Sun, 7 Aug 2011 17:43:49 +0000 (10:43 -0700)]
i965: Remove dead brw->wm.max_threads field.
Eric Anholt [Sat, 6 Aug 2011 04:53:00 +0000 (21:53 -0700)]
i965/vs: Add support for VUEs larger than a single URB write.
Fixes glsl-max-varyings.
Eric Anholt [Sat, 6 Aug 2011 04:22:36 +0000 (21:22 -0700)]
i965/vs: Avoid generating extra moves when setting up large ir_constants.
We were also screwing up the types in the process, and just not
emitting moves was easier.
Eric Anholt [Sat, 6 Aug 2011 03:54:25 +0000 (20:54 -0700)]
i965/vs: Fix types of varying outputs.
For structs/arrays/matrices, they were ending up as uint because we
forgot to set them. All varyings in GLSL 1.20 are of base type float,
so just force the matter here (which gets inherited at
emit_urb_writes() time).
Fixes vs-varying-array-mat2-col-rd.
Eric Anholt [Sat, 6 Aug 2011 03:46:03 +0000 (20:46 -0700)]
i965/vs: Handle assignment of structures/arrays/matrices better.
This gets the right types on the instructions, as well as emitting
minimal swizzles/writemasks.
Eric Anholt [Sat, 6 Aug 2011 03:26:48 +0000 (20:26 -0700)]
i965/vs: Don't forget to set up assignment condition code for arrays/structs.
Fixes vs-uniform-array-mat2-index-col-rd.
Eric Anholt [Sat, 6 Aug 2011 03:16:21 +0000 (20:16 -0700)]
i965/vs: Apply the gen6 math workaround for math1 instructions.
Fixes glsl-vs-masked-cos.
Eric Anholt [Sat, 6 Aug 2011 03:03:31 +0000 (20:03 -0700)]
i965/vs: Add support for if(any_nequal()) and if(all_equal()) on gen6.
Fixes vs-temp-array-mat2-col-rd.shader_test.
Eric Anholt [Sat, 6 Aug 2011 02:40:46 +0000 (19:40 -0700)]
i965/vs: Add support for dot product opcodes.
Fixes glsl-vs-dot-vec2.
Eric Anholt [Sat, 6 Aug 2011 02:38:44 +0000 (19:38 -0700)]
i965/vs: Fix the types of array/struct dereferences.
Fixes glsl-vs-arrays-3.
Eric Anholt [Sat, 6 Aug 2011 02:31:53 +0000 (19:31 -0700)]
i965/vs: Drop the assertion about dst.reg_offset == 0.
Adding the offset is the right thing to do here, and fixes
glsl-vs-mat-add-1.
Eric Anholt [Sat, 6 Aug 2011 02:29:41 +0000 (19:29 -0700)]
i965/vs: Use an appropriate swizzle on src regs from variables.
Fixes glsl-vs-if-bool.
Eric Anholt [Sat, 6 Aug 2011 02:18:31 +0000 (19:18 -0700)]
i965/vs: Fix support for zero uniforms in use.
We were looking for attributes in the wrong place, and pointlessly
doing the work on gen6 at all.
Eric Anholt [Sat, 6 Aug 2011 02:12:16 +0000 (19:12 -0700)]
i965/vs: Fix support for "IF" instructions by copying brw_fs_visitor.cpp.
Fixes glsl-vs-if-greater.
Eric Anholt [Sat, 6 Aug 2011 02:05:42 +0000 (19:05 -0700)]
i965/vs: Disable loops for now until rendering is generally correct.
Eric Anholt [Fri, 5 Aug 2011 23:37:18 +0000 (16:37 -0700)]
i965/vs: Fix ir_swizzle handling.
I decided to refactor it a bit in adapting ir_to_mesa.cpp code, and
mangled it. Fixes glsl-vs-cross-2.
Eric Anholt [Fri, 5 Aug 2011 23:35:24 +0000 (16:35 -0700)]
i965/vs: Allocate storage for "auto" variables just like temps.
Fixes segfault in glsl-vs-cross-2.
Eric Anholt [Fri, 5 Aug 2011 23:31:30 +0000 (16:31 -0700)]
i965/vs: Allow scalar values in assignments, too.
Fixes glsl-vs-all-02 and many other tests.
Eric Anholt [Fri, 5 Aug 2011 23:29:48 +0000 (16:29 -0700)]
i965/vs: Don't emit an extra copy of the vertex position.
Fixes glsl-vs-abs-neg, glsl-vs-all-01, and probably many other tests.
Eric Anholt [Fri, 5 Aug 2011 23:23:42 +0000 (16:23 -0700)]
i965/vs: Port the fix for clip plane writemasks from brw_vs_emit.c.
Eric Anholt [Fri, 5 Aug 2011 23:18:00 +0000 (16:18 -0700)]
i965/vs: Fix constant vector construction.
Fixes some issues noticed in glsl-vs-all-01.
Eric Anholt [Wed, 4 May 2011 19:50:16 +0000 (12:50 -0700)]
i965/vs: Start adding support for uniforms
There's no clever packing here, no pull constants, and no array support.
Eric Anholt [Mon, 2 May 2011 16:45:40 +0000 (09:45 -0700)]
i965: Start adding the VS visitor and codegen.
The low-level IR is a mashup of brw_fs.cpp and ir_to_mesa.cpp. It's
currently controlled by the INTEL_NEW_VS=1 environment variable, and
only tested for the trivial "gl_Position = gl_Vertex;" shader so far.
Eric Anholt [Fri, 5 Aug 2011 19:38:58 +0000 (12:38 -0700)]
i965: Rename math FS_OPCODE_* to SHADER_OPCODE_*.
I want to just use the same enums in the VS.
Eric Anholt [Tue, 3 May 2011 17:55:50 +0000 (10:55 -0700)]
i965: Create a shared enum for hardware and compiler-internal opcodes.
This should make gdbing more pleasant, and it might be used in sharing
part of the codegen between the VS and FS backends.
Eric Anholt [Tue, 3 May 2011 22:27:38 +0000 (15:27 -0700)]
i965: Generate driver-specific IR for non-fragment shaders as well.
This will be used by the new vertex shader backend. The scalarizing
passes are skipped for non-fragment, since vertex and geometry threads
are based on vec4s.
Brian Paul [Tue, 16 Aug 2011 19:05:26 +0000 (13:05 -0600)]
mesa: ChooseTextureFormat() returns gl_format, not GLuint
Paul Berry [Fri, 12 Aug 2011 17:20:34 +0000 (10:20 -0700)]
glsl: Fix type error when lowering integer divisions
This patch fixes a bug when lowering an integer division:
x/y
to a multiplication by a reciprocal:
int(float(x)*reciprocal(float(y)))
If x was a plain int and y was an ivecN, the lowering pass
incorrectly assigned the type of the product to be float, when in fact
it should be vecN. This caused mesa to abort with an IR validation
error.
Fixes piglit tests {fs,vs}-op-div-int-ivec{2,3,4}.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Marek Olšák [Tue, 16 Aug 2011 17:06:55 +0000 (19:06 +0200)]
softpipe: fix an obvious copy-paste error in get_query_result
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Tue, 16 Aug 2011 16:48:11 +0000 (18:48 +0200)]
st/dri: remove an unused-but-set variable
Marek Olšák [Tue, 16 Aug 2011 17:35:10 +0000 (19:35 +0200)]
r600g: rename bc -> bytecode
It took me a while to figure out what it stands for.
Benjamin Franzke [Tue, 16 Aug 2011 17:23:18 +0000 (19:23 +0200)]
egl: Add include paths for platform autodetection
Needed since commit
85fe9484.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40145
Cooper Yuan [Tue, 16 Aug 2011 12:37:13 +0000 (20:37 +0800)]
dri2: check if context is valid before flushing the pipe
Marek Olšák [Mon, 15 Aug 2011 21:37:44 +0000 (23:37 +0200)]
r600g: expose ARB_ES2_compatibility by claiming fixed-point format support
I also needed to make some changes in u_vbuf_mgr in order to override
the caps from the driver and enable the fallback even though the driver
claims the format is supported.
Marek Olšák [Mon, 15 Aug 2011 17:37:33 +0000 (19:37 +0200)]
noop: redirect the get_param/is_format.. queries to the underlying driver
Marek Olšák [Mon, 15 Aug 2011 18:52:44 +0000 (20:52 +0200)]
u_blitter: restore some states conditionally
Marek Olšák [Wed, 10 Aug 2011 00:58:40 +0000 (02:58 +0200)]
u_blitter: rename util_blitter_copy_region -> util_blitter_copy_texture
Marek Olšák [Sun, 14 Aug 2011 19:21:38 +0000 (21:21 +0200)]
r600g: consolidate two files r600d.h
Marek Olšák [Sun, 7 Aug 2011 19:14:38 +0000 (21:14 +0200)]
r600g: set read/write usage flags for each relocation
This takes advantage of the new GEM_WAIT ioctl when mapping buffers.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Sun, 7 Aug 2011 17:18:16 +0000 (19:18 +0200)]
winsys/radeon: take advantage of the new ioctl
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Sun, 7 Aug 2011 17:04:37 +0000 (19:04 +0200)]
winsys/radeon: hook up the new DRM_RADEON_GEM_WAIT ioctl
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Sun, 7 Aug 2011 16:42:29 +0000 (18:42 +0200)]
winsys/radeon: remove broken bo-is-busy-for-write guessing
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 05:05:07 +0000 (07:05 +0200)]
r600g: enable thread offloading
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 04:33:04 +0000 (06:33 +0200)]
r600g: undefine RADEON_CTX_MAX_PM4
winsys/radeon has its own definition.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 04:23:59 +0000 (06:23 +0200)]
r600g: don't include radeon_drm.h and xf86drm.h
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 04:19:17 +0000 (06:19 +0200)]
winsys/radeon: remove the device file descriptor from the interface
r600g doesn't need it anymore.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 04:17:39 +0000 (06:17 +0200)]
r600g: remove an unused parameter from r600_bo_destroy
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 04:11:45 +0000 (06:11 +0200)]
r600g: merge radeon_bo with r600_bo
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 03:40:16 +0000 (05:40 +0200)]
r600g: remove radeon_bo::handle
This should be private to radeon_winsys.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 02:27:48 +0000 (04:27 +0200)]
r600g: use buffer_map/unmap from radeon_winsys
This also drops the unneeded bo_busy/wait functions.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 01:38:20 +0000 (03:38 +0200)]
r600g: set the flush callback in radeon_winsys
I have also renamed the winsys function.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 01:19:33 +0000 (03:19 +0200)]
r600g: get tiling flags using radeon_winsys
Also remove some unused fence-related leftovers.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 01:07:42 +0000 (03:07 +0200)]
r600g: get winsys_handle using radeon_winsys
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 01:01:44 +0000 (03:01 +0200)]
r600g: move more DRM queries into winsys/radeon
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Thu, 4 Aug 2011 00:36:57 +0000 (02:36 +0200)]
winsys/radeon: consolidate the add_reloc function
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Wed, 3 Aug 2011 23:37:33 +0000 (01:37 +0200)]
r600g: emit CS using radeon_winsys
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Wed, 3 Aug 2011 22:15:54 +0000 (00:15 +0200)]
r600g: remove struct r600_reloc
That is really private to winsys/radeon.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Wed, 3 Aug 2011 17:27:49 +0000 (19:27 +0200)]
r600g: don't use RADEON_GEM_DOMAIN_CPU
Also staging resources shouldn't be allocated with the initial domain
being VRAM.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Wed, 3 Aug 2011 03:15:36 +0000 (05:15 +0200)]
r600g: remove reloc-related variables from radeon_bo
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Wed, 3 Aug 2011 02:31:02 +0000 (04:31 +0200)]
r600g: let radeon_winsys maintain the list of relocations
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Wed, 3 Aug 2011 00:24:15 +0000 (02:24 +0200)]
r600g: remove now-unused r600_context::fenced_bo
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 2 Aug 2011 23:59:02 +0000 (01:59 +0200)]
r600g: remove the fences which were used for the cache buffer manager
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 2 Aug 2011 23:47:57 +0000 (01:47 +0200)]
r600g: remove now-unused r600_bo::size
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 2 Aug 2011 23:34:39 +0000 (01:34 +0200)]
r600g: remove the cache buffer manager from winsys/r600
As we've just started using the one from winsys/radeon.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 2 Aug 2011 23:03:13 +0000 (01:03 +0200)]
r600g: allocate/destroy buffers using radeon_winsys
We use the cache buffer manager from radeon_winsys now, but we don't use
anything else yet.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 2 Aug 2011 21:58:57 +0000 (23:58 +0200)]
r600g: remove unused function declarations
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 2 Aug 2011 21:03:11 +0000 (23:03 +0200)]
r600g: remove unused r600_bo::tiling_flags
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 2 Aug 2011 19:18:10 +0000 (21:18 +0200)]
r600g: remove unused r600_bo::kernel_pitch
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Tue, 2 Aug 2011 18:25:13 +0000 (20:25 +0200)]
r600g: put radeon_winsys in screen::winsys, don't include drm_driver in the pipe
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Fri, 22 Jul 2011 19:38:56 +0000 (21:38 +0200)]
r600g: cleanup includes in winsys
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Fri, 22 Jul 2011 18:15:47 +0000 (20:15 +0200)]
r600g: move some queries into winsys/radeon
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Fri, 22 Jul 2011 17:25:07 +0000 (19:25 +0200)]
r600g: first step into winsys/radeon
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Benjamin Franzke [Mon, 15 Aug 2011 07:50:19 +0000 (09:50 +0200)]
dri2: Add __DRI_BUFFER_COUNT token
Remove definition from egl_dri2.
Defining this is egl_dri2.h breaks as soon as
a new dri2 buffer token is added like with commit
4501a5d6e8d00fd0d87625352ed5ba1a8861f72e.
Cooper Yuan [Tue, 16 Aug 2011 01:32:10 +0000 (09:32 +0800)]
dri2: add code to dri2_Flush extension.
It's going to flush client's commands in eglWaitClient(). Before this,
egl applications using pixmap or pbuffer flicker because of no flush.
Reviewed-by: Alan Hourihane
Eric Anholt [Sat, 6 Aug 2011 04:40:50 +0000 (21:40 -0700)]
glsl: When assigning to a whole array, mark the array as accessed.
The vs-varying-array-mat2-col-row-wr test writes a mat2[3] constant to
a mat2[3] varying out array, and also statically accesses element 1 of
it on the VS and FS sides. At link time it would get trimmed down to
just 2 elements, and then codegen of the VS would end up generating
assignments to the unallocated last entry of the array. On the new
i965 VS backend, that happened to land on the vertex position.
Some issues remain in this test on softpipe, i965/old-vs and
i965/new-vs on visual inspection, but i965 is passing because only one
green pixel is probed, not the whole split green/red quad.
Eric Anholt [Wed, 3 Aug 2011 23:36:42 +0000 (16:36 -0700)]
radeon: Explain to the user what went wrong when built without libdrm.
Before this commit, even LIBGL_DEBUG=verbose would just fail with:
libGL error: failed to create dri screen
Paul Berry [Tue, 2 Aug 2011 22:44:39 +0000 (15:44 -0700)]
glsl: Add validations for ir_call.
This patch extends ir_validate.cpp to check the following
characteristics of each ir_call:
- The number of actual parameters must match the number of formal
parameters in the signature.
- The type of each actual parameter must match the type of the
corresponding formal parameter in the signature.
- Each "out" or "inout" actual parameter must be an lvalue.
Reviewed-by: Chad Versace <chad@chad-versace.us>
Paul Berry [Tue, 2 Aug 2011 22:22:25 +0000 (15:22 -0700)]
glsl: Make is_lvalue() and variable_referenced() const.
These functions don't modify the target instruction, so it makes sense
to make them const. This allows these functions to be called from ir
validation code (which uses const to ensure that it doesn't
accidentally modify the IR being validated).
Reviewed-by: Chad Versace <chad@chad-versace.us>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Tue, 2 Aug 2011 21:34:17 +0000 (14:34 -0700)]
glsl: Perform implicit type conversions on function call out parameters.
When an out parameter undergoes an implicit type conversion, we need
to store it in a temporary, and then after the call completes, convert
the resulting value. In other words, we convert code like the
following:
void f(out int x);
float value;
f(value);
Into IR that's equivalent to this:
void f(out int x);
float value;
int out_parameter_conversion;
f(out_parameter_conversion);
value = float(out_parameter_conversion);
This transformation needs to happen during ast-to-IR convertion (as
opposed to, say, a lowering pass), because it is invalid IR for formal
and actual parameters to have types that don't match.
Fixes piglit tests
spec/glsl-1.20/compiler/qualifiers/out-conversion-int-to-float.vert and
spec/glsl-1.20/execution/qualifiers/vs-out-conversion-*.shader_test,
and bug 39651.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=39651
Reviewed-by: Chad Versace <chad@chad-versace.us>
Kenneth Graunke [Fri, 5 Aug 2011 23:59:04 +0000 (16:59 -0700)]
docs: Remove GLw from the documentation except for a new FAQ entry.
Also remove an outdated reference to GLEW being in tree.
Reviewed-by: Brian Paul <brianp@vmware.com>
Kenneth Graunke [Fri, 5 Aug 2011 23:39:56 +0000 (16:39 -0700)]
glw: Remove GLw source.
libGLw is an old OpenGL widget library with optional Motif support.
It almost never changes and very few people actually still care about
it, so we've decided to ship it separately.
The new home for libGLw is: git://git.freedesktop.org/mesa/glw/
Reviewed-by: Brian Paul <brianp@vmware.com>
Ian Romanick [Mon, 1 Aug 2011 21:13:10 +0000 (14:13 -0700)]
glsl: Modify strategy for accumulating conditions when lowering if-statements
Previously if-statements were lowered from inner-most to outer-most
(i.e., bottom-up). All assignments within an if-statement would have
the condition of the if-statement appended to its existing condition.
As a result the assignments from a deeply nested if-statement would
have a very long and complex condition.
Several shaders in the OpenGL ES2 conformance test suite contain
non-constant array indexing that has been lowered by the shader
writer. These tests usually look something like:
if (i == 0) {
value = array[0];
} else if (i == 1) {
value = array[1];
} else ...
The IR for the last assignment ends up as:
(assign (expression bool && (expression bool ! (var_ref if_to_cond_assign_condition) ) (expression bool && (expression bool ! (var_ref if_to_cond_assign_condition@20) ) (expression bool && (expression bool ! (var_ref if_to_cond_assign_condition@22) ) (expression bool && (expression bool ! (var_ref if_to_cond_assign_condition@24) ) (var_ref if_to_cond_assign_condition@26) ) ) ) ) (x) (var_ref value) (array_ref (var_ref array) (constant int (5)))
The Mesa IR that is generated from this is just as awesome as you
might expect.
Three changes are made to the way if-statements are lowered.
1. Two condition variables, if_to_cond_assign_then and
if_to_cond_assign_else, are created for each if-then-else structure.
The former contains the "positive" condition, and the later contains
the "negative" condtion. This change was implemented in the previous
patch.
2. Each condition variable is added to a hash-table when it is created.
3. When lowering an if-statement, assignments to existing condtion
variables get the current condition anded. This ensures that nested
condition variables are only set to true when the condition variable
for all outer if-statements is also true.
Changes #1 and #3 combine to ensure the correctness of the resulting
code.
4. When a condition assignment is encountered with a condition that is
a dereference of a previously added condition variable, the condition
is not modified.
Change #4 prevents the continuous accumulation of conditions on
assignments.
If the original if-statements were:
if (x) {
if (a && b && c && d && e) {
...
} else {
...
}
} else {
if (g && h && i && j && k) {
...
} else {
...
}
}
The lowered code will be
if_to_cond_assign_then@1 = x;
if_to_cond_assign_then@2 = a && b && c && d && e
&& if_to_cond_assign_then@1;
...
if_to_cond_assign_else@2 = !if_to_cond_assign_then
&& if_to_cond_assign_then@1;
...
if_to_cond_assign_else@1 = !if_to_cond_assign_then@1;
if_to_cond_assign_then@3 = g && h && i && j;
&& if_to_cond_assign_else@1;
...
if_to_cond_assign_else@3 = !if_to_cond_assign_then
&& if_to_cond_assign_else@1;
...
Depending on how instructions are emitted, there may be an extra
instruction due to the duplication of the '&&
if_to_cond_assign_{then,else}@1' on the nested else conditions. In
addition, this may cause some unnecessary register pressure since in
the simple case (where the nested conditions are not complex) the
nested then-condition variables are live longer than strictly
necessary.
Before this change, one of the shaders in the OpenGL ES2 conformance
test suite's acos_float_frag_xvary generated 348 Mesa IR instructions.
After this change it only generates 124. Many, but not all, of these
instructions would have also been eliminated by CSE.
Reviewed-by: Eric Anholt <eric@anholt.net>
Ian Romanick [Mon, 1 Aug 2011 20:55:46 +0000 (13:55 -0700)]
glsl: Slight change to the code generated by if-flattening
Now the condition (for the then-clause) and the inverse condition (for
the else-clause) get written to separate temporary variables. In the
presence of complex conditions, this shouldn't result in more code
being generated. If the original if-statement was
if (a && b && c && d && e) {
...
} else {
...
}
The lowered code will be
if_to_cond_assign_then = a && b && c && d && e;
...
if_to_cond_assign_else = !if_to_cond_assign_then;
...
Reviewed-by: Eric Anholt <eric@anholt.net>
Ian Romanick [Mon, 1 Aug 2011 20:36:12 +0000 (13:36 -0700)]
glsl: Replace foreach_iter with foreach_list_safe
Reviewed-by: Eric Anholt <eric@anholt.net>
Ian Romanick [Mon, 1 Aug 2011 20:28:11 +0000 (13:28 -0700)]
glsl: Make move_block_to_cond_assign not care which branch it's processing
This will make some future changes a bit easier to digest.
Reviewed-by: Eric Anholt <eric@anholt.net>
Benjamin Franzke [Tue, 9 Aug 2011 14:16:33 +0000 (16:16 +0200)]
egl: Log (debug) native platform type
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>