Jason Molenda [Wed, 17 Jan 2018 00:22:27 +0000 (00:22 +0000)]
Remove the hardcoded macos deployment targets altogether
from the xcode project files. We'll build for the current
OS only, by default.
llvm-svn: 322603
Yan Zhang [Wed, 17 Jan 2018 00:19:35 +0000 (00:19 +0000)]
add ID as a special acronym to objc property declaration check for property names like bundleID.allow using acronyms as suffix.
Reviewers: benhamilton, hokein
Reviewed By: benhamilton
Subscribers: klimek, cfe-commits
Differential Revision: https://reviews.llvm.org/D42143
llvm-svn: 322602
Evgeniy Stepanov [Tue, 16 Jan 2018 23:15:08 +0000 (23:15 +0000)]
[hwasan] Rename sized load/store callbacks to be consistent with ASan.
Summary: __hwasan_load is now __hwasan_loadN.
Reviewers: kcc
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D42138
llvm-svn: 322601
Simon Pilgrim [Tue, 16 Jan 2018 22:15:41 +0000 (22:15 +0000)]
[X86][BTVER2] Fix scheduling of VCMPSD/VCMPSS instructions
For some reason they don't have a trailing i like the packed equivalents.
llvm-svn: 322600
Florian Hahn [Tue, 16 Jan 2018 22:13:15 +0000 (22:13 +0000)]
[CallSiteSplitting] Pass list of (BB, Conditions) pairs to splitCallSite.
This removes some duplication from splitCallSite and makes it easier to
add additional code dealing with each predecessor. It also allows us to
split for more than 2 predecessors, although that is not enabled for
now.
Reviewers: junbuml, mcrosier, davidxl, davide
Reviewed By: junbuml
Differential Revision: https://reviews.llvm.org/D41858
llvm-svn: 322599
Simon Pilgrim [Tue, 16 Jan 2018 22:08:43 +0000 (22:08 +0000)]
[X86][BTVER2] Use instrs instead of instregex for low match counts (PR35955)
llvm-svn: 322598
Simon Pilgrim [Tue, 16 Jan 2018 21:44:48 +0000 (21:44 +0000)]
[X86][BTVER2] Use instrs instead of instregex for single use matches (PR35955)
llvm-svn: 322597
Martin Storsjo [Tue, 16 Jan 2018 20:54:10 +0000 (20:54 +0000)]
[PPC64] Added vector registers.
The Registers_ppc64 class needed a couple of changes, both to accommodate the
new registers as well as to handle the overlaps of VS register set
without wasting space.
The save/restore code of V and VS registers was added.
As VS registers depend on the VMX extension, they are processed only if
VMX support is detected (_ARCH_PWR8 for now).
Patch by Leandro Lupori!
Differential Revision: https://reviews.llvm.org/D41906
llvm-svn: 322596
Rui Ueyama [Tue, 16 Jan 2018 20:52:32 +0000 (20:52 +0000)]
Specify inline for isWhitespace in CommandLine.cpp
Patch by Takuto Ikuta.
In chromium's component build, there are many directive sections and
commandline parsing takes much time.
This patch is for speed up of lld in RelWithDebInfo build by forcing
inline heavily called isWhitespace function.
10 times link perf stats of blink_core.dll changed like below.
master:
TotalSeconds: 9.8764878
TotalSeconds: 10.1455242
TotalSeconds: 10.075279
TotalSeconds: 10.3397347
TotalSeconds: 9.8361665
TotalSeconds: 9.9544441
TotalSeconds: 9.8960686
TotalSeconds: 9.8877865
TotalSeconds: 10.0551879
TotalSeconds: 10.0492254
Avg: 10.
01159047
with this patch:
TotalSeconds: 8.8696762
TotalSeconds: 9.1021585
TotalSeconds: 9.0233893
TotalSeconds: 9.1886175
TotalSeconds: 9.156954
TotalSeconds: 9.0978564
TotalSeconds: 9.1316824
TotalSeconds: 8.8354606
TotalSeconds: 9.2549431
TotalSeconds: 9.4473085
Avg: 9.
11080465
llvm-svn: 322595
Lang Hames [Tue, 16 Jan 2018 20:39:51 +0000 (20:39 +0000)]
[ExecutionEngine] Rename JITSymbol::isStrongDefinition to isStrong.
For symmetry with isWeak, isCommon.
llvm-svn: 322594
Richard Trieu [Tue, 16 Jan 2018 19:53:06 +0000 (19:53 +0000)]
Add context to why test was disabled on Windows
test/Modules/odr_hash-Friend.cpp triggers an assertion in MicrosoftMangle.cpp
This has been reported in PR35939
llvm-svn: 322593
Erich Keane [Tue, 16 Jan 2018 19:49:52 +0000 (19:49 +0000)]
Move target MV resolver to COMDAT
As reported here: https://bugs.llvm.org/show_bug.cgi?id=35921
The resolver functions should be in their own
COMDAT regions. This patch sets that up.
Differential Revision: https://reviews.llvm.org/D42110
llvm-svn: 322592
Guozhi Wei [Tue, 16 Jan 2018 19:28:50 +0000 (19:28 +0000)]
[PPC] Add a new register XER aliased to CARRY
When "xer" is specified as clobbered register in inline assembler, clang can accept it, but llvm simply ignore it when lowered to machine instructions. It may cause problems later in scheduler.
This patch adds a new register XER aliased to CARRY, and adds it to register class CARRYRC. Now PPCTargetLowering::getRegForInlineAsmConstraint can return correct register number for inline asm constraint "{xer}", and scheduler behave correctly.
Differential Revision: https://reviews.llvm.org/D41967
llvm-svn: 322591
Rafael Espindola [Tue, 16 Jan 2018 19:28:28 +0000 (19:28 +0000)]
Inline foot gun into only valid use.
Symbol had both Visibility and getVisibility() and they had different
meanings. That is just too easy to get wrong.
getVisibility() would compute the visibility of a particular symbol
(foo in bar.o), and Visibility stores the computed value we will put
in the output.
There is only one case when we want what getVisibility() provides, so
inline it.
llvm-svn: 322590
Alexey Bataev [Tue, 16 Jan 2018 19:22:49 +0000 (19:22 +0000)]
[DOCS] Updated current status of OpenMP support, NFC.
llvm-svn: 322589
Evgeniy Stepanov [Tue, 16 Jan 2018 19:21:45 +0000 (19:21 +0000)]
[hwasan] Build runtime library with -fPIC, not -fPIE.
Summary: -fPIE can not be used when building a shared library.
Reviewers: alekseyshl, peter.smith
Subscribers: kubamracek, llvm-commits, mgorny
Differential Revision: https://reviews.llvm.org/D42121
llvm-svn: 322588
Alexey Bataev [Tue, 16 Jan 2018 19:18:24 +0000 (19:18 +0000)]
[OPENMP] Add support for `depend` clauses on `target teams distribute
parallel for simd` directives.
Added codegen for `depend` clauses on `#pragma omp target teams
distribute parallel for simd` directives.
llvm-svn: 322587
Rafael Espindola [Tue, 16 Jan 2018 19:02:46 +0000 (19:02 +0000)]
Fix another case we used the wrong visibility.
In here too we want the computed output visibility.
llvm-svn: 322586
Alexey Bataev [Tue, 16 Jan 2018 19:02:33 +0000 (19:02 +0000)]
[OPENMP] Add support for `depend` on `target teams distribute parallel
for` directives.
Added codegen for `depend` clauses on `#pragma omp target teams
distribute parallel for` directives.
llvm-svn: 322585
Francis Visoiu Mistrih [Tue, 16 Jan 2018 18:55:26 +0000 (18:55 +0000)]
[CodeGen] Skip some instructions that shouldn't affect shrink-wrapping
r320606 checked for MI.isMetaInstruction which skips all DBG_VALUEs.
This also skips IMPLICIT_DEFs and other instructions that may def / read
a register.
Differential Revision: https://reviews.llvm.org/D42119
llvm-svn: 322584
Rafael Espindola [Tue, 16 Jan 2018 18:53:09 +0000 (18:53 +0000)]
Add an extra test. NFC.
Without this all test would pass if the visibility checks were removed
from SymbolTable::addShared and SymbolTable::addUndefined.
llvm-svn: 322583
Volkan Keles [Tue, 16 Jan 2018 18:44:05 +0000 (18:44 +0000)]
[GlobalISel][TableGen] Add support for SDNodeXForm
Summary:
This patch adds CustomRenderer which renders the matched
operands to the specified instruction.
Targets can enable the matching of SDNodeXForm by adding
a definition that inherits from GICustomOperandRenderer and
GISDNodeXFormEquiv as follows.
def gi_imm8 : GICustomOperandRenderer<"renderImm8”>,
GISDNodeXFormEquiv<imm8_xform>;
Custom renderer functions should be of the form:
void render(MachineInstrBuilder &MIB, const MachineInstr &I);
Reviewers: dsanders, ab, rovka
Reviewed By: dsanders
Subscribers: kristof.beyls, javed.absar, llvm-commits, mgrang, qcolombet
Differential Revision: https://reviews.llvm.org/D42012
llvm-svn: 322582
Michael Kruse [Tue, 16 Jan 2018 18:39:42 +0000 (18:39 +0000)]
[IslTools] dumpPw: Dump same structure pieces together.
Print same or similar structure elements together. Previously, the
value could take more importance that the space structure if visited
first in the space nest tree.
Before:
{
Left[0] -> Right[i]: i >= 0;
Left[1] -> AnotherRight[i];
Left[2] -> Right[-1]
}
After:
{
Left[0] -> Right[i]: i >= 0;
Left[2] -> Right[-1];
Left[1] -> AnotherRight[i]
}
llvm-svn: 322581
Rafael Espindola [Tue, 16 Jan 2018 18:21:23 +0000 (18:21 +0000)]
Fix another case we were using the wrong visibility.
llvm-svn: 322580
Alexey Bataev [Tue, 16 Jan 2018 18:17:01 +0000 (18:17 +0000)]
[SLP] Fix for PR32164: Improve vectorization of reverse order of extract operations.
Summary: Sometimes vectorization of insertelement instructions with extractelement operands may produce an extra shuffle operation, if these operands are in the reverse order. Patch tries to improve this situation by the reordering of the operands to remove this extra shuffle operation.
Reviewers: mkuper, hfinkel, RKSimon, spatel
Subscribers: mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D33954
llvm-svn: 322579
Alexey Bataev [Tue, 16 Jan 2018 17:55:15 +0000 (17:55 +0000)]
[OPENMP] Add support for `depend` clauses on `target parallel for simd`
directives.
Added codegen for `depend` clauses on `#pragma omp target parallel for
simd` directives.
llvm-svn: 322578
Alexey Bataev [Tue, 16 Jan 2018 17:41:04 +0000 (17:41 +0000)]
[OPENMP] Add support for `depend` clauses on `target parallel for`
directives.
Added codegen for `depend` clause on `#pragma omp target parallel for`
directives.
llvm-svn: 322577
Rafael Espindola [Tue, 16 Jan 2018 17:34:26 +0000 (17:34 +0000)]
Use the combined visibility when computing dso_local.
We track both the combined visibility that will be used for the output
symbol and the original input visibility of the selected symbol.
Almost everything should use the computed visibility.
I will make the names less confusing an a followup patch.
llvm-svn: 322576
Alexey Bataev [Tue, 16 Jan 2018 17:22:50 +0000 (17:22 +0000)]
[OPENMP] Add support for `depend` clauses on `target teams distribute
simd` directives.
Added codegen for `depend` clauses on `#pragma omp target teams
distribute simd` directives.
llvm-svn: 322575
Simon Pilgrim [Tue, 16 Jan 2018 17:01:31 +0000 (17:01 +0000)]
[X86][MMX] Accept UNDEF upper bits for MOVD GR32->MMX
llvm-svn: 322574
Nico Weber [Tue, 16 Jan 2018 16:55:41 +0000 (16:55 +0000)]
Add va_start()/va_copy()/va_end to Builtins.def
That way, clang suggests including stdarg.h when these are used in C files.
https://reviews.llvm.org/D42085
llvm-svn: 322573
Rafael Espindola [Tue, 16 Jan 2018 16:49:05 +0000 (16:49 +0000)]
Set dso_local in lld.
We were already doing this in gold, but not in lld.
llvm-svn: 322572
Alexey Bataev [Tue, 16 Jan 2018 16:46:46 +0000 (16:46 +0000)]
[OPENMP] Add support for `depend` clause on `target teams distribute`.
Added codegen for `depend` clauses on `#pragma omp target teams
distribute` directives.
llvm-svn: 322571
Alexey Bataev [Tue, 16 Jan 2018 16:27:49 +0000 (16:27 +0000)]
[OPENMP] Add support for `depend` clauses on `target parallel` directive.
Added codegen for `depend` clauses on `#pragma omp target parallel`
directives.
llvm-svn: 322570
Alexey Bataev [Tue, 16 Jan 2018 15:57:07 +0000 (15:57 +0000)]
[OPENMP] Add support for `depend` clauses on `target teams`.
Added codegen for `depend` clause on `#pragma omp target teams`
directives.
llvm-svn: 322569
Petar Jovanovic [Tue, 16 Jan 2018 15:57:03 +0000 (15:57 +0000)]
[LiveDebugValues] update kill-after-spill test with target triple
Set target triple to "x86_64-unknown-linux-gnu".
llvm-svn: 322568
Marshall Clow [Tue, 16 Jan 2018 15:48:27 +0000 (15:48 +0000)]
More constexpr algorithms from P0202. search/search_n
llvm-svn: 322566
Ulrich Weigand [Tue, 16 Jan 2018 15:39:23 +0000 (15:39 +0000)]
[SystemZ] Support vector registers with inline asm
Allow using vector register names and the "v" constraint
in inline asm to ensure compatibility with GCC.
llvm-svn: 322562
Alexey Bataev [Tue, 16 Jan 2018 15:05:16 +0000 (15:05 +0000)]
[OPENMP] Add support for `depend` clauses on `target simd`.
Added codegen for `depend` clauses on `#pragma omp target simd`
directives.
llvm-svn: 322559
Marshall Clow [Tue, 16 Jan 2018 14:54:36 +0000 (14:54 +0000)]
Change an internal table of constants for the poisson distribution from
type 'result_type' to 'double'. The only thing that we ever do with
these numbers is to promote them to 'double' and use them in a division.
For small result_types, the values were getting truncated, skewing the
results. Thanks to James Nagurne for the suggestion.
llvm-svn: 322556
Petar Jovanovic [Tue, 16 Jan 2018 14:46:05 +0000 (14:46 +0000)]
[LiveDebugValues] recognize spilled reg killed in instruction after spill
Current condition for spill instruction recognition in LiveDebugValues does
not recognize case when register is spilled and killed in next instruction.
Patch by Nikola Prica.
Differential Revision: https://reviews.llvm.org/D41226
llvm-svn: 322554
Simon Pilgrim [Tue, 16 Jan 2018 14:21:28 +0000 (14:21 +0000)]
[X86][MMX] Improve MMX constant generation
Extend the MMX zero code to take any constant with zero'd upper 32-bits
llvm-svn: 322553
Hiroshi Inoue [Tue, 16 Jan 2018 13:19:48 +0000 (13:19 +0000)]
[NFC] fix trivial typos in documents
"the the" -> "the"
llvm-svn: 322552
Hiroshi Inoue [Tue, 16 Jan 2018 13:19:31 +0000 (13:19 +0000)]
[NFC] fix trivial typo in document
"the the" -> "the"
llvm-svn: 322551
Sam McCall [Tue, 16 Jan 2018 12:54:28 +0000 (12:54 +0000)]
Squash -Wcovered-switch-default wairning
llvm-svn: 322549
Sam McCall [Tue, 16 Jan 2018 12:33:46 +0000 (12:33 +0000)]
Ensure code complete with !LoadExternal sees all local decls.
Summary:
noload_lookups() was too lazy: in addition to avoiding external decls, it
avoided populating the lazy lookup structure for internal decls.
This is the right behavior for the existing callsite in ASTDumper, but I think
it's not a very useful default, so we populate it by default.
While here:
- remove an unused test file accidentally added in r322371.
- remove lookups_begin()/lookups_end() in favor of lookups().begin(), which is
more common and more efficient.
Reviewers: ilya-biryukov
Subscribers: cfe-commits, rsmith
Differential Revision: https://reviews.llvm.org/D42077
llvm-svn: 322548
Sam McCall [Tue, 16 Jan 2018 12:21:24 +0000 (12:21 +0000)]
[clangd] Avoid combinatorial explosion in CodeCompleteTests.
Summary:
This test dominates our unit test runtime, and the change speeds it up by 10x.
We lose coverage of some combinations of flags, but I'm not sure that's finding
many bugs.
3300 -> 300ms on my machine (3800 -> 800ms for the whole of CompletionTest).
Reviewers: ilya-biryukov
Subscribers: klimek, cfe-commits
Differential Revision: https://reviews.llvm.org/D42063
llvm-svn: 322547
Ivan Donchevskii [Tue, 16 Jan 2018 12:11:59 +0000 (12:11 +0000)]
Add missing CINDEX_LINKAGE
Follow up for [libclang] Add PrintingPolicy for pretty printing declarations
Differential Revision: https://reviews.llvm.org/D39903
llvm-svn: 322546
Gadi Haber [Tue, 16 Jan 2018 11:33:45 +0000 (11:33 +0000)]
[X86][I86,I186,I286,I386,I486,PPRO, MMX]: Adding full coverage of MC encoding for the I86, I186, I286, I386, I486, PPRO and MMX isa sets.<NFC>
NFC.
Adding MC regressions tests to cover the I86, I186, I286, I386, I486, PPRO and MMX isa sets.
This patch is part of a larger task to cover MC encoding of all X86 ISA Sets.
Started in revision: https://reviews.llvm.org/D39952
Reviewers: zvi, RKSimon, AndreiGrischenko, craig.topper
Differential Revision: https://reviews.llvm.org/D40879
Change-Id: I231a35861611bfd3d23c74cc59507373f021a629
llvm-svn: 322544
Jonas Devlieghere [Tue, 16 Jan 2018 11:17:57 +0000 (11:17 +0000)]
[DebugInfo] Unify dumping of address ranges
Summary:
This patch unifies the printing of address ranges as [0x0, 0x1).
rdar://
34822059
Reviewers: aprantl, dblaikie
Subscribers: mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D42056
llvm-svn: 322543
Francis Visoiu Mistrih [Tue, 16 Jan 2018 10:53:14 +0000 (10:53 +0000)]
[CodeGen] Remove special case of printing subRegIdx from MachineInstr::print
Support in MachineOperand has been added in r320209. No need to special
case this anymore.
llvm-svn: 322542
Francis Visoiu Mistrih [Tue, 16 Jan 2018 10:53:11 +0000 (10:53 +0000)]
[CodeGen][NFC] Correct case for printSubRegIdx
llvm-svn: 322541
Jonathan Coe [Tue, 16 Jan 2018 10:19:56 +0000 (10:19 +0000)]
[libclang] Add PrintingPolicy for pretty printing declarations
Summary:
Introduce clang_getCursorPrettyPrinted() for pretty printing
declarations. Expose also PrintingPolicy, so the user gets more
fine-grained control of the entities being printed.
The already existing clang_getCursorDisplayName() is pretty limited -
for example, it does not handle return types, parameter names or default
arguments for function declarations. Addressing these issues in
clang_getCursorDisplayName() would mean to duplicate existing code
(e.g. clang::DeclPrinter), so rather expose new API to access the
existing functionality.
Reviewed By: jbcoe
Subscribers: cfe-commits
Tags: #clang
Patch by nik (Nikolai Kosjar)
Differential Revision: https://reviews.llvm.org/D39903
llvm-svn: 322540
Clement Courbet [Tue, 16 Jan 2018 09:11:20 +0000 (09:11 +0000)]
Add a value_type to ArrayRef.
Summary: Not sure this needs a review or not. Erring on the safe side.
Reviewers: dblaikie
Differential Revision: https://reviews.llvm.org/D41666
llvm-svn: 322538
Gadi Haber [Tue, 16 Jan 2018 08:50:29 +0000 (08:50 +0000)]
[X86][XSAVE]: Adding full coverage of MC encoding for the XSAVE isa sets.<NFC>
NFC.
Adding MC regressions tests to cover the XSAVE ISA sets.
This patch is part of a larger task to cover MC encoding of all X86 ISA Sets started in revision: https://reviews.llvm.org/D39952
Reviewers: zvi, RKSimon, AndreiGrischenko, craig.topper
Differential Revision: https://reviews.llvm.org/D41282
Change-Id: I325bf8f421f78c80179a04fc39033366759cbe45
llvm-svn: 322537
George Rimar [Tue, 16 Jan 2018 08:09:24 +0000 (08:09 +0000)]
[FileCheck] - Fix possible buffer out of bounds access when parsing --check-prefix.
FileCheck tool crashes when trying to parse --check-prefix argument if there is no any
data after it.
For example test like following would crash if there are no symbols and no EOL mark after `boom`:
# REQUIRES: x86
# RUN: <skipped few lines>
# RUN: llvm-readobj -t %t | FileCheck %s --check-prefix=boom
Patch fixes the issue.
Differential revision: https://reviews.llvm.org/D42057
llvm-svn: 322536
Yonghong Song [Tue, 16 Jan 2018 07:27:20 +0000 (07:27 +0000)]
[BPF] Mark pseudo insn patterns as isCodeGenOnly
These pseudos are not supposed to be visible to user.
This patch reduced the auto-generated instruction matcher. For example,
the following words are removed from keyword list of LLVM BPF assembler.
- MCK__35_, // '#'
- MCK__COLON_, // ':'
- MCK__63_, // '?'
- MCK_ADJCALLSTACKDOWN, // 'ADJCALLSTACKDOWN'
- MCK_ADJCALLSTACKUP, // 'ADJCALLSTACKUP'
- MCK_PSEUDO, // 'PSEUDO'
- MCK_Select, // 'Select'
Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
llvm-svn: 322535
Yonghong Song [Tue, 16 Jan 2018 07:27:19 +0000 (07:27 +0000)]
[BPF] Teach DAG2DAG AND elimination about load intrinsics
As commented on the existing code:
// The Reg operand should be a virtual register, which is defined
// outside the current basic block. DAG combiner has done a pretty
// good job in removing truncating inside a single basic block.
However, when the Reg operand comes from bpf_load_[byte | half | word]
intrinsics, the generic optimizer doesn't understand their results are
zero extended, so these single basic block elimination opportunities were
missed.
Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
llvm-svn: 322534
Hiroshi Inoue [Tue, 16 Jan 2018 06:23:05 +0000 (06:23 +0000)]
[SROA] fix assetion failure
This patch fixes the assertion failure in SROA reported in PR35657.
PR35657 reports the assertion failure due to r319522 (splitting for non-whole-alloca slices), but this problem can happen even without r319522.
The problem exists in a check for reusing an existing alloca when rewriting partitions. As the original comment said, we can reuse the existing alloca if the new alloca has the same type and offset with the existing one. But the code checks only type of the alloca and then check the offset using an assert.
In a corner case with out-of-bounds access (e.g. @PR35657 function added in unit test), it is possible that the two allocas have the same type but different offsets.
This patch makes the check of the offset in the if condition, and re-enables the splitting for non-whole-alloca slices.
Differential Revision: https://reviews.llvm.org/D41981
llvm-svn: 322533
Craig Topper [Tue, 16 Jan 2018 06:07:16 +0000 (06:07 +0000)]
[X86] Revisit the fix I made years ago to make 'xchgl %eax, %eax' not encode using the 0x90 encoding in 64-bit mode.
Prior to this we had a separate instruction and register class that excluded eax to prevent matching the instruction that would encode with 0x90.
This patch changes this to just use an InstAlias to force xchgl %eax, %eax to use XCHG32rr instruction in 64-bit mode. This gets rid of the separate instruction and register class.
llvm-svn: 322532
Craig Topper [Tue, 16 Jan 2018 06:07:14 +0000 (06:07 +0000)]
[X86] Make 'xchgq %rax, %rax' an alias for the 0x90 nop encoding to match gas.
Previously we encoded it as 0x48 0x90.
llvm-svn: 322531
George Burgess IV [Tue, 16 Jan 2018 03:01:50 +0000 (03:01 +0000)]
[Sema] Fix a crash on invalid features in multiversioning
We were trying to emit a diag::err_bad_multiversion_option diagnostic,
which expects an int as its first argument, with a string argument. As
it happens, the string `Feature` that was causing this was shadowing an
int `Feature` from the surrounding scope. :)
llvm-svn: 322530
Marshall Clow [Tue, 16 Jan 2018 02:34:41 +0000 (02:34 +0000)]
More constexpr algorithms from P0202: lower_bound, upper_bound, equal_range, binary_search
llvm-svn: 322529
Marshall Clow [Tue, 16 Jan 2018 02:11:13 +0000 (02:11 +0000)]
Actually CALL the constexpr tests.
llvm-svn: 322528
Marshall Clow [Tue, 16 Jan 2018 02:04:10 +0000 (02:04 +0000)]
More constexpr (re P0202) - equal and mismatch
llvm-svn: 322527
Simon Pilgrim [Mon, 15 Jan 2018 22:40:06 +0000 (22:40 +0000)]
Avoid Wparentheses warning.
llvm-svn: 322526
Simon Pilgrim [Mon, 15 Jan 2018 22:32:40 +0000 (22:32 +0000)]
[X86][MMX] Add support for MMX zero vector creation
As mentioned on PR35869, (and came up recently on D41517) we don't create a MMX zero register via the PXOR but instead perform a spill to stack from a XMM zero register.
This patch adds support for direct MMX zero vector creation and should make it easier to add better constant vector creation in the future as well.
Differential Revision: https://reviews.llvm.org/D41908
llvm-svn: 322525
Simon Pilgrim [Mon, 15 Jan 2018 22:18:45 +0000 (22:18 +0000)]
[X86][SSE] Add custom execution domain fixing for BLENDPD/BLENDPS/PBLENDD/PBLENDW (PR34873)
Add support for custom execution domain fixing and implement support for BLENDPD/BLENDPS/PBLENDD/PBLENDW.
Differential Revision: https://reviews.llvm.org/D42042
llvm-svn: 322524
Sanjay Patel [Mon, 15 Jan 2018 21:57:41 +0000 (21:57 +0000)]
[x86] add tests to show missed constant shrinking (PR35907); NFC
llvm-svn: 322523
Sanjay Patel [Mon, 15 Jan 2018 21:32:39 +0000 (21:32 +0000)]
[x86] regenerate test checks; NFC
llvm-svn: 322522
Sanjay Patel [Mon, 15 Jan 2018 21:28:52 +0000 (21:28 +0000)]
[x86] regenerate test checks; NFC
llvm-svn: 322521
Brian Gesiak [Mon, 15 Jan 2018 21:23:32 +0000 (21:23 +0000)]
[docs] Only LLVM IR bitstreams begin with 'BC'
Summary:
The LLVM Bitcode File Format documentation states that all bitstreams
begin with the magic number 'BC', and that generic bitstream analyzer
tools may check for this number in order to determine whether the
stream is a bitstream.
However, in practice:
* Only LLVM IR bitcode begins with 'BC'. Other bitstreams -- Clang
AST files and precompiled headers, Clang serialized diagnostics,
Swift modules -- do not start with 'BC'. A tool that actually checked
for 'BC' would only be able to recognize LLVM IR.
* The `llvm-bcanalyzer`, arguably the most used generic bitstream
analyzer tool, does not check for a magic number 'BC' (except to
determine whether the file is LLVM IR).
Update the bitcode format documentation to make it clear that not all
bitstreams begin with 'BC', and that tools should not rely on that
particular magic number value.
Test Plan:
Build the `docs-llvm-html` target and confirm the changes render in
a Safari web browser.
Reviewers: harlanhaskins, eugenis, mehdi_amini, pcc, angerman
Reviewed By: angerman
Subscribers: angerman, llvm-commits
Differential Revision: https://reviews.llvm.org/D42002
llvm-svn: 322520
Sanjay Patel [Mon, 15 Jan 2018 21:22:46 +0000 (21:22 +0000)]
[x86] regenerate test checks; NFC
llvm-svn: 322519
Erich Keane [Mon, 15 Jan 2018 21:16:25 +0000 (21:16 +0000)]
Revert 319303: Add _Float128 as alias to __float128 to enable compilations on Fedora27/glibc2
Differential Revision: https://reviews.llvm.org/D40673
llvm-svn: 322518
Brian Gesiak [Mon, 15 Jan 2018 21:05:40 +0000 (21:05 +0000)]
[Driver] Suggest valid integrated tools
Summary:
There are only two valid integrated Clang driver tools: `-cc1` and
`-cc1as`. If a user asks for an unknown tool, such as `-cc1asphalt`,
an error message is displayed to indicate that there is no such tool,
but the message doesn't indicate what the valid options are.
Include the valid options in the error message.
Test Plan: `check-clang`
Reviewers: sepavloff, bkramer, phosek
Reviewed By: bkramer
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D42004
llvm-svn: 322517
Alexey Bataev [Mon, 15 Jan 2018 21:01:29 +0000 (21:01 +0000)]
[OPENMP] Update status of OpenMP support, NFC.
llvm-svn: 322516
Alexey Bataev [Mon, 15 Jan 2018 20:59:40 +0000 (20:59 +0000)]
[OPENMP] Initial codegen for `target teams distribute parallel for
simd`.
Added host codegen + codegen for devices with default codegen for
`#pragma omp target teams distribute parallel for simd` directive.
llvm-svn: 322515
Alex Bradbury [Mon, 15 Jan 2018 20:45:15 +0000 (20:45 +0000)]
[RISCV] Fix test failures on non-assert builds introduced in r322494
Thanks to Eli Friedman, who suggested the reason these tests failed on a few
buildbots yet works fine locally is because non-assert builds don't emit value
labels.
llvm-svn: 322514
Cameron Desrochers [Mon, 15 Jan 2018 20:37:35 +0000 (20:37 +0000)]
Fixed memory leak in unit test introduced in my previous commit r322503
llvm-svn: 322513
Craig Topper [Mon, 15 Jan 2018 20:33:53 +0000 (20:33 +0000)]
[X86] Use MVT::getVectorVT instead of EVT::getVectorVT when splitting 256/512 bit build_vectors. NFC
We must be creating a legal type here which means it can be an MVT.
llvm-svn: 322512
Craig Topper [Mon, 15 Jan 2018 20:33:52 +0000 (20:33 +0000)]
[X86] Generalize some code in LowerBUILD_VECTOR. NFC
llvm-svn: 322511
Craig Topper [Mon, 15 Jan 2018 20:33:50 +0000 (20:33 +0000)]
[X86] Remove unnecessary if statement from LowerBUILD_VECTOR. NFCI
We were checking for 128, 256, or 512 bit vectors, but those are the only types that can get here.
llvm-svn: 322510
Sam McCall [Mon, 15 Jan 2018 20:09:09 +0000 (20:09 +0000)]
[clangd] Improve const-correctness of Symbol->Detail. NFC
Summary:
This would have caught a bug I wrote in an early version of D42049, where
an index user could overwrite data internal to the index because the Symbol is
not deep-const.
The YAML traits are now a bit more verbose, but separate concerns a bit more
nicely: ArenaPtr can be reused for other similarly-allocated objects, including
scalars etc.
Reviewers: hokein
Subscribers: klimek, ilya-biryukov, cfe-commits, ioeric
Differential Revision: https://reviews.llvm.org/D42059
llvm-svn: 322509
Dan Gohman [Mon, 15 Jan 2018 20:08:14 +0000 (20:08 +0000)]
[WebAssembly] Update README.txt.
Describe more of the current status, mention Rust as another easy
way to use this backend, and add more documentation links.
llvm-svn: 322508
Marshall Clow [Mon, 15 Jan 2018 19:59:09 +0000 (19:59 +0000)]
Fix constexpr failure on C++11-based buildbots.
llvm-svn: 322507
Marshall Clow [Mon, 15 Jan 2018 19:40:34 +0000 (19:40 +0000)]
More constexpr from P0202. count and count_if. Also fix a comment that Morwenn noted.
llvm-svn: 322506
Marshall Clow [Mon, 15 Jan 2018 19:32:32 +0000 (19:32 +0000)]
Some of the tests from earlier today had 'int' as the return type when it should have been 'bool'. Fix that. It doesn't change the behavior of any of the tests, but it's more accurate.
llvm-svn: 322505
Marshall Clow [Mon, 15 Jan 2018 19:26:05 +0000 (19:26 +0000)]
More P0202 constexpr-ifying. All the find_XXX algorithms in this commit.
llvm-svn: 322504
Cameron Desrochers [Mon, 15 Jan 2018 19:14:16 +0000 (19:14 +0000)]
[PCH] Serialize skipped preprocessor ranges
The skipped preprocessor ranges are now serialized in the AST PCH file. This fixes, for example, libclang's clang_getSkippedRanges() returning zero ranges after reparsing a translation unit.
Differential Revision: https://reviews.llvm.org/D20124
llvm-svn: 322503
Alexey Bataev [Mon, 15 Jan 2018 19:08:36 +0000 (19:08 +0000)]
[OPENMP] Update docs for OpenMP status, NFC.
llvm-svn: 322502
Alexey Bataev [Mon, 15 Jan 2018 19:06:12 +0000 (19:06 +0000)]
[OPENMP] Add codegen for `depend` clauses on `target` directive.
Added basic support for codegen of `depend` clauses on `target`
directive.
llvm-svn: 322501
Stanislav Mekhanoshin [Mon, 15 Jan 2018 18:49:15 +0000 (18:49 +0000)]
[AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32
Differential Revision: https://reviews.llvm.org/D41617
llvm-svn: 322500
Krzysztof Parzyszek [Mon, 15 Jan 2018 18:43:55 +0000 (18:43 +0000)]
[Hexagon] Implement signed and unsigned multiply-high for vectors
llvm-svn: 322499
Krzysztof Parzyszek [Mon, 15 Jan 2018 18:33:33 +0000 (18:33 +0000)]
[Hexagon] Rewrite LowerVECTOR_SHUFFLE for 32-/64-bit vectors
The old implementation was not always correct. The new one recognizes
more shuffles that match specific instructions.
llvm-svn: 322498
Samuel Benzaquen [Mon, 15 Jan 2018 18:03:20 +0000 (18:03 +0000)]
[clang-tidy] Expand readability-redundant-smartptr-get to understand implicit converions to bool in more contexts.
Summary: Expand readability-redundant-smartptr-get to understand implicit converions to bool in more contexts.
Reviewers: hokein
Subscribers: klimek, xazax.hun, cfe-commits
Differential Revision: https://reviews.llvm.org/D41998
llvm-svn: 322497
Stanislav Mekhanoshin [Mon, 15 Jan 2018 17:55:35 +0000 (17:55 +0000)]
[AMDGPU] Copy impdefs from pseudo to real instructions
In some cases we do not copy implicit defs from pseudo to real
VOP instructions. It has no visible impact at the moment thus no
tests are affected or added.
Differential Revision: https://reviews.llvm.org/D41783
llvm-svn: 322496
Simon Pilgrim [Mon, 15 Jan 2018 17:55:21 +0000 (17:55 +0000)]
[X86] Fix typos in WriteVMOVNTDQSt and WriteVMOVNTPYSt pattern names. NFCI.
llvm-svn: 322495
Alex Bradbury [Mon, 15 Jan 2018 17:54:52 +0000 (17:54 +0000)]
[RISCV] Implement RISCV ABI lowering
RISCVABIInfo is implemented in terms of XLen, supporting both RV32 and RV64.
Unfortunately we need to count argument registers in the frontend in order to
determine when to emit signext and zeroext attributes. Integer scalars are
extended according to their type up to 32-bits and then sign-extended to XLen
when passed in registers, but are anyext when passed on the stack. This patch
only implements the base integer (soft float) ABIs.
For more information on the RISC-V ABI, see [the ABI
doc](https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md),
my [golden model](https://github.com/lowRISC/riscv-calling-conv-model), and
the [LLVM RISC-V calling convention
patch](https://reviews.llvm.org/D39898#
2d1595b4) (specifically the comment
documenting frontend expectations).
Differential Revision: https://reviews.llvm.org/D40023
llvm-svn: 322494
Marshall Clow [Mon, 15 Jan 2018 17:53:34 +0000 (17:53 +0000)]
partition_point gets the P0202 treatment
llvm-svn: 322493
Marshall Clow [Mon, 15 Jan 2018 17:20:36 +0000 (17:20 +0000)]
More constexpr algorithms from P0202. any_of/all_of/none_of.
llvm-svn: 322492