Tom Rini [Fri, 17 Feb 2023 14:03:35 +0000 (09:03 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- binman: Add help message if opensbi is absent when building u-boot SPL
- AndesTech: rename cpu and board name to 'andesv5' and 'ae350'
- Clean up cache operation for Andes ae350 platform
Rick Chen [Fri, 17 Feb 2023 08:57:01 +0000 (16:57 +0800)]
riscv: binman: Add help message for missing blobs
Add the 'missing-msg' for more detailed output
on missing system firmware.
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Leo Yu-Chi Liang [Tue, 14 Feb 2023 12:42:50 +0000 (20:42 +0800)]
riscv: ae350: Adjust the memory layout of ae350
Adjust the initial stack pointer address to 0x10000000(256M)
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Leo Yu-Chi Liang [Tue, 14 Feb 2023 12:42:49 +0000 (20:42 +0800)]
riscv: Rename Andes cpu and board names
The current ae350-related defconfigs could also
support newer Andes CPU IP, so modify the names of CPU
from ax25 to andesv5, and board name from ax25-ae350 to ae350.
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 08:10:53 +0000 (16:10 +0800)]
driver: cache-v5l2: Fix type casting warning on RV32
This patch fixes following warning for the riscv32 toolchain.
drivers/cache/cache-v5l2.c:122:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
122 | regs = (struct l2cache *)dev_read_addr(dev);
| ^
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 08:10:52 +0000 (16:10 +0800)]
configs: ae350: Display CPU and board info for AE350 platforms
Display information about CPU and board during start up.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 08:10:51 +0000 (16:10 +0800)]
configs: ae350: Increase maximum retry count for AE350 platforms
Loading an image via TFTP is often interrupted when retrying more than
10 times, increase the number of retries so that it does not simply stop
the transfer.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 08:10:50 +0000 (16:10 +0800)]
configs: ae350: Enable v5l2 cache for AE350 platforms in SPL
To reduce the code size, CONFIG_V5L2_CACHE was disabled since commit:
ca06444aac2c643db3a3f2eb37afc60fae15177e
Turing on does not significantly increase the size of u-boot-spl.bin,
so we enable it by default to improve performance.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 08:10:49 +0000 (16:10 +0800)]
riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPL
This patch refines L1 cache enable/disable and v5l2-cache enable
functions.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 08:10:48 +0000 (16:10 +0800)]
riscv: ae350: dts: Update L2 cache compatible string
Update the compatible string of L2 cache.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 08:10:47 +0000 (16:10 +0800)]
riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init()
As the OpenSBI v1.2 does not enable the cache [0], we enable
the i/d-cache in harts_early_init() and do not disable in
cleanup_before_linux(). This patch also simplifies the logic
and moves the CSR encoding to include/asm/arch-andes/csr.h.
[0] https://github.com/riscv-software-src/opensbi/commit/
bd7ef4139829da5c30fa980f7498d385124408fa
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 08:10:46 +0000 (16:10 +0800)]
driver: cache: cache-v5l2: Update memory-mapped scheme to support Gen2 platform
The L2C configuration register has MAP field to indicate its version
is v0 (Gen1) or v1 (Gen2) L2-cache. This patch makes the driver
compatible with both memory-mapped scheme.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 08:10:45 +0000 (16:10 +0800)]
board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init()
The L2-cache is not enabled currently, the enbale_caches() will call
the v5l2_enable() callback to enable it in SPL.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Leo Yu-Chi Liang [Mon, 6 Feb 2023 08:10:44 +0000 (16:10 +0800)]
riscv: Remove redundant Kconfig "RISCV_NDS_CACHE"
There is no need for RISCV_NDS_CACHE config to control cache switches.
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Yu Chien Peter Lin [Mon, 6 Feb 2023 02:06:29 +0000 (10:06 +0800)]
riscv: global_data.h: Correct the comment for PLICSW
PLIC is used for external interrupt, while PLICSW is an Andes-specific
design for software interrupt.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tom Rini [Mon, 13 Feb 2023 23:39:15 +0000 (18:39 -0500)]
Prepare v2023.04-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
Sumit Garg [Mon, 13 Feb 2023 04:49:09 +0000 (10:19 +0530)]
clocks: qcs404: Add support for I2C clocks
Co-developed-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Tom Rini [Mon, 13 Feb 2023 14:57:35 +0000 (09:57 -0500)]
Merge tag 'i2c-updates-for-v2023.04' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2023.04
- add new i2c driver ast2600 from Ryan Chen
- i2c-cdns: make read fifo-depth configurable through device tree
from Pei Yue Ho
- mxc i2c driver: print base address in hex, not in decimal
from Fabio
Tom Rini [Mon, 13 Feb 2023 14:39:15 +0000 (09:39 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- mvebu: Support for 2 new Armada 385 boards (Tony)
- mvebu: Minor misc board enhancements (Tony)
- kirkwood: Serial driver fixes (Kconfig & dtsi) (Tony)
- cmd: return code when tlv_eeprom incorrectly called (Heinrich)
Tony Dinh [Fri, 10 Feb 2023 21:08:17 +0000 (13:08 -0800)]
arm: kirkwood: Enable uart0 dm-pre-reloc for Pogoplug V4 board
When DM_SERIAL is enabled, the device-tree tag u-boot,dm-pre-reloc is
required for this board to boot over UART with kwboot. Enable this in
kirkwood-pogoplug-series-4-u-boot.dtsi.
Added by Stefan while applying:
Please note that it's not fully understood, why this property really
is needed. Here a link to the discussion about this:
https://lore.kernel.org/r/
20230201080210.ypz4nrj4y2igwxz3@pali/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tony Dinh [Thu, 9 Feb 2023 22:00:03 +0000 (14:00 -0800)]
arm: mvebu: Add support for Synology DS116 (Armada 385)
Synology DS116 is a NAS based on Marvell Armada 385 SoC.
Board Specification:
- Marvel MV88F6820 Dual Core at 1.8GHz
- 1 GiB DDR3 RAM
- 8MB Macronix mx25l6405d SPI flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 1x SATA (6 Gbps)
- 3x LED
- PIC16F1829 (connected to uart1)
- GPIO fan
- serial console
Note that this patch depends on the add-support for Thecus N2350 patch:
https://patchwork.ozlabs.org/project/uboot/patch/
20230201231306.7010-1-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Tony Dinh [Tue, 7 Feb 2023 01:00:11 +0000 (17:00 -0800)]
arm: mvebu: Power up 2nd SATA port for Thecus N2350
Currently, only the 1st SATA port is powered up (by GPIO1 12).
Add GPIO1 13 in board initialization to power up the 2nd SATA port.
Note that this patch depends on the initial add-support patch:
https://patchwork.ozlabs.org/project/uboot/patch/
20230201231306.7010-1-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tony Dinh [Thu, 2 Feb 2023 22:16:53 +0000 (14:16 -0800)]
arm: kirkwood: sheevaplug: reduce u-boot image size
Sheevaplug board has 512K CONFIG_BOARD_SIZE_LIMIT. Recently, DM_SERIAL has
pushed the image size a few hundred bytes over that limit. So explicitly
deselect some configs that are unrelated to this board
(and gain back a bit over 2K).
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Tony Dinh [Wed, 1 Feb 2023 23:13:05 +0000 (15:13 -0800)]
arm: mvebu: Add support for Thecus N2350 (Armada 385) board
Thecus N2350 is a NAS based on Marvell Armada 385 SoC.
Specification:
- Processor: Marvel MV88F6820 Dual Core at 1GHz
- 1 GiB DDR4 RAM
- 4MB Macronix mx25l3205d SPI flash
- 512MB Hynix H27U4G8F2DTR-BC NAND flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 2x SATA (hot swap slots)
- 3x buttons
- 10x LEDS
- serial console
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tony Dinh [Tue, 31 Jan 2023 22:06:54 +0000 (14:06 -0800)]
arm: kirkwood: Use CONFIG_SYS_NS16550 with DM_SERIAL for Kirkwood boards
CONFIG_SYS_NS16550 is required when DM_SERIAL is enabled for
Kirkwood boards.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Heinrich Schuchardt [Fri, 27 Jan 2023 21:49:10 +0000 (22:49 +0100)]
cmd: return code when tlv_eeprom incorrectly called
A command called with incorrect parameters should set $? to 1 (false).
Instead of calling cmd_usage(cmdtp) and then returning 0 just return
CMD_RET_FAILURE.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Pei Yue Ho [Mon, 13 Feb 2023 08:02:41 +0000 (00:02 -0800)]
i2c: i2c-cdns.c: Update driver to read fifo-depth from device tree
Enable driver to fetch the optional parameter (fifo-depth) from device
tree. If the parameter is not found in the device tree, it will use
the default value declared in the driver.
Signed-off-by: Pei Yue Ho <peiyue.ho@starfivetech.com>
Reviewed-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
Reviewed-by: Eng Lee Teh <englee.teh@starfivetech.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Pei Yue Ho [Mon, 13 Feb 2023 08:02:40 +0000 (00:02 -0800)]
dt-bindings: i2c: i2c-cdns.txt: Add description for an optional parameter, fifo-depth
Add description for fifo-depth parameter that can be used
in the device tree.
Signed-off-by: Pei Yue Ho <peiyue.ho@starfivetech.com>
Reviewed-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
Reviewed-by: Eng Lee Teh <englee.teh@starfivetech.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Ryan Chen [Mon, 30 Jan 2023 06:19:25 +0000 (14:19 +0800)]
arm: aspeed: dtsi: add reg for i2c
The i2c driver have global register that i2c bus use
ofnode_get_parent to get parent register address.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Ryan Chen [Mon, 30 Jan 2023 06:19:24 +0000 (14:19 +0800)]
i2c:aspeed:support ast2600 i2c new register mode driver
Add i2c new register mode driver to support AST2600 i2c
new register mode. AST2600 i2c controller have legacy and
new register mode. The new register mode have global register
support 4 base clock for scl clock selection, and new clock
divider mode.
Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Fabio Estevam [Tue, 3 Jan 2023 19:03:44 +0000 (16:03 -0300)]
i2c: mxc_i2c: Use hex notation for the base address
Printing the I2C controller base address in decimal notation
is not helpful.
Change it to hex notation, which is the standard format found
in the Reference Manual and devicetree.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Mon, 13 Feb 2023 01:11:22 +0000 (20:11 -0500)]
Merge tag 'dm-pull-12feb23' of https://source.denx.de/u-boot/custodians/u-boot-dm
minor changes to fdt command and binman
Andre Przywara [Fri, 10 Feb 2023 11:02:12 +0000 (11:02 +0000)]
cmd: fdt: allow standalone "fdt move"
At the moment every subcommand of "fdt", except "addr" itself, requires
the DT address to be set first. We explicitly check for that before even
comparing against the subcommands' string.
This early bailout also affects the "move" subcommand, even though that
does not require or rely on a previous call to "fdt addr". In fact it
even sets the FDT address to the target of the move command, so is a
perfect beginning for a sequence of fdt commands.
Move the check for a previously set FDT address to after we handle the
"move" command also, so we don't need a dummy call to "fdt addr" first,
before being able to move the devicetree.
This skips one pointless "fdt addr" call in scripts which aim to alter
the control DT, but need to copy it to a safe location first (for
instance to $fdt_addr_r).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Fri, 10 Feb 2023 11:02:11 +0000 (11:02 +0000)]
cmd: fdt: move: Use map_sysmem to convert pointers
The "fdt move" subcommand was using the provided DTB addresses directly,
without trying to "map" them into U-Boot's address space. This happened
to work since on the vast majority of "real" platforms there is a simple
1:1 mapping of VA to PAs, so either value works fine.
However this is not true on the sandbox, so the "fdt move" command fails
there miserably:
=> fdt addr $fdtcontroladdr
=> cp.l $fdtcontroladdr $fdt_addr_r 40 # simple memcpy works
=> fdt move $fdtcontroladdr $fdt_addr_r
Segmentation fault
Use the proper "map_sysmem" call to convert PAs to VAs, to make this
more robust in general and to enable operation in the sandbox.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 7 Feb 2023 21:34:18 +0000 (14:34 -0700)]
binman: Show the image name for the top-level section
At present we show 'main section' as the top-level section name. It may
be more helpful to show the actual image name. This is tricky because
Image is a parent class of Entry_section, so there is no distinction
between an image and a section.
Update it to show the image name.
Signed-off-by: Simon Glass <sjg@chromium.org>
Jade Lovelace [Sat, 11 Feb 2023 01:15:26 +0000 (17:15 -0800)]
socfpga: fix the serial console on DE1-SoC
Previously, the TX LED would flash but nothing would appear on the
serial port, and the board would appear dead with a build of the
socfpga_cyclone5_defconfig. I have verified that adding the frequency to
the uart will fix the serial console on my board.
Thanks to @ehoffman on the Rocketboards forum:
https://forum.rocketboards.org/t/cyclonev-programming-fpga-from-u-boot/2230/30
Signed-off-by: Jade Lovelace <lists@jade.fyi>
Reviewed-by: Marek Vasut <marex@denx.de>
Tom Rini [Sun, 12 Feb 2023 20:25:32 +0000 (15:25 -0500)]
Merge tag 'clk-2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-clk
Clock changes for 2023.04-rc1
This contains various fixes and small features. I've included a reset patch as
well since it was in the same series as a clock patch.
Tom Rini [Sun, 12 Feb 2023 20:25:09 +0000 (15:25 -0500)]
Merge branch 'for-2023.04' of https://source.denx.de/u-boot/custodians/u-boot-mpc8xx
- A fix for a long standing bug that has been exposed by commit
50128aeb0f8 ("cyclic: get rid of cyclic_init()") preventing 8xx boards
from booting since u-boot 2023.01
- A GPIO driver for powerpc 8xx chip
- Fixup for powerpc 8xx SPI driver
- A new powerpc 8xx board
- The two devices having that board.
Samuel Holland [Sun, 22 Jan 2023 00:02:52 +0000 (18:02 -0600)]
reset: Allow reset_get_by_name() with NULL name
This allows devm_reset_control_get(dev, NULL) to work and get the first
reset control, which is common in code ported from Linux.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230122000252.53642-2-samuel@sholland.org
Samuel Holland [Sun, 22 Jan 2023 00:02:51 +0000 (18:02 -0600)]
clk: Allow clk_get_by_name() with NULL name
This allows devm_clock_get(dev, NULL) to work and get the first clock,
which is common in code ported from Linux.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230122000252.53642-1-samuel@sholland.org
Patrick Delaunay [Tue, 13 Dec 2022 13:57:10 +0000 (14:57 +0100)]
cmd: clk: probe the clock before dump them
The clock UCLASS need to be probed to allow availability of the
private data (struct clk *), get in show_clks() with dev_get_clk_ptr()
before use them.
Without this patch the clock dump can cause crash because all the
private data are not available before calling the API clk_get_rate().
It is the case for the SCMI clocks, priv->channel is needed for
scmi_clk_get_rate() and it is initialized only in scmi_clk_probe().
This issue causes a crash for "clk dump" command on STM32MP135F-DK board
for SCMI clock not yet probed.
Fixes:
1a725e229096 ("clk: fix clock tree dump to properly dump out every registered clock")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20221213145708.v2.1.Ia0bc6b272f1e2e3f37873c61d79138c2663c4055@changeid
Dario Binacchi [Mon, 19 Dec 2022 11:31:26 +0000 (12:31 +0100)]
clk: imx8mn: fix imx8mn_enet_phy_sels clocks list
[backport from linux commit
2626cf67f20b28446dfc3a5b9493dd535cdb747b]
According to the "Clock Root" table of the reference manual (document
IMX8MNRM Rev 2, 07/2022):
Clock Root offset Source Select (CCM_TARGET_ROOTn[MUX])
... ... ...
ENET_PHY_REF_CLK_ROOT 0xAA80 000 - 24M_REF_CLK
001 - SYSTEM_PLL2_DIV20
010 - SYSTEM_PLL2_DIV8
011 - SYSTEM_PLL2_DIV5
100 - SYSTEM_PLL2_DIV2
101 - AUDIO_PLL1_CLK
110 - VIDEO_PLL_CLK
111 - AUDIO_PLL2_CLK
... ... ...
while the imx8mn_enet_phy_sels list didn't contained audio_pll1_out for
source select bits 101b.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20221219113127.528282-4-dario.binacchi@amarulasolutions.com
Dario Binacchi [Mon, 19 Dec 2022 11:31:25 +0000 (12:31 +0100)]
clk: imx: rename video_pll1 to video_pll
[backport from linux commit
bedcf9d1dcf88ed38731f0ac9620e5a421e1e9d6]
Unlike audio_pll1 and audio_pll2, there is no video_pll2. Further, the
name used in the RM is video_pll. So, let's rename "video_pll1" to
"video_pll" to be consistent with the RM and avoid misunderstandings.
No functional changes intended.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20221219113127.528282-3-dario.binacchi@amarulasolutions.com
Dario Binacchi [Mon, 19 Dec 2022 11:31:24 +0000 (12:31 +0100)]
clk: imx8mn: rename vpu_pll to m7_alt_pll
[backport from linux commit
a429c60baefd95ab43a2ce7f25d5b2d7a2e431df]
The IMX8MN platform does not have any video processing unit (VPU), and
indeed in the reference manual (document IMX8MNRM Rev 2, 07/2022) there
is no occurrence of its pll. From an analysis of the code and the RM
itself, I think vpu pll is used instead of m7 alternate pll, probably
for copy and paste of code taken from modules of similar architectures.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20221219113127.528282-2-dario.binacchi@amarulasolutions.com
Jim Liu [Mon, 21 Nov 2022 09:15:28 +0000 (17:15 +0800)]
clk: nuvoton: fix bug for calculate pll clock
Fix bug for npcm7xx bmc calculate pll clock.
PLLCON1 need to divide by 2.
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20221121091528.1351-1-JJLIU0@nuvoton.com
Sjoerd Simons [Sun, 12 Feb 2023 15:07:05 +0000 (16:07 +0100)]
lmb: Treat a region which is a subset as equal
In various cases logical memory blocks are coalesced; As a result doing
a strict check whether memory blocks are the same doesn't necessarily
work as a previous addition of a given block might have been merged into
a bigger block.
Fix this by considering a block is already registered if it's a pure
subset of one of the existing blocks.
Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Tom Rini [Sun, 12 Feb 2023 15:56:54 +0000 (10:56 -0500)]
Merge branch '2023-02-10-update-trace-feature-to-work-with-trace-cmd'
To quote the author:
Since U-Boot's tracing feature was originally written, quite a few changes
have taken place in this domain. The original text format used by tracing
is still emitted by Linux, but a new trace-cmd tool has invented a binary
format which is now used by new tools, such as kernelshark.
With recent distributions and the move to Python 3, the old pybootchart
tool does not build or run. Unfortunately there is no 1:1 replacement for
the features that were provided by pybootchart, or at least it is not
obvious. Still, it makes sense to keep with the times.
This series updates proftool to use the new binary format, adding support
for function and funcgraph tracing, so that U-Boot's trace records can be
examined by trace-cmd and kernelshark.
This series also adds support for a flamegraph, which provides a visual
way to see which functions are called a lot, as well as which ones consume
the most time.
Some minor updates to the trace implementation within U-Boot are included,
to provide a little more information and to fix a few problems.
No unit tests are provided by proftool, but a functional test ensures that
sandbox can emit traces which can be processed by proftool, then parsed by
trace-cmd and that the timing of the various formats looks consistent.
Tom Rini [Tue, 7 Feb 2023 17:32:19 +0000 (12:32 -0500)]
CI, Docker: Update to Jammy 2023016 tag
Move to the latest tag for "Jammy" and rebuild the containers.
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sun, 15 Jan 2023 21:16:01 +0000 (14:16 -0700)]
trace: Update documentation
Revamp the documentation for the new features, including a description of
the new features and documentation for the trace command.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:16:00 +0000 (14:16 -0700)]
trace: Add a test
Add a test which runs sandbox, collects a trace and makes sure it can
be processed by trace-cmd. This should ensure that this feature continues
to work as U-Boot and trace-cmd evolve.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:59 +0000 (14:15 -0700)]
Docker: Support trace-cmd
Build trace-cmd as part of the docker image, so that trace tests can be
used. Unfortunately the version provided by distributions is a little old
and has bugs. It also does not support specifying the time base for the
trace, which is required to convert microseconds to nanaseconds.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:58 +0000 (14:15 -0700)]
trace: Provide a flamegraph that uses timing
Add a second variant of the flame graph that shows records in terms of the
number of microseconds used by each call stack. This is a useful way of
seeing where time is going within the execution of U-Boot.
This requires a call stack that records the start time of each function,
as well as a way of subtracting all time consumed by child functions, so
that this time is not counted twice by the flamegraph. The time values in
the output are just for the function itself, not for its children.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:57 +0000 (14:15 -0700)]
trace: Support output of a flamegraph
It is useful to see how many times each function is called, particularly
in the context of its callers. A flamegraph is a way of showing this.
Support output in this format which can be used by the flamegraph.pl
script, to generate an SVG image for browsing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:56 +0000 (14:15 -0700)]
trace: Support output of funcgraph records
Add support for writing ftrace records in the 'funcgraph' format, which
shows function entry and exit points as well as the time taken by each
function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:55 +0000 (14:15 -0700)]
trace: Use text_base from the trace header
Use the information in the trace header instead of reading it from the
trace records. Add debugging to check that System.map and the trace header
agree on this value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:54 +0000 (14:15 -0700)]
trace: Drop use of objsection
This feature was only partly implemented and serves no current purpose.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:53 +0000 (14:15 -0700)]
trace: Update proftool to use new binary format
The old text format is not much used anymore. Instead a new trace-cmd tool
has introduced a binary format for trace records.
Add support for generating this format. This involves removing the old
text format, adding various helpers for the new format and adjusting the
code to use an output file instead of stdout.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:52 +0000 (14:15 -0700)]
trace: Rename prof to trace and improve comments
The current use of 'profile' in some places is confusing. Update the code
to use the word 'trace' consistently. Change the flags to better match
their meaning and add some more comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:51 +0000 (14:15 -0700)]
trace: Detect an infinite loop
If something is wrong with a board's timer function such that it calls
functions not marked with notrace, U-Boot will hang.
Detect this, print a message and disable the trace.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:50 +0000 (14:15 -0700)]
trace: Correct the relocation handover with buffer overflow
When the early trace buffer overflows it leaves a gap in the trace buffer
between where the actual data finished and where it would have finished if
there were enough buffer space. This results in corrupted output.
Adjust the logic to resolve this and add a message when the buffer
overflows.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:49 +0000 (14:15 -0700)]
trace: Show a few more stats about tracing
Add a few more useful items into the output. Update the buffers to use hex
consistently.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:48 +0000 (14:15 -0700)]
trace: Track the minimum stack depth
The trace does not necessarily start at the top level, so we can see it
go negative. Track this so that we can show an accurate value for the
stack depth.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:47 +0000 (14:15 -0700)]
trace: Reduce the number of function sites
Given that the compiler adds two function calls into each function, the
current spacing is overkill. Drop it down to 16 bytes per function, which
is still plenty. This saves some space in the trace buffer.
Also move the calculation into a function, so it is common code. Add a
check for gd->mon_len being unset, which breaks tracing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:46 +0000 (14:15 -0700)]
trace: Update the file header
It seems better to put the TEXT_BASE value in the file header rather than
in an entry record. While it is true that there is a separate base for
pre-relocation, this can be handled by using offsets in the file.
It is useful to have a version number in case we need to change the trace
format again.
Update the header to make these changes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:45 +0000 (14:15 -0700)]
abuf: Support use from tools
Update the code slightly so that abuf can be used in U-Boot tools. It will
soon be needed for proftool.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:44 +0000 (14:15 -0700)]
trace: Reduce the default for TRACE_EARLY_CALL_DEPTH_LIMIT
This is a silly value at present, since U-Boot's call depth never reaches
200. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:43 +0000 (14:15 -0700)]
time: Tidy up some unnecessary #ifdefs
Avoid using the preprocessor with TIMER_EARLY.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:42 +0000 (14:15 -0700)]
timer: Tidy up use of notrace
Tracing is typically enabled by the time driver model starts up, so there
is no point in adding a 'notrace' to the timer-init function. However,
once the driver model timer is enabled, we do need to be able to access
the timer's private data when reading the timer, so add it to the core
function needed for that.
Update the function's documentation while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:41 +0000 (14:15 -0700)]
dm: Allow serial output during the relocation process
Reset the serial flags so that the debug UART can be used (if enabled)
in the small window where there is no serial device. This can avoid a hang
in some cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:40 +0000 (14:15 -0700)]
sandbox: Bring back setting mon_len in global_data
This change was made for the benefit of RISC-V but broke other
architectures also. In particular, tracing cannot work without this value.
Add it back for architectures which support it.
Fixes:
3c9fc23c443 ("sandbox: don't refer to symbol _init")
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 15 Jan 2023 21:15:38 +0000 (14:15 -0700)]
.gitignore: Ignore the moveconfig database
This file is produced by the moveconfig.py tool. It should never be added
to the repo, so add it to the .gitignore file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 7 Feb 2023 17:50:13 +0000 (12:50 -0500)]
Dockerfile: Update QEMU git location
Per https://www.qemu.org/contribute/ the official location of the QEMU
sources are https://gitlab.com/qemu-project/qemu.git
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 11 Feb 2023 14:25:44 +0000 (09:25 -0500)]
usb: gadget: Fix typo in obj line
When dropping the unused fotg210 gadget driver a leading 0 was
introduced to the next line, drop it.
Fixes:
e9b4678bc78e ("usb: Drop unused fotg210 gadget")
Reported-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Christophe Leroy [Mon, 30 Jan 2023 08:07:38 +0000 (09:07 +0100)]
board: cssi: Add MIAE & VGoIP devices
This adds support for the MIAE and VGoIP devices.
Those devices have the same CPU board that the MCR3000_2G board.
The devices are very modular, they are provided with
interchangeable front and back panels.
Linux kernel is shipped with a device tree which contains all
possible setups, and U-boot eliminates unrelated nodes based on
detected hardware.
This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
Christophe Leroy [Fri, 14 Oct 2022 10:54:50 +0000 (12:54 +0200)]
board: cssi: Add new board MCR3000_2G
This adds a new board from CS GROUP. The board is called
MCR3000_2G, and has a CPU board called CMPC885.
That CPU board is shared with another equipment that will
be added in a later patch.
That board stores Ethernet MAC addresses in an EEPROM which
is accessed using SPI bus.
This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
Christophe Leroy [Fri, 14 Oct 2022 07:14:44 +0000 (09:14 +0200)]
spi, mpc8xx: Add support for chipselect via GPIO and fixups
This patch fixes the mpc8xx SPI driver:
- A stub callbacks for mode and speed,
- Use chip selects defined as GPIOs,
- Write proper value to disable relocation, other it fails on mpc885,
- Don't modify ports setup, ports can be different from one board to
another and are already set by board_early_init_r().
This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
Christophe Leroy [Fri, 14 Oct 2022 08:01:41 +0000 (10:01 +0200)]
driver, gpio: Add support for MPC 8xx CPU ports
Ports A, C and D are 16 bits ports.
Ports B and E are 32 bits ports.
The "compatible" is used to determine each port type.
This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
Christophe Leroy [Thu, 15 Sep 2022 06:54:59 +0000 (08:54 +0200)]
board: MCR3000: Remove update of non-existing e1-wan DT node
e1-wan device-tree node doesn't exist. Remove related update
to avoid following warning at startup:
Loading Device Tree to
007fa000, end
007ff951 ... OK
Unable to update property /localbus/e1-wan:data-rate, err=FDT_ERR_NOTFOUND
Unable to update property /localbus/e1-wan:channel-phase, err=FDT_ERR_NOTFOUND
Unable to update property /localbus/e1-wan:rising-edge-sync-pulse, err=FDT_ERR_NOTFOUND
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
Christophe Leroy [Mon, 6 Feb 2023 18:33:53 +0000 (19:33 +0100)]
board: MCR3000: Modernise the settings to properly work on lastest u-boot version
Both U-boot and Linux kernel have grown over the last releases
and don't fit anymore in the 2M EPROM of the board.
So, rework the setup to allow storing the Linux kernel image
on the UBIFS NAND Flash.
Also add support to FIT images as this is what the Linux kernel
look like nowadays.
Also increase CFG_SYS_BOOTMAPSZ to 32Mbytes and define
CONFIG_SYS_BOOTM_LEN with the same value, otherwise it defaults
to 8M which is not sufficient anymore with nowadays Linux kernels.
And set the netmask to 255.255.255.0 as a class C address is used.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
Christophe Leroy [Mon, 6 Feb 2023 18:17:24 +0000 (19:17 +0100)]
board: MCR3000: Migrate to using CONFIG_EXTRA_ENV_TEXT
We can move all of the environment changes to come
from CONFIG_EXTRA_ENV_TEXT.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Tom Rini [Fri, 10 Feb 2023 18:45:15 +0000 (13:45 -0500)]
Merge tag 'efi-2023-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2023-04-rc2
Documentation:
* Provide page with links to talks on U-Boot
UEFI:
* Enable CTRL+S to save the boot order in eficonfig command
* Run attribute check for QueryVariableInfo() only for the file store
* Bug fixes
Others:
* Improve output formatting of the coninfo command
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 10 Feb 2023 12:15:45 PM EST
# gpg: using RSA key
6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg: aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
Tom Rini [Fri, 10 Feb 2023 18:41:27 +0000 (13:41 -0500)]
Merge branch '2023-02-10-assorted-updates-and-additions'
- DM_SERIAL conversion for bcm7xxx, button input driver, qcom updates,
environment and network related cleanup, ftmac100 update, add a
IS_ENABLED conversion that was just missed.
Sergei Antonov [Fri, 3 Feb 2023 19:09:04 +0000 (22:09 +0300)]
net: ftmac100: add mii read and write callbacks
Register mii_bus with read and write callbacks to allow the 'mii'
command to work. Use a timeout of 10 ms to wait for the R/W
operations to complete.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Sergei Antonov [Fri, 3 Feb 2023 19:09:03 +0000 (22:09 +0300)]
net: ftmac100: simplify priv->iobase casting
Replace 'phys_addr_t iobase' with 'struct ftmac100 *ftmac100' in
struct ftmac100_data. It allows to remove casting in a number of places.
Since priv->iobase is phys_addr_t, use phys_to_virt() to make
a pointer from it.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Sergei Antonov [Fri, 3 Feb 2023 19:09:02 +0000 (22:09 +0300)]
net: ftmac100: change driver name from nds32_mac to ftmac100
So it will be named similarly to the related ftgmac100 driver.
The old name 'nds32_mac' is not referred to anywhere in U-Boot.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Dzmitry Sankouski [Sun, 22 Jan 2023 15:21:25 +0000 (18:21 +0300)]
dm: input: add button_kbd driver
Bootmenu requires an input device with arrows and enter key.
A common smartphone luckily has power, volume up/down buttons,
which may be used for controlling bootmenu.
To use driver, add 'button-kbd' to stdin.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Christophe Leroy [Mon, 30 Jan 2023 08:11:03 +0000 (09:11 +0100)]
board: MCR3000: Use lowercase filenames
Rename MCR3000.* to mcr3000.* to be more in line with
other boards.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Christophe Leroy [Sat, 28 Jan 2023 12:53:10 +0000 (13:53 +0100)]
powerpc/mpc8xx: Zero boot_flags arg for calling board_init_f()
Copied from
e83a7e94532 ("powerpc/mpc83xx: Zero boot_flags arg for
calling board_init_f()")
The argument boot_flags of board_init_f() is not used at all in the
powerpc specific board.c init sequence. Now with the generic init
sequence, this boot_flags arg is used by board_init_f().
This patch sets the r3 register that is used to pass the boot_flags
argument from the start.S board_init_f() call to 0 prior to the function
call to avoid unknown content to end up in gd->flags.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Fixes:
09f3ca3dd53 ("arm, powerpc: select SYS_GENERIC_BOARD")
Dzmitry Sankouski [Sun, 22 Jan 2023 15:21:24 +0000 (18:21 +0300)]
dm: button: add support for linux_code in button-gpio.c driver
Linux event code must be used in input devices, using buttons.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Sun, 22 Jan 2023 15:21:23 +0000 (18:21 +0300)]
test: create dedicated fdt node for ofnode_for_each_prop test
Property count may change in /buttons node, if more button tests added,
and this will break ofnode_for_each_prop.
Add separate node for mentioned test.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Sun, 22 Jan 2023 15:21:22 +0000 (18:21 +0300)]
dts: add missing linux,code in gpio-keys
gpio-keys linux driver enforces user to specify linux,code.
Add missing linux,code before implementing button input support.
- arch/arm/dts/rk3288-popmetal.dtsi -> KEY_POWER
- arch/arm/dts/rk3288-tinker.dtsi -> KEY_POWER
- arch/arm/dts/am3517-evm-ui.dtsi -> KEY_RECORD
- sandbox/dts/sandbox.dtsi -> BTN_1
- sandbox/dts/sandbox.dts -> BTN_1
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dzmitry Sankouski [Sun, 22 Jan 2023 15:21:21 +0000 (18:21 +0300)]
gpio: qcom: add direction functions for pwrkey
GPIO button driver requires direction functions to probe
button gpio. Those functions are blank, since pwrkey is not
really gpio, and don't support direction settings.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Wed, 1 Feb 2023 13:59:01 +0000 (19:29 +0530)]
dts: qcs404-evb: Add I2C controller nodes
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Wed, 1 Feb 2023 13:59:00 +0000 (19:29 +0530)]
i2c: Add support for Qualcomm I2C driver
Add support for Qualcomm I2C QUP driver which is inspired from
corresponding driver in Linux: drivers/i2c/busses/i2c-qup.c.
Currently this driver only support FIFO polling mode which is sufficient
to support devices like eeprom, rtc etc.
Co-developed-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Wed, 1 Feb 2023 13:58:59 +0000 (19:28 +0530)]
pinctrl: qcs404: Enable I2C pinmux options
Co-developed-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Wed, 1 Feb 2023 13:58:57 +0000 (19:28 +0530)]
clock-snapdragon: Add clk_rcg_set_rate() with mnd_width=0
Add clk_rcg_set_rate() which allows to configure clocks without programming
MND values. This is required for configuring I2C clocks on QCS404.
Co-developed-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Mike Worsfold <mworsfold@impinj.com>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Wed, 1 Feb 2023 13:58:56 +0000 (19:28 +0530)]
dts: qcs404-evb: Add ethernet controller node
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Sumit Garg [Wed, 1 Feb 2023 13:58:55 +0000 (19:28 +0530)]
net: dwc_eth_qos: Add Qcom ethernet driver glue layer
The Qualcom ETHQOS hardware supports an RGMII macro which needs to be
configured according to following link speeds:
- SPEED_1000
- SPEED_100
- SPEED_10
So add a corresponding glue driver to configure RGMII macro.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Sumit Garg [Wed, 1 Feb 2023 13:58:54 +0000 (19:28 +0530)]
net: dwc_eth_qos: Allow platform to override tx/rx_fifo_sz
The GMAC controller on QCS404 SoC (support added by upcoming patch) fails
to work with maximum tx/rx_fifo_sz supported by the hardware (16K). So
allow platforms to override FIFO size using corresponding DT node
properties.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Sumit Garg [Wed, 1 Feb 2023 13:58:53 +0000 (19:28 +0530)]
net: dwc_eth_qos: Make eqos_get_tick_clk_rate callback optional
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>