Davide Italiano [Sun, 11 Dec 2016 21:19:03 +0000 (21:19 +0000)]
[SCCP] Use the appropriate helper function. NFCI.
llvm-svn: 289406
Sanjoy Das [Sun, 11 Dec 2016 21:10:11 +0000 (21:10 +0000)]
Fix TBAA metadata
The existing tbaa metadata in the test is ill-formed, and fails the
verifier after r289402.
llvm-svn: 289405
Ayman Musa [Sun, 11 Dec 2016 20:11:17 +0000 (20:11 +0000)]
[X86][AVX512] Add missing patterns for broadcast fallback in case load node has multiple uses (for v4i64 and v4f64).
When the load node which the broadcast instruction broadcasts has multiple uses, it cannot be folded.
A fallback pattern is added to catch these cases and provide another solution.
Differential Revision: https://reviews.llvm.org/D27661
llvm-svn: 289404
Sanjoy Das [Sun, 11 Dec 2016 20:07:25 +0000 (20:07 +0000)]
[TBAA] Don't generate invalid TBAA when merging nodes
Summary:
Fix a corner case in `MDNode::getMostGenericTBAA` where we can sometimes
generate invalid TBAA metadata.
Reviewers: chandlerc, hfinkel, mehdi_amini, manmanren
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D26635
llvm-svn: 289403
Sanjoy Das [Sun, 11 Dec 2016 20:07:15 +0000 (20:07 +0000)]
[Verifier] Add verification for TBAA metadata
Summary:
This change adds some verification in the IR verifier around struct path
TBAA metadata.
Other than some basic sanity checks (e.g. we get constant integers where
we expect constant integers), this checks:
- That by the time an struct access tuple `(base-type, offset)` is
"reduced" to a scalar base type, the offset is `0`. For instance, in
C++ you can't start from, say `("struct-a", 16)`, and end up with
`("int", 4)` -- by the time the base type is `"int"`, the offset
better be zero. In particular, a variant of this invariant is needed
for `llvm::getMostGenericTBAA` to be correct.
- That there are no cycles in a struct path.
- That struct type nodes have their offsets listed in an ascending
order.
- That when generating the struct access path, you eventually reach the
access type listed in the tbaa tag node.
Reviewers: dexonsmith, chandlerc, reames, mehdi_amini, manmanren
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D26438
llvm-svn: 289402
Sanjay Patel [Sun, 11 Dec 2016 20:07:02 +0000 (20:07 +0000)]
[Constants] don't die processing non-ConstantInt GEP indices in isGEPWithNoNotionalOverIndexing() (PR31262)
This should fix:
https://llvm.org/bugs/show_bug.cgi?id=31262
llvm-svn: 289401
Simon Pilgrim [Sun, 11 Dec 2016 19:41:23 +0000 (19:41 +0000)]
[X86][AVX512] Add target shuffle test showing missing PSHUFPD combine.
llvm-svn: 289400
Sebastian Pop [Sun, 11 Dec 2016 19:39:32 +0000 (19:39 +0000)]
instr-combiner: sum up all latencies of the transformed instructions
We have found that -- when the selected subarchitecture has a scheduling model
and we are not optimizing for size -- the machine-instruction combiner uses a
too-simple algorithm to compute the cost of one of the two alternatives [before
and after running a combining pass on a section of code], and therefor it throws
away the combination results too often.
This fix has the potential to help any ISA with the potential to combine
instructions and for which at least one subarchitecture has a scheduling model.
As of now, this is only known to definitely affect AArch64 subarchitectures with
a scheduling model.
Regression tested on AMD64/GNU-Linux, new test case tested to fail on an
unpatched compiler and pass on a patched compiler.
Patch by Abe Skolnik and Sebastian Pop.
llvm-svn: 289399
Simon Pilgrim [Sun, 11 Dec 2016 19:36:25 +0000 (19:36 +0000)]
[X86][XOP] Add target shuffle tests showing missing PSHUFPD combine.
llvm-svn: 289398
Sanjoy Das [Sun, 11 Dec 2016 19:02:21 +0000 (19:02 +0000)]
[SCEVExpander] Explicitly expand AddRec starts into loop preheader
This is NFC today, but won't be once D27216 (or an equivalent patch) is
in.
This change fixes a design problem in SCEVExpander -- it relied on a
hoisting optimization to generate correct code for add recurrences.
This meant changing the hoisting optimization to not kick in under
certain circumstances (to avoid speculating faulting instructions, say)
would break correctness.
The fix is to make the correctness requirements explicit, and have it
not rely on the hoisting optimization for correctness.
llvm-svn: 289397
Oren Ben Simhon [Sun, 11 Dec 2016 14:10:52 +0000 (14:10 +0000)]
[X86] Regcall - Adding support for mask types
Regcall calling convention passes mask types arguments in x86 GPR registers.
The review includes the changes required in order to support v32i1, v16i1 and v8i1.
Differential Revision: https://reviews.llvm.org/D27148
llvm-svn: 289383
Chandler Carruth [Sun, 11 Dec 2016 12:49:05 +0000 (12:49 +0000)]
[FileCheck] Re-implement the logic to find each check prefix in the
check file to not be unreasonably slow in the face of multiple check
prefixes.
The previous logic would repeatedly scan potentially large portions of
the check file looking for alternative prefixes. In the worst case this
would scan most of the file looking for a rare prefix between every
single occurance of a common prefix. Even if we bounded the scan, this
would do bad things if the order of the prefixes was "unlucky" and the
distant prefix was scanned for first.
None of this is necessary. It is straightforward to build a state
machine that recognizes the first, longest of the set of alternative
prefixes. That is in fact exactly whan a regular expression does.
This patch builds a regular expression once for the set of prefixes and
then uses it to search incrementally for the next prefix. This requires
some threading of state but actually makes the code dramatically
simpler. I've also added a big comment describing the algorithm as it
was not at all obvious to me when I started.
With this patch, several previously pathological test cases in
test/CodeGen/X86 are 5x and more faster. Overall, running all tests
under test/CodeGen/X86 uses 10% less CPU after this, and because all the
slowest tests were hitting this, finishes in 40% less wall time on my
system (going from just over 5.38s to just over 3.23s) on a release
build! This patch substantially improves the time of all 7 X86 tests
that were in the top 20 reported by --time-tests, 5 of them are
completely off the list and the remaining 2 are much lower. (Sadly, the
new tests on the list include 2 new X86 ones that are slow for unrelated
reasons, so the count stays at 4 of the top 20.)
It isn't clear how much this helps debug builds in aggregate in part
because of the noise, but it again makes mane of the slowest x86 tests
significantly faster (10% or more improvement).
llvm-svn: 289382
Chandler Carruth [Sun, 11 Dec 2016 10:22:17 +0000 (10:22 +0000)]
[FileCheck] Remove a parameter that was simply always set to
a commandline flag and test the flag directly. NFC.
If we ever need this generality it can be added back.
llvm-svn: 289381
Chandler Carruth [Sun, 11 Dec 2016 10:16:21 +0000 (10:16 +0000)]
[FileCheck] Clean up doxygen comments throughout. NFC.
llvm-svn: 289380
Chandler Carruth [Sun, 11 Dec 2016 09:54:36 +0000 (09:54 +0000)]
[FileCheck] Run clang-format over this code. NFC.
This fixes one formatting goof I left in my previous commit and *many*
other inconsistencies.
I'm planning to make substantial changes here and so wanted to get to
a clean baseline.
llvm-svn: 289379
Chandler Carruth [Sun, 11 Dec 2016 09:50:05 +0000 (09:50 +0000)]
Refactor FileCheck some to reduce memory allocation and copying. Also
make some readability improvements.
Both the check file and input file have to be fully buffered to
normalize their whitespace. But previously this would be done in a stack
SmallString and then copied into a heap allocated MemoryBuffer. That
seems pretty wasteful, especially for something like FileCheck where
there are only ever two such entities.
This just rearranges the code so that we can keep the canonicalized
buffers on the stack of the main function, use reasonably large stack
buffers to reduce allocation. A rough estimate seems to show that about
80% of LLVM's .ll and .s files will fit into a 4k buffer, so this should
completely avoid heap allocation for the buffer in those cases. My
system's malloc is fast enough that the allocations don't directly show
up in timings. However, on some very slow test cases, this saves 1% - 2%
by avoiding the copy into the heap allocated buffer.
This also splits out the code which checks the input into a helper much
like the code to build the checks as that made the code much more
readable to me. Nit picks and suggestions welcome here. It has really
exposed a *bunch* of stuff that could be cleaned up though, so I'm
probably going to go and spring clean all of this code as I have more
changes coming to speed things up.
llvm-svn: 289378
Craig Topper [Sun, 11 Dec 2016 08:54:52 +0000 (08:54 +0000)]
[X86][InstCombine] Add support for scalar FMA intrinsics to SimplifyDemandedVectorElts.
This teaches SimplifyDemandedElts that the FMA can be removed if the lower element isn't used. It also teaches it that if upper elements of the first operand aren't used then we can simplify them.
llvm-svn: 289377
Kuba Mracek [Sun, 11 Dec 2016 08:45:36 +0000 (08:45 +0000)]
[sanitizer] Make sure libmalloc doesn't remove the sanitizer zone from malloc_zones[0]
In certain OS versions, it was possible that libmalloc replaced the sanitizer zone from being the default zone (i.e. being in malloc_zones[0]). This patch introduces a failsafe that makes sure we always stay the default zone. No testcase for this, because this doesn't reproduce under normal circumstances.
Differential Revision: https://reviews.llvm.org/D27083
llvm-svn: 289376
Kuba Mracek [Sun, 11 Dec 2016 08:42:42 +0000 (08:42 +0000)]
[sanitizer] Handle malloc_destroy_zone() on Darwin
We currently have a interceptor for malloc_create_zone, which returns a new zone that redirects all the zone requests to our sanitizer zone. However, calling malloc_destroy_zone on that zone will cause libmalloc to print out some warning messages, because the zone is not registered in the list of zones. This patch handles this and adds a testcase for that.
Differential Revision: https://reviews.llvm.org/D27083
llvm-svn: 289375
Craig Topper [Sun, 11 Dec 2016 08:00:51 +0000 (08:00 +0000)]
[X86][InstCombine] Add the test cases for r289370, r289371, and r289372.
I forgot to add the new files before commiting.
llvm-svn: 289374
Chandler Carruth [Sun, 11 Dec 2016 07:46:21 +0000 (07:46 +0000)]
Tweak the core loop in StringRef::find to avoid calling memcmp on every
iteration.
Instead, load the byte at the needle length, compare it directly, and
save it to use in the lookup table of lengths we can skip forward.
I also added an annotation to expect that the comparison fails so that
the loop gets laid out contiguously without the call to memcpy (and the
substantial register shuffling that the ABI requires of that call).
Finally, because this behaves especially badly with a needle length of
one (by calling memcmp with a zero length) special case that to directly
call memchr, which is what we should have been doing anyways.
This was motivated by the fact that there are a large number of test
cases in 'check-llvm' where FileCheck's performance is dominated by
calls to StringRef::find (in a release, no-asserts build). I'm working
on patches to generally improve matters there, but this alone was worth
a 12.5% improvement in one test case where FileCheck spent 92% of its
time in this routine.
I experimented a bunch with different minor variations on this theme,
for example setting the pointer *at* the last byte and indexing
backwards for the call to memcmp. That didn't improve anything on this
version and seemed more complex. I also tried other things to make the
loop flow more nicely and none worked. =/ It is a bit unfortunate, the
generated code here remains pretty gross, but I don't see any obvious
ways to improve it. At this point, most of my ideas would be really
elaborate:
1) While the remainder of the string is long enough, we could load
a 16-byte or 32-byte vector at the address of the last byte and use
palignr to rotate that and check the first 15- or 31-bytes at the
front of the next segment, essentially pre-loading the first several
bytes of the next iteration so we could quickly detect a mismatch in
those bytes without an additional memory access. Down side would be
the code complexity, having a fallback loop, and likely misaligned
vector load. Plus it would make the common case of the last byte not
matching somewhat slower (need some extraction from a vector).
2) While we have space, we could do an aligned load of a 16- or 32-byte
vector that *contains* the end byte, and use any peceding bytes to
have a more precise "no" test, and any subsequent bytes could be
saved for the next iteration. This remove any unaligned load penalty,
but still requires us to pay the overhead of vector extraction for
the cases where we didn't need to do anything other than load and
compare the last byte.
3) Try to walk from the last byte in a way that is more friendly to
cache and/or memory pre-fetcher considering we have to poke the last
byte anyways.
No idea if any of these are really worth pursuing though. They all seem
somewhat unlikely to yield big wins in practice and to be a lot of work
and complexity. So I settled here, which at least seems like a strict
improvement over the previous version.
llvm-svn: 289373
Craig Topper [Sun, 11 Dec 2016 07:42:06 +0000 (07:42 +0000)]
[X86][InstCombine] Teach InstCombineCalls to simplify demanded elements for scalar FMA intrinsics.
These intrinsics don't read the upper bits of their second and third inputs so we can try to simplify them.
llvm-svn: 289372
Craig Topper [Sun, 11 Dec 2016 07:42:04 +0000 (07:42 +0000)]
[AVX-512][InstCombine] Teach InstCombineCalls how to simplify demanded for scalar cmp intrinsics with masking and rounding.
These intrinsics don't read the upper elements of their first and second input. These are slightly different the the SSE version which does use the upper bits of its first element as passthru bits since the result goes to an XMM register. For AVX-512 the result goes to a mask register instead.
llvm-svn: 289371
Craig Topper [Sun, 11 Dec 2016 07:42:01 +0000 (07:42 +0000)]
[AVX-512][InstCombine] Teach InstCombineCalls how to simplify demanded elements for scalar add,div,mul,sub,max,min intrinsics with masking and rounding.
These intrinsics don't read the upper bits of their second input. And the third input is the passthru for masking and that only uses the lower element as well.
llvm-svn: 289370
Dylan McKay [Sun, 11 Dec 2016 07:09:45 +0000 (07:09 +0000)]
[AVR] Add calling convention CodeGen tests
This adds CodeGen tests for the AVR C calling convention.
llvm-svn: 289369
Kostya Serebryany [Sun, 11 Dec 2016 06:28:09 +0000 (06:28 +0000)]
[libFuzzer] don't depend on time in a test
llvm-svn: 289368
Eric Fiselier [Sun, 11 Dec 2016 05:54:43 +0000 (05:54 +0000)]
Actually re-disable -Wsign-compare
llvm-svn: 289367
Eric Fiselier [Sun, 11 Dec 2016 05:45:55 +0000 (05:45 +0000)]
Re-disable -Wsign-compare for now. I didn't catch all occurrences
llvm-svn: 289366
Eric Fiselier [Sun, 11 Dec 2016 05:43:20 +0000 (05:43 +0000)]
Fix signed comparison warning
llvm-svn: 289365
Eric Fiselier [Sun, 11 Dec 2016 05:31:00 +0000 (05:31 +0000)]
Enable the -Wsign-compare warning to better support MSVC
llvm-svn: 289363
Dylan McKay [Sun, 11 Dec 2016 04:59:39 +0000 (04:59 +0000)]
[AVR] Add a test to validate a simple 'blinking led' program
llvm-svn: 289362
Bruno Cardoso Lopes [Sun, 11 Dec 2016 04:27:31 +0000 (04:27 +0000)]
[CrashReproducer] Setup a module collector callback for HeaderInclude
Collect missing include that cannot be fetched otherwise (e.g. when
using headermaps).
rdar://problem/
27913709
llvm-svn: 289361
Bruno Cardoso Lopes [Sun, 11 Dec 2016 04:27:28 +0000 (04:27 +0000)]
[CrashReproducer] Collect headermap files
Include headermaps (.hmap files) in the .cache directory and
add VFS entries. All headermaps are known after HeaderSearch
setup, collect them right after.
rdar://problem/
27913709
llvm-svn: 289360
Eric Fiselier [Sun, 11 Dec 2016 04:00:26 +0000 (04:00 +0000)]
Fix copy/paste errors introduced in r289358
llvm-svn: 289359
Eric Fiselier [Sun, 11 Dec 2016 03:41:12 +0000 (03:41 +0000)]
Fix undefined behavior in container swap tests.
These swap tests were swapping non-POCS non-equal allocators which
is undefined behavior. This patch changes the tests to use allocators
which compare equal. In order to test that the allocators were not
swapped I added an "id" field to test_allocator which does not
participate in equality but does propagate across copies/swaps.
This patch is based off of D26623 which was submitted by STL.
llvm-svn: 289358
Eric Fiselier [Sun, 11 Dec 2016 02:49:37 +0000 (02:49 +0000)]
Fix yet another dynamic exception spec
llvm-svn: 289357
Eric Fiselier [Sun, 11 Dec 2016 02:47:36 +0000 (02:47 +0000)]
Fix more uses of dynamic exception specifications in C++17
llvm-svn: 289356
Eric Fiselier [Sun, 11 Dec 2016 02:20:17 +0000 (02:20 +0000)]
Fix count_new.hpp to work w/o dynamic exception specifications
llvm-svn: 289355
Craig Topper [Sun, 11 Dec 2016 01:59:36 +0000 (01:59 +0000)]
[AVX-512][InstCombine] Add 512-bit vpermilvar intrinsics to InstCombineCalls to match 128 and 256-bit.
llvm-svn: 289354
Eric Fiselier [Sun, 11 Dec 2016 01:35:55 +0000 (01:35 +0000)]
Workaround the removal of dynamic exception specifications in C++17
llvm-svn: 289353
Craig Topper [Sun, 11 Dec 2016 01:28:08 +0000 (01:28 +0000)]
[X86] Fix a comment to say 'an FMA' instead of 'a FMA'. NFC
llvm-svn: 289352
Craig Topper [Sun, 11 Dec 2016 01:26:52 +0000 (01:26 +0000)]
[AVX-512] Remove masking from 512-bit vpermil builtins. The backend now has versions without masking so wrap it with select.
This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking.
llvm-svn: 289351
Craig Topper [Sun, 11 Dec 2016 01:26:44 +0000 (01:26 +0000)]
[X86] Remove masking from 512-bit VPERMIL intrinsics in preparation for being able to constant fold them in InstCombineCalls like we do for 128/256-bit.
llvm-svn: 289350
Dylan McKay [Sun, 11 Dec 2016 00:24:13 +0000 (00:24 +0000)]
[AVR] Fix a signed vs unsigned compiler warning
llvm-svn: 289349
Craig Topper [Sun, 11 Dec 2016 00:23:50 +0000 (00:23 +0000)]
[X86][InstCombine] Teach InstCombineCalls to turn pshufb intrinsic into a shufflevector if the indices are constant.
llvm-svn: 289348
Eric Fiselier [Sun, 11 Dec 2016 00:20:59 +0000 (00:20 +0000)]
[libc++] Fix support for multibyte thousands_sep and decimal_point in moneypunct_byname and numpunct_byname.
Summary:
The underlying C locales provide the `thousands_sep` and `decimal_point` as strings, possible with more than one character. We currently don't handle this case even for `wchar_t`.
This patch properly converts the mbs -> wide character for `moneypunct_byname<wchar_t>`. For the `moneypunct_byname<char>` case we attempt to narrow the WC and if that fails we also attempt to translate it to some reasonable value. For example we translate U00A0 (non-breaking space) into U0020 (regular space). If none of these conversions succeed then we simply allow the base class to provide a fallback value.
Reviewers: mclow.lists, EricWF
Subscribers: vangyzen, george.burgess.iv, cfe-commits
Differential Revision: https://reviews.llvm.org/D24218
llvm-svn: 289347
Dylan McKay [Sat, 10 Dec 2016 23:50:30 +0000 (23:50 +0000)]
[AVR] Remove incorrect comment
This should've been removed in r289323.
llvm-svn: 289346
Craig Topper [Sat, 10 Dec 2016 23:09:52 +0000 (23:09 +0000)]
[AVX-512] Remove masking from 512-bit pshufb builtin. The backend now has a version without masking so wrap it with select.
This will allow the backend to constant fold these to generic shuffle vectors like 128-bit and 256-bit without having to working about handling masking.
llvm-svn: 289345
Craig Topper [Sat, 10 Dec 2016 23:09:43 +0000 (23:09 +0000)]
[X86] Remove masking from 512-bit PSHUFB intrinsics in preparation for being able to constant fold it in InstCombineCalls like we do for 128/256-bit.
llvm-svn: 289344
Sanjay Patel [Sat, 10 Dec 2016 22:16:29 +0000 (22:16 +0000)]
[InstCombine] add helper for shift-by-shift folds; NFCI
These are currently limited to integer types, but we should
be able to extend to splat vectors and possibly general vectors.
llvm-svn: 289343
Simon Pilgrim [Sat, 10 Dec 2016 22:02:36 +0000 (22:02 +0000)]
[X86][SSE] Add tests for sign extended vXi64 multiplication
llvm-svn: 289342
Simon Pilgrim [Sat, 10 Dec 2016 21:16:45 +0000 (21:16 +0000)]
[X86][SSE] Ensure UNPCK inputs are a consistent value type in LowerHorizontalByteSum
llvm-svn: 289341
Craig Topper [Sat, 10 Dec 2016 21:15:52 +0000 (21:15 +0000)]
[AVX-512] Remove 128/256 masked vpermil instrinsics and autoupgrade to a select around the unmasked avx1 intrinsics.
llvm-svn: 289340
Craig Topper [Sat, 10 Dec 2016 21:15:48 +0000 (21:15 +0000)]
[X86][IR] Move the autoupgrading of store intrinsics out of the main nested if/else chain. This should buy a little more time against the MSVC limit mentioned in PR31034.
The handlers for stores all return at the end of their block so they can be picked off early.
llvm-svn: 289339
Craig Topper [Sat, 10 Dec 2016 20:27:39 +0000 (20:27 +0000)]
[AVX-512] Remove 128/256-bit masked vpermilvar builtins and replace with select and the avx unmasked builtins.
llvm-svn: 289338
Matt Arsenault [Sat, 10 Dec 2016 19:58:00 +0000 (19:58 +0000)]
AMDGPU: Fix asan errors when folding operands
This was failing when trying to fold immediates into operand 1 of a
phi, which only has one statically known operand.
llvm-svn: 289337
Simon Pilgrim [Sat, 10 Dec 2016 19:49:55 +0000 (19:49 +0000)]
[X86][SSE] Move ZeroVector creation into the shuffle pattern case where its actually used.
Also fix the ZeroVector's type - I've no idea how this hasn't caused problems........
llvm-svn: 289336
Craig Topper [Sat, 10 Dec 2016 19:35:39 +0000 (19:35 +0000)]
[AVX-512] Add support for lowering (v2i64 (fp_to_sint (v2f32))) to vcvttps2uqq when AVX512DQ and AVX512VL are available.
llvm-svn: 289335
Craig Topper [Sat, 10 Dec 2016 19:35:36 +0000 (19:35 +0000)]
[X86] Clarify indentation. NFC
llvm-svn: 289334
Craig Topper [Sat, 10 Dec 2016 19:35:33 +0000 (19:35 +0000)]
[X86] Combine LowerFP_TO_SINT and LowerFP_TO_UINT. They only differ by a single boolean flag passed to a helper function. Just check the opcode and create the flag.
llvm-svn: 289333
Sanjay Patel [Sat, 10 Dec 2016 17:40:47 +0000 (17:40 +0000)]
[InstSimplify] improve function name; NFC
llvm-svn: 289332
Simon Atanasyan [Sat, 10 Dec 2016 17:30:09 +0000 (17:30 +0000)]
[mips] Eliminate else-after-return. NFC
llvm-svn: 289331
Rui Ueyama [Sat, 10 Dec 2016 17:23:23 +0000 (17:23 +0000)]
Create a TPI stream only when /debugpdb is given.
Adding type records to TPI stream is too time consuming.
It is reported that linking chrome_child.dll took 5 minutes.
llvm-svn: 289330
Simon Pilgrim [Sat, 10 Dec 2016 17:00:00 +0000 (17:00 +0000)]
[SelectionDAG] Add ability for computeKnownBits to peek through bitcasts from 'large element' scalar/vector to 'small element' vector.
Extension to D27129 which already supported bitcasts from 'small element' vector to 'large element' scalar/vector types.
llvm-svn: 289329
Yaron Keren [Sat, 10 Dec 2016 14:55:14 +0000 (14:55 +0000)]
Simplify parseShowColorsArgs logic, NFC.
llvm-svn: 289328
Simon Pilgrim [Sat, 10 Dec 2016 13:45:08 +0000 (13:45 +0000)]
[X86][XOP] Add permil2ps buildvector combine test
llvm-svn: 289327
Dylan McKay [Sat, 10 Dec 2016 12:08:19 +0000 (12:08 +0000)]
[AVR] Add a stub README file
llvm-svn: 289326
Dylan McKay [Sat, 10 Dec 2016 11:49:07 +0000 (11:49 +0000)]
[AVR] Fix and clean up the inline assembly tests
There was a bug where we would hit an assertion if 'Q' was used as a
constraint.
I also removed hardcoded register names to prefer regexes so the tests
don't break when the register allocator changes.
llvm-svn: 289325
Dylan McKay [Sat, 10 Dec 2016 11:23:16 +0000 (11:23 +0000)]
[AVR] Explicitly set the target in all CodeGen tests
This seems to have caused failures on the buildbot.
llvm-svn: 289324
Dylan McKay [Sat, 10 Dec 2016 11:18:37 +0000 (11:18 +0000)]
[AVR] Fix an inline asm assertion which would always trigger
It looks like some time in the past, constraint codes were changed from
chars being passed around to enums.
llvm-svn: 289323
Dylan McKay [Sat, 10 Dec 2016 10:51:55 +0000 (10:51 +0000)]
[AVR] Use the register scavenger when expanding 'LDDW' instructions
Summary: This gets rid of the hardcoded 'r0' that was used previously.
Reviewers: asl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D27567
llvm-svn: 289322
Dylan McKay [Sat, 10 Dec 2016 10:16:13 +0000 (10:16 +0000)]
[AVR] Support stores to undefined pointers
This would previously trigger an assertion error in AVRISelDAGToDAG.
llvm-svn: 289321
Ismail Donmez [Sat, 10 Dec 2016 09:29:47 +0000 (09:29 +0000)]
Fix shared library build
llvm-svn: 289320
Chandler Carruth [Sat, 10 Dec 2016 07:59:59 +0000 (07:59 +0000)]
[PM] Further broaden this test's regex as both the CGSCC and Function
inner AM proxies are now being rendered differently.
llvm-svn: 289319
Chandler Carruth [Sat, 10 Dec 2016 07:46:51 +0000 (07:46 +0000)]
[PM] Try to support the new spelling of one of the proxy names that are
showing up on the build bots.
llvm-svn: 289318
Chandler Carruth [Sat, 10 Dec 2016 06:34:44 +0000 (06:34 +0000)]
[PM] Support invalidation of inner analysis managers from a pass over the outer IR unit.
Summary:
This never really got implemented, and was very hard to test before
a lot of the refactoring changes to make things more robust. But now we
can test it thoroughly and cleanly, especially at the CGSCC level.
The core idea is that when an inner analysis manager proxy receives the
invalidation event for the outer IR unit, it needs to walk the inner IR
units and propagate it to the inner analysis manager for each of those
units. For example, each function in the SCC needs to get an
invalidation event when the SCC gets one.
The function / module interaction is somewhat boring here. This really
becomes interesting in the face of analysis-backed IR units. This patch
effectively handles all of the CGSCC layer's needs -- both invalidating
SCC analysis and invalidating function analysis when an SCC gets
invalidated.
However, this second aspect doesn't really handle the
LoopAnalysisManager well at this point. That one will need some change
of design in order to fully integrate, because unlike the call graph,
the entire function behind a LoopAnalysis's results can vanish out from
under us, and we won't even have a cached API to access. I'd like to try
to separate solving the loop problems into a subsequent patch though in
order to keep this more focused so I've adapted them to the API and
updated the tests that immediately fail, but I've not added the level of
testing and validation at that layer that I have at the CGSCC layer.
An important aspect of this change is that the proxy for the
FunctionAnalysisManager at the SCC pass layer doesn't work like the
other proxies for an inner IR unit as it doesn't directly manage the
FunctionAnalysisManager and invalidation or clearing of it. This would
create an ever worsening problem of dual ownership of this
responsibility, split between the module-level FAM proxy and this
SCC-level FAM proxy. Instead, this patch changes the SCC-level FAM proxy
to work in terms of the module-level proxy and defer to it to handle
much of the updates. It only does SCC-specific invalidation. This will
become more important in subsequent patches that support more complex
invalidaiton scenarios.
Reviewers: jlebar
Subscribers: mehdi_amini, mcrosier, mzolotukhin, llvm-commits
Differential Revision: https://reviews.llvm.org/D27197
llvm-svn: 289317
Craig Topper [Sat, 10 Dec 2016 06:02:48 +0000 (06:02 +0000)]
[X86] Use X86ISD::CVTTP2SI and X86ISD::CVTTP2UI for lowering 128-bit cvttps2qq and cvttps2uqq intrinsics since there is a mismatch between number of input and output elements.
Ideally ISD::FP_TO_SINT and ISD::FP_TO_UINT would only be used for cases with the same number of input and output elements.
Similar things have already been done for other convert intrinsics.
llvm-svn: 289316
Dylan McKay [Sat, 10 Dec 2016 05:48:48 +0000 (05:48 +0000)]
[AVR] Fix a bunch of incorrect assertion messages
These should've been checking whether the immediate is a 6-bit unsigned
integer.
If the immediate was '63', this would cause an assertion error which
shouldn't have occurred.
llvm-svn: 289315
Kostya Serebryany [Sat, 10 Dec 2016 02:48:42 +0000 (02:48 +0000)]
[libFuzzer] test cleanup (3)
llvm-svn: 289314
Kostya Serebryany [Sat, 10 Dec 2016 02:47:00 +0000 (02:47 +0000)]
[libFuzzer] test cleanup (2)
llvm-svn: 289313
Kostya Serebryany [Sat, 10 Dec 2016 02:45:56 +0000 (02:45 +0000)]
[libFuzzer] test cleanup
llvm-svn: 289312
Kostya Serebryany [Sat, 10 Dec 2016 02:26:23 +0000 (02:26 +0000)]
[libFuzzer] switch all libFuzzer tests to use -fsanitize-coverage=trace-pc-guard. Support for the previosly used instrumentation will be removed in the following changes
llvm-svn: 289311
Kostya Serebryany [Sat, 10 Dec 2016 01:19:35 +0000 (01:19 +0000)]
[libFuzzer] use __sanitizer_get_module_and_offset_for_pc to get the module name while printing the coverage
llvm-svn: 289310
Devin Coughlin [Sat, 10 Dec 2016 01:16:09 +0000 (01:16 +0000)]
[analyzer] Improve VirtualCallChecker diagnostics and move into optin package.
The VirtualCallChecker is in alpha because its interprocedural diagnostics
represent the call path textually in the diagnostic message rather than with a
path sensitive diagnostic.
This patch turns off the AST-based interprocedural analysis in the checker so
that no call path is needed and improves with diagnostic text. With these
changes, the checker is ready to be moved into the optin package.
Ultimately the right fix is to rewrite this checker to be path sensitive -- but
there is still value in enabling the checker for intraprocedural analysis only
The interprocedural mode can be re-enabled with an -analyzer-config flag.
Differential Revision: https://reviews.llvm.org/D26768
llvm-svn: 289309
Vedant Kumar [Sat, 10 Dec 2016 00:54:13 +0000 (00:54 +0000)]
[clang-format] Another attempt at python 3 compatibility
The entries in vim.current.buffer appear to be decoded strings, which
means that python3 won't allow invoking 'decode' on them. Keep the old
behavior when running under python2, but skip the error-inducing decode
step with python3..
llvm-svn: 289308
Matt Arsenault [Sat, 10 Dec 2016 00:52:50 +0000 (00:52 +0000)]
AMDGPU: Fix AMDGPUPromoteAlloca breaking addrspacecasts
The users of the addrspacecast were having their types incorrectly
changed, producing invalid bitcasts between address spaces.
llvm-svn: 289307
Matt Arsenault [Sat, 10 Dec 2016 00:39:12 +0000 (00:39 +0000)]
AMDGPU: Fix handling of 16-bit immediates
Since 32-bit instructions with 32-bit input immediate behavior
are used to materialize 16-bit constants in 32-bit registers
for 16-bit instructions, determining the legality based
on the size is incorrect. Change operands to have the size
specified in the type.
Also adds a workaround for a disassembler bug that
produces an immediate MCOperand for an operand that
is supposed to be OPERAND_REGISTER.
The assembler appears to accept out of bounds immediates and
truncates them, but this seems to be an issue for 32-bit
already.
llvm-svn: 289306
Rui Ueyama [Sat, 10 Dec 2016 00:34:06 +0000 (00:34 +0000)]
Rename find(SymbolVersion) to avoid overloading with find(StringRef).
llvm-svn: 289293
Matt Arsenault [Sat, 10 Dec 2016 00:29:55 +0000 (00:29 +0000)]
AMDGPU: Fix vintrp disassembly
llvm-svn: 289292
Matt Arsenault [Sat, 10 Dec 2016 00:23:12 +0000 (00:23 +0000)]
AMDGPU: Change vintrp printing to better match sc
Some of the immediates need to be printed differently
eventually.
llvm-svn: 289291
Vedant Kumar [Fri, 9 Dec 2016 23:48:18 +0000 (23:48 +0000)]
[ubsan] Treat ObjC's BOOL as if its range is always {0, 1}
On some Apple platforms, the ObjC BOOL type is defined as a signed char.
When performing instrumentation for -fsanitize=bool, we'd like to treat
the range of BOOL like it's always {0, 1}. While we can't change clang's
IRGen for char-backed BOOL's due to ABI compatibility concerns, we can
teach ubsan to catch potential abuses of this type.
rdar://problem/
29502773
Differential Revision: https://reviews.llvm.org/D27607
llvm-svn: 289290
Peter Collingbourne [Fri, 9 Dec 2016 23:34:49 +0000 (23:34 +0000)]
COFF: Fix test failure on Windows.
llvm-svn: 289289
Paul Robinson [Fri, 9 Dec 2016 23:08:17 +0000 (23:08 +0000)]
Bigger-hammer REQUIRES to fix Windows bot.
llvm-svn: 289288
Artem Belevich [Fri, 9 Dec 2016 22:59:17 +0000 (22:59 +0000)]
[CUDA,Driver] Added --no-cuda-gpu-arch= option.
This allows us to negate preceding --cuda-gpu-arch=X.
This comes handy when user needs to override default
flags set for them by the build system.
Differential Revision: https://reviews.llvm.org/D27631
llvm-svn: 289287
Richard Smith [Fri, 9 Dec 2016 22:56:20 +0000 (22:56 +0000)]
[c++17] P0490R0, NB comment FI 20: allow direct-initialization of decomposition declarations.
llvm-svn: 289286
Simon Pilgrim [Fri, 9 Dec 2016 22:45:21 +0000 (22:45 +0000)]
Fix unused variable warnings. NFCI.
llvm-svn: 289285
Rafael Espindola [Fri, 9 Dec 2016 22:40:49 +0000 (22:40 +0000)]
Fix a bogus warning.
We first decide that the symbol is global, than that it should have
version foo. Since it was already not the default version, we were
producing a bogus warning.
llvm-svn: 289284
Stephan T. Lavavej [Fri, 9 Dec 2016 22:35:53 +0000 (22:35 +0000)]
[libcxx] [test] Fix string_view tests.
test/std/strings/string.view/string.view.ops/compare.pointer_size.pass.cpp
Passing -1 to size_t triggers signed/unsigned mismatch warnings because it's
a value-modifying conversion. Add static_cast<size_t> to soothe the compiler.
(This file refers to size_t unqualified.)
test/std/strings/string.view/string.view.ops/substr.pass.cpp
Add <algorithm> for std::min() and <stdexcept> for std::out_of_range.
N4618 21.4.2.4 [string.view.access]/1: "Requires: pos < size()."
/4: "[ Note: Unlike basic_string::operator[], basic_string_view::operator[](size())
has undefined behavior instead of returning charT(). -end note ]"
Fixes D27633.
llvm-svn: 289283
Eugene Zelenko [Fri, 9 Dec 2016 22:06:55 +0000 (22:06 +0000)]
[AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 289282
Paul Robinson [Fri, 9 Dec 2016 21:59:00 +0000 (21:59 +0000)]
Speculative REQUIRES to fix Windows bot.
llvm-svn: 289281