anv: Add get/set_tiling helpers

These are only required WSI cases and Android but still better to have
them in a central place.

Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>

anv: Rename anv_bo::index to exec_obj_index

This is more descriptive of its very specific purpose.

Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>

anv/allocator: Use anv_device_release_bo in anv_block_pool_finish

This is left-over from the days where we didn't use BO pointers and had
them embedded and we didn't have a nice allocation API.  Now that block
pools get their memory via anv_device_alloc_bo(), they really should be
using anv_device_release_bo() to tear it down.  This is equivalent in
this case because anv_device_release_bo() does the following:

 1. Decrements refcount.  The pool holds the only reference so it will
    proceed onto the clean-up steps

 2. Unmaps it, if needed.  This is the same as the tear-down code today
    except anv_device_release_bo() will avoid doing an unmap if it's
    been created via userptr.  The current code probably unmaps the
    userptr which is wrong but pretty harmless since it happens on a
    tear-down path.

 3. Unmaps the CCS range from the AUX-TT, if any.  There is none, so
    this is a no-op.

 4. Frees the VA range if it's not pinned and doesn't have a fixed VA
    assignment.  These BOs always either have a fixed VA range (softpin)
    or aren't pinned (relocations).

 5. Closes the GEM handle.  Same as the current code.

In short, anything created using the BO API should probably be destroyed
that way.  We were getting away with hand-rolling it because this is a
simple case.  Why did we do it this way?  It dates back to before the
more formlized BO cache and BO API in ANV.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>

anv: Pull aperture size from devinfo

Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>

anv/allocator: Add a couple of helpers

The anv_bo_finish helper is explicitly supposed to be capable of tearing
down partially completed BOs as long as the flag and metadata parameters
are set correctly.

Reviwed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13610>

ci/windows: Add validation tests for spriv_to_dxil

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13655>

microsoft/spirv_to_dxil: Add DXIL validation to spirv2dxil

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13655>

d3d12: Fully init primconvert config

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>

d3d12: Hook up threaded context

Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>

d3d12: Pass explicit context to pre/post draw surface blits

Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>

d3d12: Use thread safe slab allocators in transfer_map handling

Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>

d3d12: Inherit from threaded_transfer

Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>

d3d12: Resources inherit from threaded_resource

Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>

d3d12: Inherit from threaded_query

Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>

u_threaded_context: Support including from C++

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Ol\9aák <marek.olsak@amd.com>
Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13670>

ir3/spill: Initial implementation of rematerialization

This only handles moves from immedates/constants. The next step would be
to rematerialize ALU instructions whose sources are available.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13650>

ir3/spill: Mark root as non-spillable after inserting

We have to mark the root as non-spillable in case the interval is the
child of some other interval, but we can't know whether it's the child
of some other interval until it's been inserted. Move the setting of
cant_spill below the insertion. This prevents us from using a bogus
parent value.

Fixes: 613eaac7b53 ("ir3: Initial support for spilling non-shared registers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13650>

anv,blorp,iris: Set MOCS for COMPUTE_WALKER post-sync operation

We don't current enable post sync operations, but it is probably
better to set them to "internal" MOCS than to remove the non-zero
checking for this genxml field.

Reworks:
 * Fix COMPUTE_WALKER in cmd_buffer_trace_rays (s-b Jason)

Fixes: 7b78b2fcac6 ("intel/genxml: Assert that all MOCS fields are non-zero on Gfx7+")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13624>

intel/genxml/125: Update COMPUTE_WALKER POSTSYNC_DATA struct

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13624>

anv,iris: Advertise a max 3D workgroup size of 1024^3

On GFX version 12.5+ with COMPUTE_WALKER, this is the limit based on the
size of the HW packet.  On older HW, we can technically go a bit bigger
but there's not much point.  Technically, some hardware can support a
scalar workgroup size up to 2048 but most apps don't go any bigger than
1024.

As discussed on the merge request page, the current limit assumes
SIMD32, but it is unclear if we want to encourage applications to use
SIMD32 if it may lead to additional register spilling in shader
programs. Many applications have likely tuned for a limit of 1024
based on the OpenGL minimum limit, so it might not gain much by
advertising more than 1024.

Reworks:
 * Jordan: Use MIN2 and limit total invocations as well.
 * Jordan: Add second paragraph to commit message based on merge
   request discussion.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13538>

zink: flatten out draw templates a bit

having this be super granular was a neat idea, but really I don't care
even a little bit about a driver that's weirdly implementing *only*
dynamic vertex input or *only* dynamic state2

this massively cuts down the combinatorics and provides a more accurate
gauge of driver feature levels, since this is the general level of support
that they're likely to have

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13715>

radeonsi: enable nir_group_loads for better performance

The best case I have is one viewperf subtest getting +9% performance.

56979 shaders in 34726 tests
Totals:
SGPRS: 2667522 -> 2669178 (0.06 %)
VGPRS: 1543608 -> 1553472 (0.64 %)
Spilled SGPRs: 4090 -> 4100 (0.24 %)
Spilled VGPRs: 1600 -> 1791 (11.94 %)
Private memory VGPRs: 256 -> 256 (0.00 %)
Scratch size: 1872 -> 2076 (10.90 %) dwords per thread
Code Size: 59443980 -> 59479804 (0.06 %) bytes
Max Waves: 867280 -> 865634 (-0.19 %)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
v2: No change in pixels but the hash changed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13604>

nir: add new SSA instruction scheduler grouping loads into indirection groups

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13604>

zink: update radv ci passes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13716>

virgl: obtain supported number of shader sampler views from host

Modern games may use more than 16 sampler views, so get what the host
actually supports, and default to 16 on old hosts that don't pass the
value.

Since the possible maximal value of PIPE_MAX_SHADER_SAMPLER_VIEWS doesn't
fit into an uint32_t remove the binding flags, they were only used for
releasing the sampler views, and this can be achieved differently.

v2: Fix compilation error

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: John Bates <jbates@chromium.org> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13646>

pan/bi: Drop unused test helpers

With the tests moved to use gtest, some helpers are not needed
anymore.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13684>

pan/bi: Use gtest for test-constant-fold

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13684>

pan/bi: Use gtest for test-optimizer

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13684>

pan/bi: Use gtest for test-pack-formats

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13684>

pan/bi: Use gtest for test-packing

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13684>

pan/bi: Use gtest for test-scheduler-predicates

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13684>

pan/bi: Make some headers compilable with C++

This will allow have tests that use gtest (which is C++) for.

Note the reordering of designated initializers in structs is
because C++ requires them to follow the order that they were
defined in the struct.

The table `bifrost_reg_ctrl_lut` is not used by the tests at the
moment, so bailed out trying to replace the C syntax designated
initializer for arrays (that doesn't have an equivalent in C++), and
simply #ifdef it out when including from C++ code.

Also, use not_mod instead of not. not is a keyword in C++ and can't be
used. Luckily, the naming is not determined by the XML, so we can freely
rename.

[Alyssa: squash in not_mod]

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13684>

meson: automatically define `HAVE_{some}_PLATFORM`

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13278>

meson: always define `HAVE_{X11,XCB}_PLATFORM` when it's enabled

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13278>

meson: drop impossible `if no platform` branch

We've already ensured a few lines above that there is at least
`surfaceless` in the list.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13278>

meson: move `egl_native_platform` definition inside the `with_egl` block

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13278>

meson: drop duplicate addition of surfaceless & drm to the list of platforms

This is already done on lines 475-480, resulting in them appearing twice
in the summary.

Fixes: 47946855f19cc7d082fd ("meson: allow egl_native_platform to be specified")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13278>

release-calendar: fix date for next 21.3 rc

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13713>

radv: remove unused parameter in radv_emit_subpass_barrier()

It got introduced by "radv: optimize subpass barrier flushes for
imageless framebuffers" but never used in the final version.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13702>

util: Change blob_test to use macro from mesa-gtest-extras.h

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13672>

gtest: Add mesa-gtest-extras.h with array ASSERT/EXPECT macros

There are no similar macros in gtest.  They do recommend pulling
another library (gmock) and use that, but having our own let us
control the output more precisely.  Extracted the code from a similar
existing macro in blob_test.cpp, making changes to the output.

A check like

   ASSERT_U8_ARRAY_EQUAL(expected_u8, result_u8, 32);

that fails will output

```
Expected 32 values to be equal but found 1 that differ:

expected_u8 values are:

  [000]  29  44  00  00  44  60  cb  80  93  65  07  c0  08  00  40  29
  [016]  03  81  00  00  5c  a0  21  87 *b0  31  00  00  00  00  00  60

result_u8 values are:

  [000]  29  44  00  00  44  60  cb  80  93  65  07  c0  08  00  40  29
  [016]  03  81  00  00  5c  a0  21  87 *af  31  00  00  00  00  00  60
```

and a check like

   ASSERT_U64_ARRAY_EQUAL(expected_u64, result_u64, 4);

```
Expected 4 values to be equal but found 1 that differ:

expected_u64 values are:

  [000]  80cb604400004429  29400008c0076593
  [002]  8721a05c00008103 *60000000000031b0

result_u64 values are:

  [000]  80cb604400004429  29400008c0076593
  [002]  8721a05c00008103 *60000000000031af
```

Note the asterisk indicating wrong values.

The new header for extra macros is in src/gtest/include/ so it
doesn't get in the way when updating the real gtest headers that are
in src/gtest/include/gtest/.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13672>

radeonsi/sqtt: reserve a vmid when sqtt is enabled

Based on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13695

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13696>

radeonsi/sqtt: fix FINISH_DONE / BUSY usage

They're using more than a single bit so use the proper mask.

Based on https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13694

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13696>

radeonsi/sqtt: fix shader stage values

shader_stages_mask and others expect MESA_SHADER_* based values,
not PIPE_SHADER_*...

Without this the fragment shader wouldn't appear in the "Pipelines"
pane of RGP.

Fixes: c276bde34ae ("radeonsi/sqtt: export shader code to RGP")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13696>

intel/dev: also test crocus & i915 pci-ids

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12981>

intel: move away from booleans to identify platforms

v2: Drop changes around GFX_VERx10 == 75 (Luis)

v3: Replace
   (GFX_VERx10 < 75 && devinfo->platform != INTEL_PLATFORM_BYT)
   by
   (devinfo->platform == INTEL_PLATFORM_IVB)
   Replace
   (devinfo->ver >= 5 || devinfo->platform == INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 >= 45)
   Replace
   (devinfo->platform != INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 != 45)

v4: Fix crocus typo

v5: Rebase

v6: Add GFX3, ILK & I965 platforms (Jordan)
    Move ifdef to code expressions (Jordan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12981>

intel: remove 2 preproduction pci-id for ADLS

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d399c3e861a7c4 ("intel/dev: Add device info for ADL-S")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13476>

nir: assert that variables in optimize_atomic are initialized

If you gonna view context of function parse_atomic_op,
then you gonna know that index for array (data_src)
can be unitialized. Imho this approach is cleaner
than doing stuff inside parse_atomic_op.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12995>

zink: set new point/line caps

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>

st/mesa: use new point and line CAPs

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>

radeonsi: set correct point and line limits

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>

gallium: add missing point and line CAPs

The returned values are the same as the GL frontend.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>

gallium: rename PIPE_CAPF_MAX_POINT_WIDTH -> MAX_POINT_SIZE

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>

driconf: disallow 10-bit pbuffers for viewperf2020/maya due to X errors

Cc: 21.2 21.3 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13472>

Revert "CI: Disable Windows jobs"

They're fixed now, just in time.

This reverts commit 7b44e7d7bb77051913ce24ea177d06820c40304c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13708>

CI: Disable Windows jobs

The runner is broken, perhaps after an upgrade.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13707>

aux/trace: add pipe_context::render_condition_mem

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>

aux/trace: fix vertex state tracing

Fixes: e8cad57aa7a ("gallium/trace: add pipe_vertex_state support")

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>

aux/trace: trace pipe_screen::is_format_supported better

storage_sample_count is important

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>

aux/trace: support pipe_context::get_query_result_resource

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>

aux/trace: fix PIPE_QUERY_PIPELINE_STATISTICS_SINGLE tracing

don't just crash, dump!

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13582>

util/u_trace: Replace Flag with IntEnum to support python3.5

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5586

Fixes: cefaa73909718e570b36c5f8463e4b534e96201a

Signed-off-by: Kostiantyn Lazukin <kostiantyn.lazukin@globallogic.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13643>

intel/devinfo: fix wrong offset computation

A bit difficult to find what commit introduced the issue because of
all the renaming, but it was my bug :)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>

intel/devinfo: use compatible type for ARRAY_SIZE

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>

intel/perf: fix perf equation subslice mask generation for gfx12+

v2: Fix comment change (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>

intel/dev: fix subslice/eu total computations with some fused configurations

When a device has its first slice/subslice fused off, we can't use the
number of slices/subslices to iterate the mask array.

v2: Fix spelling (Marcin)
    Use size_t for iterator (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Matt Roper <matthew.d.roper@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5601
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>

intel/dev: reuse internal functions to set mask

Rather than having 2 paths to set the slice/subslice/eu masks, reuse
the other internal functions. This simplifies finding bugs within this
code :

  * If we have i915 query topology support, update_from_topology() is
    called.

  * If we don't have query topology support but we have getparam for
    slice/subslice/EU, we generate a topology data and call
    update_from_topology()

  * If we have no kernel support to query any kind of topology, we
    generate the values return by the kernel for slice/subslice/EU and
    call update_from_masks() which in turns calls
    update_from_topology()

v2: Fixup typo (Adam)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>

intel/dev: don't forget to set max_eu_per_subslice in generated topology

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>

intel/dev: fix HSW GT3 number of subslices in slice1

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>

nir/algebraic: optimize Cyberpunk 2077's open-coded bitfieldReverse()

fossil-db (Sienna Cichlid):
Totals from 9 (0.01% of 128647) affected shaders:
CodeSize: 29900 -> 28640 (-4.21%)
Instrs: 5677 -> 5443 (-4.12%)
Latency: 96561 -> 95025 (-1.59%)
Copies: 571 -> 544 (-4.73%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13673>

mesa: remove NEW_COPY_TEX_STATE

Since _NEW_PIXEL isn't handled in _mesa_update_state anymore, we can
replace NEW_COPY_TEX_STATE by _NEW_BUFFERS.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13596>

mesa: always call _mesa_update_pixel

10c75ae4 moved handling of this state to the functions that
depend on ctx->_ImageTransferState.

So we can't depend on _NEW_PIXEL being set to call this function,
since it'll be always clear earlier by _mesa_update_state_locked.

Example sequence that would trigger the issue:
  glPixelTransferi(...)
  glClear(...)
  glTexSubImage2D(...) <-- won't use the new value set by
                           glPixelTransferi because glClear caused
                           _NEW_PIXEL to be cleared.

_NEW_PIXEL itself is kept because st_update_pixel_transfer depends
on it.

Fixes: 10c75ae4 ("mesa: move _mesa_update_pixel out of _mesa_update_state")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5273
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13596>

Revert "radv: only enable VK_EXT_display_control for vrcompositor (SteamVR)"

It's fixed now.

This reverts commit db7ad0c1700e2f012730898e02bc0cebf1b04304.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13682>

build: add sha1_h for lp_texture.c

../mesa-9999/src/gallium/drivers/llvmpipe/lp_texture.c:55:10: fatal error: git_sha1.h: No such file or directory

Fixes: 1608a815e3305d229091 ("llvmpipe: add support for EXT_memory_object(_fd)")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: orbea <orbea@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13665>

iris: Use mi_builder in iris_load_indirect_location()

For example, this allows us to take advantage of command-streamer
based register offsets in mi_builder.

Ref: 06cf838cbdc ("intel/mi_builder: Support gen11 command-streamer based register offsets")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13652>

Revert "gallium/u_blitter: work around broken sample shading in llvmpipe and zink"

This reverts commit 8b287c3f925121d9389df9846024d9c350cbb235.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13679>

gallivm: handle TGSI SampleId sysval

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13679>

lavapipe: add some asserts for descriptor dynamic offsets

ensure that this explodes if there aren't enough offsets

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13677>

zink: rework cached fbfetch descriptor fallback

this ended up being a little trickier than I thought; lazy
descriptors don't use dynamic ubo types for the push set,
which means drivers that (correctly) assert dynamic offset existence
explode because the descriptor template will never work with the
push set

the better, though slightly more annoying, option here is to use the
lazy manager's faster descriptor allocation and lesser complexity to
quickly grab a push set, then tweak the existing cached codepath slightly
in order to update a raw vkdescriptorset

Fixes: 417477f60ed ("zink: always use lazy (non-push) updating for fbfetch descriptors")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13677>

d3d12: Don't accumulate timestamp queries

If an app re-issues a timestamp query a lot, but doesn't ever ask
for the results, we could end up running off the end of our query
heap. But we don't actually need to advance/accumulate, so just
use a single entry in the heap.

Reviewed By: Bill Kristiansen <billkris@microsoft.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12920>

freedreno/ir3: Fix off-by-one in prefetch safety assert.

This looks like just a typo, we allow up to == 0xf in the lowering pass.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>

freedreno/a5xx: Clean up a little bit of blitter array pitch setup.

We have a nice helper function for determining an array pitch.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>

freedreno/a5xx: Try to fix drawing to z/s miplevel/layer offsets.

Terrifyingly, no testcases are fixed by this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>

freedreno/a5xx: Remove bogus assertion about BO size.

The slice->size0 temp is being used as both the array stride (incorrectly)
and as the size of the slice (for this assert).  This assert doesn't seem
to be in the right place to me, if you want to check that offset+slice
size is < bo size, you could just do that at the end of layout setup.

This caused troubles when fixing the temp to be the actual array stride
for filling out the HW state, since then rendering to nonzero levels would
think that the rendering overflowed the BO when it doesn't.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>

freedreno/a6xx: Try to fix drawing to z/s miplevel/layer offsets.

Terrifyingly, no testcases are fixed by this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>

freedreno/a5xx: Diff reduction in fd5_layout to fd6_layout.

This should be exactly equivalent code, except for the is_3d "level <= 1"
which doesn't bring over 6c19d3733185 ("freedreno/a6xx: fix 3d tex
layout") due to it failing our unit tests where we compare to the blob's
behavior.  The layer_stride setup is pulling in what freedreno_resource.c
was doing after the layout setup, so we match fd6 and so that it could
potentially be checked in unit testing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13668>

intel/blorp: Add option to emit packets that disable Mesh

If a driver doesn't support Mesh, don't emit anything.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13660>

intel/dev: Add an intel_device_info::has_mesh_shading bit

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13660>

intel/decoder: Dump Task/Mesh shaders

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13657>

intel/genxml: Inline the BODY structs into the instructions

Follows the convention used in other instructions.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13657>

intel/genxml: Add Mesh Shading structures

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13657>

u_prim_restart: Fix index scanning with start offset

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13681>

aux/primconvert: handle singular incomplete restarts

if no restart indices are found, this draw must be discarded to avoid
crashing later on

Fixes: 583070748cb ("util/primconvert: handle rewriting of prim-restart draws with unsupported primtype")

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13630>

freedreno/a5xx+: Fix missing LA formats.

GL_ARB_texture_buffer_object uses these formats, and we expose it.  Since
we didn't have the formats in the table, we we were using bad HW
texture/color formats for them.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13666>

freedreno/a6xx: Don't try to generate mipmaps for SNORM with our blitter.

Since we're casting to unorm, the linear filtering will give bad results.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13666>

intel: Add has_bit6_swizzle to devinfo

There's no good reason to have this rather complex check in three
drivers.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13636>

vbo: utilize structure padding to optimize indirection cold->prims[0].begin

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13589>

radeonsi: increase tc_max_cpu_storage_size

Viewperf benefits. The number is only slightly above the size we need.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>

radeonsi: fix a typo preventing a fast depth-stencil clear

Fixes: 9defe8aca953b69615728c8 - radeonsi: implement fast Z/S clears using clear_buffer on HTILE

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>

radeonsi: allow and finish TC-compatible MSAA HTILE

This improves perf for Catia by 4%.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13603>