strlen-overflow-1.c: Change match patterns.

gcc/testsuite/
2014-06-23  Max Ostapenko  <m.ostapenko@partner.samsung.com>

* c-c++-common/asan/strlen-overflow-1.c: Change match patterns.

From-SVN: r211927

localalias-2.c: Guard by require-alias.

* gcc.dg/localalias-2.c: Guard by require-alias.
* gcc.dg/globalalias-2.c: Likewise.

From-SVN: r211926

varpool.c (dump_varpool_node): Dump used_by_single_function.

* varpool.c (dump_varpool_node): Dump used_by_single_function.
* tree-pass.h (make_pass_ipa_single_use): New pass.
* cgraph.h (used_by_single_function): New flag.
* lto-cgraph.c (lto_output_varpool_node, input_varpool_node): Stream
it.
* passes.def (pass_ipa_single_use): Scedule.
* ipa.c (BOTTOM): New macro.
(meet): New function
(propagate_single_user): New function.
(ipa_single_use): New function.
(pass_data_ipa_single_use): New pass.
(pass_ipa_single_use): New pass.
(pass_ipa_single_use::gate): New gate.
(make_pass_ipa_single_use): New function.

From-SVN: r211925

Daily bump.

From-SVN: r211924

any (any_v1): Rename namespace to fundamentals_v1.

* include/experimental/any (any_v1): Rename namespace to
fundamentals_v1. Change string returned by bad_any_cast::what().
* include/experimental/optional (fundamentals_v1): Add namespace.
* include/experimental/string_view (fundamentals_v1): Likewise.
* testsuite/experimental/any/typedefs.cc: New.
* testsuite/experimental/optional/typedefs.cc: New.
* testsuite/experimental/string_view/typedefs.cc: New.

From-SVN: r211920

re PR middle-end/39284 (Computed gotos combined too aggressively)

        PR target/39284
        * passes.def (peephole2): Move peephole2 pass before
        before sched2 pass.
        * config/i386/i386.md (peehole2): Combine memories
        and indirect jumps.

From-SVN: r211919

* gcc.target/i386/indjmp-1.c: New test.

From-SVN: r211918

20140723-1.c: New testcase.

2014-06-23  Andrew Pinski  <apinski@cavium.com>

* gcc.c-torture/compile/20140723-1.c: New testcase.

From-SVN: r211917

Revert "2014-06-23  Paul Gortmaker  <paul.gortmaker@windriver.com>"

This reverts commit ed8c02da028fb10d25a682e1838ba8b23a2c34ff.

From-SVN: r211915

Fix include path for in-tree cloog.

2014-06-23  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        Fix include path for in-tree cloog.
        * config/cloog.m4 (CLOOG_INIT_FLAGS): Remove bogus include path.
        * configure: Regenerate.

P.S: moved a few ChangeLog entries to gcc/ChangeLog

From-SVN: r211913

sanitizer_common_interceptors.inc: Cherry pick upstream r211008.

2014-06-23  Paolo Carlini  <paolo.carlini@oracle.com>

* sanitizer_common/sanitizer_common_interceptors.inc:
Cherry pick upstream r211008.

From-SVN: r211912

gcc.c (set_multilib_dir): Fix typo.

2014-06-23  Paul Gortmaker  <paul.gortmaker@windriver.com>

        * gcc.c (set_multilib_dir): Fix typo.

From-SVN: r211911

re PR c/61553 (__atomic_store with non-pointer arg ICE)

PR c/61553
* c-c++-common/pr61553.c (foo): Add dg-error.

From-SVN: r211910

re PR libstdc++/61532 (make_signed and make_unsigned wchar_t have started failing in the libstdc++ testsuite.)

PR libstdc++/61532
* testsuite/20_util/make_signed/requirements/typedefs-1.cc: Do not
apply the signed specifier to wchar_t.
* testsuite/20_util/make_signed/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/make_unsigned/requirements/typedefs-1.cc: Check
cv-qualifier and size.
* testsuite/20_util/make_unsigned/requirements/typedefs-2.cc:
Likewise.

From-SVN: r211909

trans-decl.c (gfc_trans_deferred_vars): Fix handling of explicit-size arrays with -fcoarray=lib.

gcc/fortran/
2014-06-23  Tobias Burnus  <burnus@net-b.de>

        * trans-decl.c (gfc_trans_deferred_vars): Fix handling of
        explicit-size arrays with -fcoarray=lib.

gcc/testsuite/
2014-06-23  Tobias Burnus  <burnus@net-b.de>

        * gfortran.dg/coarray_32.f90: New.

From-SVN: r211907

DR 577 PR c++/33101

/cp
2014-06-23  Paolo Carlini  <paolo.carlini@oracle.com>

DR 577
PR c++/33101
* decl.c (grokparms): Accept a single parameter of type 'void'.

/testsuite
2014-06-23  Paolo Carlini  <paolo.carlini@oracle.com>

DR 577
PR c++/33101
* g++.dg/other/void1.C: Adjust.
* g++.dg/other/void3.C: Likewise.

From-SVN: r211906

re PR c/61553 (__atomic_store with non-pointer arg ICE)

PR c/61553
* c-common.c (get_atomic_generic_size): Don't segfault if the
type doesn't have a size.

* c-c++-common/pr61553.c: New test.

Co-Authored-By: Andrew MacLeod <amacleod@redhat.com>
From-SVN: r211905

tree-ssa-loop.c (gate_loop): New function.

2014-06-23  Richard Biener  <rguenther@suse.de>

* tree-ssa-loop.c (gate_loop): New function.
(pass_tree_loop::gate): Call it.
(pass_data_tree_no_loop, pass_tree_no_loop,
make_pass_tree_no_loop): New.
* tree-vectorizer.c: Include tree-scalar-evolution.c
(pass_slp_vectorize::execute): Initialize loops and SCEV if
required.
(pass_slp_vectorize::clone): New method.
* timevar.def (TV_TREE_NOLOOP): New.
* tree-pass.h (make_pass_tree_no_loop): Declare.
* passes.def (pass_tree_no_loop): New pass group with
SLP vectorizer.

* g++.dg/vect/slp-pr50413.cc: Scan and cleanup appropriate SLP dumps.
* g++.dg/vect/slp-pr50819.cc: Likewise.
* g++.dg/vect/slp-pr56812.cc: Likewise.
* gcc.dg/vect/bb-slp-1.c: Likewise.
* gcc.dg/vect/bb-slp-10.c: Likewise.
* gcc.dg/vect/bb-slp-11.c: Likewise.
* gcc.dg/vect/bb-slp-13.c: Likewise.
* gcc.dg/vect/bb-slp-14.c: Likewise.
* gcc.dg/vect/bb-slp-15.c: Likewise.
* gcc.dg/vect/bb-slp-16.c: Likewise.
* gcc.dg/vect/bb-slp-17.c: Likewise.
* gcc.dg/vect/bb-slp-18.c: Likewise.
* gcc.dg/vect/bb-slp-19.c: Likewise.
* gcc.dg/vect/bb-slp-2.c: Likewise.
* gcc.dg/vect/bb-slp-20.c: Likewise.
* gcc.dg/vect/bb-slp-21.c: Likewise.
* gcc.dg/vect/bb-slp-22.c: Likewise.
* gcc.dg/vect/bb-slp-23.c: Likewise.
* gcc.dg/vect/bb-slp-24.c: Likewise.
* gcc.dg/vect/bb-slp-25.c: Likewise.
* gcc.dg/vect/bb-slp-26.c: Likewise.
* gcc.dg/vect/bb-slp-27.c: Likewise.
* gcc.dg/vect/bb-slp-28.c: Likewise.
* gcc.dg/vect/bb-slp-29.c: Likewise.
* gcc.dg/vect/bb-slp-3.c: Likewise.
* gcc.dg/vect/bb-slp-30.c: Likewise.
* gcc.dg/vect/bb-slp-31.c: Likewise.
* gcc.dg/vect/bb-slp-32.c: Likewise.
* gcc.dg/vect/bb-slp-4.c: Likewise.
* gcc.dg/vect/bb-slp-5.c: Likewise.
* gcc.dg/vect/bb-slp-6.c: Likewise.
* gcc.dg/vect/bb-slp-7.c: Likewise.
* gcc.dg/vect/bb-slp-8.c: Likewise.
* gcc.dg/vect/bb-slp-8a.c: Likewise.
* gcc.dg/vect/bb-slp-8b.c: Likewise.
* gcc.dg/vect/bb-slp-9.c: Likewise.
* gcc.dg/vect/bb-slp-cond-1.c: Likewise.
* gcc.dg/vect/bb-slp-pattern-1.c: Likewise.
* gcc.dg/vect/bb-slp-pattern-2.c: Likewise.
* gcc.dg/vect/fast-math-bb-slp-call-1.c: Likewise.
* gcc.dg/vect/fast-math-bb-slp-call-2.c: Likewise.
* gcc.dg/vect/fast-math-bb-slp-call-3.c: Likewise.
* gcc.dg/vect/no-tree-reassoc-bb-slp-12.c: Likewise.
* gcc.dg/vect/no-tree-sra-bb-slp-pr50730.c: Likewise.
* gcc.dg/vect/pr26359.c: Likewise.
* gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a.c: Likewise.

From-SVN: r211904

c-typeck.c (parser_build_binary_op): Don't call warn_logical_not_parentheses if the RHS is TRUTH_NOT_EXPR.

* c-typeck.c (parser_build_binary_op): Don't call
warn_logical_not_parentheses if the RHS is TRUTH_NOT_EXPR.

* c-c++-common/pr49706-2.c: New test.

From-SVN: r211902

Assume x86-64 if a 32-bit processor supports SSE2 and 64-bit

PR target/61570
* config/i386/driver-i386.c (host_detect_local_cpu): Set arch
to x86-64 if a 32-bit processor supports SSE2 and 64-bit.

From-SVN: r211901

re PR libgcc/61585 (Subscript-out-of-range in unwind-seh.c?)

PR libgcc/61585
* unwind-seh.c (_Unwind_GetGR): Check for proper
index range.
(_Unwind_SetGR): Likewise.

From-SVN: r211900

Re: [AArch64] Implement ADD in vector registers for 32-bit scalar values.

gcc/

* config/aarch64/aarch64.md (addsi3_aarch64): Set "simd" attr to
"yes" where needed.

From-SVN: r211899

re PR bootstrap/61583 (stage2 and stage3 compare failure due to value range loss)

gcc/
PR bootstrap/61583
* tree-vrp.c (remove_range_assertions): Do not set is_unreachable
to zero on debug statements.
gcc/testsuite/
* gcc.dg/pr61583.c: New.

From-SVN: r211897

PR/60825 Make {int,uint}64x1_t in arm_neon.h a proper vector type

gcc/ChangeLog:
  PR target/60825
* config/aarch64/aarch64-builtins.c (aarch64_types_unop_qualifiers):
Ignore third operand if present by marking qualifier_internal.

* config/aarch64/aarch64-simd-builtins.def (abs): Comment.

* config/aarch64/arm_neon.h (int64x1_t, uint64x1_t): Typedef to GCC
vector extension.
(aarch64_vget_lane_s64, aarch64_vdup_lane_s64,
arch64_vdupq_lane_s64, aarch64_vdupq_lane_u64): Remove macro.
(vqadd_s64, vqadd_u64, vqsub_s64, vqsub_u64, vqneg_s64, vqabs_s64,
vcreate_s64, vcreate_u64, vreinterpret_s64_f64, vreinterpret_u64_f64,
vcombine_u64, vbsl_s64, vbsl_u64, vceq_s64, vceq_u64, vceqz_s64,
vceqz_u64, vcge_s64, vcge_u64, vcgez_s64, vcgt_s64, vcgt_u64,
vcgtz_s64, vcle_s64, vcle_u64, vclez_s64, vclt_s64, vclt_u64,
vcltz_s64, vdup_n_s64, vdup_n_u64, vld1_s64, vld1_u64, vmov_n_s64,
vmov_n_u64, vqdmlals_lane_s32, vqdmlsls_lane_s32,
vqdmulls_lane_s32, vqrshl_s64, vqrshl_u64, vqrshl_u64, vqshl_s64,
vqshl_u64, vqshl_n_s64, vqshl_n_u64, vqshl_n_s64, vqshl_n_u64,
vqshlu_n_s64, vrshl_s64, vrshl_u64, vrshr_n_s64, vrshr_n_u64,
vrsra_n_s64, vrsra_n_u64, vshl_n_s64, vshl_n_u64, vshl_s64,
vshl_u64, vshr_n_s64, vshr_n_u64, vsli_n_s64, vsli_n_u64,
vsqadd_u64, vsra_n_s64, vsra_n_u64, vsri_n_s64, vsri_n_u64,
vst1_s64, vst1_u64, vtst_s64, vtst_u64, vuqadd_s64): Wrap existing
logic in GCC vector extensions

(vpaddd_s64, vaddd_s64, vaddd_u64, vceqd_s64, vceqd_u64, vceqzd_s64
vceqzd_u64, vcged_s64, vcged_u64, vcgezd_s64, vcgtd_s64, vcgtd_u64,
vcgtzd_s64, vcled_s64, vcled_u64, vclezd_s64, vcltd_s64, vcltd_u64,
vcltzd_s64, vqdmlals_s32, vqdmlsls_s32, vqmovnd_s64, vqmovnd_u64
vqmovund_s64, vqrshld_s64, vqrshld_u64, vqrshrnd_n_s64,
vqrshrnd_n_u64, vqrshrund_n_s64, vqshld_s64, vqshld_u64,
vqshld_n_u64, vqshrnd_n_s64, vqshrnd_n_u64, vqshrund_n_s64,
vrshld_u64, vrshrd_n_u64, vrsrad_n_u64, vshld_n_u64, vshld_s64,
vshld_u64, vslid_n_u64, vsqaddd_u64, vsrad_n_u64, vsrid_n_u64,
vsubd_s64, vsubd_u64, vtstd_s64, vtstd_u64): Fix type signature.

(vabs_s64): Use GCC vector extensions; call __builtin_aarch64_absdi.

(vget_high_s64, vget_high_u64): Reimplement with GCC vector
extensions.

(__GET_LOW, vget_low_u64): Wrap result using vcreate_u64.
(vget_low_s64): Use __GET_LOW macro.
(vget_lane_s64, vget_lane_u64, vdupq_lane_s64, vdupq_lane_u64): Use
gcc vector extensions, add call to __builtin_aarch64_lane_boundsi.
(vdup_lane_s64, vdup_lane_u64,): Add __builtin_aarch64_lane_bound_si.
(vdupd_lane_s64, vdupd_lane_u64): Fix type signature, add
__builtin_aarch64_lane_boundsi, use GCC vector extensions.

(vcombine_s64): Use GCC vector extensions; remove cast.
(vqaddd_s64, vqaddd_u64, vqdmulls_s32, vqshld_n_s64, vqshlud_n_s64,
vqsubd_s64, vqsubd_u64, vrshld_s64, vrshrd_n_s64, vrsrad_n_s64,
vshld_n_s64, vshrd_n_s64, vslid_n_s64, vsrad_n_s64, vsrid_n_s64):
Fix type signature; remove cast.

gcc/testsuite/ChangeLog:
* g++.dg/abi/mangle-neon-aarch64.C (f22, f23): New tests of
[u]int64x1_t.

* gcc.target/aarch64/aapcs64/func-ret-64x1_1.c: Add {u,}int64x1 cases.
* gcc.target/aarch64/aapcs64/test_64x1_1.c: Likewise.

* gcc.target/aarch64/scalar_intrinsics.c (test_vaddd_u64,
test_vaddd_s64, test_vceqd_s64, test_vceqzd_s64, test_vcged_s64,
test_vcled_s64, test_vcgezd_s64, test_vcged_u64, test_vcgtd_s64,
test_vcltd_s64, test_vcgtzd_s64, test_vcgtd_u64, test_vclezd_s64,
test_vcltzd_s64, test_vqaddd_u64, test_vqaddd_s64, test_vqdmlals_s32,
test_vqdmlsls_s32, test_vqdmulls_s32, test_vuqaddd_s64,
test_vsqaddd_u64, test_vqmovund_s64, test_vqmovnd_s64,
test_vqmovnd_u64, test_vsubd_u64, test_vsubd_s64, test_vqsubd_u64,
test_vqsubd_s64, test_vshld_s64, test_vshld_u64, test_vrshld_s64,
test_vrshld_u64, test_vshrd_n_s64, test_vshrd_n_u64, test_vsrad_n_s64,
test_vsrad_n_u64, test_vrshrd_n_s64, test_vrshrd_n_u64,
test_vrsrad_n_s64, test_vrsrad_n_u64, test_vqrshld_s64,
test_vqrshld_u64, test_vqshlud_n_s64, test_vqshld_s64, test_vqshld_u64,
test_vqshld_n_u64, test_vqshrund_n_s64, test_vqrshrund_n_s64,
test_vqshrnd_n_s64, test_vqshrnd_n_u64, test_vqrshrnd_n_s64,
test_vqrshrnd_n_u64, test_vshld_n_s64, test_vshdl_n_u64,
test_vslid_n_s64, test_vslid_n_u64, test_vsrid_n_s64,
test_vsrid_n_u64): Fix signature to match intrinsic.

(test_vabs_s64): Remove.
(test_vaddd_s64_2, test_vsubd_s64_2): Use force_simd.

(test_vdupd_lane_s64): Rename to...
(test_vdupd_laneq_s64): ...and remove a call to force_simd.

(test_vdupd_lane_u64): Rename to...
(test_vdupd_laneq_u64): ...and remove a call to force_simd.

(test_vtst_s64): Rename to...
(test_vtstd_s64): ...and change int64x1_t to int64_t.

(test_vtst_u64): Rename to...
(test_vtstd_u64): ...and change uint64x1_t to uint64_t.

* gcc.target/aarch64/singleton_intrinsics_1.c: New file.
* gcc.target/aarch64/vdup_lane_1.c, gcc.target/aarch64/vdup_lane_2.c:
Remove out-of-bounds tests.
* gcc.target/aarch64/vneg_s.c (INDEX*, RUN_TEST): Remove INDEX macro.

From-SVN: r211894

PR/60825 Make float64x1_t in arm_neon.h a proper vector type

gcc/ChangeLog:
PR target/60825
* config/aarch64/aarch64.c (aarch64_simd_mangle_map): Add entry for
V1DFmode.
* config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_type_mode):
add V1DFmode
(BUILTIN_VD1): New.
(BUILTIN_VD_RE): Remove.
(aarch64_init_simd_builtins): Add V1DF to modes/modenames.
(aarch64_fold_builtin): Update reinterpret patterns, df becomes v1df.
* config/aarch64/aarch64-simd-builtins.def (create): Make a v1df
variant but not df.
(vreinterpretv1df*, vreinterpret*v1df): New.
(vreinterpretdf*, vreinterpret*df): Remove.
* config/aarch64/aarch64-simd.md (aarch64_create, aarch64_reinterpret*):
Generate V1DFmode pattern not DFmode.
* config/aarch64/iterators.md (VD_RE): Include V1DF, remove DF.
(VD1): New.
* config/aarch64/arm_neon.h (float64x1_t): typedef with gcc extensions.
(vcreate_f64): Remove cast, use v1df builtin.
(vcombine_f64): Remove cast, get elements with gcc vector extensions.
(vget_low_f64, vabs_f64, vceq_f64, vceqz_f64, vcge_f64, vgfez_f64,
vcgt_f64, vcgtz_f64, vcle_f64, vclez_f64, vclt_f64, vcltz_f64,
vdup_n_f64, vdupq_lane_f64, vld1_f64, vld2_f64, vld3_f64, vld4_f64,
vmov_n_f64, vst1_f64): Use gcc vector extensions.
(vget_lane_f64, vdupd_lane_f64, vmulq_lane_f64, ): Use gcc extensions,
add range check using __builtin_aarch64_im_lane_boundsi.
(vfma_lane_f64, vfmad_lane_f64, vfma_laneq_f64, vfmaq_lane_f64,
vfms_lane_f64, vfmsd_lane_f64, vfms_laneq_f64, vfmsq_lane_f64): Fix
type signature, use gcc vector extensions.
(vreinterpret_p8_f64, vreinterpret_p16_f64, vreinterpret_f32_f64,
vreinterpret_f64_f32, vreinterpret_f64_p8, vreinterpret_f64_p16,
vreinterpret_f64_s8, vreinterpret_f64_s16, vreinterpret_f64_s32,
vreinterpret_f64_s64, vreinterpret_f64_u8, vreinterpret_f64_u16,
vreinterpret_f64_u32, vreinterpret_f64_u64, vreinterpret_s8_f64,
vreinterpret_s16_f64, vreinterpret_s32_f64, vreinterpret_s64_f64,
vreinterpret_u8_f64, vreinterpret_u16_f64, vreinterpret_u32_f64,
vreinterpret_u64_f64): Use v1df builtin not df.

gcc/testsuite/ChangeLog:
* g++.dg/abi/mangle-neon-aarch64.C: Also test mangling of float64x1_t.
* gcc.target/aarch64/aapcs/test_64x1_1.c: New test.
* gcc.target/aarch64/aapcs/func-ret-64x1_1.c: New test.
* gcc.target/aarch64/simd/ext_f64_1.c (main): Compare vector elements.
* gcc.target/aarch64/vadd_f64.c: Rewrite with macro to use vector types.
* gcc.target/aarch64/vsub_f64.c: Likewise.
* gcc.target/aarch64/vdiv_f.c (INDEX*, RUN_TEST): Remove indexing scheme
as now the same for all variants.
* gcc.target/aarch64/vrnd_f64_1.c (compare_f64): Return float64_t not
float64x1_t.

From-SVN: r211892

parse_numbers.h (_Number_help): Fix divide-by-zero.

* include/bits/parse_numbers.h (_Number_help): Fix divide-by-zero.
* include/std/chrono (_Checked_integral_constant): Allow zero.
* testsuite/20_util/duration/literals/values.cc: Test non-positive
values and digit separators.

From-SVN: r211890

[AArch64] Implement ADD in vector registers for 32-bit scalar values.

gcc/

* config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
vector registers.

gcc/testsuite/

* gcc.target/aarch64/scalar_shift_1.c: Fix expected assembler.

From-SVN: r211887

lto-cgraph.c (lto_output_node, input_node): Set/get init/fini priority directly.

* lto-cgraph.c (lto_output_node, input_node): Set/get init/fini priority
directly.

From-SVN: r211886

loop-invariant.c (pre_check_invariant_p): New function.

2014-06-23  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

* loop-invariant.c (pre_check_invariant_p): New function.
(find_invariant_insn): Call pre_check_invariant_p.

From-SVN: r211885

Daily bump.

From-SVN: r211884

re PR bootstrap/61565 (ICE building libjava/interpret.cc)

PR target/61565

* compare-elim.c (struct comparison): Add eh_note.
(find_comparison_dom_walker::before_dom_children): Don't eliminate
a redundant comparison in a different EH region.  Purge EH edges if
necessary.

From-SVN: r211881

rs6000: Merge the var_shift yes/no alternatives

All instructions that are "var_shift" for some alternative have the shift
amount as operands[2].

This patch introduces an attribute "maybe_var_shift".  If that is set to
"yes", the default value of "var_shift" is set based on the operands[2]
value.

With that, we can merge the var_shift yes/no cases everywhere.  Do so.

Also change some more "i" to "n".

From-SVN: r211880

rs6000: Merge ashrsi3 and ashrdi3

From-SVN: r211879

rs6000: Merge rotlsi3 and rotldi3

This uses the rotl* extended mnemonics instead of the rlw*nm and rld*cl
mnemonics, because they are shorter and more importantly they look the
same for 32-bit and 64-bit.

From-SVN: r211878

Merge ashlsi3 and ashldi3

From-SVN: r211877

rs6000: Merge lshrsi3 and lshrdi3

For this create a new mode_attr "hH".

Also change "i" constraints on the shift amount to "n", which better
describes what it really is (GCC takes the integer value of these
operands and does arithmetic on them; symbolic constants will not work
here).

Also merge the "dot" insns with the corresponding splitters.  To do
this, don't allow the dot insns for CBE non-microcode mode at all
(it previously would just split it back always).

From-SVN: r211876

rs6000: Remove "O" alternative from lshrsi3

Nothing will ever generate RTL matching this alternative.  Maybe long
ago this was needed, but not anymore.

From-SVN: r211875

mips.c (mips_move_to_gpr_cost): Remove mode argument.

gcc/
* config/mips/mips.c (mips_move_to_gpr_cost): Remove mode argument.
(mips_move_from_gpr_cost): Likewise.
(mips_register_move_cost): Update accordingly.
(mips_secondary_reload_class): Remove name of in_p.

From-SVN: r211874

re PR target/61503 (RTL representation of i386 shrdl instruction is incorrect?)

2014-06-22  Marc Glisse  <marc.glisse@inria.fr>

PR target/61503
* config/i386/i386.md (x86_64_shrd, x86_shrd,
ix86_rotr<dwi>3_doubleword): Replace ashiftrt with lshiftrt.

From-SVN: r211873

Daily bump.

From-SVN: r211872

localalias.c: Fix broken commit.

* gcc.dg/localalias.c: Fix broken commit.
* gcc.dg/globalalias.c: Likewise.

From-SVN: r211869

nios2.c: Include "builtins.h".

2014-06-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>

gcc/
* config/nios2/nios2.c: Include "builtins.h".

From-SVN: r211868

cgraph.h (tls_model_names): New variable.

* cgraph.h (tls_model_names): New variable.
* print-tree.c (print_node): Simplify.
* varpool.c (tls_model_names): New variable.
(dump_varpool_node): Output tls model.

* lto-symtab.c (lto_varpool_replace_node): Report TLS model conflicts.

From-SVN: r211865

localalias.c: New testcase.

* gcc.dg/localalias.c: New testcase.
* gcc.dg/localalias-2.c: New testcase.
* gcc.dg/globalalias.c: New testcase.
* gcc.dg/globalalias-2.c: New testcase.
* ipa-visibility.c (function_and_variable_visibility): Disable
temporarily local aliases for some targets.

From-SVN: r211864

Daily bump.

From-SVN: r211863

* gcc.target/arm/lto/lto.exp: Exit immediately if not arm*-*-* target.

From-SVN: r211860

asan.c (pass_sanopt::execute): Handle IFN_UBSAN_BOUNDS.

* asan.c (pass_sanopt::execute): Handle IFN_UBSAN_BOUNDS.
* flag-types.h (enum sanitize_code): Add SANITIZE_BOUNDS and or it
into SANITIZE_UNDEFINED.
* doc/invoke.texi: Describe -fsanitize=bounds.
* gimplify.c (gimplify_call_expr): Add gimplification of internal
functions created in the FEs.
* internal-fn.c: Move "internal-fn.h" after "tree.h".
(expand_UBSAN_BOUNDS): New function.
* internal-fn.def (UBSAN_BOUNDS): New internal function.
* internal-fn.h: Don't define internal functions here.
* opts.c (common_handle_option): Add -fsanitize=bounds.
* sanitizer.def (BUILT_IN_UBSAN_HANDLE_OUT_OF_BOUNDS,
BUILT_IN_UBSAN_HANDLE_OUT_OF_BOUNDS_ABORT): Add.
* tree-core.h: Define internal functions here.
(struct tree_base): Add ifn field.
* tree-pretty-print.c: Include "internal-fn.h".
(dump_generic_node): Handle functions without CALL_EXPR_FN.
* tree.c (get_callee_fndecl): Likewise.
(build_call_expr_internal_loc): New function.
* tree.def (CALL_EXPR): Update description.
* tree.h (CALL_EXPR_IFN): Define.
(build_call_expr_internal_loc): Declare.
* ubsan.c (get_ubsan_type_info_for_type): Return 0 for non-arithmetic
types.
(ubsan_type_descriptor): Change bool parameter to enum
ubsan_print_style.  Adjust the code.  Add handling of
UBSAN_PRINT_ARRAY.
(ubsan_expand_bounds_ifn): New function.
(ubsan_expand_null_ifn): Adjust ubsan_type_descriptor call.
(ubsan_build_overflow_builtin): Likewise.
(instrument_bool_enum_load): Likewise.
(ubsan_instrument_float_cast): Likewise.
* ubsan.h (enum ubsan_print_style): New enum.
(ubsan_expand_bounds_ifn): Declare.
(ubsan_type_descriptor): Adjust declaration.  Use a default parameter.
c-family/
* c-gimplify.c: Include "c-ubsan.h" and "pointer-set.h".
(ubsan_walk_array_refs_r): New function.
(c_genericize): Instrument array bounds.
* c-ubsan.c: Include "internal-fn.h".
(ubsan_instrument_division): Mark instrumented arrays as having
side effects.  Adjust ubsan_type_descriptor call.
(ubsan_instrument_shift): Likewise.
(ubsan_instrument_vla): Adjust ubsan_type_descriptor call.
(ubsan_instrument_bounds): New function.
(ubsan_array_ref_instrumented_p): New function.
(ubsan_maybe_instrument_array_ref): New function.
* c-ubsan.h (ubsan_instrument_bounds): Declare.
(ubsan_array_ref_instrumented_p): Declare.
(ubsan_maybe_instrument_array_ref): Declare.
testsuite/
* c-c++-common/ubsan/bounds-1.c: New test.
* c-c++-common/ubsan/bounds-2.c: New test.
* c-c++-common/ubsan/bounds-3.c: New test.
* c-c++-common/ubsan/bounds-4.c: New test.
* c-c++-common/ubsan/bounds-5.c: New test.
* c-c++-common/ubsan/bounds-6.c: New test.

From-SVN: r211859

re PR fortran/33363 (gfortran is missing -fcase-preserve option)

PR fortran/33363
* invoke.texi: Don't mention nonexisting -fcase-lower option.

From-SVN: r211858

rs6000.md: Append `DONE' to preparation statements of `bswap' pattern splitters.

* config/rs6000/rs6000.md: Append `DONE' to preparation
statements of `bswap' pattern splitters.

From-SVN: r211857

re PR c++/59296 ([c++11] ref-qualified member function is ambiguous)

PR c++/59296
* call.c (add_function_candidate): Avoid special 'this' handling
if we have a ref-qualifier.

From-SVN: r211854

re PR c++/61556 ([c++11][4.9/4.10 Regression] ‘*(const ValueType*)this’ is not a constant expression with valid code)

PR c++/61556
* call.c (build_over_call): Call build_this in template path.

From-SVN: r211853

Update definition of call_fusage_contains_non_callee_clobbers

2014-06-20  Tom de Vries  <tom@codesourcery.com>

* target.def (call_fusage_contains_non_callee_clobbers): Update
definition.
* doc/tm.texi: Regenerate.

From-SVN: r211852

Make the tests big-endian friendly.

gcc/testsuite/

Make the tests big-endian friendly.

* gcc.target/aarch64/aapcs64/test_25.c: Update.
* gcc.target/aarch64/aapcs64/va_arg-1.c: Ditto.
* gcc.target/aarch64/aapcs64/va_arg-12.c: Ditto.
* gcc.target/aarch64/aapcs64/va_arg-2.c: Ditto.
* gcc.target/aarch64/aapcs64/va_arg-3.c: Ditto.
* gcc.target/aarch64/aapcs64/va_arg-4.c: Ditto.
* gcc.target/aarch64/aapcs64/va_arg-5.c: Ditto.
* gcc.target/aarch64/aapcs64/va_arg-6.c: Ditto.
* gcc.target/aarch64/aapcs64/va_arg-7.c: Ditto.

From-SVN: r211851

asan.c (instrument_strlen_call): Fixed instrumentation of trailing byte.

2014-06-18  Yury Gribov  <y.gribov@samsung.com>

gcc/
* asan.c (instrument_strlen_call): Fixed instrumentation of
trailing byte.

gcc/testsuite/
* c-c++-common/asan/strlen-overflow-1.c: New test.

Co-Authored-By: Max Ostapenko <m.ostapenko@partner.samsung.com>
From-SVN: r211849

re PR ipa/61540 (internal compiler error in try_make_edge_direct_virtual_call)

2014-06-20  Martin Jambor  <mjambor@suse.cz>

PR ipa/61540
* ipa-prop.c (impossible_devirt_target): New function.
(try_make_edge_direct_virtual_call): Use it, also instead of
asserting.

testsuite/
        * g++.dg/ipa/pr61540.C: New test.

From-SVN: r211847

re PR sanitizer/61530 (segfault with asan)

2014-06-18  Yury Gribov  <y.gribov@samsung.com>

gcc/
PR sanitizer/61530
* asan.c (build_check_stmt): Add condition.

gcc/testsuite/
* c-c++-common/asan/pr61530.c: New test.

Co-Authored-By: Max Ostapenko <m.ostapenko@partner.samsung.com>
From-SVN: r211846

re PR ipa/61211 (ICE: verify_cgraph_node failed: edge points to wrong declaration with -O3 -fno-inline)

2014-06-20  Martin Jambor  <mjambor@suse.cz>

PR ipa/61211
* cgraph.c (clone_of_p): Allow skipped_branch to deal with
expanded clones.

From-SVN: r211844

[AArch64] Fix some saturating math NEON intrinsics types.

[gcc/]
* config/aarch64/iterators.md (VCOND): Handle SI and HI modes.
Update comments.
(VCONQ): Make comment more helpful.
(VCON): Delete.
* config/aarch64/aarch64-simd.md
(aarch64_sqdmulh_lane<mode>):
Use VCOND for operands 2.  Update lane checking and flipping logic.
(aarch64_sqrdmulh_lane<mode>): Likewise.
(aarch64_sq<r>dmulh_lane<mode>_internal): Likewise.
(aarch64_sqdmull2<mode>): Remove VCON, use VQ_HSI mode iterator.
(aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal, VD_HSI): Change mode
attribute of operand 3 to VCOND.
(aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal, SD_HSI): Likewise.
(aarch64_sqdml<SBINQOPS:as>l2_lane<mode>_internal): Likewise.
(aarch64_sqdmull_lane<mode>_internal, VD_HSI): Likewise.
(aarch64_sqdmull_lane<mode>_internal, SD_HSI): Likewise.
(aarch64_sqdmull2_lane<mode>_internal): Likewise.
(aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal, VD_HSI: New
define_insn.
(aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal, SD_HSI): Likewise.
(aarch64_sqdml<SBINQOPS:as>l2_laneq<mode>_internal): Likewise.
(aarch64_sqdmull_laneq<mode>_internal, VD_HSI): Likewise.
(aarch64_sqdmull_laneq<mode>_internal, SD_HSI): Likewise.
(aarch64_sqdmull2_laneq<mode>_internal): Likewise.
(aarch64_sqdmlal_lane<mode>): Change mode attribute of penultimate
operand to VCOND.  Update lane flipping and bounds checking logic.
(aarch64_sqdmlal2_lane<mode>): Likewise.
(aarch64_sqdmlsl_lane<mode>): Likewise.
(aarch64_sqdmull_lane<mode>): Likewise.
(aarch64_sqdmull2_lane<mode>): Likewise.
(aarch64_sqdmlal_laneq<mode>):
Replace VCON usage with VCONQ.
Emit aarch64_sqdmlal_laneq<mode>_internal insn.
(aarch64_sqdmlal2_laneq<mode>): Emit
aarch64_sqdmlal2_laneq<mode>_internal insn.
Replace VCON with VCONQ.
(aarch64_sqdmlsl2_lane<mode>): Replace VCON with VCONQ.
(aarch64_sqdmlsl2_laneq<mode>): Likewise.
(aarch64_sqdmull_laneq<mode>): Emit
aarch64_sqdmull_laneq<mode>_internal insn.
Replace VCON with VCONQ.
(aarch64_sqdmull2_laneq<mode>): Emit
aarch64_sqdmull2_laneq<mode>_internal insn.
(aarch64_sqdmlsl_laneq<mode>): Replace VCON usage with VCONQ.
* config/aarch64/arm_neon.h (vqdmlal_high_lane_s16): Change type
of 3rd argument to int16x4_t.
(vqdmlalh_lane_s16): Likewise.
(vqdmlslh_lane_s16): Likewise.
(vqdmull_high_lane_s16): Likewise.
(vqdmullh_lane_s16): Change type of 2nd argument to int16x4_t.
(vqdmlal_lane_s16): Don't create temporary int16x8_t value.
(vqdmlsl_lane_s16): Likewise.
(vqdmull_lane_s16): Don't create temporary int16x8_t value.
(vqdmlal_high_lane_s32): Change type 3rd argument to int32x2_t.
(vqdmlals_lane_s32): Likewise.
(vqdmlsls_lane_s32): Likewise.
(vqdmull_high_lane_s32): Change type 2nd argument to int32x2_t.
(vqdmulls_lane_s32): Likewise.
(vqdmlal_lane_s32): Don't create temporary int32x4_t value.
(vqdmlsl_lane_s32): Likewise.
(vqdmull_lane_s32): Don't create temporary int32x4_t value.
(vqdmulhh_lane_s16): Change type of second argument to int16x4_t.
(vqrdmulhh_lane_s16): Likewise.
(vqdmlsl_high_lane_s16): Likewise.
(vqdmulhs_lane_s32): Change type of second argument to int32x2_t.
(vqdmlsl_high_lane_s32): Likewise.
(vqrdmulhs_lane_s32): Likewise.

[gcc/testsuite]
* gcc.target/aarch64/simd/vqdmulhh_lane_s16.c: New test.
* gcc.target/aarch64/simd/vqdmulhs_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhh_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhs_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_high_lane_s16.c: New test.
* gcc.target/aarch64/simd/vqdmlal_high_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_high_laneq_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_high_laneq_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_laneq_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmlal_laneq_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlalh_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmlals_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsl_laneq_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmlslh_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmlsls_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_laneq_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmulh_laneq_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhq_laneq_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmulhq_laneq_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_high_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_high_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_high_laneq_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_high_laneq_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_laneq_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmull_laneq_s32.c: Likewise.
* gcc.target/aarch64/simd/vqdmullh_lane_s16.c: Likewise.
* gcc.target/aarch64/simd/vqdmulls_lane_s32.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulh_laneq_s16.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulh_laneq_s32.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_laneq_s16.c: Likewise.
* gcc.target/aarch64/simd/vqrdmulhq_laneq_s32.c: Likewise.
* gcc.target/aarch64/vector_intrinsics.c: Simplify arm_neon.h include.
(test_vqdmlal_high_lane_s16): Fix parameter type.
(test_vqdmlal_high_lane_s32): Likewise.
(test_vqdmull_high_lane_s16): Likewise.
(test_vqdmull_high_lane_s32): Likewise.
(test_vqdmlsl_high_lane_s32): Likewise.
(test_vqdmlsl_high_lane_s16): Likewise.
* gcc.target/aarch64/scalar_intrinsics.c (test_vqdmlalh_lane_s16):
Fix argument type.
(test_vqdmlals_lane_s32): Likewise.
(test_vqdmlslh_lane_s16): Likewise.
(test_vqdmlsls_lane_s32): Likewise.
(test_vqdmulhh_lane_s16): Likewise.
(test_vqdmulhs_lane_s32): Likewise.
(test_vqdmullh_lane_s16): Likewise.
(test_vqdmulls_lane_s32): Likewise.
(test_vqrdmulhh_lane_s16): Likewise.
(test_vqrdmulhs_lane_s32): Likewise.

From-SVN: r211842

Fix finding reg-sets of call insn

2014-06-20  Tom de Vries  <tom@codesourcery.com>

* final.c (collect_fn_hard_reg_usage): Add separate IOR_HARD_REG_SET for
get_call_reg_set_usage.

From-SVN: r211841

Don't save function_used_regs if it contains all call_used_regs

2014-06-20  Tom de Vries  <tom@codesourcery.com>

* final.c (collect_fn_hard_reg_usage): Don't save function_used_regs if
it contains all call_used_regs.

From-SVN: r211840

Use function_used_regs variable in collect_fn_hard_reg_usage

2014-06-20  Tom de Vries  <tom@codesourcery.com>

* final.c (collect_fn_hard_reg_usage): Add and use variable
function_used_regs.

From-SVN: r211839

cgraph.h (struct symtab_node): Add field in_init_priority_hash (set_init_priority...

* cgraph.h (struct symtab_node): Add field in_init_priority_hash
(set_init_priority, get_init_priority, set_fini_priority,
get_fini_priority): New methods.
* tree.c (init_priority_for_decl): Remove.
(init_ttree): Do not initialize init priority.
(decl_init_priority_lookup, decl_fini_priority_lookup): Rewrite.
(decl_priority_info): Remove.
(decl_init_priority_insert): Rewrite.
(decl_fini_priority_insert): Rewrite.
* tree.h (tree_priority_map_eq, tree_priority_map_hash,
tree_priority_map_marked_p): Remove.
* lto-cgraph.c (lto_output_node, input_node): Stream init priorities.
* lto-streamer-out.c (hash_tree): Do not hash priorities.
* tree-streamer-out.c (pack_ts_decl_with_vis_value_fields): Do
not output priorities.
(pack_ts_function_decl_value_fields): Likewise.
* tree-streamer-in.c (unpack_ts_decl_with_vis_value_fields): Do
not input priorities.
(unpack_ts_function_decl_value_fields): Likewise.
* symtab.c (symbol_priority_map): Declare.
(init_priority_hash): Declare.
(symtab_unregister_node): Unregister from priority hash, too.
(symtab_node::get_init_priority, cgraph_node::get_fini_priority):
New methods.
(symbol_priority_map_eq, symbol_priority_map_hash): New functions.
(symbol_priority_info): New function.
(symtab_node::set_init_priority, cgraph_node::set_fini_priority):
New methods.
* tree-core.h (tree_priority_map): Remove.

* lto.c (compare_tree_sccs_1): Do not compare priorities.

From-SVN: r211838

tree-ssa-math-opts.c (do_shift_rotate, [...]): Cast 0xff to uint64_t before shifting it up.

* tree-ssa-math-opts.c (do_shift_rotate, find_bswap_or_nop_1): Cast
0xff to uint64_t before shifting it up.

From-SVN: r211837

arm.c (arm_output_mi_thunk): Fix offset for TARGET_THUMB1_ONLY.

2014-06-20  Julian Brown  <julian@codesourcery.com>
    Chung-Lin Tang  <cltang@codesourcery.com>

* config/arm/arm.c (arm_output_mi_thunk): Fix offset for
TARGET_THUMB1_ONLY. Add comments.

Co-Authored-By: Chung-Lin Tang <cltang@codesourcery.com>
From-SVN: r211834

re PR testsuite/61567 (gfortran.dg/coarray_collectives_{5,6}.f90 failure)

2014-06-20  Tobias Burnus  <burnus@net-b.de>

        PR testsuite/61567
        * gfortran.dg/coarray_collectives_5.f90: Update
        dg-final scan-tree-dump-times.
        * gfortran.dg/coarray_collectives_6.f90: Ditto.

From-SVN: r211833

re PR lto/61123 (With LTO, -fno-short-enums is ignored, resulting in ABI mis-matching in linking.)

c-family/ChangeLog
2014-06-20 Hale Wang <hale.wang@arm.com>

PR lto/61123
* c.opt (fshort-enums): Add to LTO.
* c.opt (fshort-wchar): Likewise.

testsuite/ChangeLog
2014-06-20 Hale Wang <hale.wang@arm.com>

* gcc.target/arm/lto/: New folder to verify the LTO option.
* gcc.target/arm/lto/pr61123-enum-size_0.c: New test case.
* gcc.target/arm/lto/pr61123-enum-size_1.c: Likewise.
* gcc.target/arm/lto/lto.exp: New exp file used to test LTO option.
* lib/lto.exp (object-readelf): New procedure.

From-SVN: r211832

Daily bump.

From-SVN: r211831

Fix aarch64_emit_call_insn return type

2014-06-19  Tom de Vries  <tom@codesourcery.com>

* config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Change
return type to void.
* config/aarch64/aarch64.c (aarch64_emit_call_insn): Same.

From-SVN: r211823

re PR fortran/61454 (ICE in simplification of initialization expression with array)

PR fortran/61454
* expr.c (scalarize_intrinsic_call): Take care of optional
arguments.
* gfortran.dg/pr61454.f90: New file.

From-SVN: r211822

re PR c++/59296 ([c++11] ref-qualified member function is ambiguous)

PR c++/59296
* call.c (add_function_candidate): Also set LOOKUP_NO_TEMP_BIND.

From-SVN: r211821

loop-invariant.c (get_inv_cost): Skip invariants, which are marked as "move", from depends_on.

2014-06-19  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

* loop-invariant.c (get_inv_cost): Skip invariants, which are marked
as "move", from depends_on.

From-SVN: r211818

thumb1.md (define_split): Split 64bit constant in earlier stage.

gcc/ChangeLog:

2014-06-19  Terry Guo  <terry.guo@arm.com>

* config/arm/thumb1.md (define_split): Split 64bit constant in earlier
stage.

gcc/testsuite/ChangeLog:

2014-06-19  Terry Guo  <terry.guo@arm.com>

* gcc.target/arm/thumb1-load-64bit-constant-1.c: New test.
* gcc.target/arm/thumb1-load-64bit-constant-2.c: Ditto.
* gcc.target/arm/thumb1-load-64bit-constant-3.c: Ditto.

From-SVN: r211817

trans-intrinsic.c (conv_co_minmaxsum): Fix argument passing.

gcc/fortran/
2014-06-19  Tobias Burnus  <burnus@net-b.de>

        * trans-intrinsic.c (conv_co_minmaxsum): Fix argument
        passing.

gcc/testsuite/
2014-06-19  Tobias Burnus  <burnus@net-b.de>

        * gfortran.dg/coarray/collectives_2.f90: Extend
        and make valid.

libgfortran/
2014-06-19  Tobias Burnus  <burnus@net-b.de>

        * caf/single.c (_gfortran_caf_co_sum, _gfortran_caf_co_max,
        _gfortran_caf_co_min): Fix stat setting.

From-SVN: r211816

Ignore gcc_update output

From-SVN: r211815

Daily bump.

From-SVN: r211814

rs6000: Make cr5 allocatable

A comment in rs6000.h says "cr5 is not supposed to be used".  I checked
all ABIs, going as far back as PowerOpen (1994), and found no mention
of this.

Also document cr6 is used by some vector instructions.

From-SVN: r211811

re PR c++/59296 ([c++11] ref-qualified member function is ambiguous)

PR c++/59296
* call.c (add_function_candidate): Set LOOKUP_NO_RVAL_BIND for
ref-qualifier handling.

From-SVN: r211809

re PR c++/61507 (GCC does not compile function with parameter pack.)

PR c++/61507
* pt.c (resolve_overloaded_unification): Preserve
ARGUMENT_PACK_EXPLICIT_ARGS.

From-SVN: r211808

re PR target/61550 ([SH] build failure with ICE in gen_reg_rtx, at emit-rtl.c:943)

PR target/61550
* config/sh/sh.c (prepare_move_operands): Don't process TLS
addresses here if reload in progress or completed.

From-SVN: r211807

gfortran.texi (OpenMP): Update refs to OpenMP 4.0.

2014-06-18  Tobias Burnus  <burnus@net-b.de>

        * gfortran.texi (OpenMP): Update refs to OpenMP 4.0.
        * intrinsic.texi (OpenMP Modules): Ditto.

From-SVN: r211806

Enable LRA for MIPS

gcc/

* config/mips/constraints.md ("d"): BASE_REG_CLASS replaced by
"TARGET_MIPS16 ? M16_REGS : GR_REGS".
* config/mips/mips.c (mips_regno_to_class): Update for M16_SP_REGS.
(mips_regno_mode_ok_for_base_p): Remove use of !strict_p for MIPS16.
(mips_register_priority): New function that implements the target
hook TARGET_REGISTER_PRIORITY.
(mips_spill_class): Likewise for TARGET_SPILL_CLASS.
(mips_lra_p): Likewise for TARGET_LRA_P.
(TARGET_REGISTER_PRIORITY): Define macro.
(TARGET_SPILL_CLASS): Likewise.
(TARGET_LRA_P): Likewise.
* config/mips/mips.h (reg_class): Add M16_SP_REGS and SPILL_REGS
classes.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS): Likewise.
(BASE_REG_CLASS): Use M16_SP_REGS.
* config/mips/mips.md (*mul_acc_si): Add alternative tuned for LRA.
New set attribute to enable alternatives depending on the register
allocator used.
(*mul_acc_si_r3900, *mul_sub_si): Likewise.
(*lea64): Disable pattern for MIPS16.
* config/mips/mips.opt (mlra): New option.

From-SVN: r211805

ChangeLog: Fix whitespace.

* ChangeLog: Fix whitespace.
* testsuite/ChangeLog: Fix invalid entry.

From-SVN: r211804

Add support for reloading a frame address with an invalid base

gcc/

* lra-constraints.c (base_to_reg): New function.
(process_address): Use new function.

From-SVN: r211802

-fuse-caller-save - Enable for AArch64

2014-05-30  Tom de Vries  <tom@codesourcery.com>

* config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Declare.
* config/aarch64/aarch64.c
(TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS): Redefine as true.
(aarch64_emit_call_insn): New function.
(aarch64_load_symref_appropriately): Use aarch64_emit_call_insn instead
of emit_call_insn.
* config/aarch64/aarch64.md (define_expand "call_internal")
(define_expand "call_value_internal", define_expand "sibcall_internal")
(define_expand "sibcall_value_internal"): New.
(define_expand "call", define_expand "call_value")
(define_expand "sibcall", define_expand "sibcall_value"): Use internal
expand variant and aarch64_emit_call_insn.

* gcc.target/aarch64/fuse-caller-save.c: New test.

From-SVN: r211799

-fuse-caller-save - Enable for ARM

2014-06-18  Radovan Obradovic  <robradovic@mips.com>
            Tom de Vries  <tom@codesourcery.com>

* config/arm/arm-protos.h (arm_emit_call_insn): Add bool parameter.
* config/arm/arm.c (TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS):
Redefine to true.
(arm_emit_call_insn): Add and use sibcall parameter.  Add IP and CC
clobbers to CALL_INSN_FUNCTION_USAGE.
(define_expand "sibcall_internal")
(define_expand "sibcall_value_internal"): New.
(define_expand "call", define_expand "call_value"): Add argument to
arm_emit_call_insn.
(define_expand "sibcall"): Use sibcall_internal and arm_emit_call_insn.
(define_expand "sibcall_value"): Use sibcall_value_internal and
arm_emit_call_insn.

* gcc.target/arm/fuse-caller-save.c: New test.

Co-Authored-By: Tom de Vries <tom@codesourcery.com>
From-SVN: r211798

bpabi.c (__gnu_uldivmod_helper): Remove.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.c (__gnu_uldivmod_helper): Remove.

From-SVN: r211797

bpabi-v6m.S (__aeabi_uldivmod): Perform division using __udivmoddi4.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi-v6m.S (__aeabi_uldivmod): Perform division using
__udivmoddi4.

From-SVN: r211796

bpabi.S (__aeabi_ldivmod, [...]): Use .cfi_* directives for DWARF annotations.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_ldivmod, __aeabi_uldivmod,
push_for_divide, pop_for_divide): Use .cfi_* directives for DWARF
annotations. Fix DWARF information.

From-SVN: r211795

bpabi.S (__aeabi_ldivmod): Perform division using __udivmoddi4, and fixups for negative operands.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_ldivmod): Perform division using
__udivmoddi4, and fixups for negative operands.

From-SVN: r211794

bpabi.S (__aeabi_ldivmod): Optimise stack manipulation.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_ldivmod): Optimise stack manipulation.

From-SVN: r211793

bpabi.S (__aeabi_uldivmod): Perform division using call to __udivmoddi4.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_uldivmod): Perform division using call
to __udivmoddi4.

From-SVN: r211792

bpabi.S (__aeabi_uldivmod): Optimise stack pointer manipulation.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_uldivmod): Optimise stack pointer
manipulation.

From-SVN: r211791

bpabi.S (__aeabi_uldivmod, [...]): Add comment describing register usage on function entry and exit.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_uldivmod, __aeabi_ldivmod): Add comment
describing register usage on function entry and exit.

From-SVN: r211790

bpabi.S (__aeabi_uldivmod): Fix whitespace.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_uldivmod): Fix whitespace.
(__aeabi_ldivmod): Fix whitespace.

From-SVN: r211789

md.texi (Standard Names): Use @itemx for grouped items.

* doc/md.texi (Standard Names): Use @itemx for grouped items.
Remove blank line after @item.

From-SVN: r211788

re PR target/61545 (Miscompilation in libcap-ng)

PR target/61545

* config/aarch64/aarch64.md (tlsdesc_small_<PTR>): Clobber CC_REGNUM.

From-SVN: r211785

arm.c (neon_vector_mem_operand): Allow register POST_MODIFY for neon loads and stores.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/arm.c (neon_vector_mem_operand): Allow register
POST_MODIFY for neon loads and stores.
(arm_print_operand): Output post-index register for neon loads and
stores.

From-SVN: r211783

tree-ssa-dce.c (perform_tree_ssa_dce): Fixup bogus commit.

2014-06-18  Richard Biener  <rguenther@suse.de>

* tree-ssa-dce.c (perform_tree_ssa_dce): Fixup bogus commit.

From-SVN: r211782

tree-pass.h (make_pass_dce_loop): Remove.

2014-06-18  Richard Biener  <rguenther@suse.de>

* tree-pass.h (make_pass_dce_loop): Remove.
* passes.def: Replace pass_dce_loop with pass_dce.
* tree-ssa-dce.c (perform_tree_ssa_dce): If something
changed free niter estimates and reset the scev cache.
(tree_ssa_dce_loop, pass_data_dce_loop, pass_dce_loop,
make_pass_dce_loop): Remove.
* tree-ssa-copy.c: Include tree-ssa-loop-niter.h.
(fini_copy_prop): Return whether something changed.  Always
let substitute_and_fold perform DCE and free niter estimates
and reset the scev cache if so.
(execute_copy_prop): If sth changed schedule cleanup-cfg.
(pass_data_copy_prop): Do not unconditionally schedule
cleanup-cfg or update-ssa.

* gcc.dg/vect/vect.exp: Remove dump-tree-dceloop-* processing.
* gcc.dg/vect/dump-tree-dceloop-pr26359.c: Rename to ...
* gcc.dg/vect/pr26359.c: ... this and adjust appropriately.

From-SVN: r211781

re PR tree-optimization/61518 (wrong code (by tree vectorizer) at -O3 on x86_64-linux-gnu)

        PR tree-optimization/61518
gcc/
        * tree-if-conv.c (is_cond_scalar_reduction): Add missed check that
        reduction var is used in reduction stmt or phi-function only.

gcc/testsuite/
        * gcc.dg/torture/pr61518.c: New test.

From-SVN: r211780