Sanjay Patel [Tue, 21 Sep 2021 15:26:30 +0000 (11:26 -0400)]
[InstCombine] move/add tests for trunc-of-lshr; NFC
Planning to reframe a proposed transform in terms of
demanded bits as suggested in D110170.
The new tests end with an 'or'.
Kostya Serebryany [Tue, 21 Sep 2021 00:58:50 +0000 (17:58 -0700)]
[sanitizer coverage] write the pc-table at the process exit
The current code writes the pc-table at the process startup,
which may happen before the common_flags() are initialized.
Move writing to the process end.
This is consistent with how we write the counters and avoids the problem with the uninitalized flags.
Add prints if verbosity>=1.
Reviewed By: kostik
Differential Revision: https://reviews.llvm.org/D110119
Florian Hahn [Tue, 21 Sep 2021 15:54:47 +0000 (16:54 +0100)]
[ValueTracking,VectorCombine] Allow passing DT to computeConstantRange.
isValidAssumeForContext can provide better results with access to the
dominator tree in some cases. This patch adjusts computeConstantRange to
allow passing through a dominator tree.
The use VectorCombine is updated to pass through the DT to enable
additional scalarization.
Note that similar APIs like computeKnownBits already accept optional dominator
tree arguments.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D110175
Michael Liao [Thu, 13 May 2021 13:36:48 +0000 (09:36 -0400)]
[SelectionDAG] Re-calculate scoped AA metadata when merging stores.
Reviewed By: jeroen.dobbelaere
Differential Revision: https://reviews.llvm.org/D102821
Aleksandr Bezzubikov [Tue, 21 Sep 2021 14:41:53 +0000 (10:41 -0400)]
[GlobalISel] Support ConstantAsMetadata in IRTranslator
When using instructions which have a MetadataAsValue argument
(e.g. some target-specific intrinsics) MD canonicalization strips
internal MDNodes with a single ConstantAsMetadata child. That
prevented IRTranslator from the proper translation of such a calls.
Tobias Gysi [Tue, 21 Sep 2021 15:09:32 +0000 (15:09 +0000)]
[mlir][linalg] Simplify slice dim computation for fusion on tensors (NFC).
Compute the tiled producer slice dimensions directly starting from the consumer not using the producer at all.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D110147
Tobias Gysi [Tue, 21 Sep 2021 14:53:33 +0000 (14:53 +0000)]
[mlir][linalg] Add isPermutation helper (NFC).
Add a helper method to check if an index vector contains a permutation of its indices. Additionally, refactor applyPermutationToVector to take int64_t.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D110135
Dmitry Preobrazhensky [Tue, 21 Sep 2021 15:04:34 +0000 (18:04 +0300)]
[AMDGPU][MC][GFX7][GFX10] Corrected image_atomic_fcmpswap
Differential Revision: https://reviews.llvm.org/D109616
Petar Avramovic [Tue, 21 Sep 2021 13:51:32 +0000 (15:51 +0200)]
AMDGPU/GlobalISel: Restore run line erased in D109154 by mistake
Andy Wingo [Wed, 4 Aug 2021 08:38:24 +0000 (10:38 +0200)]
[clang][NFC] Fix needless double-parenthisation
Strip a layer of parentheses in TreeTransform::RebuildQualifiedType.
Differential Revision: https://reviews.llvm.org/D108359
David Green [Tue, 21 Sep 2021 14:37:00 +0000 (15:37 +0100)]
[AArch64] Regenerate test lines in and-mask-removal.ll
Nicolas Vasilache [Mon, 20 Sep 2021 14:04:07 +0000 (14:04 +0000)]
[mlir][Linalg] Revisit heuristic ordering of tensor.insert_slice in comprehensive bufferize.
It was previously assumed that tensor.insert_slice should be bufferized first in a greedy fashion to avoid out-of-place bufferization of the large tensor. This heuristic does not hold upon further inspection.
This CL removes the special handling of such ops and adds a test that exhibits better behavior and appears in real use cases.
The only test adversely affected is an artificial test which results in a returned memref: this pattern is not allowed by comprehensive bufferization in real scenarios anyway and the offending test is deleted.
Differential Revision: https://reviews.llvm.org/D110072
Nicolas Vasilache [Mon, 20 Sep 2021 14:03:55 +0000 (14:03 +0000)]
[mlir][Linalg] Revisit RAW dependence interference in comprehensive bufferize.
Previously, comprehensive bufferize would consider all aliasing reads and writes to
the result buffer and matching operand. This resulted in spurious dependences
being considered and resulted in too many unnecessary copies.
Instead, this revision revisits the gathering of read and write alias sets.
This results in fewer alloc and copies.
An exhaustive test cases is added that considers all possible permutations of
`matmul(extract_slice(fill), extract_slice(fill), ...)`.
Tobias Gysi [Tue, 21 Sep 2021 13:51:07 +0000 (13:51 +0000)]
[mlir][linalg] Assert tile loop nest invariants in fusion.
Assert the tile loop nest invariants are satisfied instead of failing silently.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D110137
Chris Bieneman [Thu, 16 Sep 2021 01:42:12 +0000 (20:42 -0500)]
[NFC] `goto fail` has failed us in the past...
This patch replaces reliance on `goto failure` pattern with
`llvm::scope_exit`.
Reviewed By: bkramer
Differential Revision: https://reviews.llvm.org/D109865
Ben Shi [Sun, 19 Sep 2021 09:42:20 +0000 (09:42 +0000)]
[RISCV] Optimize (add (mul x, c0), c1)
Optimize (add (mul x, c0), c1) -> (ADDI (MUL (ADDI, c1/c0), c0), c1%c0),
if c1/c0 and c1%c0 are simm12, while c1 is not.
Optimize (add (mul x, c0), c1) -> (MUL (ADDI, c1/c0), c0),
if c1%c0 is zero, and c1/c0 is simm12 while c1 is not.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D108607
Justas Janickas [Wed, 15 Sep 2021 10:53:43 +0000 (11:53 +0100)]
[OpenCL] Defines helper function for OpenCL default address space
Helper function `getDefaultOpenCLPointeeAddrSpace()` introduced to
`ASTContext` class. It returns default OpenCL address space
depending on language version and enabled features. If generic
address space is supported, the helper function returns value
`LangAS::opencl_generic`. Otherwise, value `LangAS::opencl_private`
is returned. Code refactoring changes performed in several suitable
places.
Differential Revision: https://reviews.llvm.org/D109874
Anna Thomas [Mon, 20 Sep 2021 20:37:38 +0000 (16:37 -0400)]
[InstCombine] Improve TryToSinkInstruction with multiple uses
This patch allows sinking an instruction which can have multiple uses in a
single user. We were previously over-restrictive by looking for exactly one use,
rather than one user.
Also added an API for retrieving a unique undroppable user.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D109700
Saiyedul Islam [Mon, 20 Sep 2021 17:25:41 +0000 (22:55 +0530)]
[clang-offload-bundler][docs][NFC] Add archive unbundling documentation
Add documentation of unbundling of heterogeneous device archives to
create device specific archives, as introduced by D93525. Also, add
documentation for supported text file formats.
Reviewed By: yaxunl
Differential Revision: https://reviews.llvm.org/D110083
OGINO Masanori [Tue, 21 Sep 2021 15:24:48 +0000 (17:24 +0200)]
[NFC] Update the list of subprojects in docs.
The updated list is based on the output of
cmake -G Ninja -S llvm -B build -DLLVM_ENABLE_PROJECTS='foo'.
Differential Revision: https://reviews.llvm.org/D110124
Sanjay Patel [Mon, 20 Sep 2021 19:36:36 +0000 (15:36 -0400)]
[InstCombine] add tests for mask-shift with trunc; NFC
Dmitry Preobrazhensky [Tue, 21 Sep 2021 13:21:44 +0000 (16:21 +0300)]
[AMDGPU][MC][GFX10] Enabled dlc for FLAT and GLOBAL atomics
Differential Revision: https://reviews.llvm.org/D109614
hyeongyu kim [Tue, 21 Sep 2021 12:48:04 +0000 (21:48 +0900)]
[IR] Add the constructor of ShuffleVector for one-input-vector.
One of the two inputs of the Shufflevector is often a placeholder.
Previously, there were cases where the placeholder was undef, and there were cases where it was poison.
I added these constructors to create a placeholder consistently.
Changing to use the newly added constructor will be written in a separate patch.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D110146
Nico Weber [Tue, 21 Sep 2021 13:01:37 +0000 (09:01 -0400)]
[llvm] Pass LLVM_CHECK_ENABLED_PROJECTS through in cross builds
Jonas Paulsson [Thu, 9 Sep 2021 15:26:50 +0000 (17:26 +0200)]
[SystemZ] Emit EXRL target instructions before text section is ended.
SystemZ adds the EXRL target instructions in the end of each file. This must
be done before debug info emission since that may end the text section, and
therefore this is now done in emitConstantPools() (instead of in
emitEndOfAsmFile).
Review: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D109513
Florian Hahn [Tue, 21 Sep 2021 11:51:07 +0000 (12:51 +0100)]
[VectorCombine] Add tests which require DT to use info from assumes.
Nicholas Guy [Wed, 8 Sep 2021 15:19:17 +0000 (16:19 +0100)]
[AArch64] Improve schedule modelling on the Cortex-A55
Enables the FuseAddress feature in the Cortex-A55 scheduling model
Differential Revision: https://reviews.llvm.org/D109323
Simon Pilgrim [Tue, 21 Sep 2021 11:23:52 +0000 (12:23 +0100)]
[InstCombine] foldConstantInsEltIntoShuffle - bail if we fail to find constant element (PR51824)
If getAggregateElement() returns null for any element, early out as otherwise we will assert when creating a new constant vector
Fixes PR51824 + ; OSS-Fuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=38057
Simon Pilgrim [Tue, 21 Sep 2021 09:19:12 +0000 (10:19 +0100)]
[CodeGen] SelectionDAGBuilder - Use const-ref iterator in for-range loops. NFCI.
Avoid unnecessary copies, reported by MSVC static analyzer.
Simon Pilgrim [Tue, 21 Sep 2021 09:14:02 +0000 (10:14 +0100)]
RewriteStatepointsForGC - Use const-ref iterator in for-range loops. NFCI.
Avoid unnecessary copies, reported by MSVC static analyzer.
Simon Pilgrim [Tue, 21 Sep 2021 09:12:56 +0000 (10:12 +0100)]
[CodeGen] SDDbgValue::getSDNodes() - use const-ref to avoid unnecessary copies. NFCI.
Reported by MSVC static analyzer.
Dmitry Vyukov [Tue, 21 Sep 2021 08:20:24 +0000 (10:20 +0200)]
tsan: simplify thread context setting
Currently we set thr->tctx after OnStarted callback
taking thread registry mutex again and searching for the context.
But OnStarted already runs under the thread registry mutex
and has access to the context, so set it in the OnStarted.
This makes code simpler and faster.
Depends on D110132.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D110133
Dmitry Vyukov [Tue, 21 Sep 2021 08:08:56 +0000 (10:08 +0200)]
tsan: rearrange thread state callbacks (NFC)
Thread state functions are split into 2 parts:
tsan entry function (e.g. ThreadStart) and thread registry
state change callback (e.g. OnStart). Currently these
pairs of functions are located far from each other and
in reverse order. This makes it hard to read and follow the logic.
Reorder the code so that OnFoo directly follows ThreadFoo.
No other code changes.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D110132
Dmitry Vyukov [Tue, 21 Sep 2021 07:58:14 +0000 (09:58 +0200)]
tsan: fix debug format strings
Some of the DPrintf's currently produce -Wformat warnings if enabled.
Fix these format strings.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D110131
Jay Foad [Mon, 20 Sep 2021 14:44:32 +0000 (15:44 +0100)]
[AMDGPU] Prefer fmac over fma when selecting FMA_W_CHAIN
FMA_W_CHAIN is used when lowering fdiv f32. Prefer to select it to fmac
if there are no source modifiers, just like we do for other mad/mac and
fma/fmac cases.
Differential Revision: https://reviews.llvm.org/D110074
Jay Foad [Mon, 20 Sep 2021 13:20:28 +0000 (14:20 +0100)]
[AMDGPU] Prefer v_fmac over v_fma only when no source modifiers are used
v_fmac with source modifiers forces VOP3 encoding, but it is strictly
better to use the VOP3-only v_fma instead, because $dst and $src2 are
not tied so it gives the register allocator more freedom and avoids a
copy in some cases.
This is the same strategy we already use for v_mad vs v_mac and
v_fma_legacy vs v_fmac_legacy.
Differential Revision: https://reviews.llvm.org/D110070
David Green [Tue, 21 Sep 2021 10:44:41 +0000 (11:44 +0100)]
[AArch64] Regenerate test lines in sve-implicit-zero-filling.ll
Max Kazantsev [Tue, 21 Sep 2021 10:10:43 +0000 (17:10 +0700)]
[SCEV] Use isAvailableAtLoopEntry in the asserts
This is what is supposed to be there.
Petar Avramovic [Tue, 21 Sep 2021 09:54:12 +0000 (11:54 +0200)]
GlobalISel/Utils: Refactor constant splat match functions
Add generic helper function that matches constant splat. It has option to
match constant splat with undef (some elements can be undef but not all).
Add util function and matcher for G_FCONSTANT splat.
Differential Revision: https://reviews.llvm.org/D104410
Max Kazantsev [Tue, 21 Sep 2021 10:05:08 +0000 (17:05 +0700)]
[SCEV] Add some asserts on availability of arguments of isLoopEntryGuardedByCond
The logic in howManyLessThans is fishy. It first checks invariance of
RHS, and then uses OrigRHS as argument for isLoopEntryGuardedByCond, which
is, strictly saying, a different thing. We are seeing a very rare intermittent
failure of availability checks, and it looks like this precondition is
sometimes broken. Before we can figure out what's going on, adding asserts
that all involved values that may possibly to to isLoopEntryGuardedByCond
are available at loop entry.
If either of these asserts fails (OrigRHS is the most likely suspect), it
means that the logic here is flawed.
David Stenberg [Tue, 21 Sep 2021 07:44:51 +0000 (09:44 +0200)]
[LowerConstantIntrinsics] Fix heap-use-after-free bug in worklist
This fixes PR51730, a heap-use-after-free bug in
replaceConditionalBranchesOnConstant().
With the attached reproducer we were left with a function looking
something like this after replaceAndRecursivelySimplify():
[...]
cont2.i:
br i1 %.not1.i, label %handler.type_mismatch3.i, label %cont4.i
handler.type_mismatch3.i:
%3 = phi i1 [ %2, %cont2.thread.i ], [ false, %cont2.i ]
unreachable
cont4.i:
unreachable
[...]
with both the branch instruction and PHI node being in the worklist. As
a result of replacing the branch instruction with an unconditional
branch, the PHI node in %handler.type_mismatch3.i would be removed. This
then resulted in a heap-use-after-free bug due to accessing that removed
PHI node in the next worklist iteration.
This is solved by using a value handle worklist. I am a unsure if this
is the most idiomatic solution. Another solution could have been to
produce a worklist just containing the interesting branch instructions,
but I thought that it perhaps was a bit cleaner to keep all worklist
filtering in the loop that does the rewrites.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D109221
Justas Janickas [Thu, 9 Sep 2021 08:32:39 +0000 (09:32 +0100)]
[OpenCL] Test case for C++ for OpenCL 2021 in OpenCL C header test
RUN line representing C++ for OpenCL 2021 added to the test. This
should have been done as part of earlier commit
fb321c2ea274 but
was missed during rebasing.
Differential Revision: https://reviews.llvm.org/D109492
Uday Bondhugula [Tue, 21 Sep 2021 08:53:22 +0000 (14:23 +0530)]
[MLIR] NFC. gpu.launch op argument const folder cleanup
NFC updates to gpu.launch op argument const folder.
Differential Revision: https://reviews.llvm.org/D110136
Andrzej Warzynski [Thu, 16 Sep 2021 07:34:55 +0000 (07:34 +0000)]
[flang][docs] Document plugin limitations
This was extracted from the discussion on
https://reviews.llvm.org/D108283.
Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>
Differential Revision: https://reviews.llvm.org/D109871
Sylvestre Ledru [Tue, 21 Sep 2021 08:44:08 +0000 (10:44 +0200)]
Add CMAKE_BUILD_TYPE to the list of BOOTSTRAP_DEFAULT_PASSTHROUGH variables
When building clang in stage2, when -DCMAKE_BUILD_TYPE=RelWithDebInfo is set,
the developer can expect that the stage2 clang is built using the same mode.
Especially as the performances are much worst in debug mode.
(Principle of least astonishment)
Differential Revision: https://reviews.llvm.org/D53014
Cullen Rhodes [Tue, 21 Sep 2021 07:40:36 +0000 (07:40 +0000)]
[PowerPC] NFC: Remove unused tblgen template args
Identified in D109359.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D109715
Morten Borup Petersen [Mon, 20 Sep 2021 18:02:00 +0000 (19:02 +0100)]
[MLIR][SCF] Add for-to-while loop transformation pass
This pass transforms SCF.ForOp operations to SCF.WhileOp. The For loop condition is placed in the 'before' region of the while operation, and indctuion variable incrementation + the loop body in the 'after' region. The loop carried values of the while op are the induction variable (IV) of the for-loop + any iter_args specified for the for-loop.
Any 'yield' ops in the for-loop are rewritten to additionally yield the (incremented) induction variable.
This transformation is useful for passes where we want to consider structured control flow solely on the basis of a loop body and the computation of a loop condition. As an example, when doing high-level synthesis in CIRCT, the incrementation of an IV in a for-loop is "just another part" of a circuit datapath, and what we really care about is the distinction between our datapath and our control logic (the condition variable).
Differential Revision: https://reviews.llvm.org/D108454
Pavel Labath [Tue, 21 Sep 2021 07:55:56 +0000 (09:55 +0200)]
[lldb] Speculative fix to TestGuiExpandThreadsTree
This test relies on being able to unwind from an arbitrary place inside
libc. While I am not sure this is the cause of the observed flakyness,
it is known that we are not able to unwind correctly from some places in
(linux) libc.
This patch adds additional synchronization to ensure that the inferior
is in the main function (instead of pthread guts) when lldb tries to
unwind it. At the very least, it should make the test runs more
predictable/repeatable.
Kunwar Shaanjeet Singh Grover [Tue, 21 Sep 2021 07:29:49 +0000 (12:59 +0530)]
[MLIR] Add mergeLocalIds and mergeSymbolIds
This patch adds mergeLocalIds andmergeSymbolIds as public functions
for FlatAffineConstraints and FlatAffineValueConstraints respectively.
mergeLocalIds is also required to support divisions in intersection,
subtraction, equality checks, and complement for PresburgerSet.
This patch is part of a series of patches aimed at generalizing affine
dependence analysis.
Reviewed By: bondhugula
Differential Revision: https://reviews.llvm.org/D110045
Nathan Ridge [Mon, 20 Sep 2021 06:29:02 +0000 (02:29 -0400)]
[clangd] Deduplicate inlay hints
Duplicates can sometimes appear due to e.g. explicit template
instantiations
Differential Revision: https://reviews.llvm.org/D110051
Amara Emerson [Tue, 14 Sep 2021 08:56:38 +0000 (01:56 -0700)]
[GlobalISel][Legalizer] Use ArtifactValueFinder first for unmerge combines before trying others.
This is motivated by an pathological compile time issue during unmerge combining.
We should be able to use the AVF to do simplification. However AMDGPU
has a lot of codegen changes which I'm not sure how to evaluate.
Differential Revision: https://reviews.llvm.org/D109748
Evgeniy Brevnov [Wed, 28 Jul 2021 10:13:45 +0000 (17:13 +0700)]
[DSE][NFC] Rename Later->Killing, Earlier->Dead
First (and biggest) change is to use "Killing/Dead" in place of "Later/Earlier" base for names in DSE. For example, [Maybe]DeadLoc - is a location killed by KillingI instruction. I believe such names are more descriptive and easy to understand than current ones.
Second, there are inconsistencies in naming where different names are used for the same thing. Fixed that too.
Third, reordered parameters of isPartialOverwrite, tryToMergePartialOverlappingStores, isOverwrite to make them consistent between each other. This greatly reduces potential mistakes.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D106947
Amara Emerson [Tue, 14 Sep 2021 09:39:57 +0000 (02:39 -0700)]
[GlobalISel][Legalizer] Don't use eraseFromParentAndMarkDBGValuesForRemoval() for some artifacts.
For artifacts excluding G_TRUNC/G_SEXT, which have IR counterparts, we don't
seem to have debug users of defs. However, in the legalizer we're always calling
MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval() which is expensive.
In some rare cases, this contributes significantly to unreasonably long compile
times when we have lots of artifact combiner activity.
To verify this, I added asserts to that function when it actually replaced a debug
use operand with undef for these artifacts. On CTMark with both -O0 and -Os and
debug info enabled, I didn't see a single case where it triggered.
In my measurements I saw around a 0.5% geomean compile-time improvement on -g -O0
for AArch64 with this change.
Differential Revision: https://reviews.llvm.org/D109750
Max Kazantsev [Tue, 21 Sep 2021 04:08:29 +0000 (11:08 +0700)]
[SCEV] Generalize implication when signedness of FoundPred doesn't matter
The implication logic for two values that are both negative or non-negative
says that it doesn't matter whether their predicate is signed and unsigned,
but only flips unsigned into signed for further inference. This patch adds
support for flipping a signed predicate into unsigned as well.
Differential Revision: https://reviews.llvm.org/D109959
Reviewed By: nikic
Yonghong Song [Sat, 31 Jul 2021 18:34:29 +0000 (11:34 -0700)]
BPF: make 32bit register spill with 64bit alignment
In llvm, for non-alu32 mode, the stack alignment is 64bit so only one
64bit spill per 64bit slot. For alu32 mode, the stack alignment
is 32bit, so it is possible to have two 32bit spills per
64bit slot.
Currently, bpf kernel verifier does not preserve register states
for 32bit spills. That is, one 32bit register may hold a constant
value or a bounded range before spill. After reload from the
stack, the information is lost and sometimes this may cause
verifier failure. For 64bit register spill, the verifier
indeed tries to preserve the register state for reloading.
The current verifier can be modestly changed to handle one
32bit spill per 64bit stack slot with state-preserving reload.
Handling two 32bit spills per 64bit stack slot will require
substantial changes.
This patch changes stack alignment for alu32 to be 64bit.
This way, for any 64bit slot in alu32 mode, only one
32bit or 64bit register values can be saved. Together
with previous-mentioned verifier enhancement, 32bit
spill can be handled with state preserving.
Note that llvm stack slot coallescing
seems only doing adjacent packing which may leave some holes
in the stack. For example,
stack slot 8 <== 8 bytes
stack slot 4 <== 8 bytes with 4 byte hole
stack slot 8 <== 8 bytes
stack slot 4 <== 4 bytes
Differential Revision: https://reviews.llvm.org/D109073
Chris Lattner [Tue, 21 Sep 2021 01:27:40 +0000 (18:27 -0700)]
[OpAsmParser] Add a parseCommaSeparatedList helper and beef up Delimeter.
Lots of custom ops have hand-rolled comma-delimited parsing loops, as does
the MLIR parser itself. Provides a standard interface for doing this that
is less error prone and less boilerplate.
While here, extend Delimiter to support <> and {} delimited sequences as
well (I have a use for <> in CIRCT specifically).
Differential Revision: https://reviews.llvm.org/D110122
Max Kazantsev [Tue, 21 Sep 2021 03:22:40 +0000 (10:22 +0700)]
[SimplifyCFG] Redirect switch cases that lead to UB into an unreachable block
When following a case of a switch instruction is guaranteed to lead to
UB, we can safely break these edges and redirect those cases into a newly
created unreachable block. As result, CFG will become simpler and we can
remove some of Phi inputs to make further analyzes easier.
Patch by Dmitry Bakunevich!
Differential Revision: https://reviews.llvm.org/D109428
Reviewed By: lebedev.ri
Michael Kruse [Tue, 21 Sep 2021 02:32:57 +0000 (21:32 -0500)]
[Polly] Don't generate inter-iteration noalias metadata.
This metadata was intended to mark all accesses within an iteration to be pairwise non-aliasing, in this case because every memory of a base pointer is touched (read or write) at most once. This is typical for 'sweeps' over all data. The stated motivation from D30606 is to ensure that unrolled iterations are considered non-aliasing.
Rhe implemention had multiple issues:
* The structure of the noalias metadata was malformed. D110026 added check in the verifier for this metadata, and the tests were failing since then.
* This is not true for the outer loops of the BLIS matrix multiplication, where it was being inserted. Each element of A, B, C is accessed multiple times, as often as the loop not used as an index is iterating.
* Scopes were added to SecondLevelOtherAliasScopeList (used for the !noalias scop list) on-the-fly when another SCEV was seen. This meant that previously visited instructions would not be updated with alias scopes that are only seen later, missing out those SCEVs they should not be aliasing with.
* Since the !noalias scope list would ideally consists of all other SCEV for this base pointer, we might run quickly into scalability issues. Especially after unrolling there would probably at least once SCEV per instruction and unroll instance.
* The inter-iteration noalias base pointer was not removed after leaving the loop marked with it, effectively marking everything after it to noalias as well.
A solution I considered was to mark each instruction as non-aliasing with its own scope. The instruction itself would obviously alias itself, but such construction might also be considered invalid. Duplicating the instruction (e.g. due to speculation) would mark the instruction non-aliasing with its clone. I don't want to go into this territory, especially since the original motivation of determining unrolled instances as noalias based on SCEV is the what scev-aa does as well.
This effectively reverts D30606 and D35761.
Max Kazantsev [Tue, 21 Sep 2021 02:29:33 +0000 (09:29 +0700)]
[NFC] Rename Context->CtxI in SCEV for uniformity reasons
Kazu Hirata [Tue, 21 Sep 2021 02:30:02 +0000 (19:30 -0700)]
[llvm] Use make_early_inc_range (NFC)
River Riddle [Tue, 21 Sep 2021 01:40:45 +0000 (01:40 +0000)]
[mlir] Refactor ElementsAttr into an AttrInterface
This revision refactors ElementsAttr into an Attribute Interface.
This enables a common interface with which to interact with
element attributes, without needing to modify the builtin
dialect. It also removes a majority (if not all?) of the need for
the current OpaqueElementsAttr, which was originally intended as
a way to opaquely represent data that was not representable by
the other builtin constructs.
The new ElementsAttr interface not only allows for users to
natively represent their data in the way that best suits them,
it also allows for efficient opaque access and iteration of the
underlying data. Attributes using the ElementsAttr interface
can directly expose support for interacting with the held
elements using any C++ data type they claim to support. For
example, DenseIntOrFpElementsAttr supports iteration using
various native C++ integer/float data types, as well as
APInt/APFloat, and more. ElementsAttr instances that refer to
DenseIntOrFpElementsAttr can use all of these data types for
iteration:
```c++
DenseIntOrFpElementsAttr intElementsAttr = ...;
ElementsAttr attr = intElementsAttr;
for (uint64_t value : attr.getValues<uint64_t>())
...;
for (APInt value : attr.getValues<APInt>())
...;
for (IntegerAttr value : attr.getValues<IntegerAttr>())
...;
```
ElementsAttr also supports failable range/iterator access,
allowing for selective code paths depending on data type
support:
```c++
ElementsAttr attr = ...;
if (auto range = attr.tryGetValues<uint64_t>()) {
for (uint64_t value : *range)
...;
}
```
Differential Revision: https://reviews.llvm.org/D109190
River Riddle [Tue, 21 Sep 2021 01:40:22 +0000 (01:40 +0000)]
[mlir] Add value_begin/value_end methods to DenseElementsAttr
Currently DenseElementsAttr only exposes the ability to get the full range of values for a given type T, but there are many situations where we just want the beginning/end iterator. This revision adds proper value_begin/value_end methods for all of the supported T types, and also cleans up a bit of the interface.
Differential Revision: https://reviews.llvm.org/D104173
River Riddle [Tue, 21 Sep 2021 01:40:04 +0000 (01:40 +0000)]
[mlir] Tighten verification of SparseElementsAttr
SparseElementsAttr currently does not perform any verfication on construction, with the only verification existing within the parser. This revision moves the parser verification to SparseElementsAttr, and also adds additional verification for when a sparse index is not valid.
Differential Revision: https://reviews.llvm.org/D109189
Stella Laurenzo [Sun, 19 Sep 2021 04:12:15 +0000 (21:12 -0700)]
[mlir][python] Forward _OperationBase _CAPIPtr to the Operation.
* ODS generated operations extend _OperationBase and without this, cannot be marshalled to CAPI functions.
* No test case updates: this kind of interop is quite hard to verify with in-tree tests.
Differential Revision: https://reviews.llvm.org/D110030
Usman Nadeem [Tue, 21 Sep 2021 01:32:24 +0000 (18:32 -0700)]
[InstCombine] Eliminate vector reverse if all inputs/outputs to an instruction are reverses
Differential Revision: https://reviews.llvm.org/D109808
Change-Id: I1a10d2bc33acbe0ea353c6cb3d077851391fe73e
Nico Weber [Tue, 21 Sep 2021 00:06:03 +0000 (20:06 -0400)]
[clang] Fix a few more comment typos to cycle bots
Nico Weber [Mon, 20 Sep 2021 23:42:27 +0000 (19:42 -0400)]
[clang] Fix a few comment more typos to cycle bots
Chia-hung Duan [Mon, 20 Sep 2021 22:59:56 +0000 (22:59 +0000)]
[mlir-tblgen] Add DagNode StaticMatcher.
Some patterns may share the common DAG structures. Generate a static
function to do the match logic to reduce the binary size.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D105797
Mehdi Amini [Mon, 20 Sep 2021 17:28:01 +0000 (17:28 +0000)]
Update MLIR generate-test-checks.py to add the notice from the source into the generated file
Folks may not read the source of the tool and miss these instructions.
Differential Revision: https://reviews.llvm.org/D110082
Amara Emerson [Fri, 17 Sep 2021 18:47:32 +0000 (11:47 -0700)]
[X86] Rename the X86WinAllocaExpander pass and related symbols to "DynAlloca". NFC.
For x86 Darwin, we have a stack checking feature which re-uses some of this
machinery around stack probing on Windows. Renaming this to be more appropriate
for a generic feature.
Differential Revision: https://reviews.llvm.org/D109993
natashaknk [Mon, 20 Sep 2021 23:07:13 +0000 (16:07 -0700)]
[mlir][tosa] Add several binary elementwise to the list of broadcastable ops.
Reviewed By: rsuderman
Differential Revision: https://reviews.llvm.org/D110096
Nico Weber [Mon, 20 Sep 2021 22:48:34 +0000 (18:48 -0400)]
[clang] Fix a few comment typos to cycle bots
natashaknk [Mon, 20 Sep 2021 22:00:24 +0000 (15:00 -0700)]
[mlir][tosa] Remove the documentation requirement for elements of several binary elementwise ops to be of the same rank.
Reviewed By: rsuderman
Differential Revision: https://reviews.llvm.org/D110095
Jacob Lambert [Mon, 20 Sep 2021 21:28:10 +0000 (14:28 -0700)]
[AMDGPU][NFC] Correct typos in lib/Target/AMDGPU/AMDGPU*.cpp files. Test commit for new contributor.
Amara Emerson [Mon, 20 Sep 2021 19:28:47 +0000 (12:28 -0700)]
[GlobalISel] Implement support for the "trap-func-name" attribute.
This attribute calls a function instead of emitting a trap instruction.
Differential Revision: https://reviews.llvm.org/D110098
Saleem Abdulrasool [Mon, 20 Sep 2021 21:19:25 +0000 (21:19 +0000)]
Sema: relax va_start checking further for Windows AArch64
When building in C mode, the VC runtime assumes that it can use pointer
aliasing through `char *` for the parameter to `__va_start`. Relax the
checks further. In theory we could keep the tests strict for non-system
header code, but this takes the less strict approach as the additional
check doesn't particularly end up being too much more helpful for
correctness. The C++ type system is a bit stricter and requires the
explicit cast which we continue to verify.
Shilei Tian [Mon, 20 Sep 2021 21:22:04 +0000 (17:22 -0400)]
[OpenMP][NVPTX] Fix a warning that data argument not used by format string
Reviewed By: jhuber6, grokos
Differential Revision: https://reviews.llvm.org/D110104
Nikita Popov [Mon, 20 Sep 2021 20:19:51 +0000 (22:19 +0200)]
[Polly] Partially fix scoped alias metadata
This partially addresses the verifier failures caused by D110026.
In particular, it does not fix the "second level" alias metadata.
Florian Mayer [Mon, 20 Sep 2021 13:01:04 +0000 (14:01 +0100)]
[NFC] [hwasan] Separate outline and inline instrumentation.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D110067
Craig Topper [Mon, 20 Sep 2021 19:18:47 +0000 (12:18 -0700)]
[RISCV] Add test cases for missed opportunities to use vand/vor/vxor.vx. NFC
These are cases were the splat is in another basic block. CGP
needs to sink it to expose the opportunity to SelectionDAG.
Paul Robinson [Mon, 20 Sep 2021 20:43:37 +0000 (16:43 -0400)]
[DebugInfo] Add test for dumping DW_AT_defaulted
Nico Weber [Mon, 20 Sep 2021 20:18:03 +0000 (16:18 -0400)]
Revert "Fix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source"
This reverts commit
6d7b3d6b3a8dbd62650b6c3dae1fe904a8ae9048.
Breaks running cmake with `-DCLANG_ENABLE_STATIC_ANALYZER=OFF`
without turning off CLANG_TIDY_ENABLE_STATIC_ANALYZER.
See comments on https://reviews.llvm.org/D109611 for details.
Nico Weber [Mon, 20 Sep 2021 19:06:00 +0000 (15:06 -0400)]
[cmake] Put check from D110016 behind (default-on) flag
See discussion on https://reviews.llvm.org/D110016 for details.
Craig Topper [Mon, 20 Sep 2021 18:48:54 +0000 (11:48 -0700)]
[RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FMA.
If either of the multiplicands is a splat, we can sink it to use
vfmacc.vf or similar.
Craig Topper [Mon, 20 Sep 2021 18:40:03 +0000 (11:40 -0700)]
[RISCV] Add test cases for missed opportunity to use vfmacc.vf. NFC
This is another case of a splat being in another basic block
preventing SelectionDAG from optimizing it.
Arthur O'Dwyer [Tue, 31 Aug 2021 17:04:29 +0000 (13:04 -0400)]
[libc++] [P0919] Some belated review on D87171.
- Simplify the structure of the new tests.
- Test const containers as well as non-const containers,
since it's easy to do so.
- Remove redundant enable-iffing of helper structs' member functions.
(They're not instantiated unless they're called, and who would call them?)
- Fix indentation and use more consistent SFINAE method in <unordered_map>.
- Add _LIBCPP_INLINE_VISIBILITY on some swap functions.
Differential Revision: https://reviews.llvm.org/D109011
Arthur O'Dwyer [Wed, 21 Apr 2021 02:24:24 +0000 (22:24 -0400)]
[libc++] [LIBCXX-DEBUG-FIXME] Constexpr char_traits::copy mustn't compare unrelated pointers.
Now that __builtin_is_constant_evaluated() is present on all supported
compilers, we can use it to skip the UB-inducing assert in cases where
the computation might be happening at constexpr time.
Differential Revision: https://reviews.llvm.org/D101674
Alex Langford [Mon, 20 Sep 2021 18:43:52 +0000 (11:43 -0700)]
[lldb][NFC] Remove outdated FIXME
Arthur Eubanks [Mon, 20 Sep 2021 17:42:07 +0000 (10:42 -0700)]
[gn build] Don't pass -Wl,-z,defs for sanitizer builds
-Wl,-z,defs doesn't work with sanitizers.
See https://clang.llvm.org/docs/AddressSanitizer.html
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D110086
Nikita Popov [Sun, 19 Sep 2021 15:32:35 +0000 (17:32 +0200)]
[IR] Add helper to convert offset to GEP indices
We implement logic to convert a byte offset into a sequence of GEP
indices for that offset in a number of places. This patch adds a
DataLayout::getGEPIndicesForOffset() method, which implements the
core logic. I've updated SROA, ConstantFolding and InstCombine to
use it, and there's a few more places where it looks relevant.
Differential Revision: https://reviews.llvm.org/D110043
MaheshRavishankar [Mon, 20 Sep 2021 18:04:15 +0000 (11:04 -0700)]
[mlir][MemRef] Compute unused dimensions of a rank-reducing subviews using strides as well.
For `memref.subview` operations, when there are more than one
unit-dimensions, the strides need to be used to figure out which of
the unit-dims are actually dropped.
Differential Revision: https://reviews.llvm.org/D109418
Peyton, Jonathan L [Mon, 13 Sep 2021 20:44:04 +0000 (15:44 -0500)]
[OpenMP][host runtime] Fix indirect lock table race condition
The indirect lock table can exhibit a race condition during initializing
and setting/unsetting locks. This occurs if the lock table is
resized by one thread (during an omp_init_lock) and accessed (during an
omp_set|unset_lock) by another thread.
The test runtime/test/lock/omp_init_lock.c test exposed this issue and
will fail if run enough times.
This patch restructures the lock table so pointer/iterator validity is
always kept. Instead of reallocating a single table to a larger size, the
lock table begins preallocated to accommodate 8K locks. Each row of the
table is allocated as needed with each row allowing 1K locks. If the 8K
limit is reached for the initial table, then another table, capable of
holding double the number of locks, is allocated and linked
as the next table. The indices stored in the user's locks take this
linked structure into account when finding the lock within the table.
Differential Revision: https://reviews.llvm.org/D109725
Geoffrey Martin-Noble [Mon, 20 Sep 2021 17:58:58 +0000 (10:58 -0700)]
Fix bad merge the removed switch case
When https://reviews.llvm.org/D109520 was landed, it reverted the addition of this switch
case added in https://reviews.llvm.org/D109293. This caused `-Wswitch` failures (and
presumably broke the functionality added in the latter patch).
Yuanfang Chen [Thu, 24 Jun 2021 06:46:42 +0000 (23:46 -0700)]
Diagnose -Wunused-value based on CFG reachability
While at it, add the diagnosis message "left operand of comma operator has no effect" (used by GCC) for comma operator.
This also makes Clang diagnose in the constant evaluation context which aligns with GCC/MSVC behavior. (https://godbolt.org/z/7zxb8Tx96)
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D103938
MaheshRavishankar [Mon, 20 Sep 2021 17:40:31 +0000 (10:40 -0700)]
[mlir][Linalg] Add ConvolutionOpInterface.
Add an interface that allows grouping together all covolution and
pooling ops within Linalg named ops. The interface currently
- the indexing map used for input/image access is valid
- the filter and output are accessed using projected permutations
- that all loops are charecterizable as one iterating over
- batch dimension,
- output image dimensions,
- filter convolved dimensions,
- output channel dimensions,
- input channel dimensions,
- depth multiplier (for depthwise convolutions)
Differential Revision: https://reviews.llvm.org/D109793
Fangrui Song [Mon, 20 Sep 2021 17:32:19 +0000 (10:32 -0700)]
Revert "[CMake] Add debuginfo-tests to LLVM_ALL_PROJECTS after D110016"
This reverts commit
4b80f0125adc876c8ef325f1c0ace4af023f2264.
debuginfo-tests has been renamed to cross-project-tests.
Fangrui Song [Mon, 20 Sep 2021 17:28:32 +0000 (10:28 -0700)]
Revert code change of D63497 & D74399 for riscv64-*-linux GCC detection
This partially reverts commits
1fc2a47f0b6c415312593e43489cf9ea2507d902 and
9816e726e747d72e0c5ac92aa20e652031a10448.
See D109727. Replacing config.guess in favor of {gcc,clang} -dumpmachine
can avoid the riscv64-{redhat,suse}-linux GCC detection.
Acked-by: Luís Marques <luismarques@lowrisc.org>
Arthur O'Dwyer [Fri, 17 Sep 2021 02:47:36 +0000 (22:47 -0400)]
Eliminate _LIBCPP_EQUAL_DELETE in favor of `=delete`.
All supported compilers have supported `=delete` as an extension
in C++03 mode for many years at this point.
Differential Revision: https://reviews.llvm.org/D109942
Craig Topper [Mon, 20 Sep 2021 17:21:42 +0000 (10:21 -0700)]
[RISCV] Teach RISCVTargetLowering::shouldSinkOperands to sink splats for FAdd/FSub/FMul/FDiv.
Craig Topper [Mon, 20 Sep 2021 17:13:20 +0000 (10:13 -0700)]
[RISCV] Add test cases showing failure to use .vf vector operations when splat is in another basic block. NFC
We should have CGP copy the splats into the same basic block as the
FP operation so that SelectionDAG can fold them.