ci: Uprev piglit to 9d87cc3d79e ("framework/replay: send backend's subprocess stderr to sys.stderr")

This pulls in a fix for replayer to make the backends send their
stderr to sys.stderr always.

v2:
  - Updated piglit results for llvmpipe, softpipe, zink and
    radeonsi-stoney.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> [v1]
Reviewed-by: Martin Peres <martin.peres@mupuf.org> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10854>

d3d12: Sets all SRV descriptors as data-static

As Mesa d3d12 is currently implemented, all resource data is static
at the time a SRV or CBV is created.  Therefore, it makes sense for all
descriptors to use the DESCRIPTORS_STATIC_KEEPING_BUFFER_BOUNDS_CHECKS
flag.  Use of this flag broadens debug validation and allows some
optimizations in the underlying driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10871>

d3d12: Fixes stale context bindings after copy, resolve, and clear

Some GL applications, including Blender, are producing rendering
artifacts due to missing resource state barriers.

The d3d12_context keeps track of all resources bound as shader resource
or constant buffers.  If any of these resources are used for Copy,
Resolve, or Clear source/target, the context tracking must be updated
so the correct state can be restored before the next draw call.

This change is something of a big hammer.  Essentially, if a resource
currently bound as an SRV or CBV gets used for a non-shader access, a
flag is set in the context that invalidates all bindings of the same
type on the same shader stage.  Thus the next Draw execution refreshes
the shader views and state transitions state before invoking Draw on the
command list.

A more elegant (and complex) fix would limit the invalidation to
resource state only, rather than also forcing a recreation of resource
views.  It is unclear right now whether it is worth the time to
implement a more elegant fix.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10871>

ci/freedreno: Mark two more recent intermittent a530 flakes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10886>

iris: Prefer more GPU-based uploads for compression

Where possible, start compressing depth and stencil resources on upload.
This makes a couple of benchmarks (CS:GO, GFXBench5's gl_alu2_off) start
sampling HiZ buffers in a compressed state instead of the pass-through
state.

Improves the FPS of GFXBench5's gl_alu2_off by 3.14% ±0.52% on TGL.
Testing was done with the performance CI.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2617
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10872>

isl: Add isl_aux_usage_has_compression

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10872>

docs/release-calendar: add the schedule for the 21.1 branch

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10890>

docs: update calendar and link releases notes for 21.1.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10890>

docs: update calendar and link releases notes for 21.1.0

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10890>

docs: add release notes for 21.1.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10890>

docs: add release notes for 21.1.0

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10890>

ir3/cf: Rewrite pass

The old pass had a few bugs:
- It tried to avoid folding f2f32 into f2f16, but didn't consider
  conversions that were already folded in.
- It didn't prevent folding an f2f16 or f2f32 into a non-floating-point
  op.

In addition it wasn't written in a manner which made handling integer
conversions practical. This rewrites the pass to instead calculate the
"type" of the conversion source and then check whether folding the
conversion is allowed. This allows us to cleanly separate the
declarative part where we describe how the HW works from the policy part
where we decide whether the transform is allowed, and makes it simple to
add support for folding integer conversions.

Closes: #3208
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10859>

radeonsi: enable glsl_correct_derivatives_after_discard by default

Enabling this option by default allows the nir_opt_move_discards_to_top
to be used more often.

This is only done for LLVM13+ since doing this on LLVM11 hurts a lot of
shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10522>

radeonsi/nir: enable nir_opt_move_discards_to_top pass

Since it affects discards and demotes, this commit also moves the
usage of nir_lower_discard_or_demote ealier.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10522>

nir: Add a discard optimization pass

Many fragment shaders do a discard using relatively little information
but still put the discard fairly far down in the shader for no good
reason.  If the discard is moved higher up, we can possibly avoid doing
some or almost all of the work in the shader.  When this lets us skip
texturing operations, it's an especially high win.

One of the biggest offenders here is DXVK.  The D3D APIs have different
rules for discards than OpenGL and Vulkan.  One effective way (which is
what DXVK uses) to implement DX behavior on top of GL or Vulkan is to
wait until the very end of the shader to discard.  This ends up in the
pessimal case where we always do all of the work before discarding.
This pass helps some DXVK shaders significantly.

v2 (Jason Ekstrand):
 - Fix a couple of typos (Grazvydas, Ian)
 - Use the new nir_instr_move helper
 - Find all movable discards before moving anything so we don't
   accidentally re-order anything and break dependencies

v3 (Pierre-Eric): remove the call to nir_opt_conditional_discard based
on Daniel Schürmann comment.

v4 (Pierre-Eric):
 - handle demote intrinsics and drop derivatives_safe_after_discard
 - add early return if discards/demotes aren't used

v5 (Pierre-Eric):
 - use pass_flags instead of instr set (Daniel Schürmann)

v6 (Daniel Schürmann):
 - cleanup and fix pass_flags handling

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10522>

nir/gather_info: Expose a nir_intrinsic_writes_external_memory helper

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10522>

nir: Add a nir_instr_move helper

Removes an instruction from one place and inserts it at another while
working around a weird cursor corner-case.

v2: change return value to bool (Daniel Schürmann)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> (v1)
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10522>

gallium/dri: copy image use in dup_image

Don't lose the use flags when dup'ing an image.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8106>

loader/dri: hook up createImageWithModifiers2

Call into the new modifiers with usage createImage variant when available
to provide the DRI implementation with more context about the allocation.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8106>

i965: implement createImageWithModifiers2

This implements __DRIimageExtension version 19.

Signed-off-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8106>

gallium/dri: implement createImageWithModifiers2

This implements __DRIimageExtension version 19.

Signed-off-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8106>

dri: add createImageWithModifiers2 interface

With the addition of createImageWithModifiers usage flags were
dropped, as it was believed at the time that modifers will be a
full replacement for the usage flags. This has turned out to be
untrue, as modifiers are not able to describe buffer placement.

Add a new version of the interface, that allows to specifiy
use flags in addition to the modifier.

Signed-off-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8106>

loader/dri3: convert to loader_dri_create_image

Get rid of the code duplication and makes it easier to hook in a
new createImageWithModifiers2, but obscures the code flow a bit.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8106>

dri: add loader_dri_create_image helper

The DRI image extension already has two different ways to allocate an
image (with and without a modifier) and will soon grow a third one.
Add a helper, which handles calling the appropriate implementation to
get rid of code duplication in the winsys.

This convert the two obvious call sites (GBM dri and EGL wayland)
that profit from the code dedup.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8106>

lima: add reload command to the command dump

This was not being included in the command stream and may be
useful to debug further issues.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10791>

lima: enable z16 format

Other than listing the format as supported, an extra detail is to unset
one bit in the render state depth_test when a z16 texture needs to be
reloaded before rendering, following the mali blob behavior.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10791>

intel/vec4: Add support for UBO pushing

Shader-db results on Haswell (vec4 only):

    total instructions in shared programs: 2853928 -> 2726576 (-4.46%)
    instructions in affected programs: 855840 -> 728488 (-14.88%)
    helped: 9500
    HURT: 18
    helped stats (abs) min: 1 max: 359 x̄: 13.54 x̃: 11
    helped stats (rel) min: 0.44% max: 53.33% x̄: 19.13% x̃: 17.44%
    HURT stats (abs)   min: 4 max: 124 x̄: 71.00 x̃: 92
    HURT stats (rel)   min: 3.64% max: 77.86% x̄: 46.43% x̃: 52.12%
    95% mean confidence interval for instructions value: -13.78 -12.98
    95% mean confidence interval for instructions %-change: -19.21% -18.81%
    Instructions are helped.

    total cycles in shared programs: 101822616 -> 60245580 (-40.83%)
    cycles in affected programs: 93312382 -> 51735346 (-44.56%)
    helped: 13292
    HURT: 4506
    helped stats (abs) min: 2 max: 1229260 x̄: 3370.82 x̃: 776
    helped stats (rel) min: 0.04% max: 96.70% x̄: 47.56% x̃: 43.76%
    HURT stats (abs)   min: 2 max: 17644 x̄: 716.37 x̃: 82
    HURT stats (rel)   min: 0.02% max: 491.80% x̄: 41.00% x̃: 11.11%
    95% mean confidence interval for cycles value: -3037.07 -1635.03
    95% mean confidence interval for cycles %-change: -26.03% -24.25%
    Cycles are helped.

    total spills in shared programs: 1080 -> 1314 (21.67%)
    spills in affected programs: 74 -> 308 (316.22%)
    helped: 0
    HURT: 47

    total fills in shared programs: 310 -> 497 (60.32%)
    fills in affected programs: 71 -> 258 (263.38%)
    helped: 0
    HURT: 47

    total sends in shared programs: 239884 -> 151799 (-36.72%)
    sends in affected programs: 129302 -> 41217 (-68.12%)
    helped: 9547
    HURT: 0
    helped stats (abs) min: 1 max: 226 x̄: 9.23 x̃: 8
    helped stats (rel) min: 3.12% max: 98.15% x̄: 72.38% x̃: 80.00%
    95% mean confidence interval for sends value: -9.48 -8.98
    95% mean confidence interval for sends %-change: -72.80% -71.97%
    Sends are helped.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>

intel/vec4: Add support for masking pushed data

This is the vec4 equivalent of d0d039a4d3f4, required for proper UBO
pushing in vertex stages for Vulkan on HSW.  Sadly, the implementation
requires us to do everything in ALIGN1 mode and the vec4 instruction
scheduler doesn't understand HW_GRF <-> UNIFORM interference so it's
easier to do the whole thing in the generator.  We add an instruction
to the top of the program which just means "emit the blob" and all the
magic happens in codegen.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>

intel/vec4: Set up push ranges before we emit any code

In order to avoid switching pull constants to push constants and then
having to back to pull, compute the push ranges up-front.  This way we
know by the time we emit code exactly what ranges are pushable.  This is
a bit inefficient in the case where the "normal" push constants get
compacted.  However, most apps don't use giant piles of dead uniforms
combined with substantial UBO use so this should be ok.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>

intel/vec4: Update nr_params in pack_uniform_registers

This is where we re-arrange and re-pack the params.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>

intel/vec4: Add some asserts to move_push_to_pull

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>

intel/vec4: Don't spill fp64 registers more than once

The way we handle spilling for fp64 in vec4 is to emit a series of MOVs
which swizzles the data around and then a pair of 32-bit spills.  This
works great except that the next time we go to pick a spill reg, the
compiler isn't smart enough to figure out that the register has already
been spilled.  Normally we do this by looking at the sources of spill
instructions (or destinations of fills) but, because it's separated from
the actual value by a MOV, we can't see it.  This commit adds a new
opcode VEC4_OPCODE_MOV_FOR_SCRATCH which is identical to MOV in
semantics except that it lets RA know not to spill again.

Fixes: 82c69426a5a3 "i965/vec4: support basic spilling of 64-bit registers"
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>

anv: Push at most 32 regs for vec4 shaders

The vec4 back-end can't push UBOs just yet but it soon will be able.
When it starts pushing UBOs, it will have a lower limit than scalar due
to a crummy register allocator.  Mirror that limit in ANV so we don't
run into asserts due to ANV and the back-end making different choices.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>

anv: Support pushing shader constants

Usually, nir_opt_constant_folding will get rid of any load_constant
intrinsics which might possibly be pushed but there are rare cases where
we can still end up with them.  Better to handle them.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>

anv: Plumb the shader into push constant helpers

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10571>

aco: disallow SGPRs on DPP instructions

They can't be encoded.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10841>

d3d10umd: Avoid duplication in CreateDevice.

As suggested by Jesse Natalie.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10687>

d3d10sw: Add a sanity test.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10687>

d3d10umd,d3d10sw: Initial import.

This change adds a gallium D3D10 state tracker that works as a WDDM UMD
software driver, similar to Microsoft WARP, but using llvmpipe/softpipe.

The final deliverable is a d3d10sw.dll, which is similar to WARP's
d3d10warp.dll.

This has been used to run Microsoft Windows HCK wgf11* tests with
llvmpipe, and they were at one point passing 100%.

Known limitations:
- TGSI (no NIR)
- D3D10 only (no D3D11 support yet)
- no WINE integration (WINE doesn't implement WDDM DDI.)

For further details see:
- src/gallium/frontends/d3d10umd/README.md
- src/gallium/targets/d3d10sw/README.md

v2: Drop the DXBC-based disassembly.  Add missing break statements.
v3: Incorporate Jesse's feedback.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10687>

draw: Plug leak when combining tessellation with primitive assembly.

Another lavapipe leak found with LeakSanitizer.

This happens when using tessellation without geometry shader but with a
fragment shader that consumes primitive ID, therefore requiring
primitive assembler stage.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10835>

anv: fixup physical device properties of fragment shading rate

We've only enabled the extension on Gfx11+ so no need to care about
prior values.

Also fixup values of (min|max)FragmentShadingRateAttachmentTexelSize.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 231651fd89fb00 ("anv: implement VK_KHR_fragment_shading_rate")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10607>

radv: enable DCC stores on RDNA2

It seems this gives 2-3% improvements most of the time. This also
enables DCC for concurrent images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10454>

panfrost/ci: Test Panfrost on the Mali G72 GPU

Make use of some Chromebooks recently added to the Collabora LAVA lab to
test Panfrost on the G72 (Bifrost) GPU.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10785>

ci: Update kernel to v5.13-rc2

This version adds support for some Chromebooks with the MT8183 SoC that
we want to use to test Panfrost.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10785>

draw: Allocate extra padding for extra shader outputs.

This prevents read buffer overflows in dup_vertex(), when draw stages
allocate extra shader outputs after the vertex buffers are allocated.

The original issue can be exercised with upcoming
piglit/tests/general/vertex-fallbacks.c test.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: 21.0 21.1 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10836>

util/primconvert: add C++ guards to header

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10868>

panfrost: Express viewport in terms of the batch

Easier to say the state dependencies.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Simplify panfrost_bind_sampler_states

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Mark job_index > 10000 as unlikely

By definition this is happening <= 0.02% of the time.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Remove silly assertion

We don't assert the rest of the Gallium contract here either.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Pass batch to panfrost_get_index_buffer_bounded

Calling batch_for_fbo outside of Gallium entrypoints is an antipattern.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Deduplicate some code from indirect/direct draws

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Move batch_set_requirements to the CSO

Much of the per-draw work can be precomputed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Pack draw-time RSD all-at-once

Manually inline the functions, delete the duplicates, and use GenXML the
way it's meant to be used. Template structs should **never** cross
function boundaries.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Hoist part of shader_reads_tilebuffer

The other part is |'d together. Do the happy path at compile time, and
reserve the draw time fixup for a v5 silicon issue.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Pull erratum workaround into own function

This _does_ need to be draw-time, but it doesn't need to be in the
monster routine.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Distribute masks for FPK selection

We can calculate these at much lower frequencies and just & together at
draw time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Partially determine FPK state

This might be disabled at draw-time, but we can merge part of the state
check to compile-time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Hoist allow_forward_pixel_to_be_killed

Only a function of the shader code.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Streamline the !fs_required case

Takes some complexity out of the per-draw path.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Move early-z decision earlier

These were already grouped nicely, just never got used. I also added
coverage writes to the list of reasons not to use early-z for
completeness. At the moment this doesn't do anything since this is a
Midgard flag and we haven't hooked up coverage writes on Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Fill out the rasterizer CSO

The RSD state is all over the place but let's try to collect what we
can.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Correct the type of sample_mask

Let's not encode impossible masks.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Preset evaluate_per_sample

Even though this isn't totally known at compile-time, at least one case
is, so let's handle that one ahead-of-time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Move depth/stencil/alpha to CSO create

Now that we can merge RSD state, there's no reason to pack this at
draw-time. This is fun!

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Prepack partial RSD at compile time

Even for fragment shaders! Just need to merge the partial descriptors.

Fixes: c21c6d134bc ("panfrost: Use the pan_shader_prepare_rsd() helper")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Add draw-time merge helper

The famous GenXML "OR" trick. Will be *essential* to packing RSDs.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Precompute bifrost_blend_type_from_nir

Needed in the draw call hot path. Do it at compile time.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Split Bifrost BLEND emit by word

This allows the GenXML packs to be effectively inlined and folded,
skipping over the Midgard pieces.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Remove unused dither flag

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Streamline fixed-function get_blend path

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Pass batch to panfrost_get_blend

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Simplify blend_final

Now that we've moved everything but the blend shader up to the CSO, we
can just return a blend shader pointer (or zero to indicate the absence
thereof), and remove a source of name conflicts.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Distribute out constant colour code

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Pack blend equations at CSO create time

These are large. Get them out of the per-draw path.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Garbage collect Gallium blend includes

Got moved to common blend handling.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Translate fixed-function blend at CSO create

Fixes: 93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Move blend properties to CSO create

Fixes: 93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Fix pan_blend_to_fixed_function_equation prototype

Doesn't need the whole state, just the equation itself.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Fixes: 93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Fix blend fixed-function prototype

Needs to be broken up into different functions for disjoint state.
Simpler prototypes and allows matching to CSOs.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Fix blend constant fetch prototype

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Fixes: 93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Fix is_opaque prototype

Fixes: 93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Fix the reads_dest prototype

Takes too much state, only pass what we need.

Fixes: 93824b6451a ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

panfrost: Fix blending for unbacked MRT

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>

aco: Implement bvh64_intersect_ray_amd intrinsic.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10818>

nir: Add bvh64_intersect_ray_amd intrinsic.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10818>

r600: Enable NIR debug flags also for Cayman

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: legalize image access on Cayman

This,  seems to avoid hardware resets with the
  ARB_shader_image_load_store-invalid
piglit.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Add lowering pass to legalize image access

Make sure only existing images are accessed and that the accessed
coordinates are within the image.
The generated code is quite exponsive, because it encapsulates each
access to an image with two if statements, one to check whether the
image index actually exists (this will get optimized away if the
image selection is direct), and one if statement to check whether
the coordinates are in range. For that reason it will only be enabled
for Cayman were invalid access seems to raise more issues.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Fix cube query layer number for indirect access

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: read number of images from shader info

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Fix Geometry shader for Cayman

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Fix Cayman SSBO write with more than one value

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Fix ssbo/image atomic swap for Cayman

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Fix texture gather for Cayman

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Use unified code path for index register load

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Use unified index register code for samplers

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Fix Cayman trans ops

v2: return from emit_sin_r600 on > Cayman (Kenn Glennard)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: count only distinct literals per instruction group

This is to avoid useless instruction group splits.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>

r600/sfn: Don't check the faction when searching for the input slot

All loads from the same driver location are merged into one variable,
so there is no need to check the frachtion.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>