Wolfgang Denk [Sat, 24 Jul 2010 18:34:29 +0000 (20:34 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Sat, 24 Jul 2010 18:34:13 +0000 (20:34 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Stefan Roese [Thu, 22 Jul 2010 17:06:27 +0000 (19:06 +0200)]
ppc4xx: Enable "ecctest" command on t3corp
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 22 Jul 2010 17:06:14 +0000 (19:06 +0200)]
ppc4xx: Enable "ecctest" command on katmai
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 21 Jul 2010 17:06:26 +0000 (19:06 +0200)]
ppc4xx: Add ECC status info to machine-check exception for IBM DDR2 core
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 21 Jul 2010 17:06:10 +0000 (19:06 +0200)]
ppc4xx: Add "ecctest" command to test/simulate ECC errors
This patch adds the "ecctest" command to test and simulate ECC errors
(single bit and/or double bit) while running from SDRAM. Currently only
the IBM DDR2 controller is supported (405EX, 440SP(e), 460EX/GT).
This is done by copying and calling functions, modifying the SDRAM
controller operation mode, in internal SRAM/OCM.
For correctable ECC errors (single bit) only the status will be printed
since the DDR2 controller doesn't provide the faulting address:
=> ecctest 1000000 1
Using address
01000000 for 1 bit ECC error injection
ECC: Correctable error
Uncorrectable ECC errors (double bit) will also display the faulting
address:
=> ecctest 1000000 2
Using address
01000000 for 2 bit ECC error injection
ECC: Uncorrectable error at 0x0001000000
To enable this "ecctest" function you need to define CONFIG_CMD_ECCTEST
in the board config header.
Tested on katmai and t3corp.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 21 Jul 2010 09:08:27 +0000 (11:08 +0200)]
ppc4xx: DDR/ECC: Use correct macros to clear error status
Use the correct macro instead of the hardcoded 0x4c to clear the ECC
status in the 440/460 DDR(2) error status register after ECC
initialization.
Also the non-440 parts (405EX(r) right now) and the IBM DDR PPC variants
(440GX) use a different registers to clear this error status. Use the
correct ones.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 21 Jul 2010 09:08:16 +0000 (11:08 +0200)]
ppc4xx: Only define DDR2 registers for the correct PowerPC variants
Make sure that some SDRAM/DDR2 registers are only defined for the PPC
variants really implementing those registers.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 20 Jul 2010 05:06:03 +0000 (07:06 +0200)]
ppc4xx: Add CONFIG_DDR_RFDC_FIXED to allow board specific RFDC values
Using this define, a board can define an opimized RFDC value and use
the auto calibration code to "tune" the remaining DDR2 controller
calibration register.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 19 Jul 2010 12:24:22 +0000 (14:24 +0200)]
ppc4xx: T3CORP fixes and updates
This patch fixes some problems for the T3CORP board. Here the list
of the changes:
- Add 600-67 and 677 CPU frequency setting to chip_config
command
- Define CONFIG_DDR_RFDC_FIXED on t3corp:
While using the "normal" auto calibration code, sometimes values for
RFDC were picked (>= T3) that resulted in a non-working U-Boot (hang
upon relocation, while running from SDRAM). With this optimized RFDC
value we can force this register and use the auto-calibration code to
setup the remaining calibration registers.
- Increase sizes of FPGA chips selects
- EBC timing updated OEN=3 for 66 MHz EBC speed
- Change ext. IRQ2 setup to level-low active
- Enable CONFIG_SYS_CFI_FLASH_STATUS_POLL
By defining CONFIG_SYS_CFI_FLASH_STATUS_POLL, DQ7 is polled to detect the
chip busy status. This is now used instead of the data toggle method which
is used historically by default in the common CFI driver. With this change
a problem with not written data is solved on this board, where a 32 byte
block of data is still erased instead of filled with the correct content
after these commands:
=> erase 0xfc100000 +0x1000000
....................................................................
done
Erased 128 sectors
=> cp.b 0x100000 0xfc100000 0x1000000
Copy to Flash... done
=> cmp.b 0x100000 0xfc100000 0x1000000
byte at 0x00d0d6c0 (0x00) != byte at 0xfcd0d6c0 (0xff)
Total of
12637888 bytes were the same
Signed-off-by: Stefan Roese <sr@denx.de>
Rupjyoti Sarmah [Wed, 7 Jul 2010 12:44:48 +0000 (18:14 +0530)]
ppc4xx/Canyonlands added USB board callbacks
Functions added to support board callbacks for USB init. This
isolates USB manipulations such that it is only touched if USB is
used by U-Boot.
Signed-off-by: Dave Mitchell <dmitchell@appliedmicro.com>
Signed-off-by: Rupjyoti Sarmah <rsarmah@appliedmicro.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang Denk [Wed, 21 Jul 2010 20:23:26 +0000 (22:23 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/master/
Kumar Gala [Sun, 11 Jul 2010 17:41:46 +0000 (12:41 -0500)]
powerpc/85xx: Rework P1022 SERDES is_serdes_configured support
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Sat, 22 May 2010 18:21:39 +0000 (13:21 -0500)]
powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured support
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 27 Jan 2010 16:26:46 +0000 (10:26 -0600)]
powerpc/p3041: Add various p3041 related defines
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p3041 to cpu_type_list and SVR list
* Added number of LAWs for p3041
* Set CONFIG_MAX_CPUS to 4 for p3041
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 21 Oct 2009 18:32:58 +0000 (13:32 -0500)]
powerpc/p5020: Add various p5020 related defines (and p5010)
There are various locations that we have chip specific info:
* Makefile for which ddr code to build
* Added p5020 & p5010 to cpu_type_list and SVR list
* Added number of LAWs for p5020
* Set CONFIG_MAX_CPUS to 2 for p5020
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Emil Medve [Thu, 17 Jun 2010 05:08:29 +0000 (00:08 -0500)]
powerpc/mpc85xx: Report FMAN # to match user manual
The user manual refers to FMAN1 and FMAN2 not 0 and 1.
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Sat, 10 Jul 2010 11:55:41 +0000 (06:55 -0500)]
powerpc/p4080: Add setting of clock-frequency for clockgen node
On QorIQ CoreNet based devices we have a global clocking block. We want
to keep track of SYSCLK frequency as it is what is used to derive all
other frequencies in the SoC
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Sat, 10 Jul 2010 11:38:16 +0000 (06:38 -0500)]
powerpc/85xx: Use fdt_node_offset_by_compat_reg for clock-frequency updates
Move to using fdt_node_offset_by_compat_reg to find the node offsets we
want to update instead of using aliases.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 9 Jul 2010 03:37:44 +0000 (22:37 -0500)]
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases
Previously we used an alias the pci node to determine which node to
fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.
Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Sun, 4 Jul 2010 17:48:21 +0000 (12:48 -0500)]
fdt: Add fdt_node_offset_by_compat_reg helper
Given a compatible string and physical address try and find a node that
matches. This is useful when we want to find a specific device node to
update (for example if we have multiple PCI nodes we can use the
physical address to distinguish them when trying to update the device
tree).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Kumar Gala [Wed, 16 Jun 2010 19:27:38 +0000 (14:27 -0500)]
fdt: Add fdt_translate_address to convert reg node to cpu phys addr
This code is extracted out of the Linux Kernel code from
arch/powerpc/kernel/prom_parse.c.
We maintain some of the same structure to support multiple bus types even
though we only have one in the current code. In the future we might want
to translate across a PCI bus and thus it will be easier to add that
functionality back in.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Kumar Gala [Fri, 9 Jul 2010 05:02:34 +0000 (00:02 -0500)]
powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641
The MPC8641 boards actually only have PCIE not PCI. Rename so we are
uniform with regards to names so we can replace this code with templated
code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 9 Jul 2010 03:35:59 +0000 (22:35 -0500)]
powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.h
Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h. Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on
MPC8641 boards since its really PCIE controllers and not PCI.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 9 Jul 2010 03:23:54 +0000 (22:23 -0500)]
powerpc/85xx: Move PCI/PCIe address defines into common immap_85xx.h
Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Sat, 17 Jul 2010 18:49:59 +0000 (20:49 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Wolfgang Denk [Sat, 17 Jul 2010 18:49:59 +0000 (20:49 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Wolfgang Denk [Mon, 5 Jul 2010 20:46:33 +0000 (22:46 +0200)]
Drop support for GTH board
The board maintainer states:
The GTH board is obsolete and has not been manufactured for
several years.
To my knowledge, no recent U-Boot build has been tested on that
card.
So drop support for this board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Thomas Lange <thomas@corelatus.se>
Acked-by: Thomas Lange<thomas@corelatus.se>
Anatolij Gustschin [Sat, 19 Jun 2010 18:41:56 +0000 (20:41 +0200)]
video: cleanup comments in cfb_console.c and video_fb.h
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Wolfgang Denk [Fri, 16 Jul 2010 21:15:01 +0000 (23:15 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Kumar Gala [Fri, 9 Jul 2010 03:27:30 +0000 (22:27 -0500)]
powerpc/85xx: Move p1022ds slot code into board file
The code to map SERDES configs to slot names is board specific and not
chip specific. Thus it should live in board/freescale/p1022ds/ and not
in arch/powerpc/cpu/.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 21 May 2010 09:14:49 +0000 (04:14 -0500)]
ppc/85xx: Convert MPC8536DS to using board common ICS307 code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 21 May 2010 09:05:14 +0000 (04:05 -0500)]
ppc/85xx: Convert MPC8572DS to using board common ICS307 code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 10 Jun 2010 03:59:41 +0000 (22:59 -0500)]
powerpc/85xx: Add command to report errata workarounds
Add 'errata' command to report what errata we workaround. Report
workaround for erratum SATA-A001 on P1022/P1013.
Also sorted the CONFIG_CMD_* list.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Mon, 14 Jun 2010 20:28:24 +0000 (15:28 -0500)]
powerpc: add support for the Freescale P1022DS reference board
Specifics:
1) 36-bit only
2) Booting from NOR flash only
3) Environment stored in NOR flash only
4) No SPI support
5) No DIU support
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Thu, 1 Jul 2010 08:54:36 +0000 (14:24 +0530)]
85xx/p1_p2_rdb: PCIe E1000 card support added.
Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter
configuration support for P1/P2 RDB.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Timur Tabi [Fri, 28 May 2010 20:05:30 +0000 (15:05 -0500)]
fsl: add LAW target to fsl_pci_info structure
Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that
we can capture the LAW target for a given PCI or PCIE controller. Also update
the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the
LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure.
This will allow future PCI[E] code to configure the LAW target automatically,
rather than requiring each board to it for each PCI controller separately.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 30 Mar 2010 02:03:11 +0000 (21:03 -0500)]
powerpc/85xx: Add support for link stack & STAC on e5500
The e5500 has a link register stack and segment target address cache.
Its safe to enable these bits on older e500 cores as the bits are
implemented in the register.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 21 Oct 2009 18:23:54 +0000 (13:23 -0500)]
powerpc/85xx: Add recognition of e5500 core
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Thu, 17 Jun 2010 16:37:26 +0000 (11:37 -0500)]
powerpc 83xx/85xx: Merge lbc upmconfig code
Each platform had its own version of the upmconfig, despite the
init process being identical. Now that we have a spot for common
lbc code, create a common upmconfig() there.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Thu, 17 Jun 2010 16:37:25 +0000 (11:37 -0500)]
mpc85xx: Add reginfo command
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs.
Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Thu, 17 Jun 2010 16:37:24 +0000 (11:37 -0500)]
fsl_law.c: Add print_laws() for FSL_CORENET platforms.
Add printing of LAWBARH/LAWBARL for FSL_CORENET platforms.
Signed-off-by: Becky Bruce <Beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Thu, 17 Jun 2010 16:37:23 +0000 (11:37 -0500)]
drivers/misc/fsl_law.c: Rearrange code to avoid duplication
The current code redefines functions based on FSL_CORENET_ vs not -
create macros/inlines instead that hide the differences.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Thu, 17 Jun 2010 16:37:22 +0000 (11:37 -0500)]
mpc85xx: Add print_tlbcam() function
This dumps out the contents of TLB1 on 85xx-based systems.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Thu, 17 Jun 2010 16:37:21 +0000 (11:37 -0500)]
mpc85xx: tlb.c cleanups
Extract the operation to read a tlb into a function - we will need
this later to print out the tlbs, and there's no point in duplicating
the code. Create a TSIZE_TO_BYTES macro to deal with the conversion
from the MAS field to an actual size instead of duplicating this in code.
There are a few misc other minor cleanups.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Thu, 17 Jun 2010 16:37:20 +0000 (11:37 -0500)]
83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.
To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.
In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.
I have done a successful ppc build all and tested a board or two from
each processor family.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Thu, 17 Jun 2010 16:37:18 +0000 (11:37 -0500)]
powerpc: Update configs to properly set FSL_ELBC
Some parts that have an Enhanced Local Bus Controller weren't
setting CONFIG_FSL_ELBC. Fix this so we can use this define
properly going forward (currently it's only used if PHYS_64BIT is
set, which meant not all platforms needed to have it set correctly).
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Poonam Aggrwal [Wed, 23 Jun 2010 14:08:06 +0000 (19:38 +0530)]
85xx/p1_p2_rdb: enable hwconfig
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Fri, 21 May 2010 08:02:16 +0000 (03:02 -0500)]
Move ICS CLK chip frequency calculation code into a common board library
We have several boards that use the same ICS307 CLK chip to drive the
System clock and DDR clock. Move the code into a common location so we
share it.
Convert the P2020DS board as the first to use the new common ICS307
code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Timur Tabi <timur@freescale.com>
Kumar Gala [Sat, 22 May 2010 22:25:47 +0000 (17:25 -0500)]
ppc/85xx: Add a structure defn for PIXIS registers
The various boards that have PIXIS FPGAs have slightly different
register definitions, however there is some common functionality (like
reset, ICS307 clk control, etc) that can be shared.
The struct definition exists for MPC8536DS, MPC8544DS, MPC8572DS,
MPC8610HPCD, and MPC8641HPCN boards.
Also fixed ngpixis to be __packed__ instead of aligned.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Thu, 10 Jun 2010 03:33:53 +0000 (22:33 -0500)]
powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtb
If we explicitly disabled a core remove it from the dtb we pass on to
the kernel.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Wed, 9 Jun 2010 18:14:28 +0000 (13:14 -0500)]
mpc8xxx: Remove cpu-handles for cpus we delete
We may have cpu-handles pointing to the cpu nodes we delete. If so we
should delete the handles as well.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kim Phillips [Tue, 1 Jun 2010 17:24:34 +0000 (12:24 -0500)]
powerpc/8xxx: Add base support for the SEC4
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kim Phillips [Tue, 1 Jun 2010 17:24:27 +0000 (12:24 -0500)]
powerpc/8xxx: Distinguish between incompatible SEC h/w types
CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x.
Parts with newer SEC h/w versions will increment the number to
accomodate incompatible code changes.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kim Phillips [Fri, 28 May 2010 08:00:14 +0000 (08:00 +0000)]
fdt: move fsl specific code from common fdt area to mpc8xxx/fdt.c
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Thu, 15 Jul 2010 20:49:12 +0000 (22:49 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-pxa
Wolfgang Denk [Thu, 15 Jul 2010 20:48:46 +0000 (22:48 +0200)]
Merge branch 'master' of ../master
Marek Vasut [Sun, 4 Apr 2010 23:50:57 +0000 (01:50 +0200)]
PXA: ZipitZ2 support
This patch adds support for Aeronix Zipit Z2 handheld.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Tue, 11 May 2010 02:31:44 +0000 (04:31 +0200)]
PXA: Toradex Colibri PXA270 support
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Sun, 7 Mar 2010 22:35:48 +0000 (23:35 +0100)]
PXA: Voipac PXA270 Support
This patch adds support for the Voipac PXA270 board. The support includes:
- Ethernet
- USB
- MMC
- NOR Booting
- OneNAND Booting
- LCD
- HDD
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Marek Vasut [Sat, 3 Jul 2010 07:38:03 +0000 (09:38 +0200)]
PXA: Add support for LMS285GF05 into pxafb
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Sun, 7 Mar 2010 22:35:48 +0000 (23:35 +0100)]
Voipac PXA270 LCD Support
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Tue, 6 Jul 2010 00:48:35 +0000 (02:48 +0200)]
PXA: Add OneNAND booting support to start.S
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Sat, 3 Jul 2010 07:38:51 +0000 (09:38 +0200)]
PXA: Add PWM2 and PWM3 regs to pxa-regs.h
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Fri, 16 Apr 2010 22:36:48 +0000 (00:36 +0200)]
PXA: Add hardware init helper macros
This patch adds macros for the following purposes:
- GPIO configuration
- SDRAM configuration
- Wakeup
- Clock configuration
- Interrupt controller configuration
These macros are intended to replace numerous copies of the same code.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Marek Vasut [Sat, 28 Nov 2009 12:57:43 +0000 (13:57 +0100)]
Enable PXAFB for PXA27X and PXA3XX
Wolfgang Denk [Wed, 14 Jul 2010 20:07:41 +0000 (22:07 +0200)]
Merge branch 'next' of git://git.denx.de/u-boot-nios
Wolfgang Denk [Wed, 14 Jul 2010 20:05:31 +0000 (22:05 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Wolfgang Denk [Wed, 14 Jul 2010 20:04:30 +0000 (22:04 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Wolfgang Denk [Wed, 14 Jul 2010 19:54:45 +0000 (21:54 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin
Mike Frysinger [Mon, 5 Jul 2010 09:15:59 +0000 (05:15 -0400)]
Blackfin: bf561-acvilon: drop unused env redund define
The SPI env code didn't support redundant environments until recently, but
this code was written before that. Since it has never been tested (and
currently causes a build failure), simply punt it. If the functionality
is actually desired, it can be re-added once it has been tested.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 5 Jul 2010 09:00:18 +0000 (05:00 -0400)]
Blackfin: drop old u-boot.lds clean target
The u-boot.lds CPP unification missed the Blackfin-specific clean target.
It is no longer needed, so punt it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Michael Hennerich [Mon, 31 May 2010 14:11:53 +0000 (14:11 +0000)]
Blackfin: bf527-ad7160-eval: new board support
Support the new AD7160 eval board.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 13 Jun 2010 16:47:52 +0000 (12:47 -0400)]
Blackfin: enable IP defrag for ADI boards
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 10 Jun 2010 01:50:48 +0000 (21:50 -0400)]
Blackfin: bfin_mac: remove space from name
Some commands (like 'mii') use this name to select devices, but they break
when those names contain spaces. So drop the space from the Blackfin EMAC
driver.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Tue, 8 Jun 2010 20:18:00 +0000 (16:18 -0400)]
Blackfin: unify default I2C settings for ADI boards
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
Mike Frysinger [Fri, 4 Jun 2010 20:15:38 +0000 (16:15 -0400)]
Blackfin: bf561: use DMA for Core B L1 regions
The L1 regions of Core B are not directly accessible from Core A, so we
need to use DMA to get at them.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 23:30:15 +0000 (19:30 -0400)]
Blackfin: cm-bf548: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 23:30:01 +0000 (19:30 -0400)]
Blackfin: bf527-ezkit: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 23:29:47 +0000 (19:29 -0400)]
Blackfin: bf548-ezkit: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 23:29:23 +0000 (19:29 -0400)]
Blackfin: bf518f-ezbrd: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Fri, 29 May 2009 22:00:16 +0000 (18:00 -0400)]
Blackfin: bf518f-ezbrd: handle different PHYs dynamically
The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer
ones only have a National PHY (which lack a RX Error interrupt line). So
in the board eth init code, dynamically detect what is hooked up to the MAC
and handle each accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 10:20:39 +0000 (06:20 -0400)]
Blackfin: bf533-stamp: scrub unused code
Much of the local bf533-stamp.h header is unused, and the few bits that
are are only needed in one file. So move the few used bits out and punt
all the rest.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 10:19:19 +0000 (06:19 -0400)]
Blackfin: blackstamp: convert eth/flash swap logic to gpio framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 10:18:57 +0000 (06:18 -0400)]
Blackfin: bf533-stamp: convert eth/flash swap logic to gpio framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 10:13:50 +0000 (06:13 -0400)]
Blackfin: bfin_spi: support gpios as chip selects
Rather than only support the pins dedicated as chip selects, utilize the
gpio framework to support any gpio pin.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 10:12:47 +0000 (06:12 -0400)]
Blackfin: bfin_spi: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 10:00:27 +0000 (06:00 -0400)]
Blackfin: serial: convert to portmux framework
Use the new portmux framework to handle the details when possible.
Unfortunately, we cannot yet use this in the standalone initialization
logic, so we need to keep around the old portmux writes for now.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 10:00:04 +0000 (06:00 -0400)]
Blackfin: pata_bfin: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 09:59:50 +0000 (05:59 -0400)]
Blackfin: bfin_sdh: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 2 Jun 2010 09:59:06 +0000 (05:59 -0400)]
Blackfin: bfin_nand: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
Mike Frysinger [Wed, 2 Jun 2010 09:56:22 +0000 (05:56 -0400)]
Blackfin: bfin_mac: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details. While we're doing this, let boards declare the exact list
of pins they need in case there is one or two they don't actually have
hooked up.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Albert Aribaud [Mon, 12 Jul 2010 20:24:30 +0000 (22:24 +0200)]
edminiv2: add ethernet support
Add edminiv2 board support for mv_egiga.
Add edminiv2 config to enable mv_egiga.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Albert Aribaud [Mon, 12 Jul 2010 20:24:29 +0000 (22:24 +0200)]
mvgbe: add support for orion5x GbE controller
Add definitions and initialization in orion5x for mvgbe.
Add orion5x in mvgbe SoC includes.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Albert Aribaud [Mon, 12 Jul 2010 20:24:28 +0000 (22:24 +0200)]
mvgbe: support SoCs other than kirkwood
Rename all references to kirkwood in mvgbe symbols
throughout the whole codebase.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Albert Aribaud [Mon, 12 Jul 2010 20:24:27 +0000 (22:24 +0200)]
net: rename: kirkwood_egiga as mvgbe
Rename kirkwood_egiga.* to mvgbe.* and adjust makefile
and #include accordingly.
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Albert Aribaud [Mon, 12 Jul 2010 09:03:33 +0000 (11:03 +0200)]
kirkwood_egiga: CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
This configuration option allows SoCs without random
generation capability to fill in local MACs with a fixed
rather than random value
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Scott Wood [Mon, 12 Jul 2010 23:17:40 +0000 (18:17 -0500)]
NAND: formatting cleanups from env.oob support
Change if (ok) {
bunch of stuff
} else {
error
}
to
if (error) {
get out
}
proceed with bunch of stuff
Plus a few whitespace cleanups.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Ben Gardiner [Mon, 5 Jul 2010 17:27:07 +0000 (13:27 -0400)]
NAND: environment offset in OOB (CONFIG_ENV_OFFSET_OOB)
This is a re-submission of the patch by Harald Welte
<laforge@openmoko.org> with minor modifications for rebase and changes
as suggested by Scott Wood <scottwood@freescale.com> [1] [2].
This patch enables the environment partition to have a run-time dynamic
location (offset) in the NAND flash. The reason for this is simply that
all NAND flashes have factory-default bad blocks, and a fixed compile
time offset would mean that sometimes the environment partition would
live inside factory bad blocks. Since the number of factory default
blocks can be quite high (easily 1.3MBytes in current standard
components), it is not economic to keep that many spare blocks inside
the environment partition.
With this patch and CONFIG_ENV_OFFSET_OOB enabled, the location of the
environment partition is stored in the out-of-band (OOB) data of the
first block in flash. Since the first block is where most systems boot
from, the vendors guarantee that the first block is not a factory
default block.
This patch introduces the 'nand env.oob' command, which can be called
from the u-boot command line. 'nand env.oob get' reads the address of
the environment partition from the OOB data, 'nand env.oob set
{offset,partition-name}' allows the setting of the marker by specifying
a numeric offset or a partition name.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/43916
[2] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/79195
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Harald Welte <laforge@gnumonks.org>
Thomas Chou [Wed, 16 Jun 2010 06:39:30 +0000 (14:39 +0800)]
nios2: remove EP1C20, EP1S10, EP1S40 boards
The example configuration files of nios2-generic board can generated
binary to run on the EP1C20, EP1S10, and EP1S40 boards. So the three
boards can be removed.
With nios2-generic approach, the fpga parameter header file can
be generated from hardware designs using tools. Porting u-boot for
nios2 boards is simplified. Vendors can supply their fpga parameter
file or patches to add a new nios2-generic board instance. There is
no need to include other boards support for nios2 in the u-boot
mainline.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>