platform/upstream/llvm.git
3 years ago[fir][NFC] Removed unused declaration from td file
Valentin Clement [Thu, 30 Sep 2021 14:45:46 +0000 (16:45 +0200)]
[fir][NFC] Removed unused declaration from td file

Remove unused code from FIROps.td file after latest
patches.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110814

3 years ago[clangd] Update comment after dea48079b90d40f2087435b778544dffb0ab1793
Kirill Bobyrev [Thu, 30 Sep 2021 14:45:10 +0000 (16:45 +0200)]
[clangd] Update comment after dea48079b90d40f2087435b778544dffb0ab1793

3 years ago[LoopPredication] Remove unused variable
Anna Thomas [Thu, 30 Sep 2021 14:37:18 +0000 (10:37 -0400)]
[LoopPredication] Remove unused variable

After rG452714f8f8037ff37f9358317651d1652e231db2, the Function `F` retrieved in LoopPredication is not used.
Remove this unused variable to stop some buildbots (ASAN, clang-ppc) from failing.

3 years ago[NFC][X86][Codegen] Add test coverage for interleaved i64 load/store stride=2
Roman Lebedev [Thu, 30 Sep 2021 14:30:57 +0000 (17:30 +0300)]
[NFC][X86][Codegen] Add test coverage for interleaved i64 load/store stride=2

3 years ago[NFC][X86][LV] Add costmodel test coverage for interleaved i64/f64 load/store stride=2
Roman Lebedev [Thu, 30 Sep 2021 14:14:16 +0000 (17:14 +0300)]
[NFC][X86][LV] Add costmodel test coverage for interleaved i64/f64 load/store stride=2

3 years ago[NFC] Improve file-level documentation for Sequence.h
Jakub Kuderski [Thu, 30 Sep 2021 14:28:10 +0000 (10:28 -0400)]
[NFC] Improve file-level documentation for Sequence.h

Add usage samples.

This was extracted from a bigger patch: https://reviews.llvm.org/D107378.

Reviewed By: aaron.ballman, gchatelet

Differential Revision: https://reviews.llvm.org/D110760

3 years ago[fir][NFC] Move parser/printer for fir.global_len
Valentin Clement [Thu, 30 Sep 2021 14:27:02 +0000 (16:27 +0200)]
[fir][NFC] Move parser/printer for fir.global_len

Move parser and printer to the .cpp file.

Follow up to https://reviews.llvm.org/D110626.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D110828

3 years ago[BPI] Keep BPI available in loop passes through LoopStandardAnalysisResults
Anna Thomas [Fri, 24 Sep 2021 18:38:41 +0000 (14:38 -0400)]
[BPI] Keep BPI available in loop passes through LoopStandardAnalysisResults

This is analogous to D86156 (which preserves "lossy" BFI in loop
passes). Lossy means that the analysis preserved may not be up to date
with regards to new blocks that are added in loop passes, but BPI will
not contain stale pointers to basic blocks that are deleted by the loop
passes.

This is achieved through BasicBlockCallbackVH in BPI, which calls
eraseBlock that updates the data structures in BPI whenever a basic
block is deleted.

This patch does not have any changes in the upstream pipeline, since
none of the loop passes in the pipeline use BPI currently.
However, since BPI wasn't previously preserved in loop passes, the loop
predication pass was invoking BPI *on the entire
function* every time it ran in an LPM.  This caused massive compile time
in our downstream LPM invocation which contained loop predication.

See updated test with an invocation of a loop-pipeline containing loop
predication and -debug-pass turned ON.

Reviewed-By: asbirlea, modimo
Differential Revision: https://reviews.llvm.org/D110438

3 years ago[fir][NFC] Move fir.shape verifier to cpp file
Valentin Clement [Thu, 30 Sep 2021 14:26:29 +0000 (16:26 +0200)]
[fir][NFC] Move fir.shape verifier to cpp file

Move verifier code to the .cpp file.

Follow up to https://reviews.llvm.org/D110626.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D110826

3 years ago[fir][NFC] Update and move fir.freemem and fir.store
Valentin Clement [Thu, 30 Sep 2021 14:25:21 +0000 (16:25 +0200)]
[fir][NFC] Update and move fir.freemem and fir.store

Move fir.freemem and fir.store to the Memory SSA operations sections.
Move parser, printer and verifier of fir.store to the .cpp file.

This patch is part of the upstreaming effort from fir-dev branch.

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D110816

3 years ago[mlir][python] provide bindings for ops from the sparse_tensor dialect
Alex Zinenko [Thu, 30 Sep 2021 13:09:30 +0000 (15:09 +0200)]
[mlir][python] provide bindings for ops from the sparse_tensor dialect

Previously, the dialect was exposed for linking and pass management purposes,
but we did not generate op classes for it. Generate them.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D110819

3 years ago[ARM] Add more MVE intrinsics to sink splats to
David Green [Thu, 30 Sep 2021 13:41:23 +0000 (14:41 +0100)]
[ARM] Add more MVE intrinsics to sink splats to

This adds a few more unpredicated intrinsics to sink splats to, in order
to create more qr instruction variants. Notably this includes
saddsat/uaddsat but also some of the unpredicated mve intrinsics.

Differential Revision: https://reviews.llvm.org/D110333

3 years ago[CodeView] Recognize Fortran95 as Fortran instead of MASM
Brock Wyma [Wed, 22 Sep 2021 23:41:05 +0000 (19:41 -0400)]
[CodeView] Recognize Fortran95 as Fortran instead of MASM

Map Fortran95 sources to Fortran so the CodeView language is not emitted as
MASM.

Differential Revision: https://reviews.llvm.org/D110330

3 years ago[libc] move benchmark function registration to a different file
Guillaume Chatelet [Thu, 30 Sep 2021 13:10:45 +0000 (13:10 +0000)]
[libc] move benchmark function registration to a different file

3 years ago[clangd] Land D110386 again
Kirill Bobyrev [Thu, 30 Sep 2021 12:41:27 +0000 (14:41 +0200)]
[clangd] Land D110386 again

This time, use llvm::sys::fs::UniqueID instead of unstable
FileEntry::getName(), this should solve the problems on Windows and
elsewhere.

3 years ago[mlir] Remove unused namespace alias.
Adrian Kuegel [Thu, 30 Sep 2021 11:50:31 +0000 (13:50 +0200)]
[mlir] Remove unused namespace alias.

3 years ago[NFC][Costmodel][LV][X86] Add test coverage for f32 interleaved load/store stride=2
Roman Lebedev [Thu, 30 Sep 2021 11:24:42 +0000 (14:24 +0300)]
[NFC][Costmodel][LV][X86] Add test coverage for f32 interleaved load/store stride=2

3 years ago[AArch64][GlobalISel] Re-generate some tests for D110802.
Amara Emerson [Thu, 30 Sep 2021 11:15:30 +0000 (04:15 -0700)]
[AArch64][GlobalISel] Re-generate some tests for D110802.

3 years ago[PowerPC] Truncate element index for vec_insert in altivec.h
Nemanja Ivanovic [Thu, 30 Sep 2021 02:28:38 +0000 (21:28 -0500)]
[PowerPC] Truncate element index for vec_insert in altivec.h

When a user specifies an out-of-range index for vec_insert, we
just produce IR that has undefined behaviour even though the
documentation states that modulo arithmetic is used. This patch
just truncates the value to a valid index.

3 years ago[fir] Update fir.field_index op
Valentin Clement [Thu, 30 Sep 2021 10:51:14 +0000 (12:51 +0200)]
[fir] Update fir.field_index op

Move the parser, printer, verifier and builder out of the .td file.
Rename lenparams to typeparams to be in sync with fir-dev.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: rovka

Differential Revision: https://reviews.llvm.org/D110690

3 years ago[NFC] Cleanup the overload of ASTImporter::import()
Balazs Benics [Thu, 30 Sep 2021 09:53:08 +0000 (11:53 +0200)]
[NFC] Cleanup the overload of ASTImporter::import()

This patch aims to address the comment of a previous review:
https://reviews.llvm.org/D109237#inline-1040678

The original problem was the following:
  `T` is substituted by `clang::Type`

  Expected<T *> import(T *From) {
    auto ToOrErr = Importer.Import(From);
    //             ^^^^^^^^^^^^^^^^^^^^^
    if (!ToOrErr)
      return ToOrErr.takeError();
    return cast_or_null<T>(*ToOrErr);
    //     ^^^^^^^^^^^^^^^^^^^^^^^^^
  }

`Importer.Import()` operates on `const Type *`, thus returns `const Type *`.
Later, at the return statement, we will try to construct an `Expected<Type*>`
from a `const Type *`, which failed with a miserable error message.

In all other cases `importer.Import()` results in a non-const version,
so everything works out just fine, but for `clang::type`s, we should
really return a const version.

So, in case of `T` is a subclass of `clang::Type`, it will return a
`Exprected<const T*>` instead.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D109269

3 years agoRevert "[clangd] Reland D110386"
Kirill Bobyrev [Thu, 30 Sep 2021 09:36:34 +0000 (11:36 +0200)]
Revert "[clangd] Reland D110386"

This reverts commits

dd13f45e04366cc4f648b57ec87d20a5569e27c3
d084c42bdfac4a5879bdabe645b14cf72f7685a7
87817bc523daba1d2bd0492144a5d6adba8a649c

3 years ago[fir][NFC] Move parser/printer/builder to cpp file
Valentin Clement [Thu, 30 Sep 2021 09:17:46 +0000 (11:17 +0200)]
[fir][NFC] Move parser/printer/builder to cpp file

Move the parsers, printers and builders from the TableGen file
to the .cpp file. Remaining parsers, printers and builders will be
moved when we update the operations.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D110626

3 years ago[fir] Update fir.alloca op
Eric Schweitz [Thu, 30 Sep 2021 09:04:02 +0000 (11:04 +0200)]
[fir] Update fir.alloca op

Update the fir.alloca operation.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D110415

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Valentin Clement <clementval@gmail.com>
3 years ago[fir] Update fir.allocmem op
Valentin Clement [Thu, 30 Sep 2021 08:57:37 +0000 (10:57 +0200)]
[fir] Update fir.allocmem op

Updatet the fir.allocmem operation.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D110412

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
3 years ago[gn build] Port 13f3c39f3658
LLVM GN Syncbot [Thu, 30 Sep 2021 08:28:24 +0000 (08:28 +0000)]
[gn build] Port 13f3c39f3658

3 years agoSecond Recommit "[AArch64] Split bitmask immediate of bitwise AND operation"
Jingu Kang [Wed, 29 Sep 2021 01:42:21 +0000 (02:42 +0100)]
Second Recommit "[AArch64] Split bitmask immediate of bitwise AND operation"

This reverts the revert commit c07f7099690e8607d119227db1f80ee21eff3a3b with
bug fixes.

Differential Revision: https://reviews.llvm.org/D109963

3 years ago[fir] Update fir.extract_value and fir.insert_value ops
Eric Schweitz [Thu, 30 Sep 2021 08:22:16 +0000 (10:22 +0200)]
[fir] Update fir.extract_value and fir.insert_value ops

Move coor operand from variadic values to ArrayAttr.
Update assembly format.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110652

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Valentin Clement <clementval@gmail.com>
3 years ago[LiveIntervals] Remove unused subreg ranges in repairIntervalsInRange
Jay Foad [Mon, 27 Sep 2021 10:44:18 +0000 (11:44 +0100)]
[LiveIntervals] Remove unused subreg ranges in repairIntervalsInRange

If the old instructions mentioned a subreg that the new instructions do
not, remove the subrange for that subreg.

For example, in TwoAddressInstructionPass::eliminateRegSequence, if a
use operand in the REG_SEQUENCE has the undef flag then we don't
generate a copy for it so after the elimination there should be no live
interval at all for the corresponding subreg of the def.

This is a small step towards switching TwoAddressInstructionPass over
from LiveVariables to LiveIntervals. Currently this path is only tested
if you explicitly enable -early-live-intervals.

Differential Revision: https://reviews.llvm.org/D110542

3 years ago[fir] Update fir.array_update, fir.array_fetch and fir.array_merge_store
Eric Schweitz [Thu, 30 Sep 2021 07:55:45 +0000 (09:55 +0200)]
[fir] Update fir.array_update, fir.array_fetch and fir.array_merge_store

Add typeparams to fir.array_update, fir.array_fetch and
fir.array_merge_store operations. Add optional slice operands to
fir.array_merge_store op.
Move verifiers to cpp file.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D110701

Co-authored-by: Valentin Clement <clementval@gmail.com>
3 years agoFix the build after d084c42bdfac4a5879bdabe645b14cf72f7685a7
Kirill Bobyrev [Thu, 30 Sep 2021 07:52:37 +0000 (09:52 +0200)]
Fix the build after d084c42bdfac4a5879bdabe645b14cf72f7685a7

3 years ago[flang][docs] Remove the new driver sync-up calls
Andrzej Warzynski [Thu, 30 Sep 2021 07:49:15 +0000 (07:49 +0000)]
[flang][docs] Remove the new driver sync-up calls

3 years agoInvestigate failure in rGdd13f45e04366cc4f648b57ec87d20a5569e27c3
Kirill Bobyrev [Thu, 30 Sep 2021 07:49:27 +0000 (09:49 +0200)]
Investigate failure in rGdd13f45e04366cc4f648b57ec87d20a5569e27c3

https://lab.llvm.org/buildbot/#/builders/123/builds/6406/steps/8/logs/stdio

3 years ago[format] [docs] Fix typos and clarify QualifierAlignment/QualifierOrder documentation.
Marek Kurdej [Thu, 30 Sep 2021 07:42:15 +0000 (09:42 +0200)]
[format] [docs] Fix typos and clarify QualifierAlignment/QualifierOrder documentation.

3 years ago[mlir][python] provide bindings for the SCF dialect
Alex Zinenko [Wed, 29 Sep 2021 19:42:53 +0000 (21:42 +0200)]
[mlir][python] provide bindings for the SCF dialect

This is an important core dialect that has not been exposed previously. Set up
the default bindings generation and provide a nicer wrapper for the `for` loop
with access to the loop configuration and body.

Depends On D110758

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D110759

3 years ago[mlir][python] provide access to function argument/result attributes
Alex Zinenko [Wed, 29 Sep 2021 19:42:10 +0000 (21:42 +0200)]
[mlir][python] provide access to function argument/result attributes

Without this change, these attributes can only be accessed through the generic
operation attribute dictionary provided the caller knows the special operation
attribute names used for this purpose. Add some Python wrapping to support this
use case.

Also provide access to function arguments usable inside the function along with
a couple of quality-of-life improvements in using block arguments (function
arguments being the arguments of its entry block).

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D110758

3 years ago[AA] Teach BasicAA to recognize basic GEP range information.
Clement Courbet [Tue, 14 Sep 2021 07:03:57 +0000 (09:03 +0200)]
[AA] Teach BasicAA to recognize basic GEP range information.

The information can be implicit (from `ValueTracking`) or explicit.

This implements the backend part of the following RFC
https://groups.google.com/g/llvm-dev/c/T9o51zB1JY.

We still need to settle on how to best represent the information in the
IR, but this is a separate discussion.

Differential Revision: https://reviews.llvm.org/D109746

3 years ago[clangd] Reland D110386
Kirill Bobyrev [Thu, 30 Sep 2021 06:25:31 +0000 (08:25 +0200)]
[clangd] Reland D110386

D110711 will fix the bug on Windows side and allows me to reland this
patch.

Also land e50771181b7e0d96b30ee33049dc05172125b927 on top of it.

3 years ago[llvm-profgen] Fix alignment in preferred based calculation
Wenlei He [Thu, 30 Sep 2021 00:41:11 +0000 (17:41 -0700)]
[llvm-profgen] Fix alignment in preferred based calculation

We used the segment alignment in elf header to assume the loader alignment. However this is incorrect because loader alignment is always the same as page size. If segment needs to be aligned at load time, linker will set aligned address as virtual address in elf header.

Differential Revision: https://reviews.llvm.org/D110795

3 years ago[llvm-porfgen] Allow perf data as input
Wenlei He [Thu, 30 Sep 2021 00:03:33 +0000 (17:03 -0700)]
[llvm-porfgen] Allow perf data as input

This change enables llvm-profgen to take raw perf data as alternative input format. Sometimes we need to retrieve evenets for processes with matching binary. Using perf data as input allows us to retrieve process Ids from mmap events for matching binary, then filter by process id during perf script generation.

Differential Revision: https://reviews.llvm.org/D110793

3 years ago[llvm-profgen] Refactor and better diagnostics
Wenlei He [Wed, 29 Sep 2021 16:04:44 +0000 (09:04 -0700)]
[llvm-profgen] Refactor and better diagnostics

This change contains diagnostics improvments, refactoring and preparation for consuming perf data directly.

Diagnostics:
 - We now have more detailed diagnostics when no mmap is found.
 - We also print warning for abnormal transition to external code.

Refactoring:
 - Simplify input perf trace processing to only allow a single input file. This is because 1) using multiple input perf trace (perf script) is error prone because we may miss key mmap events. 2) the functionality is not really being used anyways.
 - Make more functions private for Readers, move non-trivial definitions out of header. Cleanup some inconsistency.
 - Prepare for consuming perf data as input directly.

Differential Revision: https://reviews.llvm.org/D110729

3 years ago[clang] Update Clang version from 13 to 14 in scan-build.1.
Frederic Cambus [Thu, 30 Sep 2021 05:53:07 +0000 (11:23 +0530)]
[clang] Update Clang version from 13 to 14 in scan-build.1.

Reviewed By: NoQ

Differential Revision: https://reviews.llvm.org/D110763

3 years agoAsmParser::getContext() - there can be only one. This should unbreak the build.
Chris Lattner [Thu, 30 Sep 2021 05:23:03 +0000 (22:23 -0700)]
AsmParser::getContext() - there can be only one.  This should unbreak the build.

3 years ago[ODS/AsmParser] Don't pass MLIRContext with DialectAsmParser.
Chris Lattner [Thu, 30 Sep 2021 00:47:08 +0000 (17:47 -0700)]
[ODS/AsmParser] Don't pass MLIRContext with DialectAsmParser.

The former is redundant because the later carries it as part of
its builder.  Add a getContext() helper method to DialectAsmParser
to make this more convenient, and stop passing the context around
explicitly.  This simplifies ODS generated parser hooks for attrs
and types.

This resolves PR51985

Recommit 4b32f8bac4 after fixing a dependency.

Differential Revision: https://reviews.llvm.org/D110796

3 years ago[AsmParser] move AsmParser::getContext to IR library.
Chris Lattner [Thu, 30 Sep 2021 05:05:44 +0000 (22:05 -0700)]
[AsmParser] move AsmParser::getContext to IR library.

This is (perhaps unintuitively) where the other AsmParser method
implementations are, which means that dialects don't generally need
to depend on MLIRParser directly.  This should fix a build failure
building .so files on the mlir-nvidia builder.

3 years agoRevert "[ODS/AsmParser] Don't pass MLIRContext with DialectAsmParser."
Mehdi Amini [Thu, 30 Sep 2021 05:01:17 +0000 (05:01 +0000)]
Revert "[ODS/AsmParser] Don't pass MLIRContext with DialectAsmParser."

This reverts commit 4b32f8bac40dcd1535bfe95757c3de0911bf6d1a.

Seems like the build is broken with -DDBUILD_SHARED_LIBS=ON

3 years ago[ODS/AsmParser] Don't pass MLIRContext with DialectAsmParser.
Chris Lattner [Thu, 30 Sep 2021 00:47:08 +0000 (17:47 -0700)]
[ODS/AsmParser] Don't pass MLIRContext with DialectAsmParser.

The former is redundant because the later carries it as part of
its builder.  Add a getContext() helper method to DialectAsmParser
to make this more convenient, and stop passing the context around
explicitly.  This simplifies ODS generated parser hooks for attrs
and types.

This resolves PR51985

Differential Revision: https://reviews.llvm.org/D110796

3 years agoMake "process attach -c" work correctly, and add a test for it.
Jim Ingham [Thu, 30 Sep 2021 02:38:09 +0000 (19:38 -0700)]
Make "process attach -c" work correctly, and add a test for it.

The issue here was that we were not updating the interpreter's
execution context when calling HandleCommand to continue the process.
Since we had just created the process, it wasn't in the interpreter's
execution context so HandleCommand failed at CheckRequirements.  The
patch fixes that by passing the process execution context directly
to HandleCommand.

Differential Revision: https://reviews.llvm.org/D110787

3 years agoAdd the --relative-to-command-file to "command source" so you can
Jim Ingham [Tue, 28 Sep 2021 00:51:37 +0000 (17:51 -0700)]
Add the --relative-to-command-file to "command source" so you can
have linked command files in a source tree and get to them all from
one main command file.

Differential Revision: https://reviews.llvm.org/D110601

3 years agoSecond attempt to fix Windows failures from test changes
Teresa Johnson [Thu, 30 Sep 2021 02:23:08 +0000 (19:23 -0700)]
Second attempt to fix Windows failures from test changes

Try to address Windows flakes from d87bdc272ba47b7d9109ff5c7191454ab2ae6fcb
by adding "|| true" as suggested in D110276 so the whole test doesn't
fail when Windows thinks it can't remove the binary.

3 years agoAMDGPU: Broadcast scalar boolean to vector boolean explicitly
Ruiling Song [Thu, 16 Sep 2021 15:04:39 +0000 (23:04 +0800)]
AMDGPU: Broadcast scalar boolean to vector boolean explicitly

This is used to fix wrong code generation of s_add_co_select_user in
test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll

  s_addc_u32 s4, s6, 0
  s_cselect_b64 vcc, 1, 0    <-- vcc set as 0x1 if SCC==1
  v_mov_b32_e32 v1, s4
  s_cmp_gt_u32 s6, 31
  v_cndmask_b32_e32 v1, 0, v1, vcc

If the s_addc_u32 set SCC, then we will get value 0x1 in VCC.
The v_cndmask will do per thread selection with VCC as condition
register. As VCC only gets the first bit being set, only the first
thread/lane in destination register can get correct result if the
very first lane is active. In fact, we should broadcast the value to all
active lanes of the final register.

The idea here is doing this broadcast to vector boolean explicitly
instead of lowering it into a COPY from SCC which would be interpreted as
selecting between 0/1.

This is used to replace D109754.

Reviewed-by: foad, alex-t
Differential Revision: https://reviews.llvm.org/D109889

3 years ago[clang] Fix sentence in the usage section of ThinLTO docs.
Frederic Cambus [Thu, 30 Sep 2021 01:56:01 +0000 (07:26 +0530)]
[clang] Fix sentence in the usage section of ThinLTO docs.

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D110750

3 years agoRevert "[clang-cl] Accept `#pragma warning(disable : N)` for some N"
Amy Huang [Thu, 30 Sep 2021 01:45:08 +0000 (18:45 -0700)]
Revert "[clang-cl] Accept `#pragma warning(disable : N)` for some N"
because it causes `error: error reading '/wd4091'` errors in
compiler-rt builds.

3 years ago[mlir][vector] Fold transfer ops and tensor.extract/insert_slice.
Matthias Springer [Thu, 30 Sep 2021 00:25:40 +0000 (09:25 +0900)]
[mlir][vector] Fold transfer ops and tensor.extract/insert_slice.

* Fold vector.transfer_read and tensor.extract_slice.
* Fold vector.transfer_write and tensor.insert_slice.

Differential Revision: https://reviews.llvm.org/D110627

3 years ago[llvm-objdump/llvm-readobj/obj2yaml/yaml2obj] Support STO_RISCV_VARIANT_CC and DT_RIS...
Fangrui Song [Wed, 29 Sep 2021 23:56:52 +0000 (16:56 -0700)]
[llvm-objdump/llvm-readobj/obj2yaml/yaml2obj] Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC

STO_RISCV_VARIANT_CC marks that a symbol uses a non-standard calling
convention or the vector calling convention.

See https://github.com/riscv/riscv-elf-psabi-doc/pull/190

Differential Revision: https://reviews.llvm.org/D107949

3 years ago[IntelJITListener] Fix order in JitListener/multiple.ll
Andy Kaylor [Wed, 29 Sep 2021 19:25:16 +0000 (12:25 -0700)]
[IntelJITListener] Fix order in JitListener/multiple.ll

As reported in Bugzilla 51859, the JitListener/multiple.ll test had
become stale. The function order in the emitted image was changed by an
update to the MC/ElfObjectWriter code and because this test is disabled
by default, it wasn't updated.

3 years ago[libc++] Simplify the _LIBCPP_CONSTEXPR markings on starts_with() etc.
Arthur O'Dwyer [Tue, 28 Sep 2021 16:19:35 +0000 (12:19 -0400)]
[libc++] Simplify the _LIBCPP_CONSTEXPR markings on starts_with() etc.

This came out of review comments on D110598.

Differential Revision: https://reviews.llvm.org/D110637

3 years ago[mlir][tosa] Ranked check for transpose was wrong.
Rob Suderman [Wed, 29 Sep 2021 01:48:35 +0000 (18:48 -0700)]
[mlir][tosa] Ranked check for transpose was wrong.

Should have verified the perm length and input rank were the same before
inferring shape. Caused a crash with invalid IR.

Differential Revision: https://reviews.llvm.org/D110674

3 years ago[AArch64][GlobalISel] Widen G_BUILD_VECTOR source & dest element types to s8.
Amara Emerson [Wed, 29 Sep 2021 20:40:48 +0000 (13:40 -0700)]
[AArch64][GlobalISel] Widen G_BUILD_VECTOR source & dest element types to s8.

3 years ago[libc++] Fix missed rename of libcxx-trunk-shared.cfg.in
Louis Dionne [Wed, 29 Sep 2021 22:06:37 +0000 (18:06 -0400)]
[libc++] Fix missed rename of libcxx-trunk-shared.cfg.in

There was a race condition between the application of 565d45541f86
and the application of 0c874382b981, which led to the latter missing
some occurences.

3 years ago[BasicAA] Move DecomposedGEP out of header (NFC)
Nikita Popov [Wed, 29 Sep 2021 21:40:43 +0000 (23:40 +0200)]
[BasicAA] Move DecomposedGEP out of header (NFC)

It's sufficient to have a forward declaration in the header, we
can move the definition of the struct (and VariableGEPIndex)
in the source file.

3 years ago[runtimes] Ensure required deps for tests targets are actually built
Leonard Chan [Wed, 29 Sep 2021 21:40:28 +0000 (14:40 -0700)]
[runtimes] Ensure required deps for tests targets are actually built

When building compiler-rt via runtimes, many tests fail because tools like
FileCheck and count aren't built yet. This is because the RUNTIME_TEST_DEPENDENCIES
haven't been added to any of the compiler-rt targets. The fix is to explicitly
add any runtimes as test_targets.

Differential Revision: https://reviews.llvm.org/D109625

3 years ago[BasicAA] Pass whole DecomposedGEP to subtraction API (NFC)
Nikita Popov [Wed, 29 Sep 2021 20:58:30 +0000 (22:58 +0200)]
[BasicAA] Pass whole DecomposedGEP to subtraction API (NFC)

Rather than separately handling subtraction of offset and variable
indices, make this one operation. Also rewrite the implementation
to use range-based for loops.

3 years ago[libc++] Add the std::views::common range adaptor
Louis Dionne [Fri, 24 Sep 2021 16:31:45 +0000 (12:31 -0400)]
[libc++] Add the std::views::common range adaptor

Differential Revision: https://reviews.llvm.org/D110433

3 years ago[VFS] InMemoryFilesystem's UniqueIDs are a function of path and content.
Sam McCall [Wed, 29 Sep 2021 13:25:15 +0000 (15:25 +0200)]
[VFS] InMemoryFilesystem's UniqueIDs are a function of path and content.

This ensures that re-creating "the same" FS results in the same UIDs for files.
In turn, this means that creating a clang module (preamble) using one in-memory
filesystem and consuming it using another doesn't create duplicate FileEntrys
for files that are the same in both FSes.

It's tempting to give the creator control over the UIDs instead. However that
requires fiddly API changes, e.g. what should the UIDs of intermediate
directories be?
This change is more "magic" but seems safe given:
 - InMemoryFilesystem is used in testing more than production
 - comparing UIDs across filesystems is unusual
 - files with the same path and content are usually logically equivalent

(The usual reason for re-creating virtual filesystems rather than reusing them
is that typical use involves mutating their CWD and so is not threadsafe).

Differential Revision: https://reviews.llvm.org/D110711

3 years ago[libc++] Rename testing configurations to match Lit stdlib= parameter
Louis Dionne [Wed, 29 Sep 2021 18:47:19 +0000 (14:47 -0400)]
[libc++] Rename testing configurations to match Lit stdlib= parameter

To reduce confusion, this commit makes sure that the name of the testing
configurations match the convention used for the stdlib= Lit parameter,
since those effectively correspond to each other.

3 years ago[libc++][libc++abi] Add tests for vendor-specific properties
Louis Dionne [Tue, 28 Sep 2021 19:54:41 +0000 (15:54 -0400)]
[libc++][libc++abi] Add tests for vendor-specific properties

Vendors take libc++ and ship it in various ways. Some vendors might
ship it differently from what upstream LLVM does, i.e. the install
location might be different, some ABI properties might differ, etc.

In the past few years, I've come across several instances where
having a place to test some of these properties would have been
incredibly useful. I also just got bitten by the lack of tests
of that kind, so I'm adding some now.

The tests added by this commit for Apple platforms have numerous
TODOs that capture discrepancies between the upstream LLVM CMake
and the slightly-modified build we perform internally to produce
Apple's system libc++. In the future, the goal would be to upstream
all those differences so that it's possible to build a faithful
Apple system libc++ with the upstream LLVM sources only.

But this isn't only useful for Apple - this lays out the path for
any vendor being able to add their own checks (either upstream or
downstream) to libc++.

Differential Revision: https://reviews.llvm.org/D110736

3 years ago[clang] don't instantiate templates with injected arguments
Matheus Izvekov [Wed, 29 Sep 2021 13:23:30 +0000 (15:23 +0200)]
[clang] don't instantiate templates with injected arguments

There is a special situation with templates in local classes,
as can be seen in this example with generic lambdas in function scope:
```
template<class T1> void foo() {
    (void)[]<class T2>() {
      struct S {
        void bar() { (void)[]<class T3>(T2) {}; }
      };
    };
};
template void foo<int>();
```

As a consequence of the resolution of DR1484, bar is instantiated during the
substitution of foo, and in this context we would substitute the lambda within
it with it's own parameters "injected" (turned into arguments).

This can't be properly dealt with for at least a couple of reasons:
* The 'TemplateTypeParm' type itself can only deal with canonical replacement
  types, which the injected arguments are not.
* If T3 were constrained in the example above, our (non-conforming) eager
  substitution of type constraints would just leave that parameter dangling.

Instead of substituting with injected parameters, this patch just leaves those
inner levels unreplaced.

Since injected arguments appear to be unused within the users of
`getTemplateInstantiationArgs`, this patch just removes that support there and
leaves a couple of asserts in place.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D110727

3 years ago[libc++][ci] Run alternative builds earlier to reduce latency
Louis Dionne [Wed, 29 Sep 2021 21:16:30 +0000 (17:16 -0400)]
[libc++][ci] Run alternative builds earlier to reduce latency

The Runtimes build is by far our longest CI configuration, so it makes
sense to run it earlier during CI. For consistency, move all the other
jobs from that "section" too.

3 years ago[M68k] Avoid UB in disassembler
Ricky Taylor [Wed, 29 Sep 2021 20:05:54 +0000 (21:05 +0100)]
[M68k] Avoid UB in disassembler

When reading 32 bits a 32-bit shift would be executed.

This is undefined behaviour, but in this case we can just replace the
entire scratch value to avoid it.

Differential Revision: https://reviews.llvm.org/D110769

3 years ago[clang] NFC: remove duplicated code around type constraint and templ arg subst
Matheus Izvekov [Wed, 29 Sep 2021 11:24:28 +0000 (13:24 +0200)]
[clang] NFC: remove duplicated code around type constraint and templ arg subst

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D110726

3 years ago[BasicAA] Pass DecomposedGEP to constantOffsetHeuristic() (NFC)
Nikita Popov [Wed, 29 Sep 2021 20:22:47 +0000 (22:22 +0200)]
[BasicAA] Pass DecomposedGEP to constantOffsetHeuristic() (NFC)

Rather than separately passing VarIndices and BaseOffset, pass
the whole DecomposedGEP.

3 years ago[gn build] Port 969359e3b86b
LLVM GN Syncbot [Wed, 29 Sep 2021 20:09:08 +0000 (20:09 +0000)]
[gn build] Port 969359e3b86b

3 years ago[OpenMP] Apply OpenMP assumptions to applicable call sites
Joseph Huber [Tue, 28 Sep 2021 19:53:55 +0000 (15:53 -0400)]
[OpenMP] Apply OpenMP assumptions to applicable call sites

This patch adds OpenMP assumption attributes to call sites in applicable
regions. Currently this applies the caller's assumption attributes to
any calls contained within it. So, if a call occurs inside an OpenMP
assumes region to a function outside that region, we will assume that
call respects the assumptions. This is primarily useful for inline
assembly calls used heavily in the OpenMP GPU device runtime, which
allows us to then make judgements about what the ASM will do.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D110655

3 years ago[OpenMP][NFC] Fix linting messages in OpenMPOpt
Joseph Huber [Tue, 28 Sep 2021 03:10:27 +0000 (23:10 -0400)]
[OpenMP][NFC] Fix linting messages in OpenMPOpt

Summary:
This patch addresses some linting messages I keep getting in my editor
when working on OpenMPOpt.

3 years ago[OpenMP] Add missing distribute definitions to AAKernelInfo
Joseph Huber [Wed, 29 Sep 2021 19:47:59 +0000 (15:47 -0400)]
[OpenMP] Add missing distribute definitions to AAKernelInfo

Summary:
The RTL functions added in https://reviews.llvm.org/D110429 were
mistakenly left out from the list of safe runtime calls in AAKernelInfo.
This patch adds them in.

3 years ago[flang] Make builtin types more easily accessible; use them
peter klausler [Tue, 21 Sep 2021 23:06:30 +0000 (16:06 -0700)]
[flang] Make builtin types more easily accessible; use them

Rearrange the contents of __builtin_* module files a little and
make sure that semantics implicitly USEs the module __Fortran_builtins
before processing each source file.  This ensures that the special derived
types for TEAM_TYPE, EVENT_TYPE, LOCK_TYPE, &c. exist in the symbol table
where they will be available for use in coarray intrinsic function
processing.

Update IsTeamType() to exploit access to the __Fortran_builtins
module rather than applying ad hoc name tests.  Move it and some
other utilities from Semantics/tools.* to Evaluate/tools.* to make
them available to intrinsics processing.

Add/correct the intrinsic table definitions for GET_TEAM, TEAM_NUMBER,
and THIS_IMAGE to exercise the built-in TEAM_TYPE as an argument and
as a result.

Add/correct/extend tests accordingly.

Differential Revision: https://reviews.llvm.org/D110356

3 years ago[libc++] [compare] Named comparison functions, is_eq etc.
Arthur O'Dwyer [Mon, 27 Sep 2021 04:48:39 +0000 (00:48 -0400)]
[libc++] [compare] Named comparison functions, is_eq etc.

Some of these were previously half-implemented in "ordering.h";
now they're all implemented, and tested.
Note that `constexpr` functions are implicitly `inline`, so the
standard wording omits `inline` on these; but Louis and I agree
that that's surprising and it's better to be explicit about it.

Differential Revision: https://reviews.llvm.org/D110515

3 years ago[test] Update some test cases to use -passes when specifying the pipeline
Bjorn Pettersson [Mon, 13 Sep 2021 08:43:38 +0000 (10:43 +0200)]
[test] Update some test cases to use -passes when specifying the pipeline

This updates transform test cases for
  ADCE
  AddDiscriminators
  AggressiveInstCombine
  AlignmentFromAssumptions
  ArgumentPromotion
  BDCE
  CalledValuePropagation
  DCE
  Reg2Mem
  WholeProgramDevirt
to use the -passes syntax when specifying the pipeline.

Given that LLVM_ENABLE_NEW_PASS_MANAGER isn't set to off (which is
a deprecated feature) the updated test cases already used the new
pass manager, but they were using the legacy syntax when specifying
the passes to run. This patch can be seen as a step toward deprecating
that interface.

This patch also removes some redundant RUN lines. Here I am
referring to test cases that had multiple RUN lines verifying both
the legacy "-passname" syntax and the new "-passes=passname" syntax.
Since we switched the default pass manager to "new PM" both RUN lines
have verified the new PM version of the pass (more or less wasting
time running the same test twice), unless LLVM_ENABLE_NEW_PASS_MANAGER
is set to "off". It is assumed that it is enough to run these tests
with the new pass manager now.

Differential Revision: https://reviews.llvm.org/D108472

3 years ago[NFC][clang] Add newline to end of 2005-01-02-ConstantInits.c
Jessica Clarke [Wed, 29 Sep 2021 19:47:31 +0000 (20:47 +0100)]
[NFC][clang] Add newline to end of 2005-01-02-ConstantInits.c

This was removed in a18181931f99.

3 years ago[fir] Move parser/printer/verifier of fir.string_lit and add builders
Eric Schweitz [Wed, 29 Sep 2021 19:43:38 +0000 (21:43 +0200)]
[fir] Move parser/printer/verifier of fir.string_lit and add builders

Move the parser, printer and verifier to the .cpp file. Add builders
needed for lowering.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: schweitz, mehdi_amini

Differential Revision: https://reviews.llvm.org/D110686

Co-authored-by: Valentin Clement <clementval@gmail.com>
3 years agoRevert "[LTO][Legacy] Add -debug-pass-manager option to enable pass run/skip trace."
Wael Yehia [Wed, 29 Sep 2021 19:42:43 +0000 (19:42 +0000)]
Revert "[LTO][Legacy] Add -debug-pass-manager option to enable pass run/skip trace."

This reverts commit a60405cf035dc114e7ee090139bed2577f4ea7ef.

3 years ago[PowerPC] The builtins load8r and store8r are Power 7 plus.
Stefan Pintilie [Tue, 28 Sep 2021 19:44:30 +0000 (14:44 -0500)]
[PowerPC] The builtins load8r and store8r are Power 7 plus.

This patch makes sure that the builtins __builtin_ppc_load8r and
__ builtin_ppc_store8r are only available for Power 7 and up.
Currently the builtins seem to produce incorrect code if used for
Power 6 or before.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D110653

3 years ago[NFC][X86][Codegen] Add test coverage for interleaved i32 load/store stride=2
Roman Lebedev [Wed, 29 Sep 2021 19:16:08 +0000 (22:16 +0300)]
[NFC][X86][Codegen] Add test coverage for interleaved i32 load/store stride=2

3 years ago[NFC][X86][LV] Add costmodel test coverage for interleaved i32 load/store stride=2
Roman Lebedev [Wed, 29 Sep 2021 19:06:33 +0000 (22:06 +0300)]
[NFC][X86][LV] Add costmodel test coverage for interleaved i32 load/store stride=2

3 years ago[NFC][AMDGPU] Add missing gfx90a test cases to fsub.ll.
Daniil Fukalov [Wed, 29 Sep 2021 18:55:54 +0000 (21:55 +0300)]
[NFC][AMDGPU] Add missing gfx90a test cases to fsub.ll.

3 years ago[LoopFlatten] Bail if we can't perform flattening after IV widening
Sjoerd Meijer [Wed, 29 Sep 2021 18:32:46 +0000 (19:32 +0100)]
[LoopFlatten] Bail if we can't perform flattening after IV widening

It can happen that after widening of the IV, flattening may not be possible,
e.g. when it is deemed unprofitable. We were not properly checking this, which
resulted in flattening being applied when it shouldn't, also leading to
incorrect results (miscompilation).

This should fix PR51980 (https://bugs.llvm.org/show_bug.cgi?id=51980)

Differential Revision: https://reviews.llvm.org/D110712

3 years ago[X86][Costmodel] Load/store i8 Stride=2 VF=32 interleaving costs
Roman Lebedev [Wed, 29 Sep 2021 18:42:01 +0000 (21:42 +0300)]
[X86][Costmodel] Load/store i8 Stride=2 VF=32 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/xz6x7c35P - for intels `Block RThroughput: =6.0`; for ryzens, `Block RThroughput: <=2.5`
So pick cost of `6`.

For store we have:
https://godbolt.org/z/xz6x7c35P - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `4`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110709

3 years ago[X86][Costmodel] Load/store i8 Stride=2 VF=16 interleaving costs
Roman Lebedev [Wed, 29 Sep 2021 18:42:01 +0000 (21:42 +0300)]
[X86][Costmodel] Load/store i8 Stride=2 VF=16 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/a9hv4z47v - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: =2.0`
So pick cost of `4`.

For store we have:
https://godbolt.org/z/6GfPn1b79 - for intels `Block RThroughput: =3.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `3`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110708

3 years ago[X86][Costmodel] Load/store i8 Stride=2 VF=8 interleaving costs
Roman Lebedev [Wed, 29 Sep 2021 18:41:56 +0000 (21:41 +0300)]
[X86][Costmodel] Load/store i8 Stride=2 VF=8 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

Identical to VF=2.

For load we have:
https://godbolt.org/z/4TEbdzbMM - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/MYfzGPf3Y - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: <=0.5`
So pick cost of `1`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110705

3 years ago[X86][Costmodel] Load/store i8 Stride=2 VF=4 interleaving costs
Roman Lebedev [Wed, 29 Sep 2021 18:41:51 +0000 (21:41 +0300)]
[X86][Costmodel] Load/store i8 Stride=2 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

Identical to VF=2.

For load we have:
https://godbolt.org/z/sGE41GYo7 - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/ba5r3s9xa - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: <=0.5`
So pick cost of `1`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110704

3 years ago[X86][Costmodel] Load/store i8 Stride=2 VF=2 interleaving costs
Roman Lebedev [Wed, 29 Sep 2021 18:41:46 +0000 (21:41 +0300)]
[X86][Costmodel] Load/store i8 Stride=2 VF=2 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/caKqjr9hb - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=1.0`
So pick cost of `2`.

For store we have:
https://godbolt.org/z/6TTn3eKj8 - for intels `Block RThroughput: =1.0`; for ryzens, `Block RThroughput: <=0.5`
So pick cost of `1`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D110702

3 years ago[NFC] Add contributor name to CREDITS.TXT
Muiez Ahmed [Wed, 29 Sep 2021 18:48:32 +0000 (14:48 -0400)]
[NFC] Add contributor name to CREDITS.TXT

Differential Revision: https://reviews.llvm.org/D110650

3 years ago[Mangler] Calculate the argument list byte count suffix correctly when returning...
Wesley Wiser [Wed, 29 Sep 2021 18:36:13 +0000 (11:36 -0700)]
[Mangler] Calculate the argument list byte count suffix correctly when returning large values

`__stdcall`, `__fastcall` and `__vectorcall` return large values via a
hidden pointer argument. However, the size of that argument should not
be included in the argument list byte count suffix added to the
function's decorated name.

This patch fixes that issue so that LLVM generates the same decorated
name as MSVC does.

MSVC example: https://godbolt.org/z/nc35MKPhr

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D110719

3 years ago[lldb] Remove Expression's dependency on CPlusPlusLanguagePlugin
Alex Langford [Mon, 20 Sep 2021 21:39:13 +0000 (14:39 -0700)]
[lldb] Remove Expression's dependency on CPlusPlusLanguagePlugin

This change accomplishes the following:
- Moves `IRExecutionUnit::FindBestAlternateMangledName` to `Language`.
- Renames `FindBestAlternateMangledName` to
  `FindBestAlternateFunctionMangledName`
- Changes the first parameter of said method from a `ConstString`
  representing a demangled name to a `Mangled`.
- Remove the use of CPlusPlusLanguage from Expression

3 years ago[libcxx] Add a CI configuration for standalone building in llvm-project/runtimes
Martin Storsjö [Fri, 10 Sep 2021 11:36:13 +0000 (14:36 +0300)]
[libcxx] Add a CI configuration for standalone building in llvm-project/runtimes

Generate the llvm-lit script in runtimes/CmakeFiles.txt unless invoked
from llvm/runtimes.

Differential Revision: https://reviews.llvm.org/D109593

3 years ago[clang] Minor cleanups after b2de52bec
Nico Weber [Wed, 29 Sep 2021 18:28:13 +0000 (14:28 -0400)]
[clang] Minor cleanups after b2de52bec

3 years ago[AMDGPU] Enable machine verification after AMDGPUISelDAGToDAG
Jay Foad [Wed, 29 Sep 2021 10:42:04 +0000 (11:42 +0100)]
[AMDGPU] Enable machine verification after AMDGPUISelDAGToDAG

This was introduced in D32628 but it does not seem to be required any
more. At least it does not show any problems in check-llvm in an
LLVM_ENABLE_EXPENSIVE_CHECKS build.

Differential Revision: https://reviews.llvm.org/D110692

3 years ago[libc++][NFC] Reorganize CI jobs into commented sections
Louis Dionne [Wed, 29 Sep 2021 17:42:55 +0000 (13:42 -0400)]
[libc++][NFC] Reorganize CI jobs into commented sections

3 years agoAdapt `tsan/flush_memory.cpp` to run on non-local platforms.
Dan Liew [Wed, 29 Sep 2021 17:28:03 +0000 (10:28 -0700)]
Adapt `tsan/flush_memory.cpp` to run on non-local platforms.

ad890aa2327feb6b6aee676fe85b2352fba2403e landed a test without
using the `%run` prefix which means the test fails to run for
platforms that need it (e.g. iOS simulators).

This patch adds the `%run` prefix. While we're here also split
the single `RUN` line into two to make debugging easier.

rdar://83637296

Differential Revision: https://reviews.llvm.org/D110734