Marek Szyprowski [Thu, 26 Jan 2017 09:29:25 +0000 (10:29 +0100)]
pinctrl: samsung: Move retention control from mach-exynos to the pinctrl driver
This patch moves pad retention control from PMU driver to Exynos pin
controller driver. This helps to avoid possible ordering and logical
dependencies between machine, PMU and pin control code. Till now it
worked fine only because sys_ops for PMU and pin controller were called
in registration order.
This is also a preparation for adding new features to Exynos pin
controller driver, like runtime power management and suspending
individual pin controllers, which might be a part of some power domain.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Thu, 26 Jan 2017 15:56:41 +0000 (16:56 +0100)]
Merge tag 'samsung-drivers-soc-pmu-4.11' of git://git./linux/kernel/git/krzk/linux into devel
Improvements for Exynos PMU driver for v4.11:
Beside basic function of setting proper configuration for low power modes, the
Exynos PMU (Power Management Unit) driver is also a provider of syscon regmap
for its registers. This regmap is essential to many other drivers wanting to
or needing to implement low power mode.
Exynos pinctrl driver, before getting support for Runtime Power Management,
needs access to this syscon regmap. Let's do it in a DT ABI friendly way.
Linus Walleij [Thu, 26 Jan 2017 15:56:31 +0000 (16:56 +0100)]
Merge tag 'v4.10-rc2' into devel
Linux 4.10-rc2
Alexander Stein [Thu, 26 Jan 2017 13:17:54 +0000 (14:17 +0100)]
pinctrl: baytrail: Fix debugfs offset output
Apparently each GPIO pad's register are 16 bytes, so multiply the pad_map
by that. The same is done in byt_gpio_reg the only other place where
pad_map is used.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Marek Szyprowski [Thu, 26 Jan 2017 09:29:24 +0000 (10:29 +0100)]
pinctrl: samsung: Add infrastructure for pin-bank retention control
Pad retention control after suspend/resume cycle should be done from pin
controller driver instead of PMU (power management unit) driver to avoid
possible ordering and logical dependencies. Till now it worked fine only
because PMU driver registered its sys_ops after pin controller.
This patch adds infrastructure to handle pad retention during pin control
driver resume.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Marek Szyprowski [Thu, 26 Jan 2017 09:29:22 +0000 (10:29 +0100)]
pinctrl: samsung: Remove dead code
'enable' parameter has been removed a while ago, so all code for handling
it can be simply removed.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Marek Szyprowski [Thu, 26 Jan 2017 09:29:23 +0000 (10:29 +0100)]
pinctrl: samsung: Use generic of_device_get_match_data helper
Replace custom code with generic helper.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Marek Szyprowski [Thu, 26 Jan 2017 09:29:21 +0000 (10:29 +0100)]
pinctrl: samsung: Add missing initconst annotation
Exynos5433 support has been added in parallel to adding initconst
annotation to most of the init data structures, so add those
annotations also to Exynos5433 structures.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jean Delvare [Wed, 25 Jan 2017 09:32:09 +0000 (10:32 +0100)]
pinctrl: mediatek: Use real dependencies
Do not hide pinctrl drivers for Mediatek platforms using
conditionals. Doing so actually leaves the symbols present (but
always disabled) on all other platforms, which is confusing and
inefficient. Better use real dependencies so that the symbols do not
exist at all on platforms where they are not relevant.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Reported-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Martin Blumenstingl [Sun, 22 Jan 2017 21:05:27 +0000 (22:05 +0100)]
pinctrl: meson: meson-gxl: add the pwm_ao_b pin
This adds support for the pwm_ao_b pin. Unfortunately the registers for
the pwm_ao pins are not documented at all. The source for the pwm_ao_b
pin from this patch is the Khadas VIM GPL kernel source, which sets bit
3 and unsets bits 4 and 31 to enable the PWM LEDs.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 25 Jan 2017 20:29:34 +0000 (22:29 +0200)]
pinctrl: broxton: Rename apl-pinctrl driver
While we have no users yet rename the platform driver to use the same
pattern as the rest of Intel SoCs, i.e. use full SoC name in
'apollolake-pinctrl'.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Thu, 26 Jan 2017 14:27:54 +0000 (15:27 +0100)]
Merge branch 'ib-pinctrl-genprops' into devel
Mika Westerberg [Mon, 23 Jan 2017 12:34:34 +0000 (15:34 +0300)]
pinctrl / gpio: Introduce .set_config() callback for GPIO chips
Currently we already have two pin configuration related callbacks
available for GPIO chips .set_single_ended() and .set_debounce(). In
future we expect to have even more, which does not scale well if we need
to add yet another callback to the GPIO chip structure for each possible
configuration parameter.
Better solution is to reuse what we already have available in the
generic pinconf.
To support this, we introduce a new .set_config() callback for GPIO
chips. The callback takes a single packed pin configuration value as
parameter. This can then be extended easily beyond what is currently
supported by just adding new types to the generic pinconf enum.
If the GPIO driver is backed up by a pinctrl driver the GPIO driver can
just assign gpiochip_generic_config() (introduced in this patch) to
.set_config and that will take care configuration requests are directed
to the pinctrl driver.
We then convert the existing drivers over .set_config() and finally
remove the .set_single_ended() and .set_debounce() callbacks.
Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Mika Westerberg [Mon, 23 Jan 2017 12:34:33 +0000 (15:34 +0300)]
pinctrl: Allow configuration of pins from gpiolib based drivers
When a GPIO driver is backed by a pinctrl driver the GPIO driver
sometimes needs to call the pinctrl driver to configure certain things,
like whether the pin is used as input or output. In addition to this
there are other configurations applicable to GPIOs such as setting
debounce time of the GPIO.
To support this we introduce a new function pinctrl_gpio_set_config()
that can be used by gpiolib based driver to pass configuration requests
to the backing pinctrl driver.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Mika Westerberg [Mon, 23 Jan 2017 12:34:32 +0000 (15:34 +0300)]
pinctrl: Widen the generic pinconf argument from 16 to 24 bits
The current pinconf packed format allows only 16-bit argument limiting
the maximum value 65535. For most types this is enough. However,
debounce time can be in range of hundreths of milliseconds in case of
mechanical switches so we cannot represent the worst case using the
current format.
In order to support larger values change the packed format so that the
lower 8 bits are used as type which leaves 24 bits for the argument.
This allows representing values up to
16777215 and debounce times up to
16 seconds.
We also convert the existing users to use 32-bit integer when extracting
argument from the packed configuration value.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Arnd Bergmann [Mon, 23 Jan 2017 12:17:25 +0000 (13:17 +0100)]
pinctrl: mvebu: remove unused variable
A cleanup caused a harmless warning:
drivers/pinctrl/mvebu/pinctrl-kirkwood.c: In function 'kirkwood_pinctrl_probe':
drivers/pinctrl/mvebu/pinctrl-kirkwood.c:460:19: error: unused variable 'res' [-Werror=unused-variable]
The obvious fix is to remove the declaration of the now unused
variable.
Fixes:
ad9ec4ecee68 ("pinctrl: mvebu: switch drivers to generic simple mmio")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andrew Jeffery [Tue, 24 Jan 2017 06:16:46 +0000 (16:46 +1030)]
gpio: aspeed: Add banks Y, Z, AA, AB and AC
This is less straight-forward than one would hope, as some banks only
have 4 pins rather than 8, others are output only, yet more (W and
X, already supported) are input-only, and in the case of the g4 SoC bank
AC doesn't exist.
Add some structs to describe the varying properties of different banks
and integrate mechanisms to deny requests for unsupported
configurations.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andrew Jeffery [Mon, 23 Jan 2017 05:27:17 +0000 (15:57 +1030)]
pinctrl: aspeed: g4: Fix mux configuration for GPIOs AA[4-7], AB[0-7]
Incorrect video output configuration bits were being tested on pins in
GPIO banks AA and AB for the ROM{8,16} mux functions. The ROM{8,16}
functions are the highest priority for the relevant pins and also the
default function, so we require the relevant video output configuration
be disabled to mux GPIO functionality. As the wrong bits were being
tested a GPIO export would succeed but leave the pin in an unresponsive
state (i.e. value updates were ignored).
This misbehaviour was discovered as part of extending the GPIO
controller's support to cover banks Y, Z, AA, AB and AC (AC in the case
of the g5 SoC).
Fixes:
6d329f14a75f ("pinctrl: aspeed-g4: Add mux configuration for all pins")
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Joel Stanley [Mon, 23 Jan 2017 05:26:06 +0000 (15:56 +1030)]
gpio: aspeed: Make bank names strings
The Aspeed SoCs have more GPIOs than can be represented with A-Z. The
documentation uses two letter names such as AA and AB, so make the names
a three-character array in the bank struct to accommodate this.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Julia Cartwright [Fri, 20 Jan 2017 16:13:47 +0000 (10:13 -0600)]
pinctrl: qcom: Use raw spinlock variants
The MSM pinctrl driver currently implements an irq_chip for handling
GPIO interrupts; due to how irq_chip handling is done, it's necessary
for the irq_chip methods to be invoked from hardirq context, even on a
a real-time kernel. Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.
A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw
spinlock.
On real-time kernels, this fixes an OOPs which looks like the following,
as reported by Brian Wrenn:
kernel BUG at kernel/locking/rtmutex.c:1014!
Internal error: Oops - BUG: 0 [#1] PREEMPT SMP
Modules linked in: spidev_irq(O) smsc75xx wcn36xx [last unloaded: spidev]
CPU: 0 PID: 1163 Comm: irq/144-mmc0 Tainted: G W O 4.4.9-linaro-lt-qcom #1
PC is at rt_spin_lock_slowlock+0x80/0x2d8
LR is at rt_spin_lock_slowlock+0x68/0x2d8
[..]
Call trace:
rt_spin_lock_slowlock
rt_spin_lock
msm_gpio_irq_ack
handle_edge_irq
generic_handle_irq
msm_gpio_irq_handler
generic_handle_irq
__handle_domain_irq
gic_handle_irq
Reported-by: Brian Wrenn <dcbrianw@gmail.com>
Tested-by: Brian Wrenn <dcbrianw@gmail.com>
Signed-off-by: Julia Cartwright <julia@ni.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Marek Szyprowski [Thu, 19 Jan 2017 13:48:46 +0000 (14:48 +0100)]
pinctrl: samsung: Fix samsung_pinctrl_create_functions return value
Return proper error code in case of memory allocation failure.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Marek Szyprowski [Thu, 19 Jan 2017 13:48:45 +0000 (14:48 +0100)]
pinctrl: samsung: Remove messages for failed memory allocation
Memory subsystem already prints message about failed memory
allocation, there is no need to do it in the drivers.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Marek Szyprowski [Thu, 19 Jan 2017 13:48:44 +0000 (14:48 +0100)]
pinctrl: samsung: Document Exynos3250 SoC support
Add missing compatible id for Exynos3250 SoC to device tree docs.
Exynos pin control driver supports it since commit
d97f5b9804bfcdc1
("pinctrl: exynos: Add driver data for Exynos3250").
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Marek Szyprowski [Thu, 19 Jan 2017 13:48:43 +0000 (14:48 +0100)]
soc: samsung: pmu: Remove messages for failed memory allocation
Memory subsystem already prints message about failed memory
allocation, there is no need to do it in the driver.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski [Thu, 19 Jan 2017 13:48:42 +0000 (14:48 +0100)]
soc: samsung: pmu: Use of_device_get_match_data helper
Replace custom code with generic helper to retrieve driver data.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Marek Szyprowski [Thu, 19 Jan 2017 13:48:41 +0000 (14:48 +0100)]
soc: samsung: pmu: Provide global function to get PMU regmap
PMU is something like a SoC wide service, so add a helper function to get
PMU regmap. This will be used by other Exynos device drivers. This way it
can be avoided to model this dependency in device tree (as phandles to PMU
node) for almost every device in the SoC.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Wei Yongjun [Tue, 17 Jan 2017 15:55:32 +0000 (15:55 +0000)]
pinctrl/amd: Drop pinctrl_unregister for devm_ registered device
It's not necessary to unregister pin controller device registered
with devm_pinctrl_register() and using pinctrl_unregister() leads
to a double free.
Fixes:
3bfd44306c65 ("pinctrl: amd: Add support for additional GPIO")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Neil Armstrong [Tue, 17 Jan 2017 12:05:37 +0000 (13:05 +0100)]
pinctrl: meson: Add HDMI HPD/DDC pins functions
Add pinctrl functions for HDMI HPD pin and DDC pins on Amlogic Meson
GXL and GXBB SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Krzysztof Kozlowski [Sat, 14 Jan 2017 12:36:41 +0000 (14:36 +0200)]
pinctrl: samsung: Remove support for Exynos4415 (SoC not supported anymore)
Support for Exynos4415 is going away because there are no internal nor
external users.
Since commit
46dcf0ff0de3 ("ARM: dts: exynos: Remove exynos4415.dtsi"),
the platform cannot be instantiated so remove also the drivers.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Colin Ian King [Fri, 13 Jan 2017 13:20:39 +0000 (13:20 +0000)]
pinctrl: ti-iodelay: remove redundant pin < 0 check on unsigned int
pin is an unsigned int and therefore can never be < 0 so
this check is redundant. Remove the check and the associated
dev_err error message.
Fixes CoverityScan CID#1396438 ("Unsigned compared against 0")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Russell King [Fri, 13 Jan 2017 11:03:35 +0000 (11:03 +0000)]
pinctrl: mvebu: add simple regmap based pinctrl implementation
Add a simple regmap based pinctrl implementation for mvebu, for syscon
based regmap drivers.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Russell King [Fri, 13 Jan 2017 11:03:30 +0000 (11:03 +0000)]
pinctrl: mvebu: switch drivers to generic simple mmio
Move the mvebu pinctrl drivers over to the generic simple mmio
implementation, saving a substantial number of lines of code in
the process.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Russell King [Fri, 13 Jan 2017 11:03:25 +0000 (11:03 +0000)]
pinctrl: mvebu: provide generic simple mmio-based implementation
Provide a generic simple mmio-based probe function and methods, which
pinctrl drivers can use to initialise the mvebu pinctrl subsystem.
Most mvebu pinctrl drivers can use this.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Russell King [Fri, 13 Jan 2017 11:03:20 +0000 (11:03 +0000)]
pinctrl: mvebu: provide per-control private data
Provide per-control private data into each mvebu pinctrl method, which
will allow us to provide some completely generic helpers without the
global variable and per-instance function definitions that would be
required when we have multiple pin controllers on a SoC.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Russell King [Fri, 13 Jan 2017 11:03:15 +0000 (11:03 +0000)]
pinctrl: mvebu: constify mvebu_mpp_ctrl structures
As the mvebu_mpp_ctrl structures contain function pointers, it is
preferable for these to be made read-only to prevent the function
pointers being modified. So make these const.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Thu, 12 Jan 2017 16:12:30 +0000 (17:12 +0100)]
pinctrl: mvebu: Use seq_putc() in mvebu_pinconf_group_dbg_show()
Single characters should be put into a sequence.
Thus use the corresponding function "seq_putc".
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Thu, 12 Jan 2017 15:51:00 +0000 (16:51 +0100)]
pinctrl: mvebu: Use seq_puts() in mvebu_pinconf_group_dbg_show()
Strings which did not contain data format specifications should be put
into a sequence. Thus use the corresponding function "seq_puts".
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Thu, 12 Jan 2017 15:30:24 +0000 (16:30 +0100)]
pinctrl: mvebu: Delete an unnecessary return statement in mvebu_pinconf_group_dbg_show()
The script "checkpatch.pl" pointed information out like the following.
WARNING: void function return statements are not generally useful
Thus remove such a statement in the affected function.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Thu, 12 Jan 2017 15:15:34 +0000 (16:15 +0100)]
pinctrl: mvebu: Delete an error message for a failed memory allocation in three functions
The script "checkpatch.pl" pointed information out like the following.
WARNING: Possible unnecessary 'out of memory' message
Thus fix the affected source code places.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Markus Elfring [Thu, 12 Jan 2017 15:00:15 +0000 (16:00 +0100)]
pinctrl: mvebu: Use kmalloc_array() in mvebu_pinctrl_dt_node_to_map()
* A multiplication for the size determination of a memory allocation
indicated that an array data structure should be processed.
Thus use the corresponding function "kmalloc_array".
This issue was detected by using the Coccinelle software.
* Replace the specification of a data structure by a pointer dereference
to make the corresponding size determination a bit safer according to
the Linux coding style convention.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Fri, 13 Jan 2017 15:43:17 +0000 (16:43 +0100)]
Merge tag 'sh-pfc-for-v4.11-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into devel
pinctrl: sh-pfc: Updates for v4.11
- Add bias handling for non-GPIO pins for R-Car H3,
- Add drive-strength and bias handling for R-Car M3-W,
- Add CAN, CAN FD, MSIOF, and HSCIF pin groups for R-Car M3-W,
- Add SDHI voltage switching for R-Car M2-N.
Thierry Reding [Thu, 12 Jan 2017 16:03:34 +0000 (17:03 +0100)]
pinctrl: Initialize pinctrl_dev.node
The struct pinctrl_dev's node field is not properly set up, which means
the .prev and .next fields will be NULL. That's not something that the
linked list code can deal with, so extra care must be taken when using
these fields. An example of this is introduced in commit
3429fb3cda34
("pinctrl: Fix panic when pinctrl devices with hogs are unregistered")
where list_del() is made conditional on the pinctrl device being part
of the pinctrl device list. This is to ensure that list_del() won't
crash upon encountering a NULL pointer in .prev and/or .next.
After initializing the list head there's no need to jump through these
extra hoops and list_del() will work unconditionally. This is because
the initialized list head points to itself and therefore the .prev and
.next fields can be properly dereferenced.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tony Lindgren [Wed, 11 Jan 2017 22:13:34 +0000 (14:13 -0800)]
pinctrl: core: Fix regression caused by delayed work for hogs
Commit
df61b366af26 ("pinctrl: core: Use delayed work for hogs") caused a
regression at least with sh-pfc that is also a GPIO controller as
noted by Geert Uytterhoeven <geert@linux-m68k.org>.
As the original pinctrl_register() has issues calling pin controller
driver functions early before the controller has finished registering,
we can't just revert commit
df61b366af26. That would break the drivers
using GENERIC_PINCTRL_GROUPS or GENERIC_PINMUX_FUNCTIONS.
So let's fix the issue with the following steps as a single patch:
1. Revert the late_init parts of commit
df61b366af26.
The late_init clearly won't work and we have to just give up
on fixing pinctrl_register() for GENERIC_PINCTRL_GROUPS and
GENERIC_PINMUX_FUNCTIONS.
2. Split pinctrl_register() into two parts
By splitting pinctrl_register() into pinctrl_init_controller()
and pinctrl_create_and_start() we have better control over when
it's safe to call pinctrl_create().
3. Introduce a new pinctrl_register_and_init() function
As suggested by Linus Walleij <linus.walleij@linaro.org>, we
can just introduce a new function for the controllers that need
pinctrl_create() called later.
4. Convert the four known problem cases to use new function
Let's convert pinctrl-imx, pinctrl-single, sh-pfc and ti-iodelay
to use the new function to fix the issues. The rest of the drivers
can be converted later. Let's also update Documentation/pinctrl.txt
accordingly because of the known issues with pinctrl_register().
Fixes:
df61b366af26 ("pinctrl: core: Use delayed work for hogs")
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Icenowy Zheng [Tue, 3 Jan 2017 15:16:27 +0000 (23:16 +0800)]
pinctrl: sunxi: add driver for V3s SoC
V3s SoC features only a pin controller (for the lack of CPUs part).
Add a driver for this controller.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dan Carpenter [Sat, 7 Jan 2017 06:32:15 +0000 (09:32 +0300)]
pinctrl/amd: white space cleanups in amd_gpio_dbg_show()
We accidentally deleted two tabs from the first line, but even with that
fixed the conditions were not really kernel style. Put the && at the
end of the line so we can align the condition clauses. Also add spaces
around the "+" operator.
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fabio Estevam [Fri, 6 Jan 2017 00:55:43 +0000 (22:55 -0200)]
pinctrl: imx7d-pinctrl: Fix a typo
Fix a typo in "Peripherals".
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Bjorn Andersson [Thu, 5 Jan 2017 16:07:55 +0000 (08:07 -0800)]
pinctrl: Drop error prints on kzalloc() failure
Upon failing kzalloc() will print an error message in the log, so
there's no need for additional printouts. Also standardizes the "!ptr"
vs "ptr == NULL" while I'm touching those lines.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
David Lechner [Thu, 5 Jan 2017 23:43:41 +0000 (17:43 -0600)]
pinctrl: da850-pupd: Add to module device table
This adds the pintrol-da850-pupd driver to the module device table so that
udev will automatically bind the driver to the device.
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Tue, 10 Jan 2017 20:11:39 +0000 (22:11 +0200)]
pinctrl: baytrail: Convert to use devm_*()
This simplifies error handling and allows us to drop error path handlers
completely.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Mika Westerberg [Tue, 10 Jan 2017 14:31:57 +0000 (17:31 +0300)]
pinctrl: intel: Convert to use devm_gpiochip_add_data()
This simplifies error handling and allows us to drop intel_pinctrl_remove()
completely.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Nishanth Menon [Thu, 5 Jan 2017 18:54:14 +0000 (10:54 -0800)]
pinctrl: Introduce TI IOdelay configuration driver
SoC family such as DRA7 family of processors have, in addition
to the regular muxing of pins (as done by pinctrl-single), a separate
hardware module called IODelay which is also expected to be configured.
The "IODelay" module has it's own register space that is independent
of the control module and the padconf register area.
With recent changes to the pinctrl framework, we can now support
this hardware with a reasonably minimal driver by using #pinctrl-cells,
GENERIC_PINCTRL_GROUPS and GENERIC_PINMUX_FUNCTIONS.
It is advocated strongly in TI's official documentation considering
the existing design of the DRA7 family of processors during mux or
IODelay reconfiguration, there is a potential for a significant glitch
which may cause functional impairment to certain hardware. It is
hence recommended to do as little of muxing as absolutely necessary
without I/O isolation (which can only be done in initial stages of
bootloader).
NOTE: with the system wide I/O isolation scheme present in DRA7 SoC
family, it is not reasonable to do stop all I/O operations for every
such pad configuration scheme. So, we will let it glitch when used in
this mode.
Even with the above limitation, certain functionality such as MMC has
mandatory need for IODelay reconfiguration requirements, depending on
speed of transfer. In these cases, with careful examination of usecase
involved, the expected glitch can be controlled such that it does not
impact functionality.
In short, IODelay module support as a padconf driver being introduced
here is not expected to do SoC wide I/O Isolation and is meant for
a limited subset of IODelay configuration requirements that need to
be dynamic and whose glitchy behavior will not cause functionality
failure for that interface.
IMPORTANT NOTE: we take the approach of keeping LOCK_BITs cleared
to 0x0 at all times, even when configuring Manual IO Timing Modes.
This is done by eliminating the LOCK_BIT=1 setting from Step
of the Manual IO timing Mode configuration procedure. This option
leaves the CFG_* registers unprotected from unintended writes to the
CTRL_CORE_PAD_* registers while Manual IO Timing Modes are configured.
This approach is taken to allow for a generic driver to exist in kernel
world that has to be used carefully in required usecases.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[tony@atomide.com: updated to use generic pinctrl functions, added
binding documentation, updated comments]
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tony Lindgren [Fri, 30 Dec 2016 18:37:31 +0000 (10:37 -0800)]
pinctrl: core: Make dt_free_map optional
If the pin controller driver is using devm_kzalloc, there may not be
anything to do for dt_free_map. Let's make it optional to avoid
unncessary boilerplate code.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Maxime Ripard [Sun, 8 Jan 2017 21:31:17 +0000 (22:31 +0100)]
pinctrl: sunxi: Remove old sun5i pinctrl drivers
Now that we have a common pinctrl driver for all the sun5i SoCs, we can
remove the old, separate drivers.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Maxime Ripard [Sun, 8 Jan 2017 21:31:16 +0000 (22:31 +0100)]
pinctrl: sunxi: Add common sun5i pinctrl driver
The sun5i SoCs (A10s, A13, GR8) are all based on the same die fit in
different packages. Hence, the pins and functions available are just the
based on the same set, each SoC having a different subset.
Introduce a common pinctrl driver that supports multiple variants to allow
to put as much as we can in common.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Maxime Ripard [Sun, 8 Jan 2017 21:31:15 +0000 (22:31 +0100)]
pinctrl: sunxi: Add pinctrl variants
Some SoCs are either supposed to be pin compatible (A10 and A20 for
example), or are just repackaged versions of the same die (A10s, A13, GR8).
In those case, having a full blown pinctrl driver just introduces
duplication in both data size and maintainance effort.
Add a variant option to both pins and functions to be able to limit the
pins and functions described only to a subset of the SoC we support with a
given driver.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jon Hunter [Thu, 5 Jan 2017 15:52:55 +0000 (15:52 +0000)]
pinctrl: Fix panic when pinctrl devices with hogs are unregistered
Commit
df61b366af26 ('pinctrl: core: Use delayed work for hogs')
deferred part of the registration for pinctrl devices if the pinctrl
device has hogs. This introduced a window where if the pinctrl device
with hogs was sucessfully registered, but then unregistered again
(which could be caused by parent device being probe deferred) before
the delayed work has chanced to run, then this will cause a kernel
panic to occur because:
1. The 'pctldev->p' has not yet been initialised and when unregistering
the pinctrl device we only check to see if it is an error value, but
now it could also be NULL.
2. The pinctrl device may not have been added to the 'pinctrldev_list'
list and we don't check to see if it was added before removing.
Fix up the above by checking to see if the 'pctldev->p' pointer is an
error value or NULL before putting the pinctrl device and verifying
that the pinctrl device is present in 'pinctrldev_list' before removing.
Fixes:
df61b366af26 ('pinctrl: core: Use delayed work for hogs')
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Tue, 3 Jan 2017 08:18:58 +0000 (09:18 +0100)]
pinctrl: amd: fix compilation warning
3bfd44306c65 ("pinctrl: amd: Add support for additional GPIO")
created the following warning:
drivers/pinctrl/pinctrl-amd.c: In function 'amd_gpio_dbg_show':
drivers/pinctrl/pinctrl-amd.c:210:3: warning: 'pin_num' may be used uninitialized in this function [-Wmaybe-uninitialized]
for (; i < pin_num; i++) {
^
drivers/pinctrl/pinctrl-amd.c:172:21: warning: 'i' may be used uninitialized in this function [-Wmaybe-uninitialized]
unsigned int bank, i, pin_num;
^
Fix this by adding a guarding default case for illegal
bank numbers.
Cc: S-k Shyam-sundar <Shyam-sundar.S-k@amd.com>
Cc: Nehal Shah <Nehal-bakulchandra.Shah@amd.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Gary Bisson [Mon, 2 Jan 2017 18:20:22 +0000 (19:20 +0100)]
pinctrl: imx: use generic pinmux helpers for managing functions
Now using function_desc structure instead of imx_pmx_func.
Also leveraging generic functions to retrieve functions count/name/groups.
The imx_free_funcs function can be removed since it is now handled by
the core driver during unregister.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Gary Bisson [Mon, 2 Jan 2017 18:20:21 +0000 (19:20 +0100)]
pinctrl: imx: use generic pinctrl helpers for managing groups
Now using group_desc structure instead of imx_pin_group.
Also leveraging generic functions to retrieve groups count/name/pins.
The imx_free_pingroups function can be removed since it is now handled by
the core driver during unregister.
Finally the device tree parsing is moved after the pinctrl driver registration
since this latter initializes the radix trees.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Mon, 2 Jan 2017 08:42:28 +0000 (09:42 +0100)]
pinctrl: qcom: msm8660: rename some SDC1->SDC4
These four pins are for SDC4, not SDC1. They are grouped for
SDC4 later in the file so this must be a typo.
Reviewed-by: Björn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tony Lindgren [Tue, 27 Dec 2016 17:20:03 +0000 (09:20 -0800)]
pinctrl: single: Use generic pinmux helpers for managing functions
We can now drop the driver specific code for managing functions.
Signed-off-by: Tony Lindgren <tony@atomide.com>
[Replaces GENERIC_PINMUX with GENERIC_PINMUX_FUNCTIONS]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tony Lindgren [Tue, 27 Dec 2016 17:20:02 +0000 (09:20 -0800)]
pinctrl: single: Use generic pinctrl helpers for managing groups
We can now drop the driver specific code for managing groups.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tony Lindgren [Tue, 27 Dec 2016 17:20:01 +0000 (09:20 -0800)]
pinctrl: core: Add generic pinctrl functions for managing groups
We can add generic helpers for function handling for cases where the pin
controller driver does not need to use static arrays.
Signed-off-by: Tony Lindgren <tony@atomide.com>
[Renamed the Kconfig item and moved things around]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Fri, 30 Dec 2016 14:04:43 +0000 (15:04 +0100)]
pinctrl: stricten up generic group code
Rename the symbol PINCTRL_GENERIC to PINCTRL_GENERIC_GROUPS since
it all pertains to groups. Replace everywhere.
ifdef out the radix tree and the struct when not using the
generic groups.
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tony Lindgren [Tue, 27 Dec 2016 17:20:00 +0000 (09:20 -0800)]
pinctrl: core: Add generic pinctrl functions for managing groups
We can add generic helpers for pin group handling for cases where the pin
controller driver does not need to use static arrays.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Fri, 30 Dec 2016 13:44:18 +0000 (14:44 +0100)]
pinctrl: add some comments to the hog/late init code
It confused me a bit so it may confuse others. Make it crystal
clear what is going on here for any future readers.
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tony Lindgren [Tue, 27 Dec 2016 17:19:59 +0000 (09:19 -0800)]
pinctrl: core: Use delayed work for hogs
Having the pin control framework call pin controller functions
before it's probe has finished is not nice as the pin controller
device driver does not yet have struct pinctrl_dev handle.
Let's fix this issue by adding deferred work for late init. This is
needed to be able to add pinctrl generic helper functions that expect
to know struct pinctrl_dev handle. Note that we now need to call
create_pinctrl() directly as we don't want to add the pin controller
to the list of controllers until the hogs are claimed. We also need
to pass the pinctrl_dev to the device tree parser functions as they
otherwise won't find the right controller at this point.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Torvalds [Sun, 1 Jan 2017 22:31:53 +0000 (14:31 -0800)]
Linux 4.10-rc2
Linus Torvalds [Sun, 1 Jan 2017 20:27:05 +0000 (12:27 -0800)]
Merge branch 'libnvdimm-fixes' of git://git./linux/kernel/git/nvdimm/nvdimm
Pull DAX updates from Dan Williams:
"The completion of Jan's DAX work for 4.10.
As I mentioned in the libnvdimm-for-4.10 pull request, these are some
final fixes for the DAX dirty-cacheline-tracking invalidation work
that was merged through the -mm, ext4, and xfs trees in -rc1. These
patches were prepared prior to the merge window, but we waited for
4.10-rc1 to have a stable merge base after all the prerequisites were
merged.
Quoting Jan on the overall changes in these patches:
"So I'd like all these 6 patches to go for rc2. The first three
patches fix invalidation of exceptional DAX entries (a bug which
is there for a long time) - without these patches data loss can
occur on power failure even though user called fsync(2). The other
three patches change locking of DAX faults so that ->iomap_begin()
is called in a more relaxed locking context and we are safe to
start a transaction there for ext4"
These have received a build success notification from the kbuild
robot, and pass the latest libnvdimm unit tests. There have not been
any -next releases since -rc1, so they have not appeared there"
* 'libnvdimm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm:
ext4: Simplify DAX fault path
dax: Call ->iomap_begin without entry lock during dax fault
dax: Finish fault completely when loading holes
dax: Avoid page invalidation races and unnecessary radix tree traversals
mm: Invalidate DAX radix tree entries only if appropriate
ext2: Return BH_New buffers for zeroed blocks
Linus Torvalds [Fri, 30 Dec 2016 17:32:26 +0000 (09:32 -0800)]
Merge tag 'docs-4.10-rc1-fix' of git://git.lwn.net/linux
Pull documentation fixes from Jonathan Corbet:
"Two small fixes:
- A merge error on my part broke the DocBook build. I've
requisitioned one of tglx's frozen sharks for appropriate
disciplinary action and resolved to be more careful about testing
the DocBook stuff as long as it's still around.
- Fix an error in unaligned-memory-access.txt"
* tag 'docs-4.10-rc1-fix' of git://git.lwn.net/linux:
Documentation/unaligned-memory-access.txt: fix incorrect comparison operator
docs: Fix build failure
Linus Torvalds [Fri, 30 Dec 2016 17:29:50 +0000 (09:29 -0800)]
Merge branch 'linus' of git://git./linux/kernel/git/herbert/crypto-2.6
Pull crypto fix from Herbert Xu:
"This fixes a boot failure on some platforms when crypto self test is
enabled along with the new acomp interface"
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: testmgr - Use heap buffer for acomp test input
Gary Bisson [Fri, 2 Dec 2016 16:35:19 +0000 (17:35 +0100)]
pinctrl: imx: use radix trees for groups and functions
This change is inspired from the pinctrl-single architecture.
The problem with current implementation is that it isn't possible
to add/remove functions and/or groups dynamically. The radix tree
offers an easy way to do so. The intent is to offer a follow-up
patch later that will enable the use of pinctrl nodes in dt-overlays.
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Gary Bisson [Fri, 2 Dec 2016 16:35:18 +0000 (17:35 +0100)]
pinctrl: imx: remove const qualifier of imx_pinctrl_soc_info
Otherwise can't dynamically update fields such as ngroups which can
change over time (with a dt-overlay for instance).
Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Colin Ian King [Fri, 23 Dec 2016 00:47:14 +0000 (00:47 +0000)]
pinctrl: single: fix spelling mistakes on "Ivalid"
Trivial fixe to spelling mistake "Ivalid" to "Invalid" in
dev_err error message.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Vladimir Zapolskiy [Sun, 25 Dec 2016 00:59:28 +0000 (02:59 +0200)]
pinctrl: simplify check for pin request conflicts
This is a non-functional change, which deletes code duplication in two
of four if-if branches by reordering the checks. Functional identity
of the code change can be shown by running through the whole truth table
of boolean arguments.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
John Crispin [Tue, 20 Dec 2016 18:55:41 +0000 (19:55 +0100)]
pinctrl: update my email address
This patch updates my email address as I no longer have access to the old
one.
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Christophe JAILLET [Tue, 20 Dec 2016 05:41:22 +0000 (06:41 +0100)]
pinctrl: sirf: atlas7: Improve code layout
Add some tab in order to improve indentation.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Christophe JAILLET [Tue, 20 Dec 2016 05:40:43 +0000 (06:40 +0100)]
pinctrl: sirf: atlas7: Add missing 'of_node_put()'
Reference to 'sys2pci_np' should be dropped in all cases here, not only in
error handling path.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Gabriel Fernandez [Wed, 14 Dec 2016 14:24:16 +0000 (15:24 +0100)]
pinctrl: stm32: activate strict mux mode
This activates strict mode muxing for the STM32 pin controllers,
as these do not allow GPIO and functions to use the same pin
simultaneously.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andreas Klinger [Tue, 13 Dec 2016 23:08:27 +0000 (00:08 +0100)]
pinctrl: fix DT bindings for marvell,kirkwood-pinctrl
On Marvell mv88f6180 mpp pins range from 0 to 19 as well as from 35 to 44.
This is already fixed in commit:
9573e7923007961799beff38bc5c5a7635634eef
This is the documentation change for above commit.
Signed-off-by: Andreas Klinger <ak@it-klinger.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Olof Johansson [Thu, 29 Dec 2016 22:16:07 +0000 (14:16 -0800)]
mm/filemap: fix parameters to test_bit()
mm/filemap.c: In function 'clear_bit_unlock_is_negative_byte':
mm/filemap.c:933:9: error: too few arguments to function 'test_bit'
return test_bit(PG_waiters);
^~~~~~~~
Fixes:
b91e1302ad9b ('mm: optimize PageWaiters bit use for unlock_page()')
Signed-off-by: Olof Johansson <olof@lixom.net>
Brown-paper-bag-by: Linus Torvalds <dummy@duh.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Tue, 27 Dec 2016 19:40:38 +0000 (11:40 -0800)]
mm: optimize PageWaiters bit use for unlock_page()
In commit
62906027091f ("mm: add PageWaiters indicating tasks are
waiting for a page bit") Nick Piggin made our page locking no longer
unconditionally touch the hashed page waitqueue, which not only helps
performance in general, but is particularly helpful on NUMA machines
where the hashed wait queues can bounce around a lot.
However, the "clear lock bit atomically and then test the waiters bit"
sequence turns out to be much more expensive than it needs to be,
because you get a nasty stall when trying to access the same word that
just got updated atomically.
On architectures where locking is done with LL/SC, this would be trivial
to fix with a new primitive that clears one bit and tests another
atomically, but that ends up not working on x86, where the only atomic
operations that return the result end up being cmpxchg and xadd. The
atomic bit operations return the old value of the same bit we changed,
not the value of an unrelated bit.
On x86, we could put the lock bit in the high bit of the byte, and use
"xadd" with that bit (where the overflow ends up not touching other
bits), and look at the other bits of the result. However, an even
simpler model is to just use a regular atomic "and" to clear the lock
bit, and then the sign bit in eflags will indicate the resulting state
of the unrelated bit #7.
So by moving the PageWaiters bit up to bit #7, we can atomically clear
the lock bit and test the waiters bit on x86 too. And architectures
with LL/SC (which is all the usual RISC suspects), the particular bit
doesn't matter, so they are fine with this approach too.
This avoids the extra access to the same atomic word, and thus avoids
the costly stall at page unlock time.
The only downside is that the interface ends up being a bit odd and
specialized: clear a bit in a byte, and test the sign bit. Nick doesn't
love the resulting name of the new primitive, but I'd rather make the
name be descriptive and very clear about the limitation imposed by
trying to work across all relevant architectures than make it be some
generic thing that doesn't make the odd semantics explicit.
So this introduces the new architecture primitive
clear_bit_unlock_is_negative_byte();
and adds the trivial implementation for x86. We have a generic
non-optimized fallback (that just does a "clear_bit()"+"test_bit(7)"
combination) which can be overridden by any architecture that can do
better. According to Nick, Power has the same hickup x86 has, for
example, but some other architectures may not even care.
All these optimizations mean that my page locking stress-test (which is
just executing a lot of small short-lived shell scripts: "make test" in
the git source tree) no longer makes our page locking look horribly bad.
Before all these optimizations, just the unlock_page() costs were just
over 3% of all CPU overhead on "make test". After this, it's down to
0.66%, so just a quarter of the cost it used to be.
(The difference on NUMA is bigger, but there this micro-optimization is
likely less noticeable, since the big issue on NUMA was not the accesses
to 'struct page', but the waitqueue accesses that were already removed
by Nick's earlier commit).
Acked-by: Nick Piggin <npiggin@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Bob Peterson <rpeterso@redhat.com>
Cc: Steven Whitehouse <swhiteho@redhat.com>
Cc: Andrew Lutomirski <luto@kernel.org>
Cc: Andreas Gruenbacher <agruenba@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Mel Gorman <mgorman@techsingularity.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Shah, Nehal-bakulchandra [Tue, 6 Dec 2016 06:47:48 +0000 (12:17 +0530)]
pinctrl: amd: Add support for additional GPIO
This patch adds support for new Bank and adds IRQCHIP_SKIP_SET_WAKE flag.
Reviewed-by: S-k, Shyam-sundar <Shyam-sundar.S-k@amd.com>
Signed-off-by: Nehal Shah <Nehal-bakulchandra.Shah@amd.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Torvalds [Wed, 28 Dec 2016 01:51:36 +0000 (17:51 -0800)]
Merge branch 'linus' of git://git./linux/kernel/git/herbert/crypto-2.6
Pull crypto fix from Herbert Xu:
"This fixes a hash corruption bug in the marvell driver"
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: marvell - Copy IVDIG before launching partial DMA ahash requests
Andrew Jeffery [Tue, 20 Dec 2016 07:35:51 +0000 (18:05 +1030)]
pinctrl: aspeed: Fix kerneldoc return descriptions
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andrew Jeffery [Tue, 20 Dec 2016 07:35:50 +0000 (18:05 +1030)]
pinctrl: aspeed-g5: Add mux configuration for all pins
The patch introducing the g5 pinctrl driver implemented a smattering of
pins to flesh out the implementation of the core and provide bare-bones
support for some OpenPOWER platforms and the AST2500 evaluation board.
Now, update the bindings document to reflect the complete functionality
and implement the necessary pin configuration tables in the driver.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Torvalds [Wed, 28 Dec 2016 00:04:37 +0000 (16:04 -0800)]
Merge git://git./linux/kernel/git/davem/net
Pull networking fixes from David Miller:
1) Various ipvlan fixes from Eric Dumazet and Mahesh Bandewar.
The most important is to not assume the packet is RX just because
the destination address matches that of the device. Such an
assumption causes problems when an interface is put into loopback
mode.
2) If we retry when creating a new tc entry (because we dropped the
RTNL mutex in order to load a module, for example) we end up with
-EAGAIN and then loop trying to replay the request. But we didn't
reset some state when looping back to the top like this, and if
another thread meanwhile inserted the same tc entry we were trying
to, we re-link it creating an enless loop in the tc chain. Fix from
Daniel Borkmann.
3) There are two different WRITE bits in the MDIO address register for
the stmmac chip, depending upon the chip variant. Due to a bug we
could set them both, fix from Hock Leong Kweh.
4) Fix mlx4 bug in XDP_TX handling, from Tariq Toukan.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net:
net: stmmac: fix incorrect bit set in gmac4 mdio addr register
r8169: add support for RTL8168 series add-on card.
net: xdp: remove unused bfp_warn_invalid_xdp_buffer()
openvswitch: upcall: Fix vlan handling.
ipv4: Namespaceify tcp_tw_reuse knob
net: korina: Fix NAPI versus resources freeing
net, sched: fix soft lockup in tc_classify
net/mlx4_en: Fix user prio field in XDP forward
tipc: don't send FIN message from connectionless socket
ipvlan: fix multicast processing
ipvlan: fix various issues in ipvlan_process_multicast()
Andrew Jeffery [Tue, 20 Dec 2016 07:35:49 +0000 (18:05 +1030)]
pinctrl: aspeed-g4: Add mux configuration for all pins
The patch introducing the g4 pinctrl driver implemented a smattering of
pins to flesh out the implementation of the core and provide bare-bones
support for some OpenPOWER platforms. Now, update the bindings document
to reflect the complete functionality and implement the necessary pin
configuration tables in the driver.
Cc: Timothy Pearson <tpearson@raptorengineering.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andrew Jeffery [Tue, 20 Dec 2016 07:35:48 +0000 (18:05 +1030)]
pinctrl: aspeed: Read and write bits in LPC and GFX controllers
The System Control Unit IP block in the Aspeed SoCs is typically where
the pinmux configuration is found, but not always. A number of pins
depend on state in one of LPC Host Control (LHC) or SoC Display
Controller (GFX) IP blocks, so the Aspeed pinmux drivers should have the
means to adjust these as necessary.
We use syscon to cast a regmap over the GFX and LPC blocks, which is
used as an arbitration layer between the relevant driver and the pinctrl
subsystem. The regmaps are then exposed to the SoC-specific pinctrl
drivers by phandles in the devicetree, and are selected during a mux
request by querying a new 'ip' member in struct aspeed_sig_desc.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andrew Jeffery [Tue, 20 Dec 2016 07:35:47 +0000 (18:05 +1030)]
pinctrl: aspeed: dt: Fix compatibles for the System Control Unit
Reference the SoC-specific compatible string in the examples as
required.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cihangir Akturk [Sat, 17 Dec 2016 17:42:17 +0000 (19:42 +0200)]
Documentation/unaligned-memory-access.txt: fix incorrect comparison operator
In the actual implementation ether_addr_equal function tests for equality to 0
when returning. It seems in commit 0d74c4 it is somehow overlooked to change
this operator to reflect the actual function.
Signed-off-by: Cihangir Akturk <cakturk@gmail.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
John Brooks [Fri, 23 Dec 2016 00:53:10 +0000 (00:53 +0000)]
docs: Fix build failure
The 80211.tmpl DocBook file was removed in commit
819bf593767c ("docs-rst:
sphinxify 802.11 documentation"), but the 80211.xml target was re-added to
the Makefile by commit
7ddedebb03b7 ("ALSA: doc: ReSTize
writing-an-alsa-driver document"), leading to a failure when building the
documentation:
*** No rule to make target 'Documentation/DocBook/80211.xml', needed by
'Documentation/DocBook/80211.aux.xml'.
cc: stable@vger.kernel.org
Signed-off-by: John Brooks <john@fastquake.com>
Mea-culpa-by: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Jonathan Corbet [Tue, 27 Dec 2016 19:53:44 +0000 (12:53 -0700)]
Merge tag 'v4.10-rc1' into docs-next
Linux 4.10-rc1
Kweh, Hock Leong [Tue, 27 Dec 2016 20:07:41 +0000 (04:07 +0800)]
net: stmmac: fix incorrect bit set in gmac4 mdio addr register
Fixing the gmac4 mdio write access to use MII_GMAC4_WRITE only instead of
OR together with MII_WRITE.
Signed-off-by: Kweh, Hock Leong <hock.leong.kweh@intel.com>
Acked-By: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Chun-Hao Lin [Tue, 27 Dec 2016 08:29:43 +0000 (16:29 +0800)]
r8169: add support for RTL8168 series add-on card.
This chip is the same as RTL8168, but its device id is 0x8161.
Signed-off-by: Chun-Hao Lin <hau@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Jason Wang [Tue, 27 Dec 2016 02:49:54 +0000 (10:49 +0800)]
net: xdp: remove unused bfp_warn_invalid_xdp_buffer()
After commit
73b62bd085f4737679ea9afc7867fa5f99ba7d1b ("virtio-net:
remove the warning before XDP linearizing"), there's no users for
bpf_warn_invalid_xdp_buffer(), so remove it. This is a revert for
commit
f23bc46c30ca5ef58b8549434899fcbac41b2cfc.
Cc: Daniel Borkmann <daniel@iogearbox.net>
Cc: John Fastabend <john.r.fastabend@intel.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Acked-by: Daniel Borkmann <daniel@iogearbox.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
pravin shelar [Mon, 26 Dec 2016 16:31:27 +0000 (08:31 -0800)]
openvswitch: upcall: Fix vlan handling.
Networking stack accelerate vlan tag handling by
keeping topmost vlan header in skb. This works as
long as packet remains in OVS datapath. But during
OVS upcall vlan header is pushed on to the packet.
When such packet is sent back to OVS datapath, core
networking stack might not handle it correctly. Following
patch avoids this issue by accelerating the vlan tag
during flow key extract. This simplifies datapath by
bringing uniform packet processing for packets from
all code paths.
Fixes:
5108bbaddc ("openvswitch: add processing of L3 packets").
CC: Jarno Rajahalme <jarno@ovn.org>
CC: Jiri Benc <jbenc@redhat.com>
Signed-off-by: Pravin B Shelar <pshelar@ovn.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Haishuang Yan [Sun, 25 Dec 2016 06:33:16 +0000 (14:33 +0800)]
ipv4: Namespaceify tcp_tw_reuse knob
Different namespaces might have different requirements to reuse
TIME-WAIT sockets for new connections. This might be required in
cases where different namespace applications are in place which
require TIME_WAIT socket connections to be reduced independently
of the host.
Signed-off-by: Haishuang Yan <yanhaishuang@cmss.chinamobile.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Ulrich Hecht [Wed, 7 Dec 2016 16:44:46 +0000 (17:44 +0100)]
pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
[geert: Fix hscif2_clk_[bc]_mux[] and hscif4_ctrl_mux[]]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Simon Horman [Thu, 1 Dec 2016 13:21:07 +0000 (14:21 +0100)]
pinctrl: sh-pfc: r8a7793: Implement voltage switching for SDHI
Voltage switching is the same as on the r8a7791.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>