platform/upstream/mesa.git
22 months agorusticl: advertize CL 1.1 and CL 1.2 extensions
Karol Herbst [Thu, 17 Mar 2022 22:48:47 +0000 (23:48 +0100)]
rusticl: advertize CL 1.1 and CL 1.2 extensions

That leads us stright to CL 3.0

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/kernel: add missing preprocessor definitions
Karol Herbst [Thu, 17 Mar 2022 16:55:34 +0000 (17:55 +0100)]
rusticl/kernel: add missing preprocessor definitions

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/kernel: add support for offsets
Karol Herbst [Fri, 29 Apr 2022 12:02:57 +0000 (14:02 +0200)]
rusticl/kernel: add support for offsets

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/kernel: run driver requested lowering passes
Karol Herbst [Thu, 17 Mar 2022 19:18:16 +0000 (20:18 +0100)]
rusticl/kernel: run driver requested lowering passes

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/mem: finish clEnqueueMigrateMemObjects
Karol Herbst [Thu, 17 Mar 2022 18:29:01 +0000 (19:29 +0100)]
rusticl/mem: finish clEnqueueMigrateMemObjects

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/kernel: implement CL_KERNEL_COMPILE_WORK_GROUP_SIZE
Karol Herbst [Thu, 17 Mar 2022 16:38:41 +0000 (17:38 +0100)]
rusticl/kernel: implement CL_KERNEL_COMPILE_WORK_GROUP_SIZE

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/event: add fake impl of clGetEventProfilingInfo
Karol Herbst [Thu, 17 Mar 2022 15:08:39 +0000 (16:08 +0100)]
rusticl/event: add fake impl of clGetEventProfilingInfo

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/program: implement clCreateProgramWithBinary
Karol Herbst [Thu, 17 Mar 2022 10:44:22 +0000 (11:44 +0100)]
rusticl/program: implement clCreateProgramWithBinary

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/api: add param to query which contains application provided values
Karol Herbst [Thu, 17 Mar 2022 11:18:39 +0000 (12:18 +0100)]
rusticl/api: add param to query which contains application provided values

this is required for e.g. CL_PROGRAM_BINARIES

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl: implement clUnloadPlatformCompiler
Karol Herbst [Wed, 16 Mar 2022 23:06:16 +0000 (00:06 +0100)]
rusticl: implement clUnloadPlatformCompiler

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/program: support compiling libraries
Karol Herbst [Wed, 16 Mar 2022 21:37:42 +0000 (22:37 +0100)]
rusticl/program: support compiling libraries

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/mem: add clEnqueueMigrateMemObjects stub
Karol Herbst [Sat, 30 Apr 2022 13:31:36 +0000 (15:31 +0200)]
rusticl/mem: add clEnqueueMigrateMemObjects stub

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/event: implement marker and barrier
Karol Herbst [Sat, 30 Apr 2022 20:34:10 +0000 (22:34 +0200)]
rusticl/event: implement marker and barrier

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/mem: implement clFillBuffer
Karol Herbst [Sat, 30 Apr 2022 20:34:02 +0000 (22:34 +0200)]
rusticl/mem: implement clFillBuffer

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/mem: implement clCopyBuffer
Karol Herbst [Wed, 16 Mar 2022 16:26:28 +0000 (17:26 +0100)]
rusticl/mem: implement clCopyBuffer

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/queue: fix clReleaseCommandQueue
Karol Herbst [Wed, 16 Mar 2022 15:19:48 +0000 (16:19 +0100)]
rusticl/queue: fix clReleaseCommandQueue

we have to flush the queue on every call

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/program: undefine __IMAGE_SUPPORT__ if images are unsupported
Karol Herbst [Wed, 16 Mar 2022 14:39:14 +0000 (15:39 +0100)]
rusticl/program: undefine __IMAGE_SUPPORT__ if images are unsupported

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/kernel: implement clEnqueueTask
Karol Herbst [Sat, 30 Apr 2022 20:33:48 +0000 (22:33 +0200)]
rusticl/kernel: implement clEnqueueTask

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/kernel: implement clCreateKernelsInProgram
Karol Herbst [Wed, 16 Mar 2022 14:17:05 +0000 (15:17 +0100)]
rusticl/kernel: implement clCreateKernelsInProgram

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/event: proper eventing support
Karol Herbst [Wed, 16 Mar 2022 10:14:53 +0000 (11:14 +0100)]
rusticl/event: proper eventing support

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/mesa: add fencing support
Karol Herbst [Wed, 16 Mar 2022 10:02:29 +0000 (11:02 +0100)]
rusticl/mesa: add fencing support

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl: hack for CL 3.0
Karol Herbst [Mon, 14 Mar 2022 19:18:37 +0000 (20:18 +0100)]
rusticl: hack for CL 3.0

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/event: wrong but non crashing impl of clWaitForEvents
Karol Herbst [Sat, 12 Mar 2022 21:23:23 +0000 (22:23 +0100)]
rusticl/event: wrong but non crashing impl of clWaitForEvents

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/mem: use helper context for COPY_HOST_PTR buffers
Karol Herbst [Mon, 14 Mar 2022 18:17:31 +0000 (19:17 +0100)]
rusticl/mem: use helper context for COPY_HOST_PTR buffers

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/kernel: clGetKernelWorkGroupInfo allows a NULL device
Karol Herbst [Sun, 24 Apr 2022 13:24:49 +0000 (15:24 +0200)]
rusticl/kernel: clGetKernelWorkGroupInfo allows a NULL device

In which case we have to get the only device associated with the kernel.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/kernel: more clGetKernelWorkGroupInfo props
Karol Herbst [Wed, 16 Mar 2022 14:52:40 +0000 (15:52 +0100)]
rusticl/kernel: more clGetKernelWorkGroupInfo props

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl: translate spirv to nir and first steps to kernel arg handling
Karol Herbst [Thu, 28 Apr 2022 20:07:49 +0000 (22:07 +0200)]
rusticl: translate spirv to nir and first steps to kernel arg handling

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl: nir bindings
Karol Herbst [Thu, 10 Mar 2022 22:42:44 +0000 (23:42 +0100)]
rusticl: nir bindings

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/kernel: basic implementation
Karol Herbst [Thu, 10 Mar 2022 18:32:35 +0000 (19:32 +0100)]
rusticl/kernel: basic implementation

still not able to run kernels, but most of the boilerplate code is there now

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/mem: support ops on subbuffers
Karol Herbst [Sat, 12 Mar 2022 20:31:09 +0000 (21:31 +0100)]
rusticl/mem: support ops on subbuffers

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl: implement clEnqueueReadBuffer
Karol Herbst [Sat, 12 Mar 2022 19:02:04 +0000 (20:02 +0100)]
rusticl: implement clEnqueueReadBuffer

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl: implement clFinish and clFlush
Karol Herbst [Sat, 12 Mar 2022 17:59:31 +0000 (18:59 +0100)]
rusticl: implement clFinish and clFlush

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl/util: add static_assert macro
Karol Herbst [Tue, 15 Mar 2022 20:30:53 +0000 (21:30 +0100)]
rusticl/util: add static_assert macro

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl: finish implementing clBuildProgram
Karol Herbst [Wed, 9 Mar 2022 17:02:03 +0000 (18:02 +0100)]
rusticl: finish implementing clBuildProgram

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agorusticl: added
Karol Herbst [Sun, 8 Nov 2020 19:28:21 +0000 (20:28 +0100)]
rusticl: added

Initial code drop for Rusticl :)

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15439>

22 months agoci/lava: collapse printing env
David Heidelberg [Sat, 10 Sep 2022 11:43:08 +0000 (13:43 +0200)]
ci/lava: collapse printing env

Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18529>

22 months agoci/test: collapse printing env
David Heidelberg [Sat, 10 Sep 2022 11:38:37 +0000 (13:38 +0200)]
ci/test: collapse printing env

Acked-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18529>

22 months agoci/traces: do not keep a cache, which will be wiped a few steps later
David Heidelberg [Sat, 10 Sep 2022 15:27:04 +0000 (17:27 +0200)]
ci/traces: do not keep a cache, which will be wiped a few steps later

The desired state is to revert this patch at that moment,
when we'll be able to verify traces by checksums,
but for now, let's disable caching.

10s for restoring cache: https://gitlab.freedesktop.org/mesa/mesa/-/jobs/28137099#L17
?s for removing cache: https://gitlab.freedesktop.org/mesa/mesa/-/jobs/28137099#L813
1s for saving cache: https://gitlab.freedesktop.org/mesa/mesa/-/jobs/28137099#L1047

Reviewed-by: Emma Anholt <emma@anholt.net>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18531>

22 months agospirv: avoid allocating memory twice
Thomas H.P. Andersen [Tue, 6 Sep 2022 21:25:43 +0000 (23:25 +0200)]
spirv: avoid allocating memory twice

ptr_type was allocated twice. This drops the second allocation.

It has been like this since the introduction of the code in
b778e7bd6c1d82ce739d7e278de00ee600532cd5

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18450>

22 months agoci: Add support for Jetson TK1.
Emma Anholt [Tue, 17 May 2022 14:05:36 +0000 (07:05 -0700)]
ci: Add support for Jetson TK1.

This is a farm of 5 (6, but one fails) TK1 boards for nouveau testing,
hosted and maintained by me.  Currently it runs GLES dEQP.

I've been using ./.gitlab-ci/bin/ci_run_n_monitor.py --stress --target
gk20a to test it and am pretty confident of the skips/flakes list.  Last
night it ran 318 jobs without fail, and prior to that there were two sets
of runs in the 100-200 range where only the one failing runner failed any
jobs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18497>

22 months agozink: implement async nir creation
Mike Blumenkrantz [Mon, 15 Aug 2022 16:23:09 +0000 (12:23 -0400)]
zink: implement async nir creation

this just punts to the compile threads directly

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18198>

22 months agomesa/st: add MESA_COMPUTE_PBO env var
Mike Blumenkrantz [Thu, 5 Aug 2021 19:22:06 +0000 (15:22 -0400)]
mesa/st: add MESA_COMPUTE_PBO env var

this adds a variable which, when set, overrides the return of the
pipe_screen::is_compute_copy_faster hook to force using compute shader
downloads even on drivers that don't export the cap/hook, enabling easier
testing

it also adds MESA_COMPUTE_PBO=spec to force always using specialized pbo variants

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18198>

22 months agomesa/st: add specialized pbo download shaders
Mike Blumenkrantz [Wed, 17 Aug 2022 14:04:43 +0000 (10:04 -0400)]
mesa/st: add specialized pbo download shaders

the goal of the pbo ubershaders was to have a very small number of
shaders that could handle lots of different readback operations

this is great for cases where an app is doing lots of different types
of readback, but it's not as optimal for apps which do only 1-2 types
of readback over and over

to handle this, track the usage for every readback which reaches compute pbo
and after the same readback is used N times, inline the constant data and
create a specialized version of the shader which will be more optimal

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18198>

22 months agost_pbo/compute: use new shader interface to perform async shader creation
Mike Blumenkrantz [Fri, 12 Aug 2022 18:32:52 +0000 (14:32 -0400)]
st_pbo/compute: use new shader interface to perform async shader creation

this enables compatible drivers to initiate threaded creation of huge
compute shaders fully in a thread while falling back to software in
order to avoid blocking for several seconds, as slower progress is better
than no progress at all--especially in cases where the huge pbo shader
may only be used a single time

the mechanics are straightforward for thread-enabled drivers:
* check hash table for existing shader data
* if no shader exists, perform creation of nir shader fully in driver thread
  and return immediately, enabling software fallback without blocking
* once fence for nir shader is signalled, pass the nir back to the driver
  thread again to run common nir passes and execute normal shader creation
* continue to use software fallback until the shader is fully ready

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18198>

22 months agogallium: add pipe_screen::driver_thread_add_job
Mike Blumenkrantz [Fri, 12 Aug 2022 18:30:58 +0000 (14:30 -0400)]
gallium: add pipe_screen::driver_thread_add_job

this allows a frontend to punt creation of a nir shader down to the
driver's compilation thread, which is useful in the event that the
shader being created is so big that it will cause immediate blocking
from running common nir passes

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18198>

22 months agomesa/st: move compute pbo shutdown to compute pbo file
Mike Blumenkrantz [Fri, 12 Aug 2022 16:25:15 +0000 (12:25 -0400)]
mesa/st: move compute pbo shutdown to compute pbo file

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18198>

22 months agost_pbo/compute: use split shader finish funcs
Mike Blumenkrantz [Fri, 12 Aug 2022 16:21:49 +0000 (12:21 -0400)]
st_pbo/compute: use split shader finish funcs

no functional changes

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18198>

22 months agomesa/st: split out builtin shader finish
Mike Blumenkrantz [Fri, 12 Aug 2022 16:21:08 +0000 (12:21 -0400)]
mesa/st: split out builtin shader finish

it's useful to be able to run the nir passes separately

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18198>

22 months agovirgl: Report CONSTANT_BUFFER_SIZE according to GL_MAX_UNIFORM_BLOCK_SIZE
Gert Wollny [Fri, 9 Sep 2022 07:22:18 +0000 (09:22 +0200)]
virgl: Report CONSTANT_BUFFER_SIZE according to GL_MAX_UNIFORM_BLOCK_SIZE

GL_MAX_FRAGMENT_UNIFORM_COMPONENTS may not report a size that
is useful to calculate the supported UBO size. Use the value
GL_MAX_UNIFORM_BLOCK_SIZE instead when the host supports this.

Related: https://gitlab.freedesktop.org/virgl/virglrenderer/-/issues/286
Fixes: 5b683ba19ac77d6c7dfd8de478678d0b90ba764f
  virgl: Only progagate the uniform numbers if the numbers are actually right

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18512>

22 months agor600: set nir option lower_cs_local_index_to_id
Gert Wollny [Fri, 9 Sep 2022 12:55:59 +0000 (14:55 +0200)]
r600: set nir option lower_cs_local_index_to_id

Fixes:  7662a5e9d34515bd44a97b3726490f31490b57c6
  mesa: Remove PIPE_CAP_CS_DERIVED_SYSTEM_VALUES_SUPPORTED/lower_cs_derived.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18518>

22 months agovirgl: Set use_staging in resource_from_handle
Isaac Bosompem [Wed, 7 Sep 2022 22:32:51 +0000 (18:32 -0400)]
virgl: Set use_staging in resource_from_handle

This flag controls virgl's behavior when buffers
are accessed on the guest through Mesa's GBM interface.

As such, this flag needs to be consistent in both the
resource creation and fd import case. Previously, the
fd import resource's flag value would be inconsistent
with the original resource's value.

This patch fixes this by inferring the value of this flag
based on the resource's size.

Signed-Off By: Isaac Bosompem <mrisaacb@google.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18477>

22 months agodocs/envvars: Document Asahi variables
Alyssa Rosenzweig [Mon, 5 Sep 2022 16:20:56 +0000 (12:20 -0400)]
docs/envvars: Document Asahi variables

There aren't too many.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18508>

22 months agozink: add a ci skip for anv
Mike Blumenkrantz [Fri, 9 Sep 2022 18:26:45 +0000 (14:26 -0400)]
zink: add a ci skip for anv

taking too long

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18523>

22 months agolima: Ensure jobs initialized before calling lima_job_fini()
Roman Stratiienko [Sun, 4 Sep 2022 10:15:42 +0000 (13:15 +0300)]
lima: Ensure jobs initialized before calling lima_job_fini()

To avoid crash during cleanup if lima_context_create fails.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7196
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18407>

22 months agointel/compiler: Add helper for barrier message payload setup for gfx >= 125
Caio Oliveira [Thu, 1 Sep 2022 08:01:12 +0000 (01:01 -0700)]
intel/compiler: Add helper for barrier message payload setup for gfx >= 125

CS-like and TCS control barriers converged in gfx >= 125, so use a
common helper for the message payload setup.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18362>

22 months agointel/compiler: Create fs_visitor::emit_tcs_barrier()
Caio Oliveira [Thu, 1 Sep 2022 07:58:52 +0000 (00:58 -0700)]
intel/compiler: Create fs_visitor::emit_tcs_barrier()

Allow us to implement this in brw_fs_visitor.cpp, which then will
let us deduplicate code between the CS-like barrier and the TCS
barrier in a later patch.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18362>

22 months agonv50/ir: handle U8/U16 integers converting to U64
Danilo Krummrich [Wed, 17 Aug 2022 12:50:50 +0000 (14:50 +0200)]
nv50/ir: handle U8/U16 integers converting to U64

We can't directly convert from unsigned integers smaller than 64 bit to
unsigned 64 bit integers. Hence, converting from 32 bit to 64 bit is
handled by just merging with 0. To support U8/U16 integers handle them
just the same way.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agonv50/ir: handle S8/S16 integers converting to S64
Danilo Krummrich [Wed, 17 Aug 2022 12:37:57 +0000 (14:37 +0200)]
nv50/ir: handle S8/S16 integers converting to S64

We can't convert directly from signed integers smaller 64 bit to signed
64 bit integers. For 32 bit integers this is handled with SHR and MERGE.
In order to also support 8/16 bit singed integers convert them to 32 bit
first.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agonv50/ir: split and cvt 64bit integers for {i,u}2{i,u}{8,16}
Danilo Krummrich [Tue, 16 Aug 2022 15:30:50 +0000 (17:30 +0200)]
nv50/ir: split and cvt 64bit integers for {i,u}2{i,u}{8,16}

We can't convert from a 64 bit integer to any integer smaller than
64 bit directly, hence split the value first and then cvt / mov to the
target type.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agonv50/ir: add intermediate conversion for f2{i,u}{8,16}
Danilo Krummrich [Tue, 16 Aug 2022 00:03:02 +0000 (02:03 +0200)]
nv50/ir: add intermediate conversion for f2{i,u}{8,16}

Directly converting from a float to an 8 bit integer and from a 64 bit
float to an integer smaller than 32 bit is not supported, therefore add
an intermediate conversion to an 32 bit integer.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agonv50/ir/nir: always round towards zero for f2i/f2u
Danilo Krummrich [Fri, 12 Aug 2022 14:54:49 +0000 (16:54 +0200)]
nv50/ir/nir: always round towards zero for f2i/f2u

Conversions to integers must be rounded towards zero, hence, actually
do this for all integers including 8/16 bit sources.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agonv50/ir/nir: convert 8/16 bit src to 32 bit for {i,u}2f64
Danilo Krummrich [Thu, 8 Sep 2022 00:25:10 +0000 (02:25 +0200)]
nv50/ir/nir: convert 8/16 bit src to 32 bit for {i,u}2f64

Converting signed and unsigned integers from 8/16 bit sources to a 64 bit
floating point destination (i2f64 / u2f64) isn't possible, hence convert
the source to 32 bit first.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agonv50/ir: add isUnsignedIntType() and isIntType() helpers
Danilo Krummrich [Tue, 16 Aug 2022 13:55:05 +0000 (15:55 +0200)]
nv50/ir: add isUnsignedIntType() and isIntType() helpers

Add helper functions to check whether a DataType is an unsigned integer
type and whether a DataType is either an unsigned or signed integer
type.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agonv50/ir/nir: avoid 8/16 bit dest regs for OP_MOV
Danilo Krummrich [Mon, 8 Aug 2022 09:55:53 +0000 (11:55 +0200)]
nv50/ir/nir: avoid 8/16 bit dest regs for OP_MOV

Instructions like

  mov u16 %r78s 0x00ff (0)

are dropped, since they're not supported by the HW, hence avoid using
8/16 bit destination registers for OP_MOV and use the full width of the
register instead.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agonv50/ir/nir: convert to 32 bit for all OP_SET opcodes
Danilo Krummrich [Mon, 1 Aug 2022 12:42:27 +0000 (14:42 +0200)]
nv50/ir/nir: convert to 32 bit for all OP_SET opcodes

The 'set' instruction does distinguish between signed and unsigned, but
always treats values as 32 bit. For singed values < 0 with a bit width
smaller than 32 bit this falsely results in treating it as a positive
value.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agonv50/ir/nir: add conversion ops for bit width < 32
Danilo Krummrich [Mon, 1 Aug 2022 12:39:12 +0000 (14:39 +0200)]
nv50/ir/nir: add conversion ops for bit width < 32

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>

22 months agogallium: Add PIPE_CAP_QUERY_TIMESTAMP_BITS
Tomeu Vizoso [Wed, 12 May 2021 14:07:37 +0000 (16:07 +0200)]
gallium: Add PIPE_CAP_QUERY_TIMESTAMP_BITS

For those drivers that don't make full use of the 64 bits in
pipe_query_result.u64.

Applications will make use of it via GL_QUERY_COUNTER_BITS to handle
when the value rolls over.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10770>

22 months agov3dv: implement VK_EXT_memory_budget
Iago Toral Quiroga [Thu, 8 Sep 2022 11:04:46 +0000 (13:04 +0200)]
v3dv: implement VK_EXT_memory_budget

This is mostly based on Turnip's implementation.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18483>

22 months agobroadcom/simulator: add a helper to get the amount of free heap memory
Iago Toral Quiroga [Thu, 8 Sep 2022 11:02:55 +0000 (13:02 +0200)]
broadcom/simulator: add a helper to get the amount of free heap memory

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18483>

22 months agov3dv: limit heap size to 4GB
Iago Toral Quiroga [Thu, 8 Sep 2022 07:55:52 +0000 (09:55 +0200)]
v3dv: limit heap size to 4GB

GPU addresses are 32-bit, so we can't address more than 4GB.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18483>

22 months agov3dv: fix variable type
Iago Toral Quiroga [Fri, 9 Sep 2022 10:57:54 +0000 (12:57 +0200)]
v3dv: fix variable type

The heap size is a 64-bit value.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18483>

22 months agov3dv: expose VK_EXT_attachment_feeback_loop_layout
Iago Toral Quiroga [Mon, 5 Sep 2022 09:21:53 +0000 (11:21 +0200)]
v3dv: expose VK_EXT_attachment_feeback_loop_layout

We don't have any special requirements for this, so we can just expose
the extension.

The tests in CTS have an issue where they only check if a format is
supported for sampling but don't check if an image with that format
can be created for sampling. In our case, since we can't sample
1D depth/stencil images, this causes affected tests to crash in the
simulator (they pass on the device though). There is an issue with
a fix here:

https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/3923

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18489>

22 months agov3dv: implement VK_EXT_depth_clip_control
Iago Toral Quiroga [Fri, 2 Sep 2022 06:49:12 +0000 (08:49 +0200)]
v3dv: implement VK_EXT_depth_clip_control

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18387>

22 months agopvr: Add depth_bias_array handling on dbenable.
Karmjit Mahil [Thu, 28 Jul 2022 14:05:27 +0000 (15:05 +0100)]
pvr: Add depth_bias_array handling on dbenable.

On dbenable depth bias is enabled so we need to write the depth
bias data into the depth_bias_array (which gets uploaded to the
device) and also setup the depth bias index (used in the control
stream).

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18438>

22 months agoradv: Switch to dynamic rendering only
Jason Ekstrand [Fri, 25 Mar 2022 18:51:14 +0000 (13:51 -0500)]
radv: Switch to dynamic rendering only

Also, update list of expected failures.

dEQP-VK.image.sample_texture.*_bit_compressed_format_two_samplers_*
now reliably pass on Polaris10 (GFX8) and Pitcairn (GFX6).

Stoney has new failures but given there is already a lot of
depth/stencil resolve failures, we shouldn't worry about them.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15587>

22 months agoradv: Leave image layouts alone when doing HW MSAA resolves
Jason Ekstrand [Fri, 2 Sep 2022 15:56:12 +0000 (10:56 -0500)]
radv: Leave image layouts alone when doing HW MSAA resolves

If the current layout supports DCC, we initialize it.  There's no reason
why we can't leave it in that layout and need to stomp it to
COLOR_ATTACHMENT_OPTIMAL.  If the layout supports DCC, it's effectively
identical to COLOR_ATTACHMENT_OPTIMAL anyway.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15587>

22 months agoradv: Only copy the render area from VRS to HTILE
Jason Ekstrand [Tue, 30 Aug 2022 15:44:43 +0000 (10:44 -0500)]
radv: Only copy the render area from VRS to HTILE

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15587>

22 months agoradv: Set the window scissor to the render area, not framebuffer
Jason Ekstrand [Tue, 23 Aug 2022 03:36:49 +0000 (22:36 -0500)]
radv: Set the window scissor to the render area, not framebuffer

With dynamic rendering, the concept of framebuffer dimensions goes away
so this won't make sense.  Even with render passes, the render area is
guaranteed to be inside the framebuffer so we may as well clip to the
potentially smaller render area.  This commit also moves window scissor
setup to CmdBeginRenderPass2() time.  This should be fine, even for meta
ops, as the only meta ops which happen inside a render pass need the
same render area as the render pass itself.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15587>

22 months agoradv/ci: document an unstable test
Martin Roukala (né Peres) [Thu, 8 Sep 2022 06:57:10 +0000 (09:57 +0300)]
radv/ci: document an unstable test

The test seem to fail when run in conjunction with other tests. This
got revealed after I introduced parrallelism in the VKCTS execution on
VanGogh.

This was caught by pre-merge CI, but idiot me thought this was a
flake... and did not try re-running the job to verify...</BrownBag>

Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7220
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18480>

22 months agotu: Retain allocated CSes in tu_autotune_on_submit
Mark Collins [Wed, 7 Sep 2022 02:56:27 +0000 (02:56 +0000)]
tu: Retain allocated CSes in tu_autotune_on_submit

It was determined that a significant part of queue submission
overhead was from allocation/freeing of CSes constantly inside
`tu_autotune_on_submit`. This has been reduced by retaining
instances of `tu_submission_data` with their corresponding
CSes, this results in entirely eliminating that overhead as
resetting a CS is a very cheap operation compared to allocation
or even freeing it wholly.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18461>

22 months agomesa/glsl: Add support for NV_shader_noperspective_interpolation
Gert Wollny [Wed, 7 Sep 2022 10:44:27 +0000 (12:44 +0200)]
mesa/glsl: Add support for NV_shader_noperspective_interpolation

With EXT_gpu_shader4 the support is already in place, we just
have to allow it in glsl and expose the extension name.

v2: Check whether the extension is enabled in the shader (Adam Jackson)
v3: Don't check GLES version in lexer (mareko)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18460>

22 months agoradv: fix hw remapping of MRT holes with color attachments without export
Samuel Pitoiset [Thu, 8 Sep 2022 11:59:18 +0000 (13:59 +0200)]
radv: fix hw remapping of MRT holes with color attachments without export

If a color attachment is used in a render pass but not exported by the
FS, cb_shader_mask would be non-zero for this MRT. Though, to make sure
the hw remapping of SPI_SHADER_COL_FORMAT<->CB_SHADER_MASK works as
expected, we should also clear the unused color attachment in
CB_SHADER_MASK. Otherwise, the hw will remap to the wrong MRT.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7221
Fixes: 8fcb4aa0ebd ("radv: compact MRTs to save PS export memory space")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18491>

22 months agoradv: import PS epilog from libraries if present
Samuel Pitoiset [Thu, 25 Aug 2022 15:19:12 +0000 (17:19 +0200)]
radv: import PS epilog from libraries if present

This enables using PS epilogs with GPL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>

22 months agoradv: add support for emitting and prefetching PS epilogs
Samuel Pitoiset [Thu, 25 Aug 2022 15:14:58 +0000 (17:14 +0200)]
radv: add support for emitting and prefetching PS epilogs

Long jumps seem to be slow and prefetching might help.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>

22 months agoradv: create a PS epilog from a library without the main FS
Samuel Pitoiset [Thu, 25 Aug 2022 15:17:32 +0000 (17:17 +0200)]
radv: create a PS epilog from a library without the main FS

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>

22 months agoradv: keep track of the code size for VS prologs and PS epilogs
Samuel Pitoiset [Thu, 25 Aug 2022 15:14:23 +0000 (17:14 +0200)]
radv: keep track of the code size for VS prologs and PS epilogs

This will be used to prefetch PS epilogs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>

22 months agoradv: do not try to remove color exports for FS that need an epilog
Samuel Pitoiset [Tue, 19 Jul 2022 11:42:00 +0000 (13:42 +0200)]
radv: do not try to remove color exports for FS that need an epilog

The color format would be zero and all exports would be removed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>

22 months agoradv: add radv_remove_color_exports() helper
Samuel Pitoiset [Thu, 25 Aug 2022 14:08:50 +0000 (16:08 +0200)]
radv: add radv_remove_color_exports() helper

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>

22 months agoradv: do not lower color exports for FS that need an epilog
Samuel Pitoiset [Tue, 19 Jul 2022 11:37:10 +0000 (13:37 +0200)]
radv: do not lower color exports for FS that need an epilog

When building the main FS with GPL we don't know the color export
formats.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>

22 months agoradv: fix reporting RT shaders in RGP
Samuel Pitoiset [Thu, 8 Sep 2022 14:24:25 +0000 (16:24 +0200)]
radv: fix reporting RT shaders in RGP

RGP expects a compute bind point. This allows it to show ISA of RT
shaders and also enables instruction timing.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7213
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18496>

22 months agoradv: capture RT pipelines from the SQTT layer
Samuel Pitoiset [Thu, 8 Sep 2022 13:01:51 +0000 (15:01 +0200)]
radv: capture RT pipelines from the SQTT layer

They were just not recorded.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18496>

22 months agoradv: emit SQTT markers for RT related commands
Samuel Pitoiset [Wed, 7 Sep 2022 12:29:56 +0000 (14:29 +0200)]
radv: emit SQTT markers for RT related commands

This reports RT commands like vkCmdTraceRaysKHR and
vkCmdBuildAccelerationStructuresKHR in RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18496>

22 months agoglx: Use XSaveContext, delete glxhash.c
Adam Jackson [Wed, 7 Sep 2022 18:03:56 +0000 (14:03 -0400)]
glx: Use XSaveContext, delete glxhash.c

libX11 has a perfectly good XID-based hash table we can be using, let's.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18474>

22 months agovenus: force synchronous submission for external signal semaphore
Yiwei Zhang [Wed, 7 Sep 2022 19:07:43 +0000 (19:07 +0000)]
venus: force synchronous submission for external signal semaphore

This is to ensure semaphore export under globalFencing represents the
correct submission.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18475>

22 months agovenus: clean up vn_QueueSubmit
Yiwei Zhang [Wed, 7 Sep 2022 18:26:41 +0000 (18:26 +0000)]
venus: clean up vn_QueueSubmit

and ensure all submissions are synchronous upon NO_ASYNC_QUEUE_SUBMIT

No other intended change in behavior.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18475>

22 months agoRevert "ci: disable the freedreno farm."
Emma Anholt [Thu, 8 Sep 2022 18:26:15 +0000 (11:26 -0700)]
Revert "ci: disable the freedreno farm."

It's been moved back to the lab network, which hopefully has been
stabilized.  This reverts commit 13f36d66ad5ee581740ec13297a33312863e1c56.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18505>

22 months agonir/gather_info: Clear cross-invocation output mask.
Timur Kristóf [Wed, 7 Sep 2022 16:52:13 +0000 (18:52 +0200)]
nir/gather_info: Clear cross-invocation output mask.

Similar to how other I/O info is cleared at the beginning
of gather_info we should also clear the cross-invocation
mesh shader output mask.

Fixes: 112a856813eb2649ea7ff81768bab594033ce00a
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18464>

22 months agonir/lower_system_values: Add shortcut for 1D workgroups.
Timur Kristóf [Wed, 7 Sep 2022 13:23:46 +0000 (15:23 +0200)]
nir/lower_system_values: Add shortcut for 1D workgroups.

When the workgroup is 1 dimensional, simply use a vec3
filled with zeroes and the local invocation index.
This is is better than lower_id_to_index + constant folding,
because this way we don't leave behind extra ALU instrs.

Note, this is relevant to mesh shaders on RDNA2 because
it enables us to better detect cross-invocation output
access.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18464>

22 months agozink: implement fence_get_fd required by EGL android platform
Yiwei Zhang [Thu, 8 Sep 2022 03:17:22 +0000 (03:17 +0000)]
zink: implement fence_get_fd required by EGL android platform

fence_get_fd is required for any kind of surface flush or native fence
sync export on Android. The typical scenarios are:
- eglDupNativeFenceFDANDROID
- eglSwapBuffers*
- eglMakeCurrent
- glFlush/glFinish for front buffer rendering

This change updates zink_flush to handle PIPE_FLUSH_FENCE_FD via a
forced submit to signal an external sync_fd semaphore. fence_get_fd is
implemented to export the sync file from that semaphore.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18453>

22 months agozink: fix in-fence lifecycle
Yiwei Zhang [Wed, 7 Sep 2022 00:06:37 +0000 (00:06 +0000)]
zink: fix in-fence lifecycle

For in-fence handling, dri2 has this below sequence in a row:
1. create_fence_fd: import external fence fd
2. fence_server_sync: import the pipe fence into the driver ctx
3. fence_reference: deref the created pipe fence

Before this change, zink pushed the wrapped external semaphore to the
wait semaphores of the next batch but the followed fence_reference will
destroy the imported semaphore immediately. Instead of extending the
lifecycle of the pipe fence throughout the batch state, we can simply
transfer the semaphore ownership to the batch and destroy it upon batch
reset.

Fixes: 32597e116d7 ("zink: implement GL semaphores")

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18453>