Christian König [Fri, 9 Mar 2018 13:44:32 +0000 (14:44 +0100)]
drm/radeon: fix prime teardown order
We unmapped imported DMA-bufs when the GEM handle was dropped, not when the
hardware was done with the buffere.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 9 Mar 2018 13:42:54 +0000 (14:42 +0100)]
drm/amdgpu: fix prime teardown order
We unmapped imported DMA-bufs when the GEM handle was dropped, not when the
hardware was done with the buffere.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 14 Mar 2018 19:48:17 +0000 (14:48 -0500)]
drm/amdgpu: explicit give BO type to amdgpu_bo_create
Drop the "kernel" and sg parameter and give the BO type to create
explicit to amdgpu_bo_create instead of figuring it out from the
parameters.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 20 Feb 2018 18:42:40 +0000 (19:42 +0100)]
drm/amdgpu: initial validate the prime BOs into the CPU domain
Just set the GTT domain as mandatory, so that the BO is validated into
it on first use. This allows us to setup the sg table later on.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 20 Feb 2018 18:09:56 +0000 (19:09 +0100)]
drm/amdgpu: drop the backing store when DMA-buf imports are evicted
Instead of moving this to the SYSTEM domain just drop the backing store
and let the resulting allocation be freed.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 28 Feb 2018 08:48:22 +0000 (09:48 +0100)]
drm/ttm: move initializing ttm->sg into ttm_tt_init_fields
Better to set this with all other fields as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 22 Feb 2018 09:18:14 +0000 (10:18 +0100)]
drm/ttm: add bo as parameter to the ttm_tt_create callback
Instead of calculating the size in bytes just to recalculate the number
of pages from it pass the BO directly to the function.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 20 Feb 2018 14:35:21 +0000 (15:35 +0100)]
drm/ttm: add ttm_bo_pipeline_gutting
Allows us to gut a BO of it's backing store when the driver says that it
isn't needed any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Mon, 15 Jan 2018 05:44:30 +0000 (13:44 +0800)]
drm/amdgpu: refactoring mailbox to fix TDR handshake bugs(v2)
this patch actually refactor mailbox implmentations, and
all below changes are needed together to fix all those mailbox
handshake issues exposured by heavey TDR test.
1)refactor all mailbox functions based on byte accessing for mb_control
reason is to avoid touching non-related bits when writing trn/rcv part of
mailbox_control, this way some incorrect INTR sent to hypervisor
side could be avoided, and it fixes couple handshake bug.
2)trans_msg function re-impled: put a invalid
logic before transmitting message to make sure the ACK bit is in
a clear status, otherwise there is chance that ACK asserted already
before transmitting message and lead to fake ACK polling.
(hypervisor side have some tricks to workaround ACK bit being corrupted
by VF FLR which hase an side effects that may make guest side ACK bit
asserted wrongly), and clear TRANS_MSG words after message transferred.
3)for mailbox_flr_work, it is also re-worked: it takes the mutex lock
first if invoked, to block gpu recover's participate too early while
hypervisor side is doing VF FLR. (hypervisor sends FLR_NOTIFY to guest
before doing VF FLR and sentds FLR_COMPLETE after VF FLR done, and
the FLR_NOTIFY will trigger interrupt to guest which lead to
mailbox_flr_work being invoked)
This can avoid the issue that mailbox trans msg being cleared by its VF FLR.
4)for mailbox_rcv_irq IRQ routine, it should only peek msg and schedule
mailbox_flr_work, instead of ACK to hypervisor itself, because FLR_NOTIFY
msg sent from hypervisor side doesn't need VF's ACK (this is because
VF's ACK would lead to hypervisor clear its trans_valid/msg, and this
would cause handshake bug if trans_valid/msg is cleared not due to
correct VF ACK but from a wrong VF ACK like this "FLR_NOTIFY" one)
This fixed handshake bug that sometimes GUEST always couldn't receive
"READY_TO_ACCESS_GPU" msg from hypervisor.
5)seperate polling time limite accordingly:
POLL ACK cost no more than 500ms
POLL MSG cost no more than 12000ms
POLL FLR finish cost no more than 500ms
6) we still need to set adev into in_gpu_reset mode after we received
FLR_NOTIFY from host side, this can prevent innocent app wrongly succesed
to open amdgpu dri device.
FLR_NOFITY is received due to an IDLE hang detected from hypervisor side
which indicating GPU is already die in this VF.
v2:
use MACRO as the offset of mailbox_control register
don't test if NOTIFY_CMPL event in rcv_msg since it won't
recieve that message anymore
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Pixel Ding <Pixel.Ding@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 4 Jan 2018 10:13:20 +0000 (18:13 +0800)]
drm/amdgpu: implement mmio byte access helper for MB
mailbox registers can be accessed with a byte boundry according
to BIF team, so this patch prepares register byte access
and will be used by following patches.
Actually, for mailbox registers once the byte field is touched even not changed,
the mailbox behaves, so we need the byte width accessing to those sort of regs.
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Pixel Ding <Pixel.Ding@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hawking Zhang [Thu, 8 Mar 2018 10:01:24 +0000 (18:01 +0800)]
drm/amdgpu: query vram type from atombios
The vram type for dGPU is stored in umc_info while sys mem type
for APU is stored in integratedsysteminfo
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Fri, 9 Mar 2018 11:16:55 +0000 (06:16 -0500)]
drm/amd/amdgpu: Add missing "DDR4" label
The commit
d296278fd372003fc69588acfd0c0c5edbdf4874 added support for
detecting DDR4 but omitted the label that is printed out in
amdgpu_bo_init() resulting in a KASAN error.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Emily Deng [Thu, 8 Mar 2018 02:49:09 +0000 (10:49 +0800)]
drm/amdgpu: Correct the amdgpu_ucode_fini_bo place for Tonga
The amdgpu_ucode_fini_bo should be called after gfx_v8_0_hw_fini,
or it will have KCQ disable failed issue.
For Tonga, as it firstly finishes SMC block, and the SMC hw fini
will call amdgpu_ucode_fini, which will lead the amdgpu_ucode_fini_bo
called before gfx_v8_0_hw_fini, this is incorrect.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Emily Deng [Thu, 8 Mar 2018 01:35:19 +0000 (09:35 +0800)]
drm/amdgpu: Correct the place of amdgpu_pm_sysfs_fini
The amdgpu_pm_sysfs_fini should call before amdgpu_device_ip_fini,
or the adev->pm.dpm_enabled would be set to 0, then the device files
related to pp won't be removed by amdgpu_pm_sysfs_fini when unload
driver.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 23 Feb 2018 15:08:51 +0000 (16:08 +0100)]
drm/amdgpu: stop allocating a page array for prime shared BOs
We don't need the page array for prime shared BOs, stop allocating it.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 23 Feb 2018 14:12:00 +0000 (15:12 +0100)]
drm/ttm: add ttm_sg_tt_init
This allows drivers to only allocate dma addresses, but not a page
array.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 22 Feb 2018 08:23:44 +0000 (09:23 +0100)]
drm/ttm: move ttm_tt defines into ttm_tt.h
Let's stop mangling everything in a single header and create one header
per object instead.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger He <Hongbo.He@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Wed, 14 Mar 2018 04:53:01 +0000 (14:53 +1000)]
Merge tag 'drm-intel-next-2018-03-08' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
UAPI Changes:
- Query uAPI interface (used for GPU topology information currently)
* Mesa: https://patchwork.freedesktop.org/series/38795/
Driver Changes:
- Increase PSR2 size for CNL (DK)
- Avoid retraining LSPCON link unnecessarily (Ville)
- Decrease request signaling latency (Chris)
- GuC error capture fix (Daniele)
* tag 'drm-intel-next-2018-03-08' of git://anongit.freedesktop.org/drm/drm-intel: (127 commits)
drm/i915: Update DRIVER_DATE to
20180308
drm/i915: add schedule out notification of preempted but completed request
drm/i915: expose rcs topology through query uAPI
drm/i915: add query uAPI
drm/i915: add rcs topology to error state
drm/i915/debugfs: add rcs topology entry
drm/i915/debugfs: reuse max slice/subslices already stored in sseu
drm/i915: store all subslice masks
drm/i915/guc: work around gcc-4.4.4 union initializer issue
drm/i915/cnl: Add Wa_2201832410
drm/i915/icl: Gen11 forcewake support
drm/i915/icl: Add Indirect Context Offset for Gen11
drm/i915/icl: Enhanced execution list support
drm/i915/icl: new context descriptor support
drm/i915/icl: Correctly initialize the Gen11 engines
drm/i915: Assert that the request is indeed complete when signaled from irq
drm/i915: Handle changing enable_fbc parameter at runtime better.
drm/i915: Track whether the DP link is trained or not
drm/i915: Nuke intel_dp->channel_eq_status
drm/i915: Move SST DP link retraining into the ->post_hotplug() hook
...
Dave Airlie [Wed, 14 Mar 2018 01:06:38 +0000 (11:06 +1000)]
Merge tag 'drm-amdkfd-next-2018-03-11' of git://people.freedesktop.org/~gabbayo/linux into drm-next
Major points for this pull request:
- Add dGPU support for amdkfd initialization code and queue handling. It's
not complete support since the GPUVM part is missing (the under debate stuff).
- Enable PCIe atomics for dGPU if present
- Various adjustments to the amdgpu<-->amdkfd interface for dGPUs
- Refactor IOMMUv2 code to allow loading amdkfd without IOMMUv2 in the system
- Add HSA process eviction code in case of system memory pressure
- Various fixes and small changes
* tag 'drm-amdkfd-next-2018-03-11' of git://people.freedesktop.org/~gabbayo/linux: (24 commits)
uapi: Fix type used in ioctl parameter structures
drm/amdkfd: Implement KFD process eviction/restore
drm/amdkfd: Add GPUVM virtual address space to PDD
drm/amdkfd: Remove unaligned memory access
drm/amdkfd: Centralize IOMMUv2 code and make it conditional
drm/amdgpu: Add submit IB function for KFD
drm/amdgpu: Add GPUVM memory management functions for KFD
drm/amdgpu: add amdgpu_sync_clone
drm/amdgpu: Update kgd2kfd_shared_resources for dGPU support
drm/amdgpu: Add KFD eviction fence
drm/amdgpu: Remove unused kfd2kgd interface
drm/amdgpu: Fix wrong mask in get_atc_vmid_pasid_mapping_pasid
drm/amdgpu: Fix header file dependencies
drm/amdgpu: Replace kgd_mem with amdgpu_bo for kernel pinned gtt mem
drm/amdgpu: remove useless BUG_ONs
drm/amdgpu: Enable KFD initialization on dGPUs
drm/amdkfd: Add dGPU device IDs and device info
drm/amdkfd: Add dGPU support to kernel_queue_init
drm/amdkfd: Add dGPU support to the MQD manager
drm/amdkfd: Add dGPU support to the device queue manager
...
Dave Airlie [Wed, 14 Mar 2018 00:59:16 +0000 (10:59 +1000)]
Merge tag 'drm-misc-next-2018-03-09-3' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for 4.17:
UAPI Changes:
plane: Add color encoding/range properties (Jyri)
nouveau: Replace iturbt_709 property with color_encoding property (Ville)
Core Changes:
atomic: Move plane clipping into plane check helper (Ville)
property: Multiple new property checks/verification (Ville)
Driver Changes:
rockchip: Fixes & improvements for rk3399/chromebook plus (various)
sun4i: Add H3/H5 HDMI support (Jernej)
i915: Add support for limited/full-range ycbcr toggling (Ville)
pl111: Add bandwidth checking/limiting (Linus)
Cc: Jernej Skrabec <jernej.skrabec@siol.net>
Cc: Jyri Sarha <jsarha@ti.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
* tag 'drm-misc-next-2018-03-09-3' of git://anongit.freedesktop.org/drm/drm-misc: (85 commits)
drm/rockchip: Don't use atomic constructs for psr
drm/rockchip: analogix_dp: set psr activate/deactivate when enable/disable bridge
drm/rockchip: dw_hdmi: Move HDMI vpll clock enable to bind()
drm/rockchip: inno_hdmi: reorder clk_disable_unprepare call in unbind
drm/rockchip: inno_hdmi: Fix error handling path.
drm/rockchip: dw-mipi-dsi: Fix connector and encoder cleanup.
drm/nouveau: Replace the iturbt_709 prop with the standard COLOR_ENCODING prop
drm/pl111: Use max memory bandwidth for resolution
drm/bridge: sii902x: Retry status read after DDI I2C
drm/pl111: Handle the RealView variant separately
drm/pl111: Make the default BPP a per-variant variable
drm: simple_kms_helper: Fix .mode_valid() documentation
bridge: Elaborate a bit on dumb VGA bridges in Kconfig
drm/atomic: Add new reverse iterator over all plane state (V2)
drm: Reject bad property flag combinations
drm: Make property flags u32
drm/uapi: Deprecate DRM_MODE_PROP_PENDING
drm: WARN when trying to add enum value > 63 to a bitmask property
drm: WARN when trying add enum values to non-enum/bitmask properties
drm: Reject replacing property enum values
...
Dave Airlie [Wed, 14 Mar 2018 00:54:55 +0000 (10:54 +1000)]
drm/amd/pp: fix missing CONFIG_ACPI.
This was stopping me building on ARM after last pull.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 9 Mar 2018 00:50:45 +0000 (10:50 +1000)]
Merge branch 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux into drm-next
More stuff for 4.17. Highlights:
- More fixes for "wattman" like functionality (fine grained clk/voltage control)
- Add more power profile infrastucture (context based dpm)
- SR-IOV fixes
- Add iomem debugging interface for use with umr
- Powerplay and cgs cleanups
- DC fixes and cleanups
- ttm improvements
- Misc cleanups all over
* 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (143 commits)
drm/amdgpu:Always save uvd vcpu_bo in VM Mode
drm/amdgpu:Correct max uvd handles
drm/amdgpu: replace iova debugfs file with iomem (v3)
drm/amd/display: validate plane format on primary plane
drm/amdgpu: Clean sdma wptr register when only enable wptr polling
drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header files
drm/amdgpu: give warning before sleep in kiq_r/wreg
drm/amdgpu: further mitigate workaround for i915
drm/amdgpu: drop gtt->adev
drm/amdgpu: add amdgpu_evict_gtt debugfs entry
drm/amd/pp: Add #ifdef checks for CONFIG_ACPI
drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory"
drm/amd/pp: Drop wrapper functions for upper/lower_32_bits
drm/amdgpu: Delete cgs wrapper functions for gpu memory manager
drm/amd/pp: Delete the wrapper layer of smu_allocate/free_memory
drm/amd/pp: Remove cgs wrapper function for temperature update
Revert "drm/amd/pp: Add a pp feature mask bit for AutoWattman feature"
drm/amd/pp: Add auto power profilng switch based on workloads (v2)
drm/amd/pp: Revert gfx/compute profile switch sysfs
drm/amd/pp: Fix sclk in highest two levels when compute on smu7
...
Dave Airlie [Fri, 9 Mar 2018 00:22:30 +0000 (10:22 +1000)]
Merge branch 'drm/next/du' of git://linuxtv.org/pinchartl/media into drm-next
- Convert LVDS support to a drm_bridge driver
- Add DT bindings for the R8A77995 SoC
- Add DT bindings and driver support for the R8A77970 SoC
Note that the LVDS conversion depends on a patch series from Frank Rowand that
will make it upstream through Rob Herring's tree. Frank has provided a stable
branch based on v4.16-rc1 with the patches, and both Rob and I have merged it
into our trees. This should thus generate no conflict when reaching -next.
* 'drm/next/du' of git://linuxtv.org/pinchartl/media:
dt-bindings: display: renesas: lvds: Document r8a77995 bindings
dt-bindings: display: renesas: du: Document r8a77995 bindings
drm: rcar-du: lvds: Add R8A77970 support
drm: rcar-du: Add R8A77970 support
dt-bindings: display: renesas: lvds: Document R8A77970 bindings
dt-bindings: display: renesas: du: Document R8A77970 bindings
drm: rcar-du: Convert LVDS encoder code to bridge driver
drm: rcar-du: Fix legacy DT to create LVDS encoder nodes
dt-bindings: display: renesas: Deprecate LVDS support in the DU bindings
dt-bindings: display: renesas: Add R-Car LVDS encoder DT bindings
of: improve reporting invalid overlay target path
of: convert unittest overlay devicetree source to sugar syntax
of: Documentation: of_overlay_apply() replaced by of_overlay_fdt_apply()
of: change overlay apply input data from unflattened to FDT
x86: devicetree: fix config option around x86_flattree_get_config()
Sean Paul [Mon, 5 Mar 2018 22:22:54 +0000 (23:22 +0100)]
drm/rockchip: Don't use atomic constructs for psr
Instead of using timer and spinlocks, use delayed_work and
mutexes for rockchip psr. This allows us to make blocking
calls when enabling/disabling psr (which is sort of important
given we're talking over dpcd to the display).
Cc: Caesar Wang <wxt@rock-chips.com>
Cc: 征增 王 <wzz@rock-chips.com>
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20180305222324.5872-3-enric.balletbo@collabora.com
zain wang [Mon, 5 Mar 2018 22:22:53 +0000 (23:22 +0100)]
drm/rockchip: analogix_dp: set psr activate/deactivate when enable/disable bridge
There's a race between when bridge_disable and when vop_crtc_disable
are called. If the flush timer triggers a new psr work between these,
we will operate eDP without power shutdowned by bridge_disable. In this
case, moving activate/deactivate to enable/disable bridge to avoid it.
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20180305222324.5872-2-enric.balletbo@collabora.com
Jeffy Chen [Fri, 2 Mar 2018 17:57:56 +0000 (18:57 +0100)]
drm/rockchip: dw_hdmi: Move HDMI vpll clock enable to bind()
The HDMI vpll clock should be enabled when bind() is called. So move the
clk_prepare_enable of that clock to bind() function and add the missing
clk_disable_unprepare() required in error handling path and unbind().
Fixes:
12b9f204e804 ("drm: bridge/dw_hdmi: add rockchip rk3288 support")
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302175757.28192-5-enric.balletbo@collabora.com
Jeffy Chen [Fri, 2 Mar 2018 17:57:55 +0000 (18:57 +0100)]
drm/rockchip: inno_hdmi: reorder clk_disable_unprepare call in unbind
In bind the clk_prepare_enable of the HDMI pclk is called before adding the
i2c_adapter. So it should be the other way around in unbind, first remove
the i2c_adapter and then call the clk_disable_unprepare.
Fixes:
412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support")
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302175757.28192-4-enric.balletbo@collabora.com
Jeffy Chen [Fri, 2 Mar 2018 17:57:54 +0000 (18:57 +0100)]
drm/rockchip: inno_hdmi: Fix error handling path.
Add missing error handling in bind().
Fixes:
412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support")
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
[moved clk_disable_unprepare reordering in unbind to separate patch]
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302175757.28192-3-enric.balletbo@collabora.com
Jeffy Chen [Fri, 2 Mar 2018 17:57:53 +0000 (18:57 +0100)]
drm/rockchip: dw-mipi-dsi: Fix connector and encoder cleanup.
In bind()'s error handling path call destroy functions instead of
cleanup functions for encoder and connector and reorder to match how is
called in bind().
In unbind() call the connector and encoder destroy functions.
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302175757.28192-2-enric.balletbo@collabora.com
Ville Syrjälä [Tue, 20 Feb 2018 13:48:16 +0000 (15:48 +0200)]
drm/nouveau: Replace the iturbt_709 prop with the standard COLOR_ENCODING prop
Replace the ad-hoc iturbt_709 property with the new standard
COLOR_ENCODING property. Compiles, but not tested.
v2: Fix typos (Ilia)
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: nouveau@lists.freedesktop.org
Cc: Ben Skeggs <bskeggs@redhat.com>
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180220134816.15229-1-ville.syrjala@linux.intel.com
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Ben Skeggs <bskeggs@redhat.com> #irc
Joonas Lahtinen [Thu, 8 Mar 2018 12:49:39 +0000 (14:49 +0200)]
drm/i915: Update DRIVER_DATE to
20180308
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Joonas Lahtinen [Thu, 8 Mar 2018 12:36:10 +0000 (14:36 +0200)]
Merge tag 'gvt-next-2018-03-08' of https://github.com/intel/gvt-linux into drm-intel-next-queued
gvt-next-2018-03-08
- big refactor for shadow ppgtt (Changbin)
- KBL context save/restore via LRI cmd (Weinan)
- misc smatch fixes (Zhenyu)
- Properly unmap dma for guest page (Changbin)
- other misc fixes (Xiong, etc.)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180308023152.oi4ialn5uxetbruf@zhen-hp.sh.intel.com
Weinan Li [Tue, 6 Mar 2018 02:15:57 +0000 (10:15 +0800)]
drm/i915: add schedule out notification of preempted but completed request
There is one corner case missing schedule out notification of the preempted
request. The preempted request is just completed when preemption happen,
then it will be canceled and won't be resubmitted later, GVT-g will lost
the schedule out notification.
Here add schedule out notification if found the preempted request has been
completed.
v2:
- refine description, add completed check and notification in
execlists_cancel_port_requests. (Chris)
v3:
- use ternary confitional, remove local variable. (Tvrtko)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Weinan Li <weinan.z.li@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1520302557-25079-1-git-send-email-weinan.z.li@intel.com
Lionel Landwerlin [Tue, 6 Mar 2018 12:28:57 +0000 (12:28 +0000)]
drm/i915: expose rcs topology through query uAPI
With the introduction of asymmetric slices in CNL, we cannot rely on
the previous SUBSLICE_MASK getparam to tell userspace what subslices
are available. Here we introduce a more detailed way of querying the
Gen's GPU topology that doesn't aggregate numbers.
This is essential for monitoring parts of the GPU with the OA unit,
because counters need to be normalized to the number of
EUs/subslices/slices. The current aggregated numbers like EU_TOTAL do
not gives us sufficient information.
The Mesa series making use of this API is :
https://patchwork.freedesktop.org/series/38795/
As a bonus we can draw representations of the GPU :
https://imgur.com/a/vuqpa
v2: Rename uapi struct s/_mask/_info/ (Tvrtko)
Report max_slice/subslice/eus_per_subslice rather than strides (Tvrtko)
Add uapi macros to read data from *_info structs (Tvrtko)
v3: Use !!(v & DRM_I915_BIT()) for uapi macros instead of custom shifts (Tvrtko)
v4: factorize query item writting (Tvrtko)
tweak uapi struct/define names (Tvrtko)
v5: Replace ALIGN() macro (Chris)
v6: Updated uapi comments (Tvrtko)
Moved flags != 0 checks into vfuncs (Tvrtko)
v7: Use access_ok() before copying anything, to avoid overflows (Chris)
Switch BUG_ON() to GEM_WARN_ON() (Tvrtko)
v8: Tweak uapi comments style to match the coding style (Lionel)
v9: Fix error in comment about computation of enabled subslice (Tvrtko)
v10: Fix/update comments in uAPI (Sagar)
v11: Drop drm_i915_query_(slice|subslice|eu)_info in favor of a single
drm_i915_query_topology_info (Joonas)
v12: Add subslice_stride/eu_stride in drm_i915_query_topology_info (Joonas)
v13: Fix comment in uAPI (Joonas)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306122857.27317-7-lionel.g.landwerlin@intel.com
Lionel Landwerlin [Tue, 6 Mar 2018 12:28:56 +0000 (12:28 +0000)]
drm/i915: add query uAPI
There are a number of information that are readable from hardware
registers and that we would like to make accessible to userspace. One
particular example is the topology of the execution units (how are
execution units grouped in subslices and slices and also which ones
have been fused off for die recovery).
At the moment the GET_PARAM ioctl covers some basic needs, but
generally is only able to return a single value for each defined
parameter. This is a bit problematic with topology descriptions which
are array/maps of available units.
This change introduces a new ioctl that can deal with requests to fill
structures of potentially variable lengths. The user is expected fill
a query with length fields set at 0 on the first call, the kernel then
sets the length fields to the their expected values. A second call to
the kernel with length fields at their expected values will trigger a
copy of the data to the pointed memory locations.
The scope of this uAPI is only to provide information to userspace,
not to allow configuration of the device.
v2: Simplify dispatcher code iteration (Tvrtko)
Tweak uapi drm_i915_query_item structure (Tvrtko)
v3: Rename pad fields into flags (Chris)
Return error on flags field != 0 (Chris)
Only copy length back to userspace in drm_i915_query_item (Chris)
v4: Use array of functions instead of switch (Chris)
v5: More comments in uapi (Tvrtko)
Return query item errors in length field (All)
v6: Tweak uapi comments style to match the coding style (Lionel)
v7: Add i915_query.h (Joonas)
v8: (Lionel) Change the behavior of the item iterator to report
invalid queries into the query item rather than stopping the
iteration. This enables userspace applications to query newer
items on older kernels and only have failure on the items that are
not supported.
v9: Edit copyright headers (Joonas)
v10: Typos & comments in uapi (Joonas)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306122857.27317-6-lionel.g.landwerlin@intel.com
Lionel Landwerlin [Tue, 6 Mar 2018 12:28:55 +0000 (12:28 +0000)]
drm/i915: add rcs topology to error state
This might be useful information for developers looking at an error
state.
v2: Place topology towards the end of the error state (Chris)
v3: Reuse common printing code (Michal)
v4: Make this a one-liner (Chris)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306122857.27317-5-lionel.g.landwerlin@intel.com
Lionel Landwerlin [Tue, 6 Mar 2018 12:28:54 +0000 (12:28 +0000)]
drm/i915/debugfs: add rcs topology entry
While the end goal is to make this information available to userspace
through a new ioctl, there is no reason we can't display it in a human
readable fashion through debugfs.
slice0: 3 subslice(s) (0x7):
subslice0: 8 EUs (0xff)
subslice1: 8 EUs (0xff)
subslice2: 8 EUs (0xff)
subslice3: 0 EUs (0x0)
slice1: 3 subslice(s) (0x7):
subslice0: 8 EUs (0xff)
subslice1: 8 EUs (0xff)
subslice2: 8 EUs (0xff)
subslice3: 0 EUs (0x0)
slice2: 3 subslice(s) (0x7):
subslice0: 8 EUs (0xff)
subslice1: 8 EUs (0xff)
subslice2: 8 EUs (0xff)
subslice3: 0 EUs (0x0)
v2: Reformat debugfs printing (Tvrtko)
Use the new EU mask helper (Tvrtko)
v3: Move printing code to intel_device_info.c to be shared with error
state (Michal)
v4: Bump u8 to u16 when using sseu_get_eus() (Lionel)
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306122857.27317-4-lionel.g.landwerlin@intel.com
Lionel Landwerlin [Tue, 6 Mar 2018 12:28:53 +0000 (12:28 +0000)]
drm/i915/debugfs: reuse max slice/subslices already stored in sseu
Now that we have that information in topology fields, let's just reuse it.
v2: Style tweaks (Tvrtko)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306122857.27317-3-lionel.g.landwerlin@intel.com
Lionel Landwerlin [Tue, 6 Mar 2018 12:28:52 +0000 (12:28 +0000)]
drm/i915: store all subslice masks
Up to now, subslice mask was assumed to be uniform across slices. But
starting with Cannonlake, slices can be asymmetric (for example slice0
has different number of subslices as slice1+). This change stores all
subslices masks for all slices rather than having a single mask that
applies to all slices.
v2: Rework how we store total numbers in sseu_dev_info (Tvrtko)
Fix CHV eu masks, was reading disabled as enabled (Tvrtko)
Readability changes (Tvrtko)
Add EU index helper (Tvrtko)
v3: Turn ALIGN(v, 8) / 8 into DIV_ROUND_UP(v, BITS_PER_BYTE) (Tvrtko)
Reuse sseu_eu_idx() for setting eu_mask on CHV (Tvrtko)
Reformat debug prints for subslices (Tvrtko)
v4: Change eu_mask helper into sseu_set_eus() (Tvrtko)
v5: With Haswell reporting masks & counts, bump sseu_*_eus() functions
to use u16 (Lionel)
v6: Fix sseu_get_eus() for > 8 EUs per subslice (Lionel)
v7: Change debugfs enabels for number of subslices per slice, will
need a small igt/pm_sseu change (Lionel)
Drop subslice_total field from sseu_dev_info, rely on
sseu_subslice_total() to recompute the value instead (Lionel)
v8: Remove unused function compute_subslice_total() (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306122857.27317-2-lionel.g.landwerlin@intel.com
Andrew Morton [Thu, 8 Mar 2018 00:13:33 +0000 (16:13 -0800)]
drm/i915/guc: work around gcc-4.4.4 union initializer issue
gcc-4.4.4 has problems with initalizers of anon unions.
drivers/gpu/drm/i915/intel_guc_log.c: In function 'guc_log_control':
drivers/gpu/drm/i915/intel_guc_log.c:64: error: unknown field 'logging_enabled' specified in initializer
Work around this.
Fixes:
35fe703c3161 ("drm/i915/guc: Change values for i915_guc_log_control")
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180308001333.rI2vrNRTY%akpm@linux-foundation.org
Rodrigo Vivi [Wed, 7 Mar 2018 22:09:12 +0000 (14:09 -0800)]
drm/i915/cnl: Add Wa_2201832410
"Clock gating bug in GWL may not clear barrier state when an EOT
is received, causing a hang the next time that barrier is used."
HSDES:
2201832410
Cc: Rafael Antognolli <rafael.antognolli@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180307220912.3681-1-rodrigo.vivi@intel.com
Linus Walleij [Wed, 7 Mar 2018 21:58:19 +0000 (22:58 +0100)]
drm/pl111: Use max memory bandwidth for resolution
We were previously selecting 1024x768 and 32BPP as the default
set-up for the PL111 consumers.
This does not work on elder systems: the device tree bindings
support a property "max-memory-bandwidth" in bytes/second that
states that if you exceed this the memory bus will saturate.
The result is flickering and unstable images.
Parse the "max-memory-bandwidth" and respect it when
intializing the driver. On the RealView PB11MP, Versatile and
Integrator/CP we get a nice console as default with this code.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180307215819.15814-1-linus.walleij@linaro.org
Linus Walleij [Mon, 5 Mar 2018 10:17:02 +0000 (11:17 +0100)]
drm/bridge: sii902x: Retry status read after DDI I2C
The following happens when connection a DVI output driven
from the SiI9022 using a DVI-to-VGA adapter plug:
i2c i2c-0: sendbytes: NAK bailout.
i2c i2c-0: sendbytes: NAK bailout.
Then no picture. Apparently the I2C engine inside the SiI9022
is not smart enough to try to fall back to DDC I2C. Or the
vendor have not integrated the electronics properly. I don't
know which one it is.
After this, the I2C bus seems stalled and the first attempt to
read the status register fails, and the code returns with
negative return value, and the display fails to initialized.
Instead, retry status readout five times and continue even
if this fails.
Tested on the ARM Versatile Express with a DVI-to-VGA
connector, it now gives picture.
Introduce a helper struct device *dev variable to make
the code more readable.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Liviu Dudau <Liviu.Dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180305101702.13441-1-linus.walleij@linaro.org
Linus Walleij [Fri, 2 Mar 2018 09:09:47 +0000 (10:09 +0100)]
drm/pl111: Handle the RealView variant separately
We want to cut down the default bpp to 16 on the RealView so
we can have a 1024x768 framebuffer console by default. The
memory bandwidth limitations makes this not work with the
PL111 default of 32bpp.
This builds on top of the earlier patches making the
framebuffer default bpp a per-variant variable.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302090948.6399-4-linus.walleij@linaro.org
Linus Walleij [Fri, 2 Mar 2018 09:09:45 +0000 (10:09 +0100)]
drm/pl111: Make the default BPP a per-variant variable
The PL110, Integrator and Versatile boards strongly prefer to
use 16 BPP even if other modes are supported, both to keep down
memory consumption and also to easier find a good match to
supported resolutions with consideration taken to the memory
bandwidth of the platforms.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302090948.6399-2-linus.walleij@linaro.org
Link: https://patchwork.freedesktop.org/patch/msgid/20180307084316.23623-1-linus.walleij@linaro.org
Link: https://patchwork.freedesktop.org/patch/msgid/20180307084316.23623-1-linus.walleij@linaro.org
Linus Walleij [Tue, 27 Feb 2018 10:11:09 +0000 (11:11 +0100)]
drm: simple_kms_helper: Fix .mode_valid() documentation
This fixes up the .mode_valid() vtable entry documentation
by copyediting the documentation from the .mode_valid()
documentation in the drm_modeset_helper_vtables.h file.
Fixes:
40275dc4edb4 ("drm: simple_kms_helper: Add mode_valid() callback support")
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180227101109.6088-1-linus.walleij@linaro.org
Linus Walleij [Fri, 2 Mar 2018 09:14:26 +0000 (10:14 +0100)]
bridge: Elaborate a bit on dumb VGA bridges in Kconfig
It's better if we explain a bit that this pertains to
non-programmable VGA DAC bridges.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302091426.8463-1-linus.walleij@linaro.org
James Zhu [Tue, 6 Mar 2018 19:52:35 +0000 (14:52 -0500)]
drm/amdgpu:Always save uvd vcpu_bo in VM Mode
When UVD is in VM mode, there is not uvd handle exchanged,
uvd.handles are always 0. So vcpu_bo always need save,
Otherwise amdgpu driver will fail during suspend/resume.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105021
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
James Zhu [Tue, 6 Mar 2018 19:43:50 +0000 (14:43 -0500)]
drm/amdgpu:Correct max uvd handles
Max uvd handles should use adev->uvd.max_handles instead of
AMDGPU_MAX_UVD_HANDLES here.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Tom St Denis [Fri, 23 Feb 2018 14:46:23 +0000 (09:46 -0500)]
drm/amdgpu: replace iova debugfs file with iomem (v3)
This allows access to pages allocated through the driver with optional
IOMMU mapping.
v2: Fix number of bytes copied and add write method
v3: drop check for kmap return
Original-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Wed, 7 Mar 2018 07:06:11 +0000 (12:36 +0530)]
drm/amd/display: validate plane format on primary plane
In dce110, the plane configuration is such that plane 0
or the primary plane should be rendered with only RGB data.
This patch adds the validation to ensure that no video data
is rendered on plane 0.
Signed-off-by: Shirish S <shirish.s@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Emily Deng [Wed, 7 Mar 2018 01:47:43 +0000 (09:47 +0800)]
drm/amdgpu: Clean sdma wptr register when only enable wptr polling
The sdma wptr polling memory is not fast enough, then the sdma
wptr register will be random, and not equal to sdma rptr, which
will cause sdma engine hang when load driver, so clean up the sdma
wptr directly to fix this issue.
v2:add comment above the code and correct coding style
Reviewed-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom St Denis [Tue, 6 Mar 2018 15:52:41 +0000 (10:52 -0500)]
drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header files
These are required by umr to properly parse bitfield offsets.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexdeucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Mon, 5 Mar 2018 11:26:36 +0000 (19:26 +0800)]
drm/amdgpu: give warning before sleep in kiq_r/wreg
to catch error that may schedule in atomic context early on
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Tue, 20 Feb 2018 18:51:02 +0000 (19:51 +0100)]
drm/amdgpu: further mitigate workaround for i915
Disable the workaround on imported BOs as well.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexdeucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 28 Feb 2018 08:35:39 +0000 (09:35 +0100)]
drm/amdgpu: drop gtt->adev
We can use ttm->bdev instead.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexdeucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Mon, 19 Feb 2018 13:47:55 +0000 (14:47 +0100)]
drm/amdgpu: add amdgpu_evict_gtt debugfs entry
Allow evicting all BOs from the GTT domain.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexdeucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 6 Mar 2018 06:42:24 +0000 (14:42 +0800)]
drm/amd/pp: Add #ifdef checks for CONFIG_ACPI
Fix compiling error when CONFIG_ACPI not enabled.
Change-Id: I5f901adbc799c10b30e5ea79f8f44760e749fae1
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Christian König [Tue, 6 Mar 2018 13:56:00 +0000 (14:56 +0100)]
drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory"
For amdgpu_bo_create_kernel to work the handle must be NULL initialized,
otherwise we only try to pin and map the BO.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Rex Zhu <rezhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 6 Mar 2018 05:31:13 +0000 (13:31 +0800)]
drm/amd/pp: Drop wrapper functions for upper/lower_32_bits
replace smu_upper_32_bits/smu_lower_32_bits with
the standard kernel macros
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 5 Mar 2018 10:36:47 +0000 (18:36 +0800)]
drm/amdgpu: Delete cgs wrapper functions for gpu memory manager
delete those cgs interfaces:
amdgpu_cgs_alloc_gpu_mem
amdgpu_cgs_free_gpu_mem
amdgpu_cgs_gmap_gpu_mem
amdgpu_cgs_gunmap_gpu_mem
amdgpu_cgs_kmap_gpu_mem
amdgpu_cgs_kunmap_gpu_mem
Reviewed-by: Alex Deucher <alexdeucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 6 Mar 2018 05:13:21 +0000 (13:13 +0800)]
drm/amd/pp: Delete the wrapper layer of smu_allocate/free_memory
use amdgpu_bo_create/free_kernel instand.
Reviewed-by: Alex Deucher <alexdeucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 5 Mar 2018 08:07:22 +0000 (16:07 +0800)]
drm/amd/pp: Remove cgs wrapper function for temperature update
Reviewed-by: Alex Deucher <alexdeucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Mon, 5 Mar 2018 06:42:56 +0000 (14:42 +0800)]
Revert "drm/amd/pp: Add a pp feature mask bit for AutoWattman feature"
This reverts commit
e429ea87b2939c4cce1b439baf6d76535a0767f2.
Implement Workload Aware Dynamic power management instand of
AutoWattman feature in linux.
Reviewed-by: Alex Deucher <alexdeucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Fri, 2 Mar 2018 12:09:11 +0000 (20:09 +0800)]
drm/amd/pp: Add auto power profilng switch based on workloads (v2)
Add power profiling mode dynamic switch based on the workloads.
Currently, support Cumpute, VR, Video, 3D,power saving with Cumpute
have highest prority, power saving have lowest prority.
in manual dpm mode, driver will stop auto switch, just save the client's
requests. user can set power profiling mode through sysfs.
when exit manual dpm mode, driver will response the client's requests.
switch based on the client's prority.
v2: squash in fixes from Rex
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Wed, 7 Mar 2018 03:10:03 +0000 (08:40 +0530)]
drm/atomic: Add new reverse iterator over all plane state (V2)
Add reverse iterator for_each_oldnew_plane_in_state_reverse to
compliment the for_each_oldnew_plane_in_state way or reading plane
states.
The plane states are required to be read in reverse order for
amd drivers, cause the z order convention followed in linux is
opposite to how the planes are supposed to be presented to DC
engine, which is in common to both windows and linux.
V2: fix compile time errors due to -Werror flag.
Signed-off-by: Shirish S <shirish.s@amd.com>
Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1520392203-6885-1-git-send-email-shirish.s@amd.com
Kieran Bingham [Thu, 15 Feb 2018 08:38:18 +0000 (08:38 +0000)]
dt-bindings: display: renesas: lvds: Document r8a77995 bindings
The D3 (r8a77995) supports two LVDS channels. Extend the binding to
support them.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
[Fixed compatible string]
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Kieran Bingham [Thu, 15 Feb 2018 08:38:17 +0000 (08:38 +0000)]
dt-bindings: display: renesas: du: Document r8a77995 bindings
Document the D3 (r8a77995) SoC in the R-Car DU bindings.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Sergei Shtylyov [Thu, 1 Mar 2018 18:10:16 +0000 (21:10 +0300)]
drm: rcar-du: lvds: Add R8A77970 support
Add support for the R-Car V3M (R8A77970) SoC to the LVDS encoder driver.
Note that there are some differences with the other R-Car gen3 SoCs, e.g.
LVDPLLCR has the same layout as in the R-Car gen2 SoCs.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Sergei Shtylyov [Thu, 18 Jan 2018 21:05:59 +0000 (00:05 +0300)]
drm: rcar-du: Add R8A77970 support
Add support for the R-Car V3M (R8A77970) SoC to the R-Car DU driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Sergei Shtylyov [Fri, 19 Jan 2018 18:29:20 +0000 (21:29 +0300)]
dt-bindings: display: renesas: lvds: Document R8A77970 bindings
Document the R-Car V3M (R8A77970) SoC in the R-Car LVDS bindings.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Sergei Shtylyov [Thu, 18 Jan 2018 21:05:58 +0000 (00:05 +0300)]
dt-bindings: display: renesas: du: Document R8A77970 bindings
Document the R-Car V3M (R8A77970) SoC in the R-Car DU bindings.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Ville Syrjälä [Tue, 6 Mar 2018 16:48:49 +0000 (18:48 +0200)]
drm: Reject bad property flag combinations
Pimp drm_property_type_valid() to check for more fails with the
property flags. Also make the check before adding the property,
and bail out if things look bad.
Since we're now chekcing for more than the type let's also
change the function name to drm_property_flags_valid().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306164849.2862-6-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Tue, 6 Mar 2018 16:48:48 +0000 (18:48 +0200)]
drm: Make property flags u32
The property flags are part of the uabi and we have 32 bits for them.
Pass them around as u32 internally as well, instead of a signed int.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306164849.2862-5-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Tue, 6 Mar 2018 16:48:47 +0000 (18:48 +0200)]
drm/uapi: Deprecate DRM_MODE_PROP_PENDING
DRM_MODE_PROP_PENDING is not used anywhere (except printed out
by libdrm proptest/modetest).
This seems to be yet another thing blindly copied from xrandr.
Quoting from the protocol spec:
"If 'pending' is TRUE, changes made to property values with
RRChangeOutputProperty will be saved in the pending property value
and be automatically copied to the current value on the next
RRSetCrtcConfig request involving the named output. If 'pending' is
FALSE, changes are copied immediately."
So it was some kind of early idea for atomic property updates.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306164849.2862-4-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Tue, 6 Mar 2018 16:48:46 +0000 (18:48 +0200)]
drm: WARN when trying to add enum value > 63 to a bitmask property
Enum values >63 with a bitmask property is a programmer error. WARN
when someone is attempting this.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306164849.2862-3-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Tue, 6 Mar 2018 16:48:45 +0000 (18:48 +0200)]
drm: WARN when trying add enum values to non-enum/bitmask properties
Trying to add enum values to non-enum/bitmask properties is a
programmer mistake. WARN to make sure the developers notice
their mistake.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306164849.2862-2-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Tue, 6 Mar 2018 16:48:44 +0000 (18:48 +0200)]
drm: Reject replacing property enum values
If the property already has the enum value WARN and bail.
Replacing enum values doesn't make sense to me.
Throw out the pointless list_empty() while at it.
Cc: Daniel Vetter <daniel@ffwll.ch>
Suggested-by: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306164849.2862-1-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Laurent Pinchart [Wed, 10 Jan 2018 03:47:42 +0000 (05:47 +0200)]
drm: rcar-du: Convert LVDS encoder code to bridge driver
The LVDS encoders used to be described in DT as part of the DU. They now
have their own DT node, linked to the DU using the OF graph bindings.
This allows moving internal LVDS encoder support to a separate driver
modelled as a DRM bridge. Backward compatibility is retained as legacy
DT is patched live to move to the new bindings.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Laurent Pinchart [Wed, 10 Jan 2018 00:40:27 +0000 (02:40 +0200)]
drm: rcar-du: Fix legacy DT to create LVDS encoder nodes
The internal LVDS encoders now have their own DT bindings. Before
switching the driver infrastructure to those new bindings, implement
backward-compatibility through live DT patching.
Patching is disabled and will be enabled along with support for the new
DT bindings in the DU driver.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Frank Rowand <frank.rowand@sony.com>
Laurent Pinchart [Wed, 10 Jan 2018 14:05:46 +0000 (16:05 +0200)]
dt-bindings: display: renesas: Deprecate LVDS support in the DU bindings
The internal LVDS encoders now have their own DT bindings, representing
them as part of the DU is deprecated.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Laurent Pinchart [Wed, 10 Jan 2018 14:05:46 +0000 (16:05 +0200)]
dt-bindings: display: renesas: Add R-Car LVDS encoder DT bindings
The Renesas R-Car Gen2 and Gen3 SoCs have internal LVDS encoders. Add
corresponding device tree bindings.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Laurent Pinchart [Sun, 4 Mar 2018 11:33:50 +0000 (13:33 +0200)]
Merge tag 'overlay_apply_fdt_v7-for-4.17' of git://git./linux/kernel/git/frowand/linux into drm/next/du
- DT overlay applying rework (Frank Rowand)
Move duplicating and unflattening of an overlay flattened devicetree
(FDT) into the overlay application code. To accomplish this,
of_overlay_apply() is replaced by of_overlay_fdt_apply().
Marek Szyprowski [Mon, 5 Mar 2018 08:57:41 +0000 (09:57 +0100)]
drm/bridge: analogix_dp: Don't create useless connectors
If there is another bridge after analogix_dp, then the connector object
should not be created. This fixes following timeouts on Exynos5420-based
Chromebook2 Peach-PIT board during boot:
exynos-dp
145b0000.dp-controller: AUX CH cmd reply timeout!
exynos-dp
145b0000.dp-controller: AUX CH enable timeout!
exynos-dp
145b0000.dp-controller: AUX CH enable timeout!
exynos-dp
145b0000.dp-controller: AUX CH enable timeout!
exynos-dp
145b0000.dp-controller: AUX CH enable timeout!
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180305085741.18896-4-m.szyprowski@samsung.com
Marek Szyprowski [Mon, 5 Mar 2018 08:57:40 +0000 (09:57 +0100)]
drm/bridge: analogix_dp: Postpone enabling runtime power management
Enabling runtime power management early in analogix_dp_bind() causes following
kernel NULL pointer dereference:
Unable to handle kernel NULL pointer dereference at virtual address
000007d8
pgd =
28ffa2e4
[
000007d8] *pgd=
00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 6 PID: 69 Comm: kworker/6:1 Not tainted 4.16.0-rc1-00062-ge25751974ba8 #3622
Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
Workqueue: events deferred_probe_work_func
PC is at analogix_dp_resume+0x8/0xc0
LR is at pm_generic_runtime_resume+0x2c/0x38
pc : [<
c0531b98>] lr : [<
c0543fec>] psr:
a0000113
sp :
ee13fbd8 ip :
0000001a fp :
00000001
r10:
ee0eb080 r9 :
c0552bd8 r8 :
c0fb1d98
r7 :
eebb1010 r6 :
eeae9808 r5 :
00000000 r4 :
d4850415
r3 :
ee0ed010 r2 :
b2d05e00 r1 :
00000000 r0 :
00000000
Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
Control:
10c5387d Table:
2000406a DAC:
00000051
Process kworker/6:1 (pid: 69, stack limit = 0x913205b4)
Stack: (0xee13fbd8 to 0xee140000)
...
[<
c0531b98>] (analogix_dp_resume) from [<
c0543fec>] (pm_generic_runtime_resume+0x2c/0x38)
[<
c0543fec>] (pm_generic_runtime_resume) from [<
c054ffb4>] (__genpd_runtime_resume+0x2c/0x8c)
[<
c054ffb4>] (__genpd_runtime_resume) from [<
c0552d24>] (genpd_runtime_resume+0x14c/0x258)
[<
c0552d24>] (genpd_runtime_resume) from [<
c0547798>] (__rpm_callback+0x134/0x214)
[<
c0547798>] (__rpm_callback) from [<
c0547898>] (rpm_callback+0x20/0x80)
[<
c0547898>] (rpm_callback) from [<
c0546ff4>] (rpm_resume+0x3a0/0x734)
[<
c0546ff4>] (rpm_resume) from [<
c05475ec>] (__pm_runtime_resume+0x64/0x9c)
[<
c05475ec>] (__pm_runtime_resume) from [<
c053b95c>] (__device_attach+0x8c/0x134)
[<
c053b95c>] (__device_attach) from [<
c053ad08>] (bus_probe_device+0x88/0x90)
[<
c053ad08>] (bus_probe_device) from [<
c05390d0>] (device_add+0x3a8/0x580)
[<
c05390d0>] (device_add) from [<
c06764c4>] (i2c_register_adapter+0xd4/0x3ec)
[<
c06764c4>] (i2c_register_adapter) from [<
c05321c8>] (analogix_dp_bind+0x2a0/0x410)
[<
c05321c8>] (analogix_dp_bind) from [<
c0528e90>] (exynos_dp_bind+0x9c/0x12c)
[<
c0528e90>] (exynos_dp_bind) from [<
c0535bc4>] (component_bind_all+0xfc/0x258)
[<
c0535bc4>] (component_bind_all) from [<
c0522ee8>] (exynos_drm_bind+0x15c/0x28c)
[<
c0522ee8>] (exynos_drm_bind) from [<
c0536378>] (try_to_bring_up_master+0x1b8/0x29c)
[<
c0536378>] (try_to_bring_up_master) from [<
c05364fc>] (component_add+0xa0/0x170)
[<
c05364fc>] (component_add) from [<
c0528fe4>] (exynos_dp_probe+0x64/0xb8)
[<
c0528fe4>] (exynos_dp_probe) from [<
c053debc>] (platform_drv_probe+0x50/0xb0)
[<
c053debc>] (platform_drv_probe) from [<
c053bd18>] (driver_probe_device+0x2b8/0x4a0)
[<
c053bd18>] (driver_probe_device) from [<
c0539e4c>] (bus_for_each_drv+0x44/0x8c)
[<
c0539e4c>] (bus_for_each_drv) from [<
c053b970>] (__device_attach+0xa0/0x134)
[<
c053b970>] (__device_attach) from [<
c053ad08>] (bus_probe_device+0x88/0x90)
[<
c053ad08>] (bus_probe_device) from [<
c053b258>] (deferred_probe_work_func+0x3c/0x168)
[<
c053b258>] (deferred_probe_work_func) from [<
c014352c>] (process_one_work+0x1d0/0x7bc)
[<
c014352c>] (process_one_work) from [<
c0143b84>] (worker_thread+0x34/0x4dc)
[<
c0143b84>] (worker_thread) from [<
c014a30c>] (kthread+0x128/0x164)
[<
c014a30c>] (kthread) from [<
c01010b4>] (ret_from_fork+0x14/0x20)
Exception stack(0xee13ffb0 to 0xee13fff8)
ffa0:
00000000 00000000 00000000 00000000
ffc0:
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0:
00000000 00000000 00000000 00000000 00000013 00000000
Code:
e2800e37 eafee601 e92d4070 e1a05000 (
e59067d8)
---[ end trace
bf6046013df7cab2 ]---
This oops happens, because analogix_dp_bind() calls drm_dp_aux_register()
which registers i2c adapter. I2C core tries to runtime get i2c host
device during registration. This ends in analogix_dp_resume(), but dp
context is NULL there. dp context is set in exynos_dp_bind() after
executing analogix_dp_bind(). Fix this issue by postponing enabling runtime
power management after drm_dp_aux_register().
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180305085741.18896-3-m.szyprowski@samsung.com
zain wang [Mon, 5 Mar 2018 08:57:39 +0000 (09:57 +0100)]
drm/bridge: analogix_dp: Don't power bridge in analogix_dp_bind
The bridge does not need to be powered in analogix_dp_bind(), so
remove the calls to pm_runtime_get()/phy_power_on()/analogix_dp_init_dp()
as well as their power-off counterparts.
Cc: Stéphane Marchesin <marcheu@chromium.org>
Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
[the patch originally just removed the power_on portion, seanpaul removed
the power off code as well as improved the commit message]
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Thierry Escande <thierry.escande@collabora.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180305085741.18896-2-m.szyprowski@samsung.com
Daniele Ceraolo Spurio [Fri, 2 Mar 2018 16:15:01 +0000 (18:15 +0200)]
drm/i915/icl: Gen11 forcewake support
The main difference with previous GENs is that starting from Gen11
each VCS and VECS engine has its own power well, which only exist
if the related engine exists in the HW.
The fallback forcewake request workaround is only needed on gen9
according to the HSDES WA entry (
1604254524), so we can go back to using
the simpler fw_domains_get/put functions.
BSpec: 18331
v2: fix fwtable, use array to test shadow tables, create new
accessors to avoid check on every access (Tvrtko)
v3 (from Paulo): Rebase.
v4:
- Range 09400-097FF should be FORCEWAKE_ALL (Daniele)
- Use the BIT macro for forcewake domains (Daniele)
- Add a comment about the range ordering (Oscar)
- Updated commit message (Oscar)
v5: Rebased
v6: Use I915_MAX_VCS/VECS (Michal)
v7: translate FORCEWAKE_ALL to available domains
v8: rebase, add clarification on fallback ack in commit message.
v9: fix rebase issue, change check in fw_domains_init from IS_GEN11
to GEN >= 11
v10: Generate is_genX_shadowed with a macro (Daniele)
Include gen11_fw_ranges in the selftest (Michel)
v11: Simplify FORCEWAKE_ALL, new line between NEEDS_FORCEWAKEs (Tvrtko)
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Acked-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302161501.28594-6-mika.kuoppala@linux.intel.com
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Michel Thierry [Fri, 2 Mar 2018 16:15:00 +0000 (18:15 +0200)]
drm/i915/icl: Add Indirect Context Offset for Gen11
v2: rebased to intel_lr_indirect_ctx_offset
v3: rebase, move define to intel_lrc_reg.h
BSpec: 11740
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Oscar Mateo <oscar.mateo@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302161501.28594-5-mika.kuoppala@linux.intel.com
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Thomas Daniel [Fri, 2 Mar 2018 16:14:59 +0000 (18:14 +0200)]
drm/i915/icl: Enhanced execution list support
Enhanced Execlists is an upgraded version of execlists which supports
up to 8 ports. The lrcs to be submitted are written to a submit queue
(the ExecLists Submission Queue - ELSQ), which is then loaded on the
HW. When writing to the ELSP register, the lrcs are written cyclically
in the queue from position 0 to position 7. Alternatively, it is
possible to write directly in the individual positions of the queue
using the ELSQC registers. To be able to re-use all the existing code
we're using the latter method and we're currently limiting ourself to
only using 2 elements.
v2: Rebase.
v3: Switch from !IS_GEN11 to GEN < 11 (Daniele Ceraolo Spurio).
v4: Use the elsq registers instead of elsp. (Daniele Ceraolo Spurio)
v5: Reword commit, rename regs to be closer to specs, turn off
preemption (Daniele), reuse engine->execlists.elsp (Chris)
v6: use has_logical_ring_elsq to differentiate the new paths
v7: add preemption support, rename els to submit_reg (Chris)
v8: save the ctrl register inside the execlists struct, drop CSB
handling updates (superseded by preempt_complete_status) (Chris)
v9: s/drm_i915_gem_request/i915_request (Mika)
v10: resolved conflict in inject_preempt_context (Mika)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Thomas Daniel <thomas.daniel@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302161501.28594-4-mika.kuoppala@linux.intel.com
Daniele Ceraolo Spurio [Fri, 2 Mar 2018 16:14:58 +0000 (18:14 +0200)]
drm/i915/icl: new context descriptor support
Starting from Gen11 the context descriptor format has been updated in
the HW. The hw_id field has been considerably reduced in size and engine
class and instance fields have been added.
There is a slight name clashing issue because the field that we call
hw_id is actually called SW Context ID in the specs for Gen11+.
With the current size of the hw_id field we can have a maximum of 2k
contexts at any time, but we could use the sw_counter field (which is sw
defined) to increase that because the HW requirement is that
engine_id + sw id + sw_counter is a unique number.
GuC uses a similar method to support more contexts but does its tracking
at lrc level. To avoid doing an implementation that will need to be
reworked once GuC support lands, defer it for now and mark it as TODO.
v2: rebased, add documentation, fix GEN11_ENGINE_INSTANCE_SHIFT
v3: rebased, bring back lost code from i915_gem_context.c
v4: make TODO comment more generic
v5: be consistent with bit ordering, add extra checks (Chris)
Cc: Oscar Mateo <oscar.mateo@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Oscar Mateo <oscar.mateo@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302161501.28594-3-mika.kuoppala@linux.intel.com
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Oscar Mateo [Fri, 2 Mar 2018 16:14:57 +0000 (18:14 +0200)]
drm/i915/icl: Correctly initialize the Gen11 engines
Gen11 has up to 4 VCS and up to 2 VECS engines, this patch adds mmio
base definitions for all of them.
Bspec: 20944
Bspec: 7021
v2: Set the correct mmio_base in intel_engines_init_mmio; updating the
base mmio values any later would cause incorrect reads in
i915_gem_sanitize (Michel).
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Ceraolo Spurio, Daniele <daniele.ceraolospurio@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180302161501.28594-2-mika.kuoppala@linux.intel.com
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Chris Wilson [Mon, 5 Mar 2018 10:41:05 +0000 (10:41 +0000)]
drm/i915: Assert that the request is indeed complete when signaled from irq
After we call dma_fence_signal(), confirm that the request was indeed
complete.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180305104105.8296-1-chris@chris-wilson.co.uk
Maarten Lankhorst [Mon, 5 Mar 2018 12:36:08 +0000 (13:36 +0100)]
drm/i915: Handle changing enable_fbc parameter at runtime better.
If i915.enable_fbc is cleared at runtime, but FBC was previously enabled
then we don't disable FBC until the next time the crtc is disabled.
Make sure that if the module param is changed, we disable FBC in
intel_fbc_post_update so we never have to worry about disabling.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180305123608.20665-1-maarten.lankhorst@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Ville Syrjälä [Wed, 17 Jan 2018 19:21:49 +0000 (21:21 +0200)]
drm/i915: Track whether the DP link is trained or not
LSPCON likes to throw short HPDs during the enable seqeunce prior to the
link being trained. These obviously result in the channel CR/EQ check
failing and thus we schedule a pointless hotplug work to retrain the
link. Avoid that by ignoring the bad CR/EQ status until we've actually
initially trained the link.
I've not actually investigated to see what LSPCON is trying to signal
with the short pulse. But as long as it signals anything I think we're
supposed to check the link status anyway, so I don't really see other
good ways to solve this. I've not seen these short pulses being
generated by normal DP sinks.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180117192149.17760-5-ville.syrjala@linux.intel.com
Ville Syrjälä [Wed, 17 Jan 2018 19:21:48 +0000 (21:21 +0200)]
drm/i915: Nuke intel_dp->channel_eq_status
intel_dp->channel_eq_status is used in exactly one function, and we
don't need it to persist between calls. So just go back to using a
local variable instead.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180117192149.17760-4-ville.syrjala@linux.intel.com
Ville Syrjälä [Wed, 17 Jan 2018 19:21:47 +0000 (21:21 +0200)]
drm/i915: Move SST DP link retraining into the ->post_hotplug() hook
Doing link retraining from the short pulse handler is problematic since
that might introduce deadlocks with MST sideband processing. Currently
we don't retrain MST links from this code, but we want to change that.
So better to move the entire thing to the hotplug work. We can utilize
the new encoder->hotplug() hook for this.
The only thing we leave in the short pulse handler is the link status
check. That one still depends on the link parameters stored under
intel_dp, so no locking around that but races should be mostly harmless
as the actual retraining code will recheck the link state if we
end up there by mistake.
v2: Rebase due to ->post_hotplug() now being just ->hotplug()
Check the connector type to figure out if we should do
the HDMI thing or the DP think for DDI
[pushed with whitespace changes for sparse]
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180117192149.17760-3-ville.syrjala@linux.intel.com
Ville Syrjälä [Wed, 17 Jan 2018 19:21:46 +0000 (21:21 +0200)]
drm/i915: Reinitialize sink scrambling/TMDS clock ratio on HPD
The LG 4k TV I have doesn't deassert HPD when I turn the TV off, but
when I turn it back on it will pulse the HPD line. By that time it has
forgotten everything we told it about scrambling and the clock ratio.
Hence if we want to get a picture out if it again we have to tell it
whether we're currently sending scrambled data or not. Implement
that via the encoder->hotplug() hook.
v2: Force a full modeset to not follow the HDMI 2.0 spec more
closely (Shashank)
[pushed with whitespace fixes to make sparse happy]
Cc: Shashank Sharma <shashank.sharma@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180117192149.17760-1-ville.syrjala@linux.intel.com
Ville Syrjälä [Wed, 17 Jan 2018 19:21:45 +0000 (21:21 +0200)]
drm/i915: Convert intel_hpd_irq_event() into an encoder hotplug hook
Allow encoders to customize their hotplug processing by moving the
intel_hpd_irq_event() code into an encoder hotplug vfunc. Currently
only SDVO needs this to re-enable hotplug signalling in the SDVO
chip. We'll use this same hook for DP/HDMI link management later.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Lyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180117192149.17760-1-ville.syrjala@linux.intel.com
Rodrigo Vivi [Tue, 6 Mar 2018 01:28:12 +0000 (17:28 -0800)]
drm/i915/cnp: Document WaSouthDisplayDisablePWMCGEGating
No functional change since WA is already applied.
But since it has different names on different databases,
let's document it here to avoid future confusion.
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306012812.19779-1-rodrigo.vivi@intel.com
Rodrigo Vivi [Tue, 6 Mar 2018 01:20:00 +0000 (17:20 -0800)]
drm/i915/cnl: document WaVFUnitClockGatingDisable
No functional change. WA is already properly applied.
but in different databases it has different names.
Let's document all of them to avoid future confusion.
Cc: Rafael Antognolli <rafael.antognolli@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180306012000.18928-1-rodrigo.vivi@intel.com
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