anv: add video engine support in various places

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20782>

zink: use screen indexing for bindless descriptor set in template bind

Fixes: 8636717270f ("zink: add a "compact" descriptor mode")

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: use screen indexing for bindless descriptor set in db bind

Fixes: 99ba529feed ("zink: implement descriptor buffer handling of bindless texture")

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: fix gpl lib hashing

this was including the generated tcs bits, which was likely to be wrong
and thus break optimal key hashing, requiring more pipelines

it also wasn't setting the optimal key value correctly during precompile,
which meant the wrong hash value was used and the precompiled libs were never
actually accessible

cc: mesa-stable

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: set zs feedback loop bit from driver workaround on ctx create

this may otherwise not be set until the cache has been broken

Fixes: 56fb2580642 ("zink: replace mixed_zs with zs feedback loops")

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: set gfx feedback loop bit in pipeline state for driver workaround

this needs to be set on context create or it may never get set

Fixes: 645f2da3faf ("zink: always set VK_PIPELINE_CREATE_COLOR_ATTACHMENT_FEEDBACK_LOOP_BIT_EXT sometimes")

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: don't set blend_id with full_ds3

this no longer needs to be part of the pso hash

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: add VK_PIPELINE_CREATE_DESCRIPTOR_BUFFER_BIT_EXT for gpl libs

required by spec

Fixes: 7ab5c5d36d2 ("zink: use EXT_descriptor_buffer with ZINK_DESCRIPTORS=db")

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: add a define for testing that an optimal key is the default

tcs values here are ignored since they only matter for generated tcs

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: add a define for the "default" optimal key

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: ralloc zink_shader structs

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: make last_vertex_stage the first bit in zink_vs_key_base

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: delete zink_screen::framebuffer_cache

no longer used

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: pass screen to descriptor_util_pool_key_get()

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: store last pipeline directly for zink_gfx_program::last_pipeline

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: remove duplicated gpl output blend initializations

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: move gpl usability checks to static inline for reuse

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: const-ify a bunch of shader key inlines

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: take screen param in init_db_template_entry()

ctx is no longer used

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: move bindless_layout to screen and init on creation

this is more consistent with the actual usage

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21169>

zink: set PIPE_CAP_VALIDATE_ALL_DIRTY_STATES

failing to set this yields patterns like

* bind fs
* bind samplerviews
* draw
* bind fs2
* ~~unbind samplerviews~~ (eliminated)
* draw

the eliminated unbinding of samplerviews between draws also eliminates a descriptor update,
triggering various artifacts in certain corner cases (like DOOM2016 shadows)

it's possible to manage the updating during shader binding, but the detection is a bit more
complex, and the cpu overhead from maintaining the current codepath with an
extra pipe_context::set_sampler_views (et al) isn't high enough to warrant further investigation
at this time

fixes #8252

Fixes: 153af03b941 ("gallium: Add cap to request state validation for all dirty state")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21176>

venus: disable non AHB external memory bits on Android

We are allowed to enable them in theory. However, the non-AHB external
memory support in Venus is very broken at this moment.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21155>

venus: enable timeline semaphore feedback

At vkQueueSubmit time, for each batch with timeline semaphores to
signal, append cmd_buffers with feedback cmds to update the counter
value in its respective feedback slot.

Since multiple signals on the same semaphore could be pending at the
same time across batches/vkQueueSubmits, src slots and commands are
allocated on demand. These src slots can be reused after they've been
signaled (if the current semaphore counter is greater/equal than the
src value) and are cleaned up on vkDestroySemaphore.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20500>

venus: add timeline semaphore feedback cmds

Unlike fence feedback, commands to update timeline semaphore feedback
slots can't be fully pre-recorded because of the counter value input
for signaling timeline semaphores. To avoid fully recording commands
during vkQueueSubmit, pre-record commands that write a counter value
from a feedback "src" slot to the feedback "dst" slot. Then at
vkQueueSubmit, parse the signal semaphores and write the signal counter
value in the feedback src slot and append the command that writes from
that feedback src slot offset to the command buffer associated with the
signal semaphore.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20500>

venus: add NO_TIMELINE_SEM_FEEDBACK perf option

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20500>

venus: refactor batch submission fixup

Refactor into the following stages:
 - prepare: Does an initial pass setting vn_queue_submission fields
   and fixing up semaphores.
 - alloc_storage: based on fields (including counts) from prepare,
   calculate and allocate the amount of temporary storage needed.
 - setup_batches: perform any modifications on the submission
   batches using the allocated temporary storage.
 - cleanup: free any temporary storage used.

Currently, only fence feedback needs alloc_storage and setup_batches
to append fence feedback to the submission but this slow will also
be utilized by upcoming timeline semaphore feedback.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20500>

venus: refactor semaphore helper functions

Change to inline functions using conditional operators

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20500>

gallium/auxiliary/vl: add crop to compute shader

Add a parameter for cropping, seperate from the translate
parameter, to the progressive compute shader.

Fixes: 4c46e4a5da5 ("gallium/auxiliary/vl: fix scale and translate parameters")
Fixes: 56eac722bd7 ("gallium/auxiliary/vl: compute shaders for progressive yuv")
Signed-off-by: Thong Thai <thong.thai@amd.com>
Tested-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Tested-by: Suresh Guttula <suresh.guttula@amd.com>
Acked-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21165>

intel/eu/gfx8-9: Fix execution with all channels disabled due to HW bug #220160235.

This hardware bug is the result of a control flow optimization present
in Gfx8-9 meant to prevent the ELSE instruction from disabling all
channels and update the control flow stack only to have them
re-enabled at the ENDIF instruction executed immediately after it.
Instead, on Gfx8-9 an ELSE instruction that would normally have ended
up with all channels disabled would pop off the last element of the
stack and jump directly to JIP+1 instead of to the ENDIF at JIP,
skipping over the ENDIF instruction.  In simple cases this would work
okay (though it's actual performance benefit is questionable), but in
cases where a branch instruction within the IF block (e.g. BREAK or
CONTINUE) caused all active channels to jump outside the IF
conditional, the optimization would break the JIP chain of "join"
instructions by skipping the ENDIF, causing the block of instructions
immediately after the ENDIF to execute with all channels disabled
until execution reaches the reconvergence point.

This issue was observed on SKL in the
dEQP-VK.reconvergence.subgroup_uniform_control_flow_elect.compute.nesting4.0.38
test in combination with some Vulkan binding model changes Lionel is
working on.  In such cases the execution with all channels disabled
was leading to corruption of an indirect message descriptor, causing a
hang.

Unfortunately the hardware bug doesn't provide a recommended
workaround.  In order to fix the problem we point the JIP of an ELSE
instruction to the instruction immediately before the ENDIF -- However
that's not expected to work due to the restriction that JIP and UIP
must be equal if and only if BranchCtrl is disabled -- So this patch
also enables BranchCtrl, which is intended to support join
instructions within the "ELSE" block, which in turn disables the
optimization described above, which in turn causes us to execute the
instruction immediately *before* the ENDIF with all channels disabled
-- So in order to avoid further fallout from executing code with all
channels disabled we need to insert a NOP before ENDIF instructions
that have a matching ELSE instruction.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20921>

lavapipe: Only check NULL pointers in one place in src_only_uses_uniforms

It took me a minute to figure out why the last uni_offsets NULL check
didn't also need to check num_offsets. I think this makes the code
slightly easier to understand.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21144>

lavapipe: Fix bad array index scale factor in lvp_inline_uniforms pass

A few lines earlier uni_offsets is accessed with ubo scaled by
PIPE_MAX_CONSTANT_BUFFERS:

   if (uni_offsets[ubo * PIPE_MAX_CONSTANT_BUFFERS + i] == offset)

Found by inspection.

Looking at the before and after NIR code for
dEQP-VK.graphicsfuzz.cov-int-initialize-from-multiple-large-arrays,
using the correct indexing appears to enable the pass to inline an
additional uniform. My guess is that when a uniform is used more than
once, the first loop wouldn't find the offset recored in the table
because it was recorded at the wrong location.

Fixes: d23a9380dd6 ("lavapipe: implement extreme uniform inlining")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21144>

virgl/video: disable decoder fence

Revert part of the commit 8187b35f to disable decoder fence for now
since it is causing regression for transcoding tests.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21145>

zink: fix pointcoord y inversion

Point sprite coordinates in general need to be inverted,
not just the texcoords converted to point sprite.

Move point coord y inversion out to its own pass.
Fixes GTF-GL46.gtf21.GL2FixedTests.point_sprites.point_sprites
with FBO dEQP surface.

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21050>

ci/android: add missing line terminator at the end of the file

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21157>

ci/android: move virgl-specific so lib name to virgl-defined variables

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21157>

ci/android: move virgl-specific deqp suite to virgl-defined variables

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21157>

ci/android: move virgl-specific fails/flakes/skips lists to virgl-defined variables

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21157>

ci/android: move virgl-specific gpu_mode to virgl-defined variables

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21157>

ci/android: move common config to common job

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21157>

intel/genxml/gen125: Tune 3DSTATE_WM Walker direction

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21105>

intel/genxml/gen125: Add walker configuration fields to 3DSTATE_WM

Setting default expected values as default in the xml.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21105>

aco: fix out-of-bounds access when moving s_mem(real)time across SMEM

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8224
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21138>

lavapipe: disable VK_FORMAT_FEATURE_2_COLOR_ATTACHMENT_BLEND_BIT for int formats

this is unsupported and undefined by the spec

cc: mesa-stable

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21099>

v3dv: ensure we apply binning syncs to secondary command buffers

Currently, we postpone binning syncs until we record draw calls
and can validate if any of them require accessing protected
resources in the binning stage, however, if the draw calls are
recorded in a secondary command buffer and the barriers have
been recorded in the primary command buffer, we won't apply the
binning sync in the secondary when we record the draw calls
and so we must apply it when we execute the secondary in the
primary.

Fixes flakyness in:
dEQP-VK.api.command_buffers.record_many_draws_secondary_2

cc: mesa-stable

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21162>

v3dv: ensure at least V3D_CL_MAX_INSTR_SIZE bytes in last CL instruction

The CLE parser in the sim will read this many bytes for each instruction
in a CL, so we should ensure we have at least that many bytes available
in the BO when reading the last instruction, otherwise we can trigger
a GMP violation. It is not clear whether this behavior applies to real
hardware too.

cc: mesa-stable

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21162>

pvr: remove start/stop transfer flags

These are ignored by the pvrsrvkm KMD and don't exist in the new KMD.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Luigi santivetti <luigi.santivetti@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21132>

meson: Ignore unused variables when assertions are disabled

Fixes: 46b099e3
("meson: Ignore unused variables in release builds")

46b099e3 has some issues:
- it doesn't enable unused variables warning on release builds
with assertions enabled;
- it doesn't disable unused variables warning on debug builds
with assertions disabled;
- it doesn't disable unused variables warning when building
with MSVC and assertions are disabled regardless of buildtype,
see #8147. 3/4 regressions reported there have this limitation
alone as root cause.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21154>

radv: use amd common force_vrs option

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21010>

radv: move radv_consider_force_vrs above radv_fill_shader_info

It will be used by radv_fill_shader_info, no function change.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21010>

anv: use malloc for host only descriptor sets

On integrated products this makes almost no difference but on discrete
it's pretty important.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Chuansheng Liu <chuansheng.liu@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21131>

radv/vcn: enable dynamic dpb tier 2 for h264/h265 on navi21+

navi21 can do separate image support, using tier 2 DPB messages.

This enables support for doing that in the vulkan video driver.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

radv/video: add h265 decode UVD support

Add support for h265 decode on older UVD GPUs

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

radv: add vcn h265 decode.

This adds support for HEVC decode in VCN

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

radv/video: add h264 support for uvd

This adds support for the older UVD h264 decoder.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

radv/video: add initial h264 decoder for VCN

This adds support for H264 decode on VCN hardware.

It uses the full DPB method, and relies on the application
to allocate an arrayed texture for the DPB to be stored into.

RADV_PERFTEST=video_decode is required to enable this.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

radv/video: add initial frameworking.

This just adds the basic commands and objects, and hooks up some
of the queues and extensions.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

radv: add video decoder register setup.

This just assigns the correct registers depending on the gpu family.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

radv: adding video decode queue support

This adds the video queue interactions to radv and builds
on the winsys code previously added.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

ac: add name to codec info struct

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

radv: add new upload alloc aligned api

The video buffers need to have objects aligned at certain ranges,
this enhances the uploader to allow an alignment to be specified.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

radv: remove the status query mark it unsupported.

The current firmware can't support the status query requirements.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20388>

freedreno+ir3: Move storage_16bit to compiler options

This isn't a thing in gl.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21152>

anv: Make a batch decoder for each queue family

The decoder context needs to know what engine it's associated with.
Nowadays, we have render, compute, blitter, even video engines being
used from the same driver.  Rather than trying to have a single decoder
and thwacking the engine field back and forth between calls, we make
one per queue family, and stash a pointer in anv_queue for easy access.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21149>

v3d/v3dv: use shader_info->var_copies_lowered

Instead of passing allow_copies as a parameter for v3d_optimize_nir
(so manually doing that tracking).

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19338>

anv: use shader_info->var_copies_lowered

Instead of passing allow_copies as a parameter for brw_nir_optimize
(so manually doing that tracking).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19338>

radv: use shader_info->var_copies_lowered

Instead of passing allow_copies as a parameter for radv_optimize_nir
(so manually doing that tracking).

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19338>

nir: track if var copies lowering was called

In general we should only call it once, and then we should avoid to
call any lowering that introduce back copies. So far we were tracking
that manually out of the nir shader on several places.

Ideally we would like to add a nir_validate rule, but right now there
are some exceptions to this rule. For example right now the Intel
compiler calls nir_lower_io_to_temporaries as part of linking
tess_ctrl/mesh/task sahders.

One option would be to allow drivers to reset the value, but for now
let's not add that validation rule.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19338>

loader: unregister special event in loader_dri3_drawable_fini

This was inadvertently removed in 98a6cfd3953 and causes continuous
memory leaks as events are being received after the context has been
unbound.

Fixes: 3170b63314f ("loader: Add infrastructure for tracking active CRTC resources")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8238
Signed-off-by: Yuxuan Shui <yshuiv7@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21128>

r300: set register file to none if swizzles are constant only

In constant folding when converting multiply by zero to mov.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21141>

fix: gallivm: limit usage of LLVMContextSetOpaquePointers() to LLVM 15

LLVMContextSetOpaquePointers() was a temporary workaround offered to
allow transitioning to opaque pointers. Mesa is ready for this now with
recent versions of LLVM (16+). Therefore we limit the workaround of
using LLVMContextSetOpaquePointers() to LLVM 15 now, that this C
interface was removed in LLVM 17.

Reference: https://github.com/llvm/llvm-project/commit/1270879376025457e266572c7cccc51eb5de9276
Suggested-by: Dave Airlie <airlied@redhat.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8183
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21124>

radv: Use common ycbcr conversion lowering

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20731>

vulkan,nir: Refactor ycbcr conversion state into a struct

This will be useful for RADV since it hashes the state.

v3dv changes:
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20731>

radv: Remove radv_indirect_unaligned_dispatch

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21071>

radv: Use an ordered dispatch for BVH encoding

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21071>

radv: Implement ordered compute dispatches

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21071>

radv: Make radv_compute_dispatch non-static

To avoid adding yet another radv_*_dispatch helper.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21071>

Revert "ci: disable Collabora's LAVA lab for maintance"

This reverts commit 60d7e15a7e61c6d51c3fa8e26839793782a12fb4.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20903>

radeonsi/ci: Skip slow traces on raven

Two traces timed out during Collabora's LAVA farm re-enablement.
Possibly, some commit made them slower during farm downtime.

- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/35934124

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20903>

radeonsi/ci: Update stoney test expectations

Some jobs failed during the re-enablement of Collabora's LAVA farm.

The trace job radeonsi-stoney-traces:amd64 produced some traces with
almost unnoticeable lighting spread difference, so I updated all the
traces.

Now the test spec@ext_texture_lod_bias@lodbias is failing after running
a couple of times.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20903>

intel/dev: Add another EHL pci id

described as "32 Execution Unit (EU) Super SKU" in:
Intel Atom x6000E Series, and Intel Pentium and Celeron N and
J Series Processors for IoT Applications
Datasheet, Volume 1
Document Number: 636112-1.6

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21129>

intel/dev: remove invalid EHL pci id

removed in linux
0e8e272f1368 ("drm/i915/ehl: Remove invalid PCI ID")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21129>

zink: fix max acquired image count

according to spec, the maximum number of acquired images can be calculated with

swapchain_size - VkSurfaceCapabilitiesKHR::minImageCount + 1

the previous calculation was both wrong and occurring in the wrong place,
so this corrects both issues

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21095>

zink: clear null image surfaces to 0

GL Spec says that imageLoad from incomplete images must return 0.
This is not really spec compliant as for proper behavior nullDescriptor
and robustImageAccess2 is needed.
A workaround for lack of either of these requires a shader variant.
Clearing the null surface and hoping the app doesn't write to the image
is closer to spec, while avoiding a shader recompile.

KHR-GL46.shader_image_load_store.incomplete_textures tests this.

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21135>

radv: do not insert fast-linked libraries to the shaders cache

Similar to fast-linked pipelines that aren't added to the cache.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21133>

zink: fix leak when rebinding same image surface

simple way to reproduce this is to run these 4 together:
KHR-GL46.gpu_shader5.images_array_indexing
KHR-GL46.shader_image_load_store.advanced-allMips
KHR-GL46.shader_image_load_store.advanced-sso-simple
KHR-GL46.shader_image_load_store.incomplete_textures

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21134>

zink: only save frag const buffers when used by blit

fixes upload manager constant buffer leak.
zink only needs to save the const buffer for stencil fallback blits.

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21134>

radv/llvm: use the ring_offsets shader arg

Besides being nicer, this also fixes load_sample_positions_amd with LLVM.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19202>

ac/llvm: let ring_offsets be accessed like a normal arg

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19202>

ac: move ring_offsets to ac_shader_args

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19202>

radv: set state.vbo_misaligned_mask_invalid in radv_bind_vs_input_state

Found by inspection. Something probably hangs because of this, but I don't
know what.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: c199a5160a0 ("radv: bind the VS input state for prologs created with GPL")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20913>

pvr: add padding bytes when allocating buffer memory

We need to pad VkBuffers to ensure we don't read beyond a page boundary.

An alternative to this approach would be to allocate an additional virtual
page when binding memory to the buffer, and to map this to the first
physical address, so both the first and last virtual page point to the same
physical location. This would be less expensive in terms of memory usage,
but more complex and invasive, hence the simpler approach has been taken
for now.

Signed-off-by: Luigi Santivetti <luigi.santivetti@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21101>

pvr: Set SPMSCRATCHBUFFER flag.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21102>

pvr: Update comment about ZS and MSAA buffers for pvrsrvkm submission.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21102>

pvr: Acquire scratch buffer on framebuffer creation.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21102>

pvr: Add SPM scratch buffer infrastructure.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21102>

intel/ds: track end of pipe bits

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>

anv: rename a few internal functions to highlight gfx use

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>

anv: rename RT pipeline function helper

Making it clear this is intended for RT pipelines only.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>

intel/fs: make alpha_to_coverage a tristate

That way in some cases we can do this dynamically.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>

intel/fs: Rework dynamic coarse handling

Use 2 flags for PI & RT messages.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>