Arnd Bergmann [Tue, 20 Jun 2023 20:54:14 +0000 (22:54 +0200)]
Merge tag 'qcom-arm64-for-6.5-2' of https://git./linux/kernel/git/qcom/linux into soc/dt
More Qualcomm ARM64 DTS changes for v6.5
This introduces support for the Qualcomm SDX75 platform, with the IDP
reference board. On IPQ5332 the RDP474 board is added and on IPQ9574 the
RDP454 is introduced.
On SC8280XP, and hence Lenovo ThinkPad X13s, GPU support is added.
For QDU1000, SDM845, SM670, SC8180X, SM6350 and SM8550 the RSC is added
to the CPU cluster power-domain to flush sleep & wake votes as the
cluster goes down.
On IPQ5332 additional reserved-memory regions to improve post mortem
debugging. UART1 is added. The MI01.2 board is renamed RDP441 and the
RDP474 is added.
On IPQ8074 critical thermal trip points are defined.
As with IPQ5332 additional reserved-memory regions are used to improve
post mortem debugging. Thermal sensors (tsens) are added and zones
defined. The crypto engine is added, and support for the RDP454 board is
added.
Across MSM8916 and MSM8939 pinctrl state definitions are cleaned up and
the purpose of msm8939-pm8916 is documented. MSM8939 has regulator
definitions cleaned up, following to the previous effort on MSM8916.
CPU Bus Fabric scaling support is added to MSM8996 Pro.
On QCM2290 CPU idle states are added.
For QDU1000 SDHCI is introduced and enabled on the IDP to gain eMMC
support. IMEM and PIL information regions are defined for improved post
mortem debugging.
The Qualcomm Robotics RB2 kit gets its on-board buttons described.
A few fixes are introduced for the newly merged SC8180X, in particluar
the DisplayPort blocks are moved to the MMCX power domain to avoid power
being reduced prematurely during boot.
The SC8280XP GPU is added and enabled for the Lenovo Thinkpad X13s,
and resets for the soundwire controllers are added. The OUI is
specified for ethernet phys on SA8540P Ride platform, to avoid reset
issues.
Charger description is added to the PMI8998 PMIC and enabled across
OnePlus 6/6T, SHIFT SHIFT6mq and Xiaomi Pocophone F1.
On SM6350 CPU idle states and UART1 are added. And SM6375 gains GPU
clock controller and IOMMU definitions.
The Fairphone FP4 gains Bluetooth support.
SM8150 is transitioned to use 2 interconnect-cells, and the USB
interconnect path is described to ensure buses are adequately voted for.
The same changes are done for SM8250, and the resolution of the
static framebuffer on Sony Xperia 1 II and 5 II are corrected.
The USB bus paths are also added to SM8350, SM8450 and SM8550.
On SM8550 DisplayPort nodes are added, as is the PWM controller for
driving the notification LED and the RTC is enabled. For the MTP and QRD
boards, the soundcard and audio codecs are defined.
A Tegra change, related to LP855X binding changes, was accidentally
picked up and dropped again later.
A number of DeviceTree fixes identified through validation was
introduced as well. Additionally a few nodes got their default status
changed to avoid unnecessarily having to enable them (e.g. the mdp/dpu
node).
* tag 'qcom-arm64-for-6.5-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (94 commits)
Revert "arm64: dts: adapt to LP855X bindings changes"
arm64: dts: qcom: sc8280xp: Enable GPU related nodes
arm64: dts: qcom: sc8280xp: Add GPU related nodes
arm64: dts: qcom: msm8939-pm8916: Mark always-on regulators
arm64: dts: qcom: msm8939: Define regulator constraints next to usage
arm64: dts: qcom: msm8939-pm8916: Clarify purpose
arm64: dts: qcom: msm8939: Fix regulator constraints
arm64: dts: qcom: msm8939-sony-tulip: Allow disabling pm8916_l6
arm64: dts: qcom: msm8939-sony-tulip: Fix l10-l12 regulator voltages
arm64: dts: qcom: msm8939: Disable lpass_codec by default
arm64: dts: qcom: msm8939-pm8916: Add missing pm8916_codec supplies
arm64: dts: qcom: qrb4210-rb2: Enable on-board buttons
arm64: dts: qcom: msm8916: Drop msm8916-pins.dtsi
arm64: dts: qcom: msm8916/39: Rename wcnss pinctrl
arm64: dts: qcom: msm8916/39: Cleanup audio pinctrl
arm64: dts: qcom: apq8016-sbc: Drop unneeded MCLK pinctrl
arm64: dts: qcom: msm8916/39: Consolidate SDC pinctrl
arm64: dts: qcom: msm8916/39: Fix SD card detect pinctrl
arm64: dts: qcom: msm8996: rename labels for HDMI nodes
arm64: dts: qcom: sm8250: rename labels for DSI nodes
...
Link: https://lore.kernel.org/r/20230615162043.1461624-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:51:55 +0000 (22:51 +0200)]
Merge tag 'ti-k3-dt-for-v6.5' of https://git./linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.5
New Boards:
phyBOARD-Lyra-AM625 Board support
Toradex Verdin AM62 COM, carrier and dev boards
New features:
Across K3 SoCs:
- Error Signaling Module(ESM) and Secproxy IPC modules
- On board I2C EEPROM
- Voltage Temp Monitoring (VTM) module
- DM timers (GP Timers)
J784s4:
- R5 and C7x DSP remoteproc, ADC, QSPI
AM69:
- Addition of more peripherals: CPSW, eMMC, UARTs, I2C et al
J721s2:
- USB, Serdes, OSPI, PCIe
AM62a:
- Watchdog
J721e:
- HyperFlash/HyperBus
AM62:
- Type-C USB0 port
Cleanups and non-urgent fixes
Particularly large set of cleanups to get rid of dtbs_check errors and
dtc warnings:
- Addition of missing pinmux and uart nodes for AM64, AM62x, AM62A,
J721e, J7200 that are used by bootloader
- Split Pinmux regions/range to avoid holes for J721s2, J7200, J784s4
- Drop bootargs and unneeded aliases across all K3 SoCs
- Move aliases to board dts files from SoC dtsi files
- Move to generic node name for can, rtc nodes on am65
- s/-pins-default/default-pins/ to match upcoming pinctrl.yaml update
- Fix pinctrl phandle references to use <> as separator where multiple
entries are present
* tag 'ti-k3-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (153 commits)
arm64: dts: ti: Unify pin group node names for make dtbs checks
arm64: dts: ti: add verdin am62 yavia
arm64: dts: ti: add verdin am62 dahlia
arm64: dts: ti: add verdin am62
dt-bindings: arm: ti: add toradex,verdin-am62 et al.
arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM625
dt-bindings: arm: ti: Add bindings for PHYTEC AM62x based hardware
arm64: dts: ti: k3-j7200-mcu-wakeup: Remove 0x unit address prefix from nodename
arm64: dts: ti: k3-j721e-som-p0: Enable wakeup_i2c0 and eeprom
arm64: dts: ti: k3-am64: Add ESM support
arm64: dts: ti: k3-am62: Add ESM support
arm64: dts: ti: k3-j7200: Add ESM support
arm64: dts: ti: k3-j721e: Add ESM support
dt-bindings: misc: esm: Add ESM support for TI K3 devices
arm64: dts: ti: k3-j721s2-som-p0: Enable wakeup_i2c0 and eeprom
arm64: dts: ti: k3-j721s2-common-proc-board: Add uart pinmux
arm64: dts: ti: k3-am68-sk-som: Enable wakeup_i2c0 and eeprom
arm64: dts: ti: k3-am68-sk-base-board: Add uart pinmux
arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header
arm64: dts: ti: k3-j721s2: Fix wkup pinmux range
...
Link: https://lore.kernel.org/r/7fe0c6de-cb99-9c89-8583-b3855fde16f8@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:50:16 +0000 (22:50 +0200)]
Merge tag 'zynqmp-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx into soc/dt
arm64: ZynqMP DT changes for v6.5
Various small fixes and cleanups to be aligned with the latest dt-schema.
Other major changes are:
- Wire mali-400 gpu
- Change board name for zcu1275
- Use ethernet-phy-id to handle ETH phy reset properly
- Switch to amd.com emails
- Update people in DT bindings
* tag 'zynqmp-dt-for-v6.5' of https://github.com/Xilinx/linux-xlnx: (33 commits)
dt-bindings: usb: xilinx: Replace Manish by Piyush
dt-bindings: xilinx: Remove Rajan, Jolly and Manish
arm64: zynqmp: Used fixed-partitions for QSPI in k26
arm64: zynqmp: Add pmu interrupt-affinity
arm64: zynqmp: Set qspi tx-buswidth to 4
arm64: zynqmp: Fix usb node drive strength and slew rate
arm64: zynqmp: Describe TI phy as ethernet-phy-id
arm64: zynqmp: Switch to amd.com emails
arm64: zynqmp: Convert kv260-revA overlay to ASCII text
dt-bindings: xilinx: Switch xilinx.com emails to amd.com
arm64: xilinx: Use zynqmp prefix for SOM dt overlays
arm64: zynqmp: Add phase tags marking
arm64: zynqmp: Describe bus-width for SD card on KV260
arm64: zynqmp: Enable AMS on SOM and other zcu10x boards
arm64: zynqmp: Enable DP driver for SOMs
arm64: zynqmp: Setup clock for DP and DPDMA
arm64: zynqmp: Switch to ethernet-phy-id in kv260
arm64: zynqmp: Disable USB3.0 for zc1751-xm016-dc2
arm64: zynqmp: Add pinctrl emmc description to SM-K26
arm64: zynqmp: Add gpio labels for modepin gpio
...
Link: https://lore.kernel.org/r/CAHTX3d+2s_KmCnd=x5hydGb+LYoznAzYGTizvqqN2NFmrBurfw@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:49:35 +0000 (22:49 +0200)]
Merge tag 'riscv-dt-for-v6.5' of https://git./linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.5
StarFive:
Watchdog nodes for both the JH7110 & its forerunner, the JH7100. PMU, P
being power, support for the JH7110. PMIC and frequency scaling support
for the JH7110 equipped VisionFive 2.
Most of the DT bits for the JH7110, and the SBCs using it, are pending
support for one of the clock controllers, so it's a smaller set of
changes than I would have hoped for.
Misc:
Pick up some dt-binding cleanup that Palmer assigned to me & had no
uptake from the respective maintainers. My powers of estimation failed
me again, with part of my motivation for picking them up being the
addition of new platforms that ended up not making it. Hopefully next
window for those, as they were relatively close.
Exclude the Allwinner and Renesas subdirectories from the Misc.
MAINTAINERS entry, since I do not take care of those.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: starfive: Add cpu scaling for JH7110 SoC
riscv: dts: starfive: Enable axp15060 pmic for cpufreq
dt-bindings: interrupt-controller: sifive,plic: Sort compatible values
dt-bindings: timer: sifive,clint: Clean up compatible value section
riscv: dts: starfive: jh7110: Add watchdog node
riscv: dts: starfive: jh7100: Add watchdog node
riscv: dts: starfive: Add PMU controller node
MAINTAINERS: exclude maintained subdirs in RISC-V misc DT entry
Link: https://lore.kernel.org/r/20230612-fasting-floss-0bc05a08bc7a@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Sam Protsenko [Mon, 12 Jun 2023 18:01:02 +0000 (20:01 +0200)]
arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
As described in the corresponding binding documentation for
"samsung,exynos850-pmu", the "clocks" property should be used for
specifying CLKOUT mux inputs. Therefore, the clock provided to exynos850
pmu_system_controller is incorrect and should be removed. Instead of
making syscon regmap keep that clock running for PMU accesses, it should
be made always running in the clock driver, because the kernel is not
the only software accessing PMU registers on Exynos850 platform.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20230308233822.31180-8-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230612180102.289745-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:46:45 +0000 (22:46 +0200)]
Merge tag 'v6.5-rockchip-dts64-1' of git://git./linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards are
- Indiedroid Nova (rk3588)
- Add Edgeble Neural Compute Module 6B (rk3588)
- FriendlyARM NanoPi R2C Plus (rk3328)
- Anbernic RG353PS (rk3566)
- Lunzn Fastrhino R66S / R68S (rk3568)
The rk3588 got a lot of attention and gained support for the GIC ITS
(needed an errata from Rockchip), timers, otp memory, saradc and sdio.
The rk356x got support for its RGA block
With all the core improvements to rk3588 support, the Rock5b got a lot
improvements from that too, namely support for its PMIC, sd-card and
saradc, as well as a clock-rate fix for its es8316 codec.
Similarly the rk3588-evb1 also got support for its PMIC.
The Anberic RGxx3 series got a better bluetooth compatible and updates
to its LEDs to make them use the PWM blocks they're connected to.
* tag 'v6.5-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits)
arm64: dts: rockchip: Add saradc node to rock5b
arm64: dts: rockchip: Fix compatible for Bluetooth on rk3566-anbernic
arm64: dts: rockchip: Add SD card support to rock-5b
arm64: dts: rockchip: add PMIC to rock-5b
arm64: dts: rockchip: Assign ES8316 MCLK rate on rk3588-rock-5b
arm64: dts: rockchip: Add Indiedroid Nova board
dt-bindings: arm: rockchip: Add Indiedroid Nova
dt-bindings: vendor-prefixes: add Indiedroid
arm64: dts: rockchip: Add sdio node to rk3588
arm64: dts: rockchip: add default pinctrl for rk3588 emmc
arm64: dts: rockchip: Add DT node for ADC support in RK3588
arm64: dts: rockchip: add PMIC to rk3588-evb1
arm64: dts: rockchip: Add rk3588 Edgeble Neu6 Model B IO
arm64: dts: rockchip: Add rk3588 Edgeble Neu6 Model B SoM
arm64: dts: rockchip: Add Rockchip RK3588J
dt-bindings: arm: rockchip: Add Edgeble Neural Compute Module 6B
arm64: dts: rockchip: Add RGA2 support to rk356x
media: dt-bindings: media: rockchip-rga: add rockchip,rk3568-rga
arm64: dts: rockchip: Add rk3588 OTP node
arm64: dts: rockchip: Add FriendlyARM NanoPi R2C Plus
...
Link: https://lore.kernel.org/r/3239799.44csPzL39Z@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:45:40 +0000 (22:45 +0200)]
Merge tag 'qcom-dts-for-6.5' of https://git./linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM32 DeviceTree updates for v6.5
NAND support on IPQ4019 boards is restored, after a faulty node rename.
On MSM8226 IMEM, PMU and RPM stats are introduced. The Huawei Watch
gains vibrator support.
On MSM8974, the LGE Nexus 5 gains vibrator support. The APQ8074
Dragonboard marks BLSP2 BAM controlled remotely, DSI panel, audio and
modem DSPs are enabled.
On SDX65 PCIe controller and PHY are introduced, to provide endpoint
functionality. This is enabled on the related MTP.
A range of DeviceTree cleanups are also included.
* tag 'qcom-dts-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits)
ARM: dts: qcom: apq8074-dragonboard: enable DSI panel
ARM: dts: qcom: apq8074-dragonboard: enable adsp and MSS
ARM: dts: qcom: apq8074-dragonboard: Set DMA as remotely controlled
ARM: dts: qcom: apq8026-huawei-sturgeon: Add vibrator
ARM: dts: qcom: msm8226: Add IMEM node
ARM: dts: qcom: msm8226: Add rpm-stats device node
ARM: dts: qcom: msm8226: Add PMU node
ARM: dts: qcom: sdx65-mtp: Enable PCIe EP
ARM: dts: qcom: sdx65-mtp: Enable PCIe PHY
ARM: dts: qcom: sdx65: Add support for PCIe EP
ARM: dts: qcom: sdx65: Add support for PCIe PHY
ARM: dts: qcom: msm8974: align WCNSS Bluetooth node name with bindings
ARM: dts: qcom: apq8084: correct thermal sensor unit-address
ARM: dts: qcom: msm8960-cdp: move regulator out of simple-bus
ARM: dts: qcom: apq8060-dragonboard: move regulators out of simple-bus
ARM: dts: qcom: ipq8064: align USB node names with bindings
ARM: dts: qcom: ipq8064: correct LED node names
ARM: dts: qcom: ipq8064: drop invalid GCC thermal-sensor unit-address
ARM: dts: qcom: ipq8064: drop leading 0 from unit-address
ARM: dts: qcom: msm8974: correct pronto unit-address
...
Link: https://lore.kernel.org/r/20230611010843.2482142-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:43:04 +0000 (22:43 +0200)]
Merge tag 'qcom-arm64-for-6.5' of https://git./linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 DeviceTree updates for v6.5
This introduces the RDP442 and RDP433 reference devices on IPQ5332 and
IPQ9574, respectively. RDP418, RDP433, RDP449 and RDP453 on the IPQ9574
are added. On MSM8939 the Square T2 board and the Sony Xperia M4 Aqua is
added. Support for Acer Apire 1, built on the Snapdragon 7c platform is
introduced. Fxtec Pro1X on SM6115 is added. Lastly long floating
support for SC8180X and the Lenovo Flex 5G, and the Primus reference
device, has been added.
On IPQ5332 and IPQ6018 QFPROM support is introduced, and as described
above the RDP442 board on the prior. Download mode support and various
reserved-memory regions are also introduced on IPQ6018.
IPQ8074 gains another SPI controller.
On IPQ9574 CPU frequency scaling, low speed busses, RNG, Watchdog,
qfprom, SMEM and RPM are introduced. As are support for four new board,
mentioned above.
MSM8916 gains a range of structural improvements, to better suite the
various boards supported. Regulator constraints are corrected and their
states are adjusted to match reality (e.g. always-on regulators marked
as always-on). BQ Aquaris X5 gains support for front flash LED.
As mentioned above, MSM8939 support is introduced with support for
boards from Sony and Square.
MSM8953 gains DMA support in I2C masters.
MSM8996-based Sony Xperia boards gains description of their RGB
notification LED.
On SA8775P support for UFS, USB, GPU clock and iommu controllers, PMU,
AOSS, watchdog and missing low-speed controllers are added. On the Ride
platform UFS, USB and an i2c bus are enabled.
iommu properties are added to QSPI on both SC7180 and SC7280. LPASS
clocks are adjusted and MDP node cleaned up slightly, on SC7180. As
mentioned above, support for Acer Aspire 1 is introduced.
Long lingering patches introducing SC8180X, the Lenovo Flex 5G and the
Primus reference device has been merged.
On SC8280XP ethernet is added and enabled on the automotive ride
platform. An SDC controller is introduced and enabled on the SC8280XP
CRD. On the Lenovo Thinkpad X13s and the CRD reference device the USB
SuperSpeed phy is added to the Type-C graph, to enable support for
orientation switching.
Fairphone 3 gains support for its notification LED.
On SDM845 the iommu stream for QSPI is defined, SHIFT SHIFT6mq gains
support for flash LED and the RB3 (DB845c) board gains support for
bonded/dual DSI-mode, to allow 4k output.
On SM6115 CPU idle-states, crypto engine support and SuperSpeed USB PHY
are introduced. As mentioned above Fxtec Pro1X is introduced. On the
QRB4210 Robotics Platform RB2 USB, Audio and Compute DSPs, display,
CAN-bus and GPIO LEDs are introduced, fixed regulators are described and
the SD-card description is corrected.
Support for crypto engine is added to SM8150, while Sony Xperia 1 and 5
gains SD-card support, camera regulators and GPIO line names sorted out.
SM8250 also gets support for crypto engine, and Sony Xperia 1 II and 5
II gains support for hardware video accelerator.
Crypto engine is introduced for SM8350 as well. The HDK gets the USB
Type-C graph described for Superspeed orientation switching and
DisplayPort output.
On SM8450 video clock controller and crypto engine are added, missing
opp levels are introduced and the USB Type-C graph is defined for
orientation switching and altmode.
SM8550 gains GPU and video clock controllers and missing opp levels are
added. The WCD9385 audio codec is added for the SM8550 MTP and on the
QRD PCIe, USB, audio display and flash LED are added.
* tag 'qcom-arm64-for-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (195 commits)
arm64: dts: qcom: sc8180x: Introduce Lenovo Flex 5G
arm64: dts: qcom: sc8180x: Introduce Primus
arm64: dts: qcom: sc8180x: Add pmics
arm64: dts: qcom: sc8180x: Add display and gpu nodes
arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes
arm64: dts: qcom: sc8180x: Add PCIe instances
arm64: dts: qcom: sc8180x: Add QUPs
arm64: dts: qcom: sc8180x: Add thermal zones
arm64: dts: qcom: sc8180x: Add interconnects and lmh
arm64: dts: qcom: Introduce the SC8180x platform
arm64: dts: qcom: msm8916: Move aliases to boards
arm64: dts: qcom: pm8916: Rename &wcd_codec -> &pm8916_codec
arm64: dts: qcom: msm8916/39: Clean up MDSS labels
arm64: dts: qcom: msm8916/39: Use consistent name for I2C/SPI pinctrl
arm64: dts: qcom: msm8916/39: Rename &blsp1_uartN -> &blsp_uartN
arm64: dts: qcom: msm8916: Rename &msmgpio -> &tlmm
arm64: dts: qcom: qrb4210-rb2: Enable USB node
arm64: dts: qcom: sm6115: Add USB SS qmp phy node
arm64: dts: qcom: ipq5332: add support for the RDP442 variant
dt-bindings: arm: qcom: document MI01.3 board based on IPQ5332 family
...
Link: https://lore.kernel.org/r/20230611004944.2481596-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:40:43 +0000 (22:40 +0200)]
Merge tag 'imx-dt64-6.5' of git://git./linux/kernel/git/shawnguo/linux into soc/dt
i.MX arm64 device tree for 6.5:
- New board support: i.MX8MM based Emtop SoM & Baseboard, NXP i.MX8MM EVKB
board, i.MX8MP based Gateworks Venice gw7905-2x device.
- A series from Adam Ford to add Camera and Audio support for i.MX8M
based Beacon boards.
- Add Audio output support for i.MX8MP TQMa8MPxL/MBa8MPxL board.
- Add HDMI and display support for imx8mm-evk and imx8mm-phg board.
- Add coresight trace devices support for i.MX8MP SoC.
- A couple of changes from Krzysztof Kozlowski to add missing cache
properties.
- A couple of changes from Laurent Pinchart to add CSIS and ISI devices
for i.MX8MP SoC.
- A series from Marek Vasut to add more devices for i.MX8MP, and enable
SAI audio on i.MX8MP DHCOM PDK2 and PDK3.
- Correct GSC vdd_bat data size for Gateworks Venice devices.
- Add more device support for i.MX93, Watchdog, OCOTP, idle states, DDR
performance monitor, etc.
- Small and random clean-ups and device node additions.
* tag 'imx-dt64-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (47 commits)
arm64: dts: imx8mq: Pass address-cells/size-cells to mipi_dsi
arm64: dts: imx8mq: Use 'dsi' as node name
arm64: dts: imx8mp-venice-gw702x: fix GSC vdd_bat data size
arm64: dts: imx8mq-tqma8mq-mba8mx: Remove invalid properties
arm64: dts: imx8mq: Add missing pci property
arm64: dts: imx8mq: Fix lcdif clocks
arm64: dts: imx8mq: Fix lcdif compatible
arm64: dts: imx8mp: don't initialize audio clocks from CCM node
arm64: dts: imx8mm-venice: Fix GSC vdd_bat data size.
arm64: dts: imx8mp: Add coresight trace components
arm64: dts: imx93: add ddr performance monitor node
arm64: dts: imx8mm-phg: Add display support
arm64: dts: tqma8mqml: Add vcc supply to i2c eeproms
arm64: dts: imx8mm-evk: Add HDMI support
arm64: dts: imx8mn-var-som-symphony: adapt FEC pinctrl for SOMs with onboard PHY
arm64: dts: imx8mn-var-som: add 20ms delay to ethernet regulator enable
arm64: dts: imx8mp-msc-sm2s: Add sound card
arm64: dts: imx8mn-beacon: Migrate sound card to simple-audio-card
arm64: dts: imx8mp-beacon-kit: Enable WM8962 Audio CODEC
arm64: dts: imx93: add fsl,stop-mode property to support WOL
...
Link: https://lore.kernel.org/r/20230610072530.418847-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:38:10 +0000 (22:38 +0200)]
Merge tag 'imx-dt-6.5' of git://git./linux/kernel/git/shawnguo/linux into soc/dt
i.MX ARM device tree for 6.5:
- New board support: Marantec Maveo Box.
- Add HDMI support for TQMa6x/MBa6 board.
- A series from Andrew Lunn to add phy-mode and fixed links for Ethernet
devices on imx51, imx6qdl and vf610.
- A bunch of changes from Fabio Estevam to clean up deprecated and
invalid properies, fix up node names to remove dt-schema warnings.
- A series of maintenance updates for Protonic Holland boards, mostly
on the USB subsystem configuration, thermal zones, and the naming of
GPIO keys.
- Update dma-apbh device node name to remove dtbs_check warnings.
- Remove invalid nodes from fan-controller for a couple of Gateworks
boards.
- Small random updates and clean-ups on various boards.
* tag 'imx-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (53 commits)
ARM: dts: imx6qdl: vicut1: rename power to power-button
ARM: dts: imx6dl: prtrvt, prtvt7, prti6q, prtwd2: fix USB related warnings
ARM: dts: imx6dl: plybas: fix USB over-current detection on USB OTG port
ARM: dts: imx6ul: prti6g: fix USB over-current detection on USB OTG port
ARM: dts: imx6qp: prtwd3: Enable USB over current detection on USB OTG port
ARM: dts: imx6dl: prtmvt: fix different USB related warnings
ARM: dts: imx6dl: alti6p: fix different USB related warnings
ARM: dts: imx6dl: vicut1: Address USB related warnings
ARM: dts: imx6dl: Add trip points to thermal zones on several devices
ARM: dts: imx6dl: lanmcu: Configure over-current polarity for USB OTG node
ARM: dts: imx6dl: lanmcu: Disable unused USB PHY nodes
ARM: dts: imx6q: prtwd2: Correct iomux configuration for ENET MDIO and MDC
ARM: dts: imx6dl: prtvt7: Remove touchscreen inversion
ARM: dts: imx6dl: prtvt7: Adjust default backlight brightness to 65
ARM: dts: imx6qdl: vicut1: The sgtl5000 uses i2s not ac97
ARM: dts: imx: Use 'eeprom' as node name
ARM: dts: imx6ul-ccimx6ulsom: Fix the "coin" regulator name
ARM: dts: imx: Use 'pmic' as node name
ARM: dts: imx6: Use the mux- prefix
ARM: dts: imx7d-sdb: Allow UHS modes
...
Link: https://lore.kernel.org/r/20230610072530.418847-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:37:32 +0000 (22:37 +0200)]
Merge tag 'imx-bindings-6.5' of git://git./linux/kernel/git/shawnguo/linux into soc/dt
i.MX dt-bindings for 6.5:
- Add vendor prefix for Emtop
- Compatibles for Marantec Maveo Box, i.MX8MM-EVKB and GW7905-2x board.
- Replace tab indent with spaces in fsl.yaml.
* tag 'imx-bindings-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: Add Gateworks i.MX8M GW7905-2x board
dt-bindings: arm: fsl: Fix syntax error
dt-bindings: vendor-prefixes: Add Emtop
dt-bindings: arm: fsl: Add Emtop SoM & Baseboard
dt-bindings: arm: fsl: Add i.MX8MM-EVKB
dt-bindings: arm: fsl: Add Marantec maveo box as a DHCOR i.MX6ULL SoM based board
Link: https://lore.kernel.org/r/20230610072530.418847-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:36:26 +0000 (22:36 +0200)]
Merge tag 'sunxi-dt-for-6.5-1' of https://git./linux/kernel/git/sunxi/linux into soc/dt
- fix DCLK clock names
- new board ICnova A20 ADB4006
- add D1 SPI node
- add bluetooth node for chip board
- add extra mmc2 pinmux to sun5i
- add axp209 iio-hwmon node
* tag 'sunxi-dt-for-6.5-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
ARM: dts: axp209: Add iio-hwmon node for internal temperature
ARM: dts: sun5i: Add port E pinmux settings for mmc2
ARM: dts: sun5i: chip: Enable bluetooth
riscv: dts: allwinner: d1: Add SPI controllers node
arm: dts: sunxi: Add ICnova A20 ADB4006 board
dt-bindings: arm: sunxi: add ICnova A20 ADB4006 binding
ARM: dts: sunxi: rename tcon's clock output
Link: https://lore.kernel.org/r/20230609210452.GA17638@jernej-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:34:46 +0000 (22:34 +0200)]
Merge tag 'tegra-for-6.5-arm64-dt' of git://git./linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.5-rc1
This introduces support for the IGX Orin and Jetson Orin Nano devices
and enables various additional features on the Jetson AGX Orin and
Jetson Orin NX. This also enables some basic thermal support to prevent
the devices from overheating.
Support for the GPU on the Google Pixel C is enabled and various minor
issues are fixed and cleaned up.
* tag 'tegra-for-6.5-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Enable thermal support on Jetson Orin Nano
arm64: tegra: Enable thermal support on Jetson Orin NX
arm64: tegra: Enable thermal support on Jetson AGX Orin
arm64: tegra: Add Tegra234 thermal support
arm64: tegra: Add a few blank lines for better readability
arm64: tegra: Sort properties more logically
arm64: tegra: Enable GPU on Smaug
arm64: tegra: Add GPU power rail regulator on Smaug
arm64: tegra: Update USB phy-name for Jetson Orin NX
arm64: tegra: Enable USB device for Jetson AGX Orin
arm64: tegra: Add Tegra234 pin controllers
arm64: tegra: Support Jetson Orin Nano Developer Kit
arm64: tegra: Add missing cache properties on Tegra210
arm64: tegra: Fix PCIe regulator for Orin Jetson AGX
arm64: tegra: Add CPU OPP tables and interconnects property
arm64: tegra: Add support for IGX Orin
Link: https://lore.kernel.org/r/20230609193620.2275240-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:33:45 +0000 (22:33 +0200)]
Merge tag 'tegra-for-6.5-dt-bindings' of git://git./linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.5-rc1
Several new modules and devices are documented and fixes incorporated
for the Tegra234 GPIO controller pin mappings as well as the possible
Tegra XUDC PHY connections.
* tag 'tegra-for-6.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: tegra: Document Jetson Orin Nano Developer Kit
dt-bindings: tegra: Document Jetson Orin Nano
dt-bindings: gpio: Remove FSI domain ports on Tegra234
dt-bindings: usb: tegra-xudc: Remove extraneous PHYs
dt-bindings: tegra: Add ICC IDs for dummy memory clients
dt-bindings: tegra: Document compatible for IGX
Link: https://lore.kernel.org/r/20230609193620.2275240-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 20 Jun 2023 20:31:22 +0000 (22:31 +0200)]
Merge tag 'stm32-dt-for-v6.5-1' of git://git./linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.5, round 1
Highlights:
----------
- MCU/MPU:
- Replace deprecated st,hw-flow-ctrl by uart-has-rtscts.
- Fix LTDC/DSI warnings.
- MPU:
- STMP32MP15:
- Add OTP part number and Vrefint calibration in bsec.
- M4 hold management updated. As SMC call is deprecated,
the service is moved on a SCMI service.
- Add ADC internal channels (VREFINT/VDDCORE).
- ST:
- Enable ADC1&2 on STM32MP15 DKx boards.
- Adopt generic IIO bindings on STM32MP157C ED1
- Add supplies for OV5640 in STM32MP157C EV1
to fix yaml validation.
- Fix i2s bindings to match with the YAML validation (DKx boards).
- DH:
- Rearrange MAC EEPROM.
- Rename AV96 sound card.
- Adopt generic IIo bindings.
- Fix audio routing.
-PHYTEC:
- Add PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM.
This SOM embeds up to 1GB DDR3LP RAM, up to 1GB eMMC,
up to 16 MB QSPI and up to 128 GB NAND flash.
* tag 'stm32-dt-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
ARM: dts: stm32: add vrefint calibration on stm32mp15
ARM: dts: stm32: add adc internal channels to stm32mp15
ARM: dts: stm32: fix ltdc warnings in stm32mp15 boards
ARM: dts: stm32: fix dsi warnings on stm32mp15 boards
dt-bindings: display: st,stm32-dsi: Remove unnecessary fields
ARM: dts: stm32: fix warnings on stm32f469-disco board
ARM: dts: stm32: Shorten the AV96 HDMI sound card name
ARM: dts: stm32: fix m4_rproc references to use SCMI for stm32mp15
ARM: dts: stm32: Update Cortex-M4 reset declarations on stm32mp15
ARM: dts: stm32: add STM32MP1-based Phytec board
...
Link: https://lore.kernel.org/r/08d711de-bb6d-a976-735b-5e18b19818ea@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Bjorn Andersson [Thu, 15 Jun 2023 15:45:29 +0000 (08:45 -0700)]
Revert "arm64: dts: adapt to LP855X bindings changes"
commit '
ebdcfc8c42c2 ("arm64: dts: adapt to LP855X bindings changes")'
is a Tegra change, but was accidentally merged in the Qualcomm tree. The
change is reverted to avoid rebasing a large number of other changes.
This reverts commit
ebdcfc8c42c2b9d5ca1b27d8ee558eefb3e904d8.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Tony Lindgren [Thu, 15 Jun 2023 14:04:06 +0000 (19:34 +0530)]
arm64: dts: ti: Unify pin group node names for make dtbs checks
Prepare for pinctrl-single yaml binding and unify pin group node names.
Let's standardize on pin group node naming ending in -pins. As we don't
necessarily have a SoC specific compatible property for pinctrl-single.
I'd rather not add a pattern match for pins somewhere in the name for all
the users.
Trying to add matches for pins-default will be futile as on the earlier
SoCs we've already seen names like pins-sleep, pins-idle, pins-off and so
on that would need to be matched.
And as the node is a pin group, let's prefer to use naming -pins rather
than -pin as more pins may need to be added to the pin group later on.
Signed-off-by: Tony Lindgren <tony@atomide.com>
[vigneshr@ti.com: Rebase onto latest ti/next and extend to new nodes]
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Francesco Dolcini [Thu, 15 Jun 2023 09:50:58 +0000 (11:50 +0200)]
arm64: dts: ti: add verdin am62 yavia
Add Toradex Verdin AM62 Yavia.
Link: https://www.toradex.com/products/carrier-board/yavia
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230615095058.33890-6-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Francesco Dolcini [Thu, 15 Jun 2023 09:50:57 +0000 (11:50 +0200)]
arm64: dts: ti: add verdin am62 dahlia
Add Toradex Verdin AM62 Dahlia.
Link: https://www.toradex.com/products/carrier-board/dahlia-carrier-board-kit
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230615095058.33890-5-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Francesco Dolcini [Thu, 15 Jun 2023 09:50:56 +0000 (11:50 +0200)]
arm64: dts: ti: add verdin am62
This patch adds the device tree to support Toradex Verdin AM62 a
computer on module which can be used on different carrier boards
and the Toradex Verdin Development Board carrier board.
The module consists of an TI AM62 family SoC (either AM623 or AM625), a
TPS65219 PMIC, a Gigabit Ethernet PHY, 512MB to 2GB of LPDDR4 RAM, an
eMMC, a TLA2024 ADC, an I2C EEPROM, an RX8130 RTC, and optional Parallel
RGB to MIPI DSI bridge plus an optional Bluetooth/Wi-Fi module.
Anything that is not self-contained on the module is disabled by
default.
So far there is no display nor USB role switch supported, apart of that
all the other functionalities are fine.
Link: https://developer.toradex.com/hardware/verdin-som-family/modules/verdin-am62/
Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
Link: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20230615095058.33890-4-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Francesco Dolcini [Thu, 15 Jun 2023 09:50:54 +0000 (11:50 +0200)]
dt-bindings: arm: ti: add toradex,verdin-am62 et al.
Add toradex,verdin-am62 for Toradex Verdin AM62 SoM, its
nonwifi and wifi variants and the carrier boards (Dahlia,
Verdin Development Board and Yavia) they may be mated in.
Link: https://developer.toradex.com/hardware/verdin-som-family/modules/verdin-am62/
Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230615095058.33890-2-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Wadim Egorov [Thu, 4 May 2023 14:01:43 +0000 (16:01 +0200)]
arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM625
The phyCORE-AM62x [1] is a SoM (System on Module) featuring TI's AM62x SoC.
It can be used in combination with different carrier boards.
This module can come with different sizes and models for
DDR, eMMC, SPI NOR Flash and various SoCs from the AM62x family.
A development Kit, called phyBOARD-Lyra [2] is used as a carrier board
reference design around the AM62x SoM.
Supported features:
* Debug UART
* SPI NOR Flash
* eMMC
* 2x Ethernet
* Micro SD card
* I2C EEPROM
* I2C RTC
* GPIO Expander
* LEDs
* USB
For more details, see:
[1] Product page SoM: https://www.phytec.com/product/phycore-am62x
[2] Product page CB: https://www.phytec.com/product/phyboard-am62x
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230504140143.1425951-2-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Wadim Egorov [Thu, 4 May 2023 14:01:42 +0000 (16:01 +0200)]
dt-bindings: arm: ti: Add bindings for PHYTEC AM62x based hardware
Add devicetree bindings for AM62x based phyCORE-AM62 SoM
and phyBOARD-Lyra RDK.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230504140143.1425951-1-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Mon, 24 Apr 2023 17:36:21 +0000 (12:36 -0500)]
arm64: dts: ti: k3-j7200-mcu-wakeup: Remove 0x unit address prefix from nodename
unit-address should not use a 0x prefix.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230424173623.477577-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:47 +0000 (13:31 -0500)]
arm64: dts: ti: k3-j721e-som-p0: Enable wakeup_i2c0 and eeprom
Enable wakeup_i2c and use un-used pinmux. While at it, describe the
board detection eeprom present on the board.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-6-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 30 May 2023 18:53:35 +0000 (13:53 -0500)]
arm64: dts: ti: k3-am64: Add ESM support
Add Error Signaling Module (ESM) instances in MCU and MAIN domains.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230530185335.79942-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 30 May 2023 18:53:34 +0000 (13:53 -0500)]
arm64: dts: ti: k3-am62: Add ESM support
Add Error Signaling Module (ESM) instances in MCU and MAIN domains.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230530185335.79942-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Neha Malcom Francis [Thu, 4 May 2023 08:05:26 +0000 (13:35 +0530)]
arm64: dts: ti: k3-j7200: Add ESM support
Add address entry mapping ESM on J7200.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://lore.kernel.org/r/20230504080526.133149-4-n-francis@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Neha Malcom Francis [Thu, 4 May 2023 08:05:25 +0000 (13:35 +0530)]
arm64: dts: ti: k3-j721e: Add ESM support
Add address entry mapping ESM on J721E.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://lore.kernel.org/r/20230504080526.133149-3-n-francis@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Neha Malcom Francis [Thu, 4 May 2023 08:05:24 +0000 (13:35 +0530)]
dt-bindings: misc: esm: Add ESM support for TI K3 devices
Document the binding for TI K3 ESM (Error Signaling Module) block.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230504080526.133149-2-n-francis@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 15:35:54 +0000 (10:35 -0500)]
arm64: dts: ti: k3-j721s2-som-p0: Enable wakeup_i2c0 and eeprom
Enable wakeup_i2c and use un-used pinmux. While at it, describe the
board detection eeprom present on the board.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602153554.1571128-7-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 15:35:53 +0000 (10:35 -0500)]
arm64: dts: ti: k3-j721s2-common-proc-board: Add uart pinmux
Define the wakeup uart pin-mux for completeness and add explicit
muxing for mcu_uart0. This allows the device tree usage in bootloader
and firmwares that can configure the same appropriately.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602153554.1571128-6-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 15:35:52 +0000 (10:35 -0500)]
arm64: dts: ti: k3-am68-sk-som: Enable wakeup_i2c0 and eeprom
Enable wakeup_i2c. While at it, describe the board detection eeprom
present on the board.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602153554.1571128-5-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 15:35:51 +0000 (10:35 -0500)]
arm64: dts: ti: k3-am68-sk-base-board: Add uart pinmux
Define the wakeup uart pin-mux for completeness and add explicit
muxing for mcu_uart0. This allows the device tree usage in bootloader
and firmwares that can configure the same appropriately.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602153554.1571128-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Sinthu Raja [Fri, 2 Jun 2023 15:35:50 +0000 (10:35 -0500)]
arm64: dts: ti: k3-am68-sk-base-board: Add pinmux for RPi Header
Add pinmux required to bring out the i2c and gpios on 40-pin RPi
expansion header on the AM68 SK board.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602153554.1571128-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Sinthu Raja [Fri, 2 Jun 2023 15:35:49 +0000 (10:35 -0500)]
arm64: dts: ti: k3-j721s2: Fix wkup pinmux range
The WKUP_PADCONFIG register region in J721S2 has multiple non-addressable
regions, accordingly split the existing wkup_pmx region as follows to avoid
the non-addressable regions and include the rest of valid WKUP_PADCONFIG
registers. Also update references to old nodes with new ones.
wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
Fixes:
b8545f9d3a54 ("arm64: dts: ti: Add initial support for J721S2 SoC")
Cc: <stable@vger.kernel.org> # 6.3
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602153554.1571128-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Udit Kumar [Sun, 11 Jun 2023 11:11:40 +0000 (16:41 +0530)]
arm64: dts: ti: k3-j7200: Drop SoC level aliases
Aiases are defined at board level, so dropping from soc level
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230611111140.3189111-7-u-kumar1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Udit Kumar [Sun, 11 Jun 2023 11:11:39 +0000 (16:41 +0530)]
arm64: dts: ti: k3-j7200-common-proc-board: Define aliases at board level
Define aliases at board level
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230611111140.3189111-6-u-kumar1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Udit Kumar [Sun, 11 Jun 2023 11:11:38 +0000 (16:41 +0530)]
arm64: dts: ti: k3-j7200-common-proc-board: Add uart pinmux
Add main, mcu, wakeup domain uart0 pin mux into common board file and it's
reference to uart node.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230611111140.3189111-5-u-kumar1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Udit Kumar [Sun, 11 Jun 2023 11:11:37 +0000 (16:41 +0530)]
arm64: dts: ti: k3-j7200-common-proc-board: remove duplicate main_i2c0 pin mux
main_i2c0 pin mux was duplicated in som and common file.
So removing duplicated node from common file.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230611111140.3189111-4-u-kumar1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Udit Kumar [Sun, 11 Jun 2023 11:11:36 +0000 (16:41 +0530)]
arm64: dts: ti: k3-j7200: Configure pinctrl for timer IO pads
There are timer IO pads in the MCU domain, and in the MAIN domain. These
pads can be muxed for the related timers.
There are timer IO control registers for input and output. The registers
for CTRLMMR_TIMER*_CTRL and CTRLMMR_MCU_TIMER*_CTRL are used to control
the input. The registers for CTCTRLMMR_TIMERIO*_CTRL and
CTRLMMR_MCU_TIMERIO*_CTRL the output.
The multiplexing is documented in TRM "5.1.2.3.1.4 Timer IO Muxing Control
Registers" and "5.1.3.3.1.5 Timer IO Muxing Control Registers", and the
CASCADE_EN bit is documented in TRM "12.6.3.1 Timers Overview".
For chaining timers, the timer IO control registers also have a CASCADE_EN
input bit in the CTRLMMR_TIMER*_CTRL in the registers. The CASCADE_EN bit
muxes the previous timer output, or possibly and external TIMER_IO pad
source, to the input clock of the selected timer instance for odd numered
timers. For the even numbered timers, the CASCADE_EN bit does not do
anything. The timer cascade input routing options are shown in TRM
"Figure 12-3224. Timers Overview". For handling beyond multiplexing, the
driver support for timer cascading should be likely be handled via the
clock framework.
The MCU timer controls are also marked as reserved for
usage by the MCU firmware.
Cc: Nishanth Menon <nm@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230611111140.3189111-3-u-kumar1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Udit Kumar [Sun, 11 Jun 2023 11:11:35 +0000 (16:41 +0530)]
arm64: dts: ti: k3-j7200: Add general purpose timers
There are 20 general purpose timers on j721e that can be used for
things like PWM using pwm-omap-dmtimer driver. There are also
additional ten timers in the MCU domain which are meant for MCU
firmware usage and hence marked reserved by default.
The odd numbered timers have the option of being cascaded to even
timers to create a 64 bit non-atomic counter which is racy in simple
usage, hence the clock muxes are explicitly setup to individual 32 bit
counters driven off system crystal (HFOSC) as default.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230611111140.3189111-2-u-kumar1@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:51 +0000 (13:31 -0500)]
arm64: dts: ti: k3-j721e: Drop SoC level aliases
Drop the SoC level aliases as these need to be done at board level.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-10-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:50 +0000 (13:31 -0500)]
arm64: dts: ti: k3-j721e-common-proc-board: Define aliases at board level
Define the aliases at the board level instead of using generic aliases
at SoC level.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-9-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:49 +0000 (13:31 -0500)]
arm64: dts: ti: k3-j721e-sk: Define aliases at board level
Define the aliases at the board level instead of using generic aliases
at SoC level.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-8-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:48 +0000 (13:31 -0500)]
arm64: dts: ti: k3-j721e-beagleboneai64: Add wakeup_uart pinmux
Define the wakeup uart pin-mux for completeness. This allows the
device tree usage in bootloader and firmwares that can configure the
same appropriately.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-7-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:47 +0000 (13:31 -0500)]
arm64: dts: ti: k3-j721e-som-p0: Enable wakeup_i2c0 and eeprom
Enable wakeup_i2c and use un-used pinmux. While at it, describe the
board detection eeprom present on the board.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-6-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:46 +0000 (13:31 -0500)]
arm64: dts: ti: j721e-common-proc-board: Add uart pinmux
Explicitly define the pinmux rather than depend on bootloader configured
pinmux for the platform.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-5-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:45 +0000 (13:31 -0500)]
arm64: dts: ti: j721e-som/common-proc-board: Add product links
Add product links to get reference to schematics and design files
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:44 +0000 (13:31 -0500)]
arm64: dts: ti: k3-j721e-sk: Enable wakeup_i2c0 and eeprom
Enable wakeup_i2c and use un-used pinmux. While at it, describe the
board detection eeprom present on the board.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Thu, 1 Jun 2023 18:31:43 +0000 (13:31 -0500)]
arm64: dts: ti: k3-j721e-sk: Add missing uart pinmuxes
Rather than depend on the default pinmuxes, explicitly describe the
pinmux
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230601183151.1000157-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Andrew Davis [Thu, 1 Jun 2023 18:49:33 +0000 (13:49 -0500)]
arm64: dts: ti: k3-am64: Use phandle to stdout UART node
Using a phandle makes it clear which UART we are choosing without needing
to resolve through an alias first.
Especially useful for boards like the TI J721s2-EVM where the alias is
"serial2" but it actually resolves to the 8th UART instance(main_uart8).
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230601184933.358731-2-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Andrew Davis [Thu, 1 Jun 2023 18:49:32 +0000 (13:49 -0500)]
arm64: dts: ti: k3-am64: Only set UART baud for used ports
As the binding for "current-speed" states, this should only be used
when the baud rate of an attached device cannot be detected. This is
the case for our attached on-board USB-to-UART converter used for
early kernel console. For all other unconnected/disabled ports this
can be configured in userspace later, DT is not the place for device
configuration, especially when there are already standard ways to
set serial baud in userspace.
Remove setting baud for all disabled serial ports and move setting
it for the couple enabled ports down into the board files.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20230601184933.358731-1-afd@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Dasnavis Sabiya [Fri, 2 Jun 2023 21:49:37 +0000 (16:49 -0500)]
arm64: dts: ti: k3-am69-sk: Add pinmux for RPi Header
Add pinmux required to bring out the i2c and gpios on 40 pin RPi
expansion header on AM69 SK board.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-9-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 21:49:36 +0000 (16:49 -0500)]
arm64: dts: ti: k3-am69-sk: Enable wakeup_i2c0 and eeprom
Enable wakeup_i2c and use un-used pinmux. While at it, describe the
board detection eeprom present on the board.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-8-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 21:49:35 +0000 (16:49 -0500)]
arm64: dts: ti: k3-am69-sk: Add mcu and wakeup uarts
Add wakeup and MCU uart. This allows the device tree usage in
bootloader and firmwares that can configure the same appropriately.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-7-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 21:49:34 +0000 (16:49 -0500)]
arm64: dts: ti: k3-am69-sk: Enable mcu network port
Enable networking for NFS and basic networking functionality.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-6-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 21:49:33 +0000 (16:49 -0500)]
arm64: dts: ti: k3-am69-sk: Fix main_i2c0 alias
main_i2c0 is aliased as i2c0 which creates a problem for u-boot R5
SPL attempting to reuse the same definition in the common board
detection logic as it looks for the first i2c instance as the bus on
which to detect the eeprom to understand the board variant involved.
Switch main_i2c0 to i2c3 alias allowing us to introduce wkup_i2c0
and potentially space for mcu_i2c instances in the gap for follow on
patches.
Fixes:
635fb18ba008 ("arch: arm64: dts: Add support for AM69 Starter Kit")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-5-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 21:49:32 +0000 (16:49 -0500)]
arm64: dts: ti: k3-j784s4-evm: Enable wakeup_i2c0 and eeprom
Enable wakeup_i2c and use un-used pinmux. While at it, describe the
board detection eeprom present on the board.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 21:49:31 +0000 (16:49 -0500)]
arm64: dts: ti: k3-j784s4-evm: Add mcu and wakeup uarts
Add wakeup and MCU uart. This allows the device tree usage in
bootloader and firmwares that can configure the same appropriately.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Thejasvi Konduru [Wed, 3 May 2023 08:31:43 +0000 (14:01 +0530)]
arm64: dts: ti: k3-j784s4: Fix wakeup pinmux range and pinctrl node offsets
The wkup_pmx register region in j784s4 has multiple non-addressable
regions, hence the existing wkup_pmx region is split as follows to
avoid the non-addressable regions. The pinctrl node offsets are
also corrected as per the newly split wkup_pmx* nodes.
wkup_pmx0 -> 13 pins (WKUP_PADCONFIG 0 - 12)
wkup_pmx1 -> 11 pins (WKUP_PADCONFIG 14 - 24)
wkup_pmx2 -> 72 pins (WKUP_PADCONFIG 26 - 97)
wkup_pmx3 -> 1 pin (WKUP_PADCONFIG 100)
Fixes:
4664ebd8346a ("arm64: dts: ti: Add initial support for J784S4 SoC")
Signed-off-by: Thejasvi Konduru <t-konduru@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230503083143.32369-1-t-konduru@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Fri, 2 Jun 2023 21:49:30 +0000 (16:49 -0500)]
arm64: dts: ti: k3-j784s4-evm: Fix main_i2c0 alias
main_i2c0 is aliased as i2c0 which creates a problem for u-boot R5
SPL attempting to reuse the same definition in the common board
detection logic as it looks for the first i2c instance as the bus on
which to detect the eeprom to understand the board variant involved.
Switch main_i2c0 to i2c3 alias allowing us to introduce wkup_i2c0
and potentially space for mcu_i2c instances in the gap for follow on
patches.
Fixes:
e20a06aca5c9 ("arm64: dts: ti: Add support for J784S4 EVM board")
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230602214937.2349545-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Neha Malcom Francis [Mon, 5 Jun 2023 11:04:43 +0000 (16:34 +0530)]
arm64: dts: ti: k3-j721s2: Change CPTS clock parent
MAIN_PLL0 has a flag set in DM (Device Manager) that removes it's
capability to re-initialise clock frequencies. CPTS and RGMII has
MAIN_PLL3 as their parent which does not have this flag. While RGMII
needs this reinitialisation to default frequency to be able to get
250MHz with its divider, CPTS can not get its required 200MHz with its
divider. Thus, move CPTS clock parent on J721S2 from MAIN_PLL3_HSDIV1 to
MAIN_PLL0_HSDIV6.
(Note: even GTC will be moved from MAIN_PLL3 to MAIN_PLL0 in U-Boot side
for the same reason)
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://lore.kernel.org/r/20230605110443.84568-1-n-francis@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Dasnavis Sabiya [Mon, 5 Jun 2023 17:45:51 +0000 (23:15 +0530)]
arm64: dts: ti: k3-am69-sk: Add eMMC mmc0 support
Add support for eMMC card connected to main sdhci0 instance.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230605174551.160262-1-sabiya.d@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:20 +0000 (13:22 -0500)]
arm64: dts: ti: k3-am68-sk-base-board: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-15-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:19 +0000 (13:22 -0500)]
arm64: dts: ti: k3-am654-base-board: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-14-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:18 +0000 (13:22 -0500)]
arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-13-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:17 +0000 (13:22 -0500)]
arm64: dts: ti: k3-am64-sk: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-12-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:16 +0000 (13:22 -0500)]
arm64: dts: ti: k3-am64-evm: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-11-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:15 +0000 (13:22 -0500)]
arm64: dts: ti: k3-am625-sk: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-10-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:14 +0000 (13:22 -0500)]
arm64: dts: ti: k3-j721s2-common-proc-board: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle
and cell arguments easier to catch. Fix the outliers to be consistent
with the rest of the usage.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-9-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:13 +0000 (13:22 -0500)]
arm64: dts: ti: k3-j7200-som/common-proc-board: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle
and cell arguments easier to catch. Fix the outliers to be consistent
with the rest of the usage.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-8-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:12 +0000 (13:22 -0500)]
arm64: dts: ti: k3-am642-phyboard-electra-rdk: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle
and cell arguments easier to catch. Fix the outliers to be consistent
with the rest of the usage.
Cc: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-7-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:11 +0000 (13:22 -0500)]
arm64: dts: ti: k3-j721e-beagleboneai64: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.
Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-6-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:10 +0000 (13:22 -0500)]
arm64: dts: ti: k3-j721e-beagleboneai64: Move eeprom WP gpio pinctrl to eeprom node
Move the eeprom WP GPIO mux configuration to be part of the eeprom node
instead of the I2C node.
Cc: Robert Nelson <robertcnelson@gmail.com>
Suggested-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-5-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:09 +0000 (13:22 -0500)]
arm64: dts: ti: k3-j721e-beagleboneai64: Move camera gpio pinctrl to gpio node
Move the GPIO mux configuration needed for camera module to work to the
GPIO node instead of the I2C node.
Camera nodes are maintained as overlay files, but the common mux is
always needed to ensure that camera probes fine and ensuring the mux
is configured as part of the GPIO module allows for the multiple
overlay files to be simpler.
Cc: Robert Nelson <robertcnelson@gmail.com>
Suggested-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:08 +0000 (13:22 -0500)]
arm64: dts: ti: k3-j721e-som-p0/common-proc-board: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 6 Jun 2023 18:22:07 +0000 (13:22 -0500)]
arm64: dts: ti: k3-j721e-sk: Fixup reference to phandles array
When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230606182220.3661956-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Wed, 31 May 2023 21:32:15 +0000 (16:32 -0500)]
arm64: dts: ti: k3-j784s4: Configure pinctrl for timer IO
There are timer IO pads in the MCU domain, and in the MAIN domain.
These pads can be muxed for the related timers.
The details of the multiplexing can be found in the register
documentation and Technical Reference Manual[1].
These are similar to J721e/J7200, but have different mux capabilities.
[1] http://www.ti.com/lit/zip/spruj52
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230531213215.602395-7-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Wed, 31 May 2023 21:32:14 +0000 (16:32 -0500)]
arm64: dts: ti: k3-j784s4: Add general purpose timers
There are 20 general purpose timers on j784s4 that can be used for
things like PWM using pwm-omap-dmtimer driver. There are also
additional ten timers in the MCU domain which are meant for MCU
firmware usage and hence marked reserved by default.
Though the count is similar to J721e/J7200/j721s2, the device IDs
and clocks used in j784s4 are different with the option of certain
clocks having options of additional clock muxes. Since there is very
minimal reuse, it is cleaner to integrate as part of SoC files itself.
The defaults are configured for clocking the timers from system
clock(HFOSC0).
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230531213215.602395-6-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Wed, 31 May 2023 21:32:13 +0000 (16:32 -0500)]
arm64: dts: ti: k3-j721s2: Configure pinctrl for timer IO
There are timer IO pads in the MCU domain, and in the MAIN domain. These
pads can be muxed for the related timers.
The details of the multiplexing can be found in the register
documentation and Technical Reference Manual[1].
These are similar to J721e/J7200, but have different mux capabilities.
[1] https://www.ti.com/lit/zip/spruj28
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230531213215.602395-5-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Wed, 31 May 2023 21:32:12 +0000 (16:32 -0500)]
arm64: dts: ti: k3-j721s2: Add general purpose timers
There are 20 general purpose timers on j721s2 that can be used for
things like PWM using pwm-omap-dmtimer driver. There are also
additional ten timers in the MCU domain which are meant for MCU
firmware usage and hence marked reserved by default.
Though the count is similar to J721e/J7200, the device IDs and clocks
used in j721s2 are different with the option of certain clocks having
options of additional clock muxes. Since there is very minimal reuse,
it is cleaner to integrate as part of SoC files itself. The defaults
are configured for clocking the timers from system clock(HFOSC0).
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230531213215.602395-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Wed, 31 May 2023 21:32:11 +0000 (16:32 -0500)]
arm64: dts: ti: k3-j721e: Configure pinctrl for timer IO
There are timer IO pads in the MCU domain, and in the MAIN domain. These
pads can be muxed for the related timers.
There are timer IO control registers for input and output. The registers
for CTRLMMR_TIMER*_CTRL and CTRLMMR_MCU_TIMER*_CTRL are used to control
the input. The registers for CTCTRLMMR_TIMERIO*_CTRL and
CTRLMMR_MCU_TIMERIO*_CTRL the output.
The multiplexing is documented in Technical Reference Manual[1] under
"Timer IO Muxing Control Registers" and "Timer IO Muxing Control
Registers", and the "Timers Overview" chapters.
We do not expose the cascade_en bit due to the racy usage of
independent 32 bit registers in-line with the timer instantiation in
the device tree. The MCU timer controls are also marked as reserved for
usage by the MCU firmware.
[1] http://www.ti.com/lit/pdf/spruil1
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230531213215.602395-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Wed, 31 May 2023 21:32:10 +0000 (16:32 -0500)]
arm64: dts: ti: k3-j721e: Add general purpose timers
There are 20 general purpose timers on j721e that can be used for
things like PWM using pwm-omap-dmtimer driver. There are also
additional ten timers in the MCU domain which are meant for MCU
firmware usage and hence marked reserved by default.
The odd numbered timers have the option of being cascaded to even
timers to create a 64 bit non-atomic counter which is racy in simple
usage, hence the clock muxes are explicitly setup to individual 32 bit
counters driven off system crystal (HFOSC) as default.
These instantiation differs from J7200 and other SoCs with the device
IDs and clocks involved for muxing.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230531213215.602395-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 30 May 2023 16:59:00 +0000 (11:59 -0500)]
arm64: dts: ti: k3-j784s4-mcu-wakeup: Add sa3_secproxy and mcu_sec_proxy
Security Management Subsystem(SMS) has it's own unique secure
proxy as part of Security Accelerator (SA3) module. This is used
for communicating with ROM and for special usecases such as HSM
operations. In addition MCU island has it's own secure proxy for
usecases involving the MCU micro controllers. These are in addition
to the one in the main domain DMSS subsystem that is used for general
purpose communication.
Describe the nodes for use with bootloaders and firmware that require
these communication paths which uses interrupts to corresponding micro
controller interrupt controller. Mark the node as disabled since these
instances do not have interrupts routed to the main processor by
default for a complete description of the node.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230530165900.47502-8-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 30 May 2023 16:58:59 +0000 (11:58 -0500)]
arm64: dts: ti: k3-j721s2-mcu-wakeup: Add sa3_secproxy and mcu_sec_proxy
Security Management Subsystem(SMS) has it's own unique secure
proxy as part of Security Accelerator (SA3) module. This is used
for communicating with ROM and for special usecases such as HSM
operations. In addition MCU island has it's own secure proxy for
usecases involving the MCU micro controllers. These are in addition
to the one in the main domain DMSS subsystem that is used for general
purpose communication.
Describe the nodes for use with bootloaders and firmware that require
these communication paths which uses interrupts to corresponding micro
controller interrupt controller. Mark the node as disabled since these
instances do not have interrupts routed to the main processor by
default for a complete description of the node.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230530165900.47502-7-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 30 May 2023 16:58:58 +0000 (11:58 -0500)]
arm64: dts: ti: k3-j721e-mcu: Add mcu_secproxy
MCU domain has it's own secure proxy for communicating with ROM and
for R5 micro controller firmware operations. This is in addition to
the one in the main domain NAVSS subsystem that is used for general
purpose communication.
Describe the node for use with bootloaders and firmware that require
this communication path which uses interrupts to corresponding micro
controller interrupt controller. Mark the node as disabled since this
instance does not have interrupts routed to the main processor by
default for a complete description of the node.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230530165900.47502-6-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 30 May 2023 16:58:57 +0000 (11:58 -0500)]
arm64: dts: ti: k3-j7200-mcu: Add mcu_secproxy
MCU domain has it's own secure proxy for communicating with ROM and
for R5 micro controller firmware operations. This is in addition to
the one in the main domain NAVSS subsystem that is used for general
purpose communication.
Describe the node for use with bootloaders and firmware that require
this communication path which uses interrupts to corresponding micro
controller interrupt controller. Mark the node as disabled since this
instance does not have interrupts routed to the main processor by
default for a complete description of the node.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20230530165900.47502-5-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 30 May 2023 16:58:56 +0000 (11:58 -0500)]
arm64: dts: ti: k3-am65-mcu: Add mcu_secproxy
MCU domain has it's own secure proxy for communicating with ROM and
for R5 micro controller firmware operations. This is in addition to
the one in the main domain NAVSS subsystem that is used for general
purpose communication.
Describe the node for use with bootloaders and firmware that require
this communication path which uses interrupts to corresponding micro
controller interrupt controller. Mark the node as disabled since this
instance does not have interrupts routed to the main processor by
default for a complete description of the node.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230530165900.47502-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Tue, 30 May 2023 16:58:55 +0000 (11:58 -0500)]
arm64: dts: ti: k3-am62a-main: Add sa3_secproxy
Security Management Subsystem(SMS) has it's own unique secure
proxy as part of Security Accelerator (SA3) module. This is used
for communicating with ROM and for special usecases such as HSM
operations. This is in addition to the one in the main domain DMSS
subsystem that is used for general purpose communication.
Describe the node for use with bootloaders and firmware that require
this communication path which uses interrupts to corresponding micro
controller interrupt controller. Mark the node as disabled since this
instance does not have interrupts routed to the main processor by
default for a complete description of the node.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230530165900.47502-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nitin Yadav [Tue, 30 May 2023 16:58:54 +0000 (11:58 -0500)]
arm64: dts: ti: k3-am62-main: Add sa3_secproxy
Security Management Subsystem(SMS) has it's own unique secure
proxy as part of Security Accelerator (SA3) module. This is used
for communicating with ROM and for special usecases such as HSM
operations. This is in addition to the one in the main domain DMSS
subsystem that is used for general purpose communication.
Describe the node for use with bootloaders and firmware that require
this communication path which uses interrupts to corresponding micro
controller interrupt controller. Mark the node as disabled since this
instance does not have interrupts routed to the main processor by
default for a complete description of the node.
Signed-off-by: Nitin Yadav <n-yadav@ti.com>
[nm@ti.com: Update commit message, minor updates]
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230530165900.47502-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Wed, 7 Jun 2023 13:20:43 +0000 (08:20 -0500)]
arm64: dts: ti: k3-am65-iot2050-common: Rename rtc8564 nodename
Just use "rtc" as the nodename to better match with the bindings.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230607132043.3932726-4-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Wed, 7 Jun 2023 13:20:42 +0000 (08:20 -0500)]
arm64: dts: ti: k3-am65-main: Drop deprecated ti,otap-del-sel property
ti,otap-del-sel has been deprecated in favor of ti,otap-del-sel-legacy.
Drop the duplicate and misleading ti,otap-del-sel property.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230607132043.3932726-3-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Nishanth Menon [Wed, 7 Jun 2023 13:20:41 +0000 (08:20 -0500)]
arm64: dts: ti: k3-am65-main: Fix mcan node name
s/mcan/can to stay in sync with bindings conventions.
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230607132043.3932726-2-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vaishnav Achath [Sat, 13 May 2023 14:17:11 +0000 (19:47 +0530)]
arm64: dts: ti: k3-am642-sk/evm: Describe OSPI flash partition info
Describe OSPI flash partition information through device tree, this
helps to remove passing partition information through the mtdparts
commandline parameter which requires maintaining the partition
information in a string format. AM64 SK and EVM has a S28 64 MiB OSPI
flash with sector size of 256 KiB thus the size of the smallest partition
is chosen as 256 KiB, the partition names and offsets are chosen according
to the corresponding name and offsets in bootloader.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230513141712.27346-6-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vaishnav Achath [Sat, 13 May 2023 14:17:10 +0000 (19:47 +0530)]
arm64: dts: ti: k3-am654-baseboard: Describe OSPI flash partition info
Describe OSPI flash partition information through device tree, this
helps to remove passing partition information through the mtdparts
commandline parameter which requires maintaining the partition
information in a string format. AM654 baseboard has a MT35XU512ABA
64 MiB OSPI flash with sector size of 128 KiB thus the size of the
smallest partition is chosen as 128 KiB, the partition names and
offsets are chosen according to the corresponding name and offsets
in bootloader.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230513141712.27346-5-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vaishnav Achath [Sat, 13 May 2023 14:17:09 +0000 (19:47 +0530)]
arm64: dts: ti: k3-j7200-som: Describe OSPI and Hyperflash partition info
Describe OSPI and Hyperflash partition information through device tree,
this helps to remove passing partition information through the mtdparts
commandline parameter which requires maintaining the partition information
in a string format. J7200 SoM has a S28 64 MiB OSPI flash with sector size
of 256 KiB thus the size of the smallest partition is chosen as 256 KiB,
the SoM also has a 64 MiB Hyperflash present on it, the partition names
and offsets are chosen according to the corresponding name and offsets
in bootloader.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230513141712.27346-4-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vaishnav Achath [Sat, 13 May 2023 14:17:08 +0000 (19:47 +0530)]
arm64: dts: ti: k3-j721e-sk: Describe OSPI flash partition info
Describe OSPI flash partition information through device tree, this
helps to remove passing partition information through the mtdparts
commandline parameter which requires maintaining the partition
information in a string format. J721E SK has a S28 64 MiB OSPI flash
with sector size of 256 KiB thus the size of the smallest partition is
chosen as 256 KiB, the partition names and offsets are chosen according
to the corresponding name and offsets in bootloader.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230513141712.27346-3-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vaishnav Achath [Sat, 13 May 2023 14:17:07 +0000 (19:47 +0530)]
arm64: dts: ti: k3-j721e: Describe OSPI and QSPI flash partition info
Describe OSPI and QSPI flash partition information through device tree,
this helps to remove passing partition information through the mtdparts
commandline parameter which requires maintaining the partition information
in a string format. J721E SoM has a MT35 64 MiB OSPI flash and MT25 64 MiB
QSPI flash both with sector size of 128 KiB thus the size of the smallest
partition is chosen as 128KiB, the partition names and offsets are chosen
according to the corresponding name and offsets in bootloader.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20230513141712.27346-2-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Apurva Nandan [Thu, 4 May 2023 08:03:05 +0000 (13:33 +0530)]
arm64: dts: ti: k3-j784s4-evm: Add support for OSPI and QSPI flashes
J784S4 has S28HS512T OSPI flash connected to OSPI0 and MT25QU512A QSPI
flash connected to OSPI1, enable support for the same. Also describe
the partition information according to the offsets in the bootloader.
Co-developed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Link: https://lore.kernel.org/r/20230504080305.38986-3-a-nandan@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>