Adrian Prantl [Thu, 13 Dec 2018 17:53:29 +0000 (17:53 +0000)]
Reinstate DW_AT_comp_dir support after D55519.
The DIFile used by the CU is special and distinct from the main source
file. Its directory part specifies what becomes the DW_AT_comp_dir
(the compilation directory), even if the source file was specified
with an absolute path.
To support the .dwo workflow, a valid DW_AT_comp_dir is necessary even
if source files were specified with an absolute path.
llvm-svn: 349065
Sylvestre Ledru [Thu, 13 Dec 2018 17:39:02 +0000 (17:39 +0000)]
Try to update the test to fix the breakage
With the new warning, we are showing one more output in the test.
llvm-svn: 349064
Ilya Biryukov [Thu, 13 Dec 2018 17:32:38 +0000 (17:32 +0000)]
[CodeComplete] Adhere to LLVM naming style in CodeCompletionTest. NFC
Also reuses the same var for multiple to reduce the chance of
accidentally referecing the previous test.
llvm-svn: 349063
Greg Clayton [Thu, 13 Dec 2018 17:24:30 +0000 (17:24 +0000)]
Fix MinidumpParser::GetFilteredModuleList() and test it
The MinidumpParser::GetFilteredModuleList() code was attempting to iterate through the entire module list and if it found more than one entry for a given module name, it wanted to pick the MinidumpModule with the lowest address. A bug existed where it wasn't doing that due to "exists" variable being inverted. "exists" was set to true if it was inserted, not if it existed. Furthermore, the order of the modules would be modified by sorting all modules from low address to high address (using MinidumpModule::base_of_image). This fix also maintains the original order which means your executable is at index 0 as intended instead of some random shared library.
Tests were added to ensure this functionality doesn't regress.
Differential Revision: https://reviews.llvm.org/D55614
llvm-svn: 349062
Ilya Biryukov [Thu, 13 Dec 2018 17:23:48 +0000 (17:23 +0000)]
[CodeComplete] Temporarily disable failing assertion
Found the case in the clang codebase where the assertion fires.
To avoid crashing assertion-enabled builds before I re-add the missing
operation.
Will restore the assertion alongside the upcoming fix.
llvm-svn: 349061
Francis Visoiu Mistrih [Thu, 13 Dec 2018 17:23:30 +0000 (17:23 +0000)]
[MachO][TLOF] Add support for local symbols in the indirect symbol table
On 32-bit archs, before, we would assume that an indirect symbol will
never have local linkage. This can lead to miscompiles where the
symbol's value would be 0 and the linker would use that value, because
the indirect symbol table would contain the value
`INDIRECT_SYMBOL_LOCAL` for that specific symbol.
Differential Revision: https://reviews.llvm.org/D55573
llvm-svn: 349060
David Green [Thu, 13 Dec 2018 17:20:06 +0000 (17:20 +0000)]
Fix CodeCompleteTest.cpp for older gcc plus ccache builds
Some versions of gcc, especially when invoked through ccache (-E), can have
trouble with raw string literals inside macros. This moves the string out of
the macro.
llvm-svn: 349059
Sanjay Patel [Thu, 13 Dec 2018 17:05:01 +0000 (17:05 +0000)]
[DAGCombiner] after simplifying demanded elements of vector operand of extract, revisit the extract; 2nd try
This is a retry of rL349051 (reverted at rL349056). I changed the check for dead-ness from
number of uses to an opcode test for DELETED_NODE based on existing similar code.
Differential Revision: https://reviews.llvm.org/D55655
llvm-svn: 349058
Simon Pilgrim [Thu, 13 Dec 2018 16:39:29 +0000 (16:39 +0000)]
[X86][SSE] Add SSE vector imm/var shift support to SimplifyDemandedVectorEltsForTargetNode
llvm-svn: 349057
Sanjay Patel [Thu, 13 Dec 2018 16:32:44 +0000 (16:32 +0000)]
revert rL349051: [DAGCombiner] after simplifying demanded elements of vector operand of extract, revisit the extract
This causes an address sanitizer bot failure:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/27187/steps/check-llvm%20asan/logs/stdio
llvm-svn: 349056
Daniel Sanders [Thu, 13 Dec 2018 16:17:54 +0000 (16:17 +0000)]
Recommit r349041: [tblgen][disasm] Separate encodings from instructions
Removed const from the ArrayRef<const EncodingAndInst> to avoid the
std::vector<const EncodingAndInst> that G++ saw
llvm-svn: 349055
Sylvestre Ledru [Thu, 13 Dec 2018 16:06:23 +0000 (16:06 +0000)]
Make -Wstring-plus-int warns even if when the result is not out of bounds
Summary: Patch by Arnaud Bienner
Reviewers: sylvestre.ledru, thakis
Reviewed By: thakis
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D55382
llvm-svn: 349054
Ilya Biryukov [Thu, 13 Dec 2018 16:06:11 +0000 (16:06 +0000)]
[CodeComplete] Fill preferred type on binary expressions
Reviewers: kadircet
Reviewed By: kadircet
Subscribers: arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D55648
llvm-svn: 349053
Simon Pilgrim [Thu, 13 Dec 2018 15:50:31 +0000 (15:50 +0000)]
[X86][SSE] Fix all remaining modulo vector rotation amounts (PR38243)
There's still a couple of minor SimplifyDemandedElts regressions in some of the shift amount splats that will be fixed in future patches.
llvm-svn: 349052
Sanjay Patel [Thu, 13 Dec 2018 15:44:26 +0000 (15:44 +0000)]
[DAGCombiner] after simplifying demanded elements of vector operand of extract, revisit the extract
Differential Revision: https://reviews.llvm.org/D55655
llvm-svn: 349051
Ilya Biryukov [Thu, 13 Dec 2018 15:36:32 +0000 (15:36 +0000)]
[CodeComplete] Set preferred type to bool on conditions
Reviewers: kadircet
Reviewed By: kadircet
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D55431
llvm-svn: 349050
Eric Liu [Thu, 13 Dec 2018 15:35:43 +0000 (15:35 +0000)]
[clangd] Enable cross-namespace completions by default in clangd
Summary:
Code completion will suggest symbols from any scope (incl. inaccessible
scopes) when there's no qualifier explicitly specified. E.g.
{
F7689815}
As we are assigning relatively low scores for cross-namespace completion items, the overall code completion quality doesn't regress. The feature has been tried out by a few folks, and the feedback is generally positive, so I think it should be ready to be enabled by default.
Reviewers: hokein, ilya-biryukov, kadircet
Reviewed By: hokein, ilya-biryukov
Subscribers: MaskRay, jkorous, arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D55649
llvm-svn: 349049
Daniel Cederman [Thu, 13 Dec 2018 15:29:12 +0000 (15:29 +0000)]
[Sparc] Add membar assembler tags
Summary: The Sparc V9 membar instruction can enforce different types of
memory orderings depending on the value in its immediate field. In the
architectural manual the type is selected by combining different assembler
tags into a mask. This patch adds support for these tags.
Reviewers: jyknight, venkatra, brad
Reviewed By: jyknight
Subscribers: fedor.sergeev, jrtc27, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D53491
llvm-svn: 349048
Simon Pilgrim [Thu, 13 Dec 2018 15:23:09 +0000 (15:23 +0000)]
[X86][SSE] Fix modulo rotation amounts for v8i16/v16i16/v4i32 (PR38243)
llvm-svn: 349047
Daniel Sanders [Thu, 13 Dec 2018 15:14:21 +0000 (15:14 +0000)]
Revert r349041: [tblgen][disasm] Separate encodings from instructions
One of the GCC based bots is objecting to a vector of const EncodingAndInst's:
In file included from /usr/include/c++/8/vector:64,
from /export/users/atombot/llvm/clang-atom-d525-fedora-rel/llvm/utils/TableGen/CodeGenInstruction.h:22,
from /export/users/atombot/llvm/clang-atom-d525-fedora-rel/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp:15:
/usr/include/c++/8/bits/stl_vector.h: In instantiation of 'class std::vector<const {anonymous}::EncodingAndInst, std::allocator<const {anonymous}::EncodingAndInst> >':
/export/users/atombot/llvm/clang-atom-d525-fedora-rel/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp:375:32: required from here
/usr/include/c++/8/bits/stl_vector.h:351:21: error: static assertion failed: std::vector must have a non-const, non-volatile value_type
static_assert(is_same<typename remove_cv<_Tp>::type, _Tp>::value,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/usr/include/c++/8/bits/stl_vector.h:354:21: error: static assertion failed: std::vector must have the same value_type as its allocator
static_assert(is_same<typename _Alloc::value_type, _Tp>::value,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
llvm-svn: 349046
Daniel Cederman [Thu, 13 Dec 2018 15:13:29 +0000 (15:13 +0000)]
[Sparc] Use float register for integer constrained with "f" in inline asm
Summary:
Constraining an integer value to a floating point register using "f"
causes an llvm_unreachable to trigger. This patch allows i32 integers
to be placed in a single precision float register and i64 integers to
be placed in a double precision float register. This matches the behavior
of GCC.
For other types the llvm_unreachable is removed to instead trigger an
error message that points out the offending line.
Reviewers: jyknight, venkatra
Reviewed By: jyknight
Subscribers: eraman, fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D51614
llvm-svn: 349045
Jinsong Ji [Thu, 13 Dec 2018 15:12:57 +0000 (15:12 +0000)]
[PowerPC][NFC] Sorting out Pseudo related classes to avoid confusion
There are several Pseudo in PowerPC backend.
eg:
* ISel Pseudo-instructions , which has let usesCustomInserter=1 in td
ExpandISelPseudos -> EmitInstrWithCustomInserter will deal with them.
* Post-RA pseudo instruction, which has let isPseudo = 1 in td, or Standard pseudo (SUBREG_TO_REG,COPY etc.)
ExpandPostRAPseudos -> expandPostRAPseudo will expand them
* Multi-instruction pseudo operations will expand them PPCAsmPrinter::EmitInstruction
* Pseudo instruction in CodeEmitter, which has encoding of 0.
Currently, in td files, especially PPCInstrVSX.td,
we did not distinguish Post-RA pseudo instruction and Pseudo instruction in CodeEmitter very clearly.
This patch is to
* Rename Pseudo<> class to PPCEmitTimePseudo, which means encoding of 0 in CodeEmitter
* Introduce new class PPCPostRAExpPseudo <> for previous PostRA Pseudo
* Introduce new class PPCCustomInserterPseudo <> for previous Isel Pseudo
Differential Revision: https://reviews.llvm.org/D55143
llvm-svn: 349044
Daniel Sanders [Thu, 13 Dec 2018 15:05:27 +0000 (15:05 +0000)]
[mir] Fix uninitialized variable in r349035 noticed by clang-atom-d525-fedora-rel and 3 other bots
llvm-svn: 349043
David Carlier [Thu, 13 Dec 2018 15:05:24 +0000 (15:05 +0000)]
[Sanitizer] capsicum further support of the API
Reviewers: vitalybuka, krytarowski, emaste
Reviewed By: emaste
Differential Revision: https://reviews.llvm.org/D55622
llvm-svn: 349042
Daniel Sanders [Thu, 13 Dec 2018 14:55:57 +0000 (14:55 +0000)]
[tblgen][disasm] Separate encodings from instructions
Summary:
Separate the concept of an encoding from an instruction. This will enable
the definition of additional encodings for the same instruction which can
be used to support variable length instruction sets in the disassembler
(and potentially assembler but I'm not working towards that right now)
without causing an explosion in the number of Instruction records that
CodeGen then has to pick between.
Reviewers: bogner, charukcs
Reviewed By: bogner
Subscribers: kparzysz, llvm-commits
Differential Revision: https://reviews.llvm.org/D52366
llvm-svn: 349041
Simon Pilgrim [Thu, 13 Dec 2018 14:51:28 +0000 (14:51 +0000)]
[X86][SSE] Merge the vXi16/vXi32 vector rotation expansion cases. NFCI.
Merged the repeated code into a single if().
llvm-svn: 349040
Ivan Donchevskii [Thu, 13 Dec 2018 14:37:17 +0000 (14:37 +0000)]
[clang-tidy] Share the forced linking code between clang-tidy tool and plugin
Extract code that forces linking to the separate header and include it in both plugin and standalone tool
Differential Revision: https://reviews.llvm.org/D55595
llvm-svn: 349038
Jonas Paulsson [Thu, 13 Dec 2018 14:37:05 +0000 (14:37 +0000)]
[SystemZ] Pass copy-hinted regs first from getRegAllocationHints().
When computing register allocation hints for a GRX32Bit register, make sure
that any of the hinted registers that are also copy hints are returned first
in the list.
Review: Ulrich Weigand.
llvm-svn: 349037
Tatyana Krasnukha [Thu, 13 Dec 2018 14:28:25 +0000 (14:28 +0000)]
Add missing Initialize/Terminate for Architecture plugins
llvm-svn: 349036
Daniel Sanders [Thu, 13 Dec 2018 14:25:27 +0000 (14:25 +0000)]
[mir] Serialize DILocation inline when not possible to use a metadata reference
Summary:
Sometimes MIR-level passes create DILocations that were not present in the
LLVM-IR. For example, it may merge two DILocations together to produce a
DILocation that points to line 0.
Previously, the address of these DILocations were printed which prevented the
MIR from being read back into LLVM. With this patch, DILocations will use
metadata references where possible and fall back on serializing them inline like so:
MOV32mr %stack.0.x.addr, 1, _, 0, _, %0, debug-location !DILocation(line: 1, scope: !15)
Reviewers: aprantl, vsk, arphaman
Reviewed By: aprantl
Subscribers: probinson, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D55243
llvm-svn: 349035
Simon Pilgrim [Thu, 13 Dec 2018 13:44:33 +0000 (13:44 +0000)]
[X86][BWI] Don't custom lower vXi8 rotations.
We always expand to shifts anyhow - test changes are just different scheduling only.
llvm-svn: 349034
Haojian Wu [Thu, 13 Dec 2018 13:17:04 +0000 (13:17 +0000)]
[clangd] Refine the way of checking a declaration is referenced by the written code.
Summary:
The previous solution (checking the AST) is not a reliable way to
determine whether a declaration is explicitly referenced by the source
code, we are still missing a few cases.
Reviewers: ilya-biryukov
Subscribers: ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D55191
llvm-svn: 349033
Haojian Wu [Thu, 13 Dec 2018 13:09:50 +0000 (13:09 +0000)]
[clangd] Avoid emitting Queued status when we are able to acquire the Barrier.
Reviewers: ilya-biryukov
Subscribers: javed.absar, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D55359
llvm-svn: 349032
Haojian Wu [Thu, 13 Dec 2018 13:07:29 +0000 (13:07 +0000)]
[clangd] Move the utility function to anonymous namespace, NFC.
llvm-svn: 349031
Chen Zheng [Thu, 13 Dec 2018 12:55:42 +0000 (12:55 +0000)]
[NFC][PowerPC] add verify-machineinstrs check
After rL349029 and rL348566, sj-ctr-loop.ll is ok for verify-machineinstrs check.
llvm-svn: 349030
Chen Zheng [Thu, 13 Dec 2018 12:25:20 +0000 (12:25 +0000)]
[PowerPC] intrinsic llvm.eh.sjlj.setjmp should not have flag isBarrier.
Differential Revision: https://reviews.llvm.org/D55499
llvm-svn: 349029
Simon Pilgrim [Thu, 13 Dec 2018 12:23:32 +0000 (12:23 +0000)]
[DAGCombine] Moved X86 rotate_amount % bitwidth == 0 early out to DAGCombiner
Remove common code from custom lowering (code is still safe if somehow a zero value gets used).
llvm-svn: 349028
Pavel Labath [Thu, 13 Dec 2018 12:13:29 +0000 (12:13 +0000)]
Classify tests in lit/Modules
We've recently developed a convention where the tests are placed into
subfolders according to the object file type. This applies that
convention to existing tests too.
llvm-svn: 349027
Diana Picus [Thu, 13 Dec 2018 12:06:54 +0000 (12:06 +0000)]
[ARM GlobalISel] Support exts and truncs for Thumb2
Mark G_SEXT, G_ZEXT and G_ANYEXT to 32 bits as legal and add support for
them in the instruction selector. This uses handwritten code again
because the patterns that are generated with TableGen are tuned for what
the DAG combiner would produce and not for simple sext/zext nodes.
Luckily, we only need to update the opcodes to use the Thumb2 variants,
everything else can be reused from ARM.
llvm-svn: 349026
Simon Pilgrim [Thu, 13 Dec 2018 11:20:48 +0000 (11:20 +0000)]
[TargetLowering] Add ISD::ROTL/ROTR vector expansion
Move existing rotation expansion code into TargetLowering and set it up for vectors as well.
Ideally this would share more of the funnel shift expansion, but we handle the shift amount modulo quite differently at the moment.
Begun removing x86 vector rotate custom lowering to use the expansion.
llvm-svn: 349025
Peter Smith [Thu, 13 Dec 2018 11:13:01 +0000 (11:13 +0000)]
[ELF][AArch64] Fix adrp to undefined weak reference.
In the ABI for the 64-bit Arm architecture the section on weak references
states:
During linking, the symbol value of an undefined weak reference is:
- Zero if the relocation type is absolute
- The address of the place if the relocation type is pc-relative.
The relocations associated with an ADRP are relative so we should resolve
the undefined weak reference to the place instead of 0. This matches GNU
ld.bfd behaviour.
fixes pr34928
Differential Revision: https://reviews.llvm.org/D55599
llvm-svn: 349024
Alex Bradbury [Thu, 13 Dec 2018 10:49:05 +0000 (10:49 +0000)]
[RISCV] Add support for the various RISC-V FMA instruction variants
Adds support for the various RISC-V FMA instructions (fmadd, fmsub, fnmsub, fnmadd).
The criteria for choosing whether a fused add or subtract is used, as well as
whether the product is negated or not, is whether some of the arguments to the
llvm.fma.* intrinsic are negated or not. In the tests, extraneous fadd
instructions were added to avoid the negation being performed using a xor
trick, which prevented the proper FMA forms from being selected and thus
tested.
The FMA instruction patterns might seem incorrect (e.g., fnmadd: -rs1 * rs2 -
rs3), but they should be correct. The misleading names were inherited from
MIPS, where the negation happens after computing the sum.
The llvm.fmuladd.* intrinsics still do not generate RISC-V FMA instructions,
as that depends on TargetLowering::isFMAFasterthanFMulAndFAdd.
Some comments in the test files about what type of instructions are there
tested were updated, to better reflect the current content of those test
files.
Differential Revision: https://reviews.llvm.org/D54205
Patch by Luís Marques.
llvm-svn: 349023
Arnaud A. de Grandmaison [Thu, 13 Dec 2018 10:31:32 +0000 (10:31 +0000)]
[AArch64] Catch some more CMN opportunities.
Fixes https://bugs.llvm.org/show_bug.cgi?id=33486
llvm-svn: 349022
Kamil Rytarowski [Thu, 13 Dec 2018 10:19:00 +0000 (10:19 +0000)]
Add a new interceptors for cdbr(3) and cdbw(3) API from NetBSD
Summary:
cdb - formats of the constant database.
cdbr, cdbr_open, cdbr_open_mem, cdbr_entries, cdbr_get, cdbr_find,
cdbr_close - constant database access methods.
cdbw_open, cdbw_put, cdbw_put_data, cdbw_put_key, cdbw_stable_seeder,
cdbw_output, cdbw_close - creates constant databases.
Add a dedicated test for this API.
Reviewers: vitalybuka, joerg
Reviewed By: vitalybuka
Subscribers: kubamracek, llvm-commits, mgorny, #sanitizers
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D55167
llvm-svn: 349021
Mikael Nilsson [Thu, 13 Dec 2018 10:17:26 +0000 (10:17 +0000)]
Fix for clang interface update
FunctionProtoType.TypeQuals is now a Qualifiers object instead of an
integer.
The related clang commit: r349019
llvm-svn: 349020
Mikael Nilsson [Thu, 13 Dec 2018 10:15:27 +0000 (10:15 +0000)]
[OpenCL] Add generic AS to 'this' pointer
Address spaces are cast into generic before invoking the constructor.
Added support for a trailing Qualifiers object in FunctionProtoType.
Note: This recommits the previously reverted patch,
but now it is commited together with a fix for lldb.
Differential Revision: https://reviews.llvm.org/D54862
llvm-svn: 349019
Kamil Rytarowski [Thu, 13 Dec 2018 10:14:01 +0000 (10:14 +0000)]
Add new interceptors for vis(3) API in NetBSD
Summary:
Add interceptors for the NetBSD style of vis(3) present inside libc:
- vis
- nvis
- strvis
- stravis
- strnvis
- strvisx
- strnvisx
- strenvisx
- svis
- snvis
- strsvis
- strsnvis
- strsvisx
- strsnvisx
- strsenvisx
- unvis
- strunvis
- strnunvis
- strunvisx
- strnunvisx
Add a dedicated test verifying the installed interceptors.
Based on original work by Yang Zheng.
Reviewers: vitalybuka, joerg
Reviewed By: vitalybuka
Subscribers: tomsun.0.7, kubamracek, llvm-commits, mgorny, #sanitizers
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D54594
llvm-svn: 349018
Andrey Churbanov [Thu, 13 Dec 2018 10:04:10 +0000 (10:04 +0000)]
Fix for bugzilla https://bugs.llvm.org/show_bug.cgi?id=39970
Broken tests fixed
Differential Revision: https://reviews.llvm.org/D55598
llvm-svn: 349017
Clement Courbet [Thu, 13 Dec 2018 09:56:19 +0000 (09:56 +0000)]
[CodeGen] Allow mempcy/memset to generate small overlapping stores.
Summary:
All targets either just return false here or properly model `Fast`, so I
don't think there is any reason to prevent CodeGen from doing the right
thing here.
Subscribers: nemanjai, javed.absar, eraman, jsji, llvm-commits
Differential Revision: https://reviews.llvm.org/D55365
llvm-svn: 349016
Vitaly Buka [Thu, 13 Dec 2018 09:47:39 +0000 (09:47 +0000)]
[asan] Don't check ODR violations for particular types of globals
Summary:
private and internal: should not trigger ODR at all.
unnamed_addr: current ODR checking approach fail and rereport false violation if
a linker merges such globals
linkonce_odr, weak_odr: could cause similar problems and they are already not
instrumented for ELF.
Reviewers: eugenis, kcc
Subscribers: kubamracek, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D55621
llvm-svn: 349015
Matt Arsenault [Thu, 13 Dec 2018 08:27:48 +0000 (08:27 +0000)]
AMDGPU/GlobalISel: Legalize f64 fadd/fmul
llvm-svn: 349014
Matt Arsenault [Thu, 13 Dec 2018 08:23:56 +0000 (08:23 +0000)]
Fix missing C++ mode comment in header
llvm-svn: 349013
Matt Arsenault [Thu, 13 Dec 2018 08:23:51 +0000 (08:23 +0000)]
AMDGPU/GlobalISel: RegBankSelect some simple operations
llvm-svn: 349012
Matt Arsenault [Thu, 13 Dec 2018 08:11:45 +0000 (08:11 +0000)]
AMDGPU/GlobalISel: Test cleanups
Remove IR and registers sections
llvm-svn: 349011
Serge Guelton [Thu, 13 Dec 2018 07:45:55 +0000 (07:45 +0000)]
Portable Python script across Python version
SocketServer has been renamed socketserver in Python3.
Differential Revision: https://reviews.llvm.org/D55258
llvm-svn: 349010
Serge Guelton [Thu, 13 Dec 2018 07:44:19 +0000 (07:44 +0000)]
Portable Python script across Python version
Queue module as been renamed into queue in Python3
Differential Revision: https://reviews.llvm.org/D55202
llvm-svn: 349009
Serge Guelton [Thu, 13 Dec 2018 07:42:30 +0000 (07:42 +0000)]
Portable Python script across Python version
Use higher-level and more compatible threading module to start a new thread.
Differential Revision: https://reviews.llvm.org/D55259
llvm-svn: 349008
Craig Topper [Thu, 13 Dec 2018 06:14:25 +0000 (06:14 +0000)]
[X86] Remove assert leftover from when i1 was a legal type. Add more accurate assert. NFC
llvm-svn: 349007
Stanislav Mekhanoshin [Thu, 13 Dec 2018 05:52:11 +0000 (05:52 +0000)]
[AMDGPU] Fix build failure, second attempt
Some compilers complain that variable is captured and some
complain when it is not. Switch to [&].
llvm-svn: 349006
Stanislav Mekhanoshin [Thu, 13 Dec 2018 05:21:25 +0000 (05:21 +0000)]
[AMDGPU] Fix build failure
Fixed error 'lambda capture 'CondReg' is not required to be captured
for this use'.
llvm-svn: 349005
Stephane Moore [Thu, 13 Dec 2018 03:35:10 +0000 (03:35 +0000)]
[clang] Add AST matcher for block expressions 🔍
Summary:
This change adds a new AST matcher for block expressions.
Test Notes:
Ran the clang unit tests.
Reviewers: aaron.ballman
Reviewed By: aaron.ballman
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D55546
llvm-svn: 349004
Stanislav Mekhanoshin [Thu, 13 Dec 2018 03:17:40 +0000 (03:17 +0000)]
[AMDGPU] Simplify negated condition
Optimize sequence:
%sel = V_CNDMASK_B32_e64 0, 1, %cc
%cmp = V_CMP_NE_U32 1, %1
$vcc = S_AND_B64 $exec, %cmp
S_CBRANCH_VCC[N]Z
=>
$vcc = S_ANDN2_B64 $exec, %cc
S_CBRANCH_VCC[N]Z
It is the negation pattern inserted by DAGCombiner::visitBRCOND() in the
rebuildSetCC().
Differential Revision: https://reviews.llvm.org/D55402
llvm-svn: 349003
David L. Jones [Thu, 13 Dec 2018 03:15:11 +0000 (03:15 +0000)]
Revert r348645 - "[MemCpyOpt] memset->memcpy forwarding with undef tail"
This revision caused trucated memsets for structs with padding. See:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20181210/610520.html
llvm-svn: 349002
Reid Kleckner [Thu, 13 Dec 2018 01:33:20 +0000 (01:33 +0000)]
Remove unused Args parameter from EmitFunctionBody, NFC
llvm-svn: 349001
Artem Dergachev [Thu, 13 Dec 2018 01:30:47 +0000 (01:30 +0000)]
[analyzer] RunLoopAutoreleaseLeakChecker: Come up with a test for r348822.
Statement memoization was removed in r348822 because it was noticed to cause
memory corruption. This was happening because a reference to an object
in a DenseMap was used after being invalidated by inserting a new key
into the map.
This test case crashes reliably under ASan (i.e., when Clang is built with
-DLLVM_USE_SANITIZER="Address") on at least some machines before r348822
and doesn't crash after it.
llvm-svn: 349000
Davide Italiano [Thu, 13 Dec 2018 01:11:52 +0000 (01:11 +0000)]
[LoopUtils] Prefer a set over a map. NFCI.
llvm-svn: 348999
Philip Reames [Thu, 13 Dec 2018 00:54:05 +0000 (00:54 +0000)]
[test] Add a set of test for constant folding deopt operands with CVP
For anyone curious, the first test example is illustrative of a real code idiom produced by branching on the result of a three way comparison.
llvm-svn: 348997
Jonas Devlieghere [Thu, 13 Dec 2018 00:15:17 +0000 (00:15 +0000)]
[NFC] Small code cleanups in utility.
Fix a few small annoyances in Utility I ran into.
llvm-svn: 348996
Shoaib Meenai [Thu, 13 Dec 2018 00:08:25 +0000 (00:08 +0000)]
[Support] Fix FileNameLength passed to SetFileInformationByHandle
The rename_internal function used for Windows has a minor bug where the
filename length is passed as a character count instead of a byte count.
Windows internally ignores this field, but other tools that hook NT
api's may use the documented behavior:
MSDN documentation specifying the size should be in bytes:
https://docs.microsoft.com/en-us/windows/desktop/api/winbase/ns-winbase-_file_rename_info
Patch by Ben Hillis.
Differential Revision: https://reviews.llvm.org/D55624
llvm-svn: 348995
Louis Dionne [Wed, 12 Dec 2018 23:58:25 +0000 (23:58 +0000)]
[libcxx] Add assertion in deque::pop_back when popping from an empty deque
Also, add tests making sure that vector and deque both catch the problem
when assertions are enabled. Otherwise, deque would segfault and vector
would never terminate.
llvm-svn: 348994
Shoaib Meenai [Wed, 12 Dec 2018 23:57:21 +0000 (23:57 +0000)]
[gn build] Fix defines define on Windows
On Windows, we won't go into the `host_os != "win"` block, so `defines`
won't have been defined, and we'll run into an undefined identifier
error when we try to later append to it. Unconditionally define it at
the start and append to it everywhere else.
Differential Revision: https://reviews.llvm.org/D55617
llvm-svn: 348993
Daniel Sanders [Wed, 12 Dec 2018 23:48:13 +0000 (23:48 +0000)]
[globalisel] Add GISelChangeObserver::changingInstr()
Summary:
In addition to knowing that an instruction is changed. It's also useful to
know when it's about to change. For example, it might print the instruction so
you can track the changes in a debug log, it might remove it from some queue
while it's being worked on, or it might want to change several instructions as
a single transaction and act on all the changes at once.
Added changingInstr() to all existing uses of changedInstr()
Reviewers: aditya_nandakumar
Reviewed By: aditya_nandakumar
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D55623
llvm-svn: 348992
Reid Kleckner [Wed, 12 Dec 2018 23:46:06 +0000 (23:46 +0000)]
Emit a proper diagnostic when attempting to forward inalloca arguments
The previous assertion was relatively easy to trigger, and likely will
be easy to trigger going forward. EmitDelegateCallArg is relatively
popular.
This cleanly diagnoses PR28299 while I work on a proper solution.
llvm-svn: 348991
Sam Clegg [Wed, 12 Dec 2018 23:44:59 +0000 (23:44 +0000)]
[WebAssembly] Add "needed" list to dylink section
Differential Revision: https://reviews.llvm.org/D55613
llvm-svn: 348990
Sam Clegg [Wed, 12 Dec 2018 23:40:58 +0000 (23:40 +0000)]
[WebAssembly] Update dylink section parsing
This updates the format of the dylink section in accordance with
recent "spec" change:
https://github.com/WebAssembly/tool-conventions/pull/77
Differential Revision: https://reviews.llvm.org/D55609
llvm-svn: 348989
Davide Italiano [Wed, 12 Dec 2018 23:32:35 +0000 (23:32 +0000)]
[LoopDeletion] Update debug values after loop deletion.
When loops are deleted, we don't keep track of variables modified inside
the loops, so the DI will contain the wrong value for these.
e.g.
int b() {
int i;
for (i = 0; i < 2; i++)
;
patatino();
return a;
-> 6 patatino();
7 return a;
8 }
9 int main() { b(); }
(lldb) frame var i
(int) i = 0
We mark instead these values as unavailable inserting a
@llvm.dbg.value(undef to make sure we don't end up printing an incorrect
value in the debugger. We could consider doing something fancier,
for, e.g. constants, in the future.
PR39868.
rdar://problem/
46418795)
Differential Revision: https://reviews.llvm.org/D55299
llvm-svn: 348988
Nikita Popov [Wed, 12 Dec 2018 23:19:03 +0000 (23:19 +0000)]
[InstCombine] Fix negative GEP offset evaluation for 32-bit pointers
This fixes https://bugs.llvm.org/show_bug.cgi?id=39908.
The evaluateGEPOffsetExpression() function simplifies GEP offsets for
use in comparisons against zero, basically by converting X*Scale+Offset==0
to X+Offset/Scale==0 if Scale divides Offset. However, before this is done,
Offset is masked down to the pointer size. This results in incorrect
results for negative Offsets, because we basically end up dividing the
32-bit offset *zero* extended to 64-bit bits (rather than sign extended).
Fix this by explicitly sign extending the truncated value.
Differential Revision: https://reviews.llvm.org/D55449
llvm-svn: 348987
Evgeniy Stepanov [Wed, 12 Dec 2018 22:56:00 +0000 (22:56 +0000)]
[hwasan] Link ubsan_cxx to shared runtime library.
Summary: This is needed for C++-specific ubsan and cfi error reporting to work.
Reviewers: kcc, vitalybuka
Subscribers: srhines, kubamracek, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D55589
llvm-svn: 348986
Fangrui Song [Wed, 12 Dec 2018 22:46:37 +0000 (22:46 +0000)]
[llvm-objcopy] Change Segment::Type from uint64_t to uint32_t
Summary:
In both Elf{32,64}_Phdr, the field Elf{32,64}_World p_type is uint32_t.
Also reorder the fields to be similar to Elf64_Phdr (which is different
from Elf32_Phdr but quite similar).
Reviewers: rupprecht, jhenderson, jakehehrlich, alexshap, espindola
Reviewed By: rupprecht
Subscribers: emaste, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D55618
llvm-svn: 348985
Ryan Prichard [Wed, 12 Dec 2018 22:45:12 +0000 (22:45 +0000)]
Switch Android from TLS_SLOT_TSAN(8) to TLS_SLOT_SANITIZER(6)
Summary:
The TLS_SLOT_TSAN slot is available starting in N, but its location (8)
is incompatible with the proposed solution for implementing ELF TLS on
Android (i.e. bump ARM/AArch64 alignment to reserve an 8-word TCB).
Instead, starting in Q, Bionic replaced TLS_SLOT_DLERROR(6) with
TLS_SLOT_SANITIZER(6). Switch compiler-rt to the new slot.
Reviewers: eugenis, srhines, enh
Reviewed By: eugenis
Subscribers: ruiu, srhines, kubamracek, javed.absar, kristof.beyls, delcypher, llvm-commits, #sanitizers
Differential Revision: https://reviews.llvm.org/D55581
llvm-svn: 348984
Ryan Prichard [Wed, 12 Dec 2018 22:45:06 +0000 (22:45 +0000)]
[hwasan] Android: Switch from TLS_SLOT_TSAN(8) to TLS_SLOT_SANITIZER(6)
Summary:
The change is needed to support ELF TLS in Android. See D55581 for the
same change in compiler-rt.
Reviewers: srhines, eugenis
Reviewed By: eugenis
Subscribers: srhines, llvm-commits
Differential Revision: https://reviews.llvm.org/D55592
llvm-svn: 348983
Haibo Huang [Wed, 12 Dec 2018 22:39:51 +0000 (22:39 +0000)]
Revert "Declares __cpu_model as dso local"
This reverts r348978
llvm-svn: 348982
Martin Storsjo [Wed, 12 Dec 2018 22:24:42 +0000 (22:24 +0000)]
Avoid code duplication in the SEH version of UnwindCursor::getRegisterName. NFC.
This requires making Registers_*::getRegisterName static.
Differential Revision: https://reviews.llvm.org/D55610
llvm-svn: 348981
Sanjay Patel [Wed, 12 Dec 2018 22:11:05 +0000 (22:11 +0000)]
[PhaseOrdering] add test for funnel shift (rotate); NFC
As mentioned in D55604, there are 2 bugs here:
1. The new pass manager is speculating wildly by default.
2. The old pass manager is not converting this to funnel shift.
llvm-svn: 348980
Evgeniy Stepanov [Wed, 12 Dec 2018 22:10:52 +0000 (22:10 +0000)]
[hwasan] Verify Android TLS slot at startup.
Summary:
Add a check that TLS_SLOT_TSAN / TLS_SLOT_SANITIZER, whichever
android_get_tls_slot is using, is not conflicting with
TLS_SLOT_DLERROR.
Reviewers: rprichard, vitalybuka
Subscribers: srhines, kubamracek, llvm-commits
Differential Revision: https://reviews.llvm.org/D55587
llvm-svn: 348979
Haibo Huang [Wed, 12 Dec 2018 22:04:12 +0000 (22:04 +0000)]
Declares __cpu_model as dso local
__builtin_cpu_supports and __builtin_cpu_is use information in __cpu_model to decide cpu features. Before this change, __cpu_model was not declared as dso local. The generated code looks up the address in GOT when reading __cpu_model. This makes it impossible to use these functions in ifunc, because at that time GOT entries have not been relocated. This change makes it dso local.
Differential Revision: https://reviews.llvm.org/D53850
llvm-svn: 348978
Eric Fiselier [Wed, 12 Dec 2018 21:50:55 +0000 (21:50 +0000)]
[AST] Store "UsesADL" information in CallExpr.
Summary:
Currently the Clang AST doesn't store information about how the callee of a CallExpr was found. Specifically if it was found using ADL.
However, this information is invaluable to tooling. Consider a tool which renames usages of a function. If the originally CallExpr was formed using ADL, then the tooling may need to additionally qualify the replacement.
Without information about how the callee was found, the tooling is left scratching it's head. Additionally, we want to be able to match ADL calls as quickly as possible, which means avoiding computing the answer on the fly.
This patch changes `CallExpr` to store whether it's callee was found using ADL. It does not change the size of any AST nodes.
Reviewers: fowles, rsmith, klimek, shafik
Reviewed By: rsmith
Subscribers: aaron.ballman, riccibruno, calabrese, titus, cfe-commits
Differential Revision: https://reviews.llvm.org/D55534
llvm-svn: 348977
Daniel Sanders [Wed, 12 Dec 2018 21:32:01 +0000 (21:32 +0000)]
[globalisel] Rename GISelChangeObserver's erasedInstr() to erasingInstr() and related nits. NFC
Summary:
There's little of interest that can be done to an already-erased instruction.
You can't inspect it, write it to a debug log, etc. It ought to be notification
that we're about to erase it. Rename the function to clarify the timing of the
event and reflect current usage.
Also fixed one case where we were trying to print an erased instruction.
Reviewers: aditya_nandakumar
Reviewed By: aditya_nandakumar
Subscribers: rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D55611
llvm-svn: 348976
Craig Topper [Wed, 12 Dec 2018 21:21:31 +0000 (21:21 +0000)]
[X86] Don't emit MULX by default with BMI2
MULX has somewhat improved register allocation constraints compared to the legacy MUL instruction. Both output registers are encoded instead of fixed to EAX/EDX, but EDX is used as input. It also doesn't touch flags. Unfortunately, the encoding is longer.
Prefering it whenever BMI2 is enabled is probably not optimal. Choosing it should somehow be a function of register allocation constraints like converting adds to three address. gcc and icc definitely don't pick MULX by default. Not sure what if any rules they have for using it.
Differential Revision: https://reviews.llvm.org/D55565
llvm-svn: 348975
David Blaikie [Wed, 12 Dec 2018 21:15:48 +0000 (21:15 +0000)]
Fix for llvm-dwarfdump changes for subroutine types
llvm-svn: 348974
Michal Gorny [Wed, 12 Dec 2018 20:51:46 +0000 (20:51 +0000)]
[test] [depr.c.headers] XFAIL uchar.h on NetBSD
llvm-svn: 348973
Craig Topper [Wed, 12 Dec 2018 20:50:24 +0000 (20:50 +0000)]
[X86] Move stack folding test for MULX to a MIR test. Add a MULX32 case as well
A future patch may stop using MULX by default so use MIR to ensure we're always testing MULX.
Add the 32-bit case that we couldn't do in the 64-bit mode IR test due to it being promoted to a 64-bit mul.
llvm-svn: 348972
Aakanksha Patil [Wed, 12 Dec 2018 20:49:17 +0000 (20:49 +0000)]
[AMDGPU] Support for "uniform-work-group-size" attribute
Updated the annotate-kernel-features pass to support the propagation of uniform-work-group attribute from the kernel to the called functions. Once this pass is run, all kernels, even the ones which initially did not have the attribute, will be able to indicate weather or not they have uniform work group size depending on the value of the attribute.
Differential Revision: https://reviews.llvm.org/D50200
llvm-svn: 348971
Saleem Abdulrasool [Wed, 12 Dec 2018 20:35:47 +0000 (20:35 +0000)]
Support: use internal `call_once` on PPC64le
Use the replacement execute once threading support in LLVM for PPC64le. It
seems that GCC does not define `__ppc__` and so we would actually call out to
the C++ runtime there which is not what the current code intended. Check both
`__ppc__` and `__PPC__`. This avoids the need for checking the endianness.
Thanks to nemanjai for the hint about GCC's behaviour and the fact that the
reviewed condition could be simplified.
Original patch by Sarvesh Tamba!
llvm-svn: 348970
Erich Keane [Wed, 12 Dec 2018 20:30:53 +0000 (20:30 +0000)]
Teach __builtin_unpredictable to work through implicit casts.
The __builtin_unpredictable implementation is confused by any implicit
casts, which happen in C++. This patch strips those off so that
if/switch statements now work with it in C++.
Change-Id: I73c3bf4f1775cd906703880944f4fcdc29fffb0a
llvm-svn: 348969
Michal Gorny [Wed, 12 Dec 2018 20:28:52 +0000 (20:28 +0000)]
[test] [filesystems] NetBSD can do symlink permissions too
llvm-svn: 348968
Michal Gorny [Wed, 12 Dec 2018 20:20:15 +0000 (20:20 +0000)]
[test] [filesystems] Extend FreeBSD tv_sec==-1 workaround to NetBSD
NetBSD also uses tv_sec==-1 as error status indicator, and does not
support setting such a value.
llvm-svn: 348967
Simon Pilgrim [Wed, 12 Dec 2018 19:56:38 +0000 (19:56 +0000)]
[X86] Added missing constant pool checks. NFCI.
So the extra checks in D55600 don't look like a regression.
llvm-svn: 348966
David Blaikie [Wed, 12 Dec 2018 19:53:03 +0000 (19:53 +0000)]
DebugInfo/DWARF: Pretty print subroutine types
Doesn't handle varargs and other fun things, but it's a start. (also
doesn't print these strictly as valid C++ when it's a pointer to
function, it'll print as "void(int)*" instead of "void (*)(int)")
llvm-svn: 348965
Scott Linder [Wed, 12 Dec 2018 19:39:27 +0000 (19:39 +0000)]
[AMDGPU] Emit MessagePack HSA Metadata for v3 code object
Continue to present HSA metadata as YAML in ASM and when output by tools
(e.g. llvm-readobj), but encode it in Messagepack in the code object.
Differential Revision: https://reviews.llvm.org/D48179
llvm-svn: 348963