platform/kernel/u-boot.git
3 years agodh_imx6: Switch to full DM-aware
Jagan Teki [Fri, 23 Oct 2020 08:32:48 +0000 (14:02 +0530)]
dh_imx6: Switch to full DM-aware

Enable DM_SPI/DM_SPI_FLASH with a related config option.

Build fine, but not tested.

Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
3 years agocm_fx6: Switch to full DM-aware
Jagan Teki [Fri, 23 Oct 2020 08:26:49 +0000 (13:56 +0530)]
cm_fx6: Switch to full DM-aware

Enable DM_SPI/DM_SPI_FLASH with a related config option.

Build fine, but not tested.

Cc: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
3 years agocl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH
Jagan Teki [Fri, 23 Oct 2020 08:21:01 +0000 (13:51 +0530)]
cl-som-imx7: Switch to DM_SPI/DM_SPI_FLASH

Enable DM_SPI/DM_SPI_FLASH with associated config
options.

Build fine, but not tested.

Cc: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
3 years agoconfigs: Resync with savedefconfig
Tom Rini [Wed, 16 Dec 2020 15:58:24 +0000 (10:58 -0500)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Wed, 16 Dec 2020 13:13:37 +0000 (08:13 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- Update cmdline parameter to be an env var in zimage boot
- Various minor fixes for Intel Edison board

3 years agox86: edison: Switch to DM_USB_GADGET
Andy Shevchenko [Thu, 3 Dec 2020 17:45:02 +0000 (19:45 +0200)]
x86: edison: Switch to DM_USB_GADGET

DM is the modern default approach for the drivers in U-Boot.
It also allows to configure code via Device Tree.

Move Intel Edison to use DM_USB_GADGET and drop hard coded values.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: edison: Use dwc3-generic driver for Intel Edison
Andy Shevchenko [Thu, 3 Dec 2020 17:45:01 +0000 (19:45 +0200)]
x86: edison: Use dwc3-generic driver for Intel Edison

Use generic Synopsys DesignWare 3 driver on Intel Edison.
For now it's just a stub which allows future refactoring.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: edison: BINMAN selection is specific to the board
Andy Shevchenko [Thu, 3 Dec 2020 15:40:11 +0000 (17:40 +0200)]
x86: edison: BINMAN selection is specific to the board

The platforms based on Intel Tangier may have different requirements
how to create bootloader bundle to supply to a device. Currently
the BINMAN approach is for Intel Edison only.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: edison: Add CPU to compatible string
Andy Shevchenko [Wed, 2 Dec 2020 10:35:32 +0000 (12:35 +0200)]
x86: edison: Add CPU to compatible string

Like in the rest of x86 boards append CPU to the board compatible string.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: edison: Drop unneeded DM_PCI_COMPAT
Andy Shevchenko [Fri, 27 Nov 2020 12:41:16 +0000 (14:41 +0200)]
x86: edison: Drop unneeded DM_PCI_COMPAT

None of the driver for Edison is using DM_PCI_COMPAT, hence drop it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: tangier: Find proper memory region for relocation
Andy Shevchenko [Fri, 27 Nov 2020 12:40:48 +0000 (14:40 +0200)]
x86: tangier: Find proper memory region for relocation

It appears that U-Boot works by luck on Intel Edison board because the amount
of RAM is less than 1 GB and standard way of calculating the top of it work
for this configuration. However, this won't work if the amount of RAM is
different and split differently in address space. We have to find the suitable
window correctly.

Find proper memory region for relocation by scanning MMAP SFI table in
board_get_usable_ram_top() callback.

According to the address map documentation the Main Memory is guaranteed to lie
in the 0..2 GB range, that's why we limit search by this range.

Fixes: e71de54a4943 ("x86: Add Intel Tangier support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: coral: Update the boot script
Simon Glass [Mon, 9 Nov 2020 14:12:25 +0000 (07:12 -0700)]
x86: coral: Update the boot script

Make use of the new bootargs substitution mechanism and zboot command
syntax.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: zimage: Update cmdline parameter to be an env var
Simon Glass [Mon, 9 Nov 2020 14:12:24 +0000 (07:12 -0700)]
x86: zimage: Update cmdline parameter to be an env var

With the updated changes to bootargs substitution[1], the zboot command
needs to be updated to get its command line from an environment variable
instead of a memory address. This is because the command-line string must
be updated to convert %U to ${uuid}, etc.

In any case it is more flexible to use a environment variable and it is
best to do this before the release to avoid a subsequent change.

Update the command accordingly.

[1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoMerge tag 'doc-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Tue, 15 Dec 2020 18:57:03 +0000 (13:57 -0500)]
Merge tag 'doc-2021-01-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Documentation fixes for v2020.01-rc4

Move several README files to reStructured text for the HTML documentation.
Describe register for global data on x86.
Allow building HTML documentation with Sphinx 3

3 years agodistro_bootcmd: set devtype for dhcp boot
Igor Opaniuk [Thu, 29 Oct 2020 10:59:19 +0000 (12:59 +0200)]
distro_bootcmd: set devtype for dhcp boot

Set $devtype for DHCP boot, which can be handy for the boot.scr
for detection of devtype used (for example, when the same boot.scr is
used for both mmc/dhcp boot):

if test ${devtype} = "dhcp"; then
...
fi

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
3 years agoMerge tag 'u-boot-amlogic-20201215' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Tue, 15 Dec 2020 14:08:14 +0000 (09:08 -0500)]
Merge tag 'u-boot-amlogic-20201215' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- fix pinctrl BIAS setup which caused failure on some eMMC models
- fix dr-mode configuration in dwc3-meson-g12a glue driver

3 years agodoc: uefi: remove leading $ from bash commands
Heinrich Schuchardt [Sat, 12 Dec 2020 08:15:12 +0000 (09:15 +0100)]
doc: uefi: remove leading $ from bash commands

Use the same formatting for all bash commands.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: move README.bootmenu to HTML doc
Heinrich Schuchardt [Sat, 12 Dec 2020 09:53:17 +0000 (10:53 +0100)]
doc: move README.bootmenu to HTML doc

Convert README.bootmenu to reStructured text and move it to
usage/bootmenu.rst.

Adjust the text concerning configuration settings as these now are managed
via Kconfig.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
3 years agodoc: move README.trace to HTML documentation
Heinrich Schuchardt [Sat, 12 Dec 2020 09:14:22 +0000 (10:14 +0100)]
doc: move README.trace to HTML documentation

Convert README.trace to reStructured text and move it to develop/trace.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodoc: move README.NetConsole to HTML documentation
Heinrich Schuchardt [Sat, 12 Dec 2020 08:37:47 +0000 (09:37 +0100)]
doc: move README.NetConsole to HTML documentation

Convert README.NetConsole to reStructured text and move it to
doc/usage/netconsole.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodoc: use code-block in pstore.rst
Heinrich Schuchardt [Sat, 12 Dec 2020 08:00:12 +0000 (09:00 +0100)]
doc: use code-block in pstore.rst

Use syntax highlighting for a Linux console session.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: move pstore.rst to usage/pstore.rst
Heinrich Schuchardt [Sat, 12 Dec 2020 07:50:37 +0000 (08:50 +0100)]
doc: move pstore.rst to usage/pstore.rst

Let's have a separate chapter dedicated to using U-Boot.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: move README.commands to HTML doc
Heinrich Schuchardt [Sat, 12 Dec 2020 07:33:28 +0000 (08:33 +0100)]
doc: move README.commands to HTML doc

Reformat README.commands as reStructured text and add it to the HTML
documentation as develop/commands.rst.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodoc: allow building htmldoc with Sphinx 3+
Heinrich Schuchardt [Mon, 30 Nov 2020 08:52:57 +0000 (09:52 +0100)]
doc: allow building htmldoc with Sphinx 3+

Due to removed function c_funcptr_sig_re building with Sphinx 3 fails.

With the patch building succeeds with a lot of warnings if the '-W' flag is
removed from doc/Makefile. Most of the documentation is correct

This follows the approach taken by the Linux kernel.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: global data pointer on x86, x86_64
Heinrich Schuchardt [Thu, 15 Oct 2020 05:40:57 +0000 (07:40 +0200)]
doc: global data pointer on x86, x86_64

On x86 the global data pointer is stored in register fs.
On x86_64 no register is used for the global data pointer.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodoc/build/gcc.rst: required packages for SUSE
Heinrich Schuchardt [Sun, 20 Sep 2020 10:01:30 +0000 (12:01 +0200)]
doc/build/gcc.rst: required packages for SUSE

Describe the packages required to build U-Boot on SUSE.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Mon, 14 Dec 2020 20:11:05 +0000 (15:11 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv

- Fix wrong amoswap t1 usage in startup.
- Reset the board after crash.
- Enable distro booting from an attached SCSI disk for QEMU.
- Support the optional header fields in efi header.

3 years agopinctrl: meson: fix bit manipulation of pin bias configuration
Neil Armstrong [Mon, 14 Dec 2020 18:39:07 +0000 (19:39 +0100)]
pinctrl: meson: fix bit manipulation of pin bias configuration

This fixes the wrong usage of clrsetbits_le32(), badly setting the set argument.

Fixes: c4c726c26b ("pinctrl: meson: add pinconf support")
Reported-by: Anton Arapov <arapov@gmail.com>
Reported-by: Otto Meier <gf435@gmx.net>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
3 years agousb: dwc3-meson-g12a: always configure dr-mode
Marek Szyprowski [Mon, 14 Dec 2020 11:34:19 +0000 (12:34 +0100)]
usb: dwc3-meson-g12a: always configure dr-mode

dwc3_meson_g12a_force_mode() sets the dr-mode of the USB PHY. However
it skips setting the mode if it matches the one done during driver probe
(stored in private structure). This fails if the mode has been changed
to other value and then back to initial one. Fix this by configuring the
dr-mode always, regadless of the one set at the driver probe).

This fixes operation of USB gadget based drivers when they are initialized
for the second time.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
3 years agoriscv: Complete efi header for RV32/64
Leo Yu-Chi Liang [Mon, 16 Nov 2020 09:07:41 +0000 (17:07 +0800)]
riscv: Complete efi header for RV32/64

This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/)

Add fields to complete Optional Header "Data Directories" specified in the document.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
3 years agoriscv: Fix efi header size for RV32
Leo Yu-Chi Liang [Thu, 12 Nov 2020 02:09:52 +0000 (10:09 +0800)]
riscv: Fix efi header size for RV32

This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/20201013192331.3236458-1-atish.patra@wdc.com/)

Modify the size of the Optional Header "Windows-Specific Fields" to fit with the specification.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com
3 years agoriscv: Fix efi header for RV32
Atish Patra [Tue, 13 Oct 2020 19:23:31 +0000 (12:23 -0700)]
riscv: Fix efi header for RV32

RV32 should use PE32 format instead of PE32+ as the efi header format.
This requires following changes
1. A different header magic value
2. An additional parameter known as BaseOfData. Currently, it is set to
   zero in absence of any usage.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
3 years agoriscv: qemu: enable distro boot from scsi
Heinrich Schuchardt [Tue, 1 Dec 2020 16:30:26 +0000 (17:30 +0100)]
riscv: qemu: enable distro boot from scsi

Booting via distro boot fails for:

    qemu-system-riscv64
    -drive if=none,file=sct-riscv64.img,format=raw,id=mydisk \
    -device ich9-ahci,id=ahci -device ide-hd,drive=mydisk,bus=ahci.0

Enable distro booting from an attached SCSI disk.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
3 years agoriscv: reset after crash
Heinrich Schuchardt [Wed, 2 Dec 2020 13:36:26 +0000 (14:36 +0100)]
riscv: reset after crash

If an exception occurs on ARM or x86, we call panic() which will try to
reset the board. Do the same on RISC-V.

To avoid -Werror=format-zero-length move a '\n' to the string passed to
panic. We don't need a message here as depending on CONFIG_PANIC_HANG we
will either see

    ### ERROR ### Please RESET the board ###

or

    resetting ...

as next message.

Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoriscv: fix the wrong swap value register
Brad Kim [Fri, 13 Nov 2020 11:47:51 +0000 (20:47 +0900)]
riscv: fix the wrong swap value register

Not s2 register, t1 register is correct
Fortunately, it works because t1 register has a garbage value

Signed-off-by: Brad Kim <brad.kim@semifive.com>
Reviewed-by: Lukas Auer <lukas@auer.io>
Reviewed-by: Leo Liang <ycliang@andestech.com>
3 years agoMerge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Fri, 11 Dec 2020 20:55:17 +0000 (15:55 -0500)]
Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

Second set of u-boot-atmel fixes for 2021.01 cycle

This set includes very important fixes for: MMC booting on several
boards, drive strength on sam9x60ek mmc lines, compile issues for
timer.c old driver, removal of unwanted access to sam9x60 bit for
oscillator bypass mode, and eeproms read on sama5d2_icp.

3 years agoARM: dts: at91: sama5d2_icp: fix i2c eeprom compatible
Eugen Hristev [Mon, 7 Dec 2020 07:30:59 +0000 (09:30 +0200)]
ARM: dts: at91: sama5d2_icp: fix i2c eeprom compatible

The correct compatible for this eeproms is microchip,24aa02e48
The previous compatible string was working up to U-boot 2020.04.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
3 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Tom Rini [Fri, 11 Dec 2020 14:35:03 +0000 (09:35 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- Add lx2162 soc, lx2162qds support.
- Bug-fixes related ls102x-usb, ifc, bootcmd, secure-boot header,
- rgmii, vid, fdt, env variable, pci for Layerscape products

3 years agoconfigs: lx2162aqds: Enable gpio driver in defconfig
Hui Song [Fri, 4 Dec 2020 15:56:19 +0000 (21:26 +0530)]
configs: lx2162aqds: Enable gpio driver in defconfig

make lx2162aqds platform to enable gpio driver.

Signed-off-by: Hui Song <hui.song_1@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: ls102xa: select USB PHY erratum's only if USB is enabled
Aleksandar Gerasimovski [Thu, 26 Nov 2020 10:52:41 +0000 (10:52 +0000)]
arm: ls102xa: select USB PHY erratum's only if USB is enabled

The USB support is not by default enabled on all designs, so it does not
make seance to have USB specific erratum's enabled on such a designs.

On our internal Hitachi-Powergrids design not using the USB controller
there is a crash when accessing those specific memory locations selected
by the erratum flags.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agodrivers: ifc: add define for IFC_CSPRn TE bit
Aleksandar Gerasimovski [Thu, 26 Nov 2020 10:45:16 +0000 (10:45 +0000)]
drivers: ifc: add define for IFC_CSPRn TE bit

To drive TE pin high is supported IFC configuration that can be used on
some designs.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agopowerpc: mpc85xx: Allow boards to override CONFIG_USB_MAX_CONTROLLER_COUNT
Chris Packham [Thu, 3 Dec 2020 03:24:29 +0000 (16:24 +1300)]
powerpc: mpc85xx: Allow boards to override CONFIG_USB_MAX_CONTROLLER_COUNT

If the board isn't strapped to enable USB1 then attempting to access it
will result in a hang. Avoid this by allowing boards to define
CONFIG_USB_MAX_CONTROLLER_COUNT.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-A
Alban Bedel [Tue, 17 Nov 2020 15:20:04 +0000 (16:20 +0100)]
armv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-A

When booting from TF-A there is a logic that attempt to detect if the
default environment is used, if this is the case it then set the
`bootcmd` and `mcinitcmd` depending of the device we booted from.
This detection logic is dubious as it access internals of the env
implementation and it doesn't always work correctly.

First of all it detect any valid environment as not being the
default, so after running `env default -a && saveenv` the board
doesn't boot anymore as `bootcmd` is then empty.
But it also fails in some other ways, for example it always detect a
default environment when redundant env is enabled on MMC, so in that
case `bootcmd` is overwritten on every boot.

Instead of increasing the complexity of the detection just check if
`bootcmd` and `mcinitcmd` are set in the environment and set them if
they are not.

Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agonet: pfe_eth: read PFE ESBC header flash with spi_flash_read API
Biwen Li [Thu, 5 Nov 2020 11:28:12 +0000 (19:28 +0800)]
net: pfe_eth: read PFE ESBC header flash with spi_flash_read API

Read PFE ESBC header flash with spi_flash_read API
- logs as follows,
  Net:   SF: Detected s25fs512s with page size 256 Bytes, erase size 256
  KiB, total 64 MiB
  "Synchronous Abort" handler, esr 0x96000210
  elr: 000000008206db44 lr : 0000000082004ea0 (reloc)
  elr: 00000000b7ba6b44 lr : 00000000b7b3dea0
  x0 : 00000000b79407e8 x1 : 0000000040640000
  x2 : 0000000000000050 x3 : 0000000000000000
  x4 : 000000000000000a x5 : 0000000000000050
  x6 : 0000000000000366 x7 : 00000000b7942308
  x8 : 00000000b76407c0 x9 : 0000000000000008
  x10: 0000000000000044 x11: 00000000b7634d1c
  x12: 000000000000004f x13: 0000000000000044
  x14: 00000000b7634d98 x15: 00000000b76407c0
  x16: 0000000000000000 x17: 0000000000000000
  x18: 00000000b7636dd8 x19: 0000000000000000
  x20: 00000000b79407d0 x21: 00000000b79407e8
  x22: 0000000040640000 x23: 00000000b7634e58
  x24: 0000000000000000 x25: 0000000003800000
  x26: 00000000b7bdd000 x27: 0000000000000000
  x28: 0000000000000000 x29: 00000000b7634d10

  Code: d2800003 eb03005f 54000101 d65f03c0 (f8636826)
  Resetting CPU ...

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agolx2160a: Fix address for secure boot headers
Manish Tomar [Thu, 5 Nov 2020 08:38:56 +0000 (14:08 +0530)]
lx2160a: Fix address for secure boot headers

Update kernel_size_sd variable with correct value for lx2160a.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agols1043a: Fix address for secure boot headers
Manish Tomar [Thu, 5 Nov 2020 08:38:55 +0000 (14:08 +0530)]
ls1043a: Fix address for secure boot headers

Update kernelheader_addr and kernelheader_addr variables with
correct values for ls1043a.

Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agolayerscape: fdt.c: Check for NULL return value from fdt_getprop()
Priyanka Singh [Mon, 2 Nov 2020 06:08:41 +0000 (11:38 +0530)]
layerscape: fdt.c: Check for NULL return value from fdt_getprop()

Check for NULL return value from fdt_getprop() in
fdt_fixup_remove_jr()

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
[Fixed checkpatch errors/warnings]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: freescale: powerpc: add support for all RGMII modes
Madalin Bucur [Wed, 4 Nov 2020 13:09:17 +0000 (15:09 +0200)]
board: freescale: powerpc: add support for all RGMII modes

Make sure all RGMII internal delay modes are covered.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv8: ls1043/ls1046aqds: add support for all RGMII modes
Madalin Bucur [Wed, 4 Nov 2020 13:09:16 +0000 (15:09 +0200)]
armv8: ls1043/ls1046aqds: add support for all RGMII modes

Make sure all RGMII internal delay modes are covered.

Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: freescale: vid.c: Initialize variable 'i2caddress'
Priyanka Singh [Tue, 27 Oct 2020 10:20:14 +0000 (15:50 +0530)]
board: freescale: vid.c: Initialize variable 'i2caddress'

Initialize variable 'i2caddress' in adjust_vdd() to zero

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoinclude/configs: ls1012aqds: add default environment variable
Biwen Li [Mon, 26 Oct 2020 08:52:36 +0000 (16:52 +0800)]
include/configs: ls1012aqds: add default environment variable

This adds default environment variable for ls1012aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard/freescale/common: fix a bug that failed to read/write eeprom on ls1021atsn
Biwen Li [Mon, 26 Oct 2020 07:14:05 +0000 (15:14 +0800)]
board/freescale/common: fix a bug that failed to read/write eeprom on ls1021atsn

Fix a bug that failed to read/write eeprom on ls1021atsn

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agopci: layerscape: fix a dead loop issue
Hou Zhiqiang [Mon, 26 Oct 2020 03:57:42 +0000 (11:57 +0800)]
pci: layerscape: fix a dead loop issue

Fixes: commit 8ec619f8fd84 ("pci: layerscape: Fixup PCIe EP
mode DT nodes for LX2160A rev2")

This added the PCIe EP nodes fixup of LX2160A, but it
didn't update the condition value when there isn't a
property 'apio-wins'.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Fixed checkpatch error]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: lx2162aqds: enable eMMC HS400 mode support
Yangbo Lu [Tue, 13 Oct 2020 06:17:35 +0000 (14:17 +0800)]
configs: lx2162aqds: enable eMMC HS400 mode support

Enable eMMC HS400 mode support on LX2162AQDS.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: lx2162aqds: enable CONFIG_BOARD_EARLY_INIT_R
Yangbo Lu [Fri, 4 Dec 2020 15:01:26 +0000 (20:31 +0530)]
configs: lx2162aqds: enable CONFIG_BOARD_EARLY_INIT_R

Enable CONFIG_BOARD_EARLY_INIT_R for SDHC adapter card
identification and configuration.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: lx2162a: Enable OPTEE support
Ruchika Gupta [Mon, 28 Sep 2020 12:51:54 +0000 (18:21 +0530)]
configs: lx2162a: Enable OPTEE support

Enable support to compile OPTEE driver, access AVB TA
and RPMB API's access via RPC from OPTEE for lx2162

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv8: lx2162aqds: Add support for LX2162AQDS platform
Meenakshi Aggarwal [Fri, 4 Dec 2020 14:47:28 +0000 (20:17 +0530)]
armv8: lx2162aqds: Add support for LX2162AQDS platform

This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: hui.song <hui.song_1@nxp.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv8: lx2162a: Add Soc changes to support LX2162A
Meenakshi Aggarwal [Thu, 29 Oct 2020 13:46:16 +0000 (19:16 +0530)]
armv8: lx2162a: Add Soc changes to support LX2162A

LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.

LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agodrivers/net/phy: Add CORTINA_NO_FW_UPLOAD to Kconfig
Meenakshi Aggarwal [Thu, 29 Oct 2020 13:46:15 +0000 (19:16 +0530)]
drivers/net/phy: Add CORTINA_NO_FW_UPLOAD to Kconfig

Move CORTINA_NO_FW_UPLOAD to Kconfig file so that it can
be controlled via defconfig files.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agopci: ls_pcie_g4: Add size check for config resource
Wasim Khan [Mon, 28 Sep 2020 10:56:14 +0000 (16:26 +0530)]
pci: ls_pcie_g4: Add size check for config resource

resource "config" is required to have minimum 4KB space
to access all config space of PCI Express EP.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agopci: layerscape: Add size check for config resource
Wasim Khan [Mon, 28 Sep 2020 10:56:13 +0000 (16:26 +0530)]
pci: layerscape: Add size check for config resource

resource "config" is required to have minimum 8KB space
as per hardware documentation.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: dts: ls1028a: add label to pcie nodes in dts
Wasim Khan [Mon, 28 Sep 2020 10:56:12 +0000 (16:26 +0530)]
arm: dts: ls1028a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: dts: ls1043a: add label to pcie nodes in dts
Wasim Khan [Mon, 28 Sep 2020 10:56:11 +0000 (16:26 +0530)]
arm: dts: ls1043a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: dts: ls1012a: add label to pcie nodes in dts
Wasim Khan [Mon, 28 Sep 2020 10:56:10 +0000 (16:26 +0530)]
arm: dts: ls1012a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: dts: ls1088a: add label to pcie nodes in dts
Wasim Khan [Mon, 28 Sep 2020 10:56:09 +0000 (16:26 +0530)]
arm: dts: ls1088a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: dts: ls2080a: add label to pcie nodes in dts
Wasim Khan [Mon, 28 Sep 2020 10:56:08 +0000 (16:26 +0530)]
arm: dts: ls2080a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: dts: ls1046a: add label to pcie nodes in dts
Wasim Khan [Mon, 28 Sep 2020 10:56:07 +0000 (16:26 +0530)]
arm: dts: ls1046a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: dts: lx2160a: add label to pcie nodes in dts
Wasim Khan [Fri, 4 Dec 2020 14:41:53 +0000 (20:11 +0530)]
arm: dts: lx2160a: add label to pcie nodes in dts

Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agopci: ls_pcie_g4: Print pcie controller number starting from 1
Wasim Khan [Mon, 28 Sep 2020 10:56:05 +0000 (16:26 +0530)]
pci: ls_pcie_g4: Print pcie controller number starting from 1

Print pcie controller number starting from 1

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
3 years agopci: layerscape: Update print of pcie controller
Wasim Khan [Mon, 28 Sep 2020 10:56:04 +0000 (16:26 +0530)]
pci: layerscape: Update print of pcie controller

Print pcie controller number starting from 1

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Trimmed subject]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: lx2160a: Enable CONFIG_PCIE_LAYERSCAPE_GEN4
Wasim Khan [Mon, 28 Sep 2020 10:56:03 +0000 (16:26 +0530)]
configs: lx2160a: Enable CONFIG_PCIE_LAYERSCAPE_GEN4

LX2160A-Rev1 uses PCIe layerscape Gen4 controller.
Enable CONFIG_PCIE_LAYERSCAPE_GEN4 for lx2160a.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoMerge tag 'u-boot-stm32-20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Wed, 9 Dec 2020 16:36:41 +0000 (11:36 -0500)]
Merge tag 'u-boot-stm32-20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM

3 years agoARM: dts: stm32: Add USB OTG ID pin on DH AV96
Marek Vasut [Tue, 1 Dec 2020 10:29:20 +0000 (11:29 +0100)]
ARM: dts: stm32: Add USB OTG ID pin on DH AV96

Add USB OTG ID pin mux and switch the USB OTG port
from peripheral to OTG mode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoARM: dts: stm32: Enable SDMMC3 on DH DRC02
Marek Vasut [Tue, 1 Dec 2020 10:29:19 +0000 (11:29 +0100)]
ARM: dts: stm32: Enable SDMMC3 on DH DRC02

The DH DRC02 board has an on-board microSD slot,
add DT properties to enable the slot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoARM: dts: stm32: Disable SDMMC1 CKIN feedback clock
Marek Vasut [Tue, 1 Dec 2020 10:29:18 +0000 (11:29 +0100)]
ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock

The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
Marek Vasut [Tue, 1 Dec 2020 10:29:17 +0000 (11:29 +0100)]
ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM

The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years ago.mailmap: map Patrick Delaunay and my email address
Patrice Chotard [Wed, 2 Dec 2020 17:47:31 +0000 (18:47 +0100)]
.mailmap: map Patrick Delaunay and my email address

Add our new email address dedicated for upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
3 years agotreewide: Update email address Patrick Delaunay and Patrice Chotard
Patrice Chotard [Wed, 2 Dec 2020 17:47:30 +0000 (18:47 +0100)]
treewide: Update email address Patrick Delaunay and Patrice Chotard

Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
3 years agoMAINTAINERS: Update ARM STI and ARM STM STM32MP Arch maintainers emails
Patrice Chotard [Wed, 2 Dec 2020 17:47:29 +0000 (18:47 +0100)]
MAINTAINERS: Update ARM STI and ARM STM STM32MP Arch maintainers emails

Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
3 years agoadd check for ignored CONFIG_ENV_EXT4_DEVICE_AND_PART definition
Manuel Reis [Wed, 25 Nov 2020 10:16:20 +0000 (10:16 +0000)]
add check for ignored CONFIG_ENV_EXT4_DEVICE_AND_PART definition

Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition

Voids the need to set such partition as bootable to work with the
'dev:auto' tuple

Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
3 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Tue, 8 Dec 2020 14:53:03 +0000 (09:53 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imx

3 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Mon, 7 Dec 2020 16:46:12 +0000 (11:46 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell

- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
  threshold configuration (Joshua)

3 years agoconfigs: migrate CONFIG_IMX_THERMAL to defconfigs
Tom Rini [Fri, 30 Oct 2020 01:22:03 +0000 (21:22 -0400)]
configs: migrate CONFIG_IMX_THERMAL to defconfigs

Done via moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoimx8mp_evk: README instruction fixes
Baruch Siach [Wed, 28 Oct 2020 07:38:52 +0000 (09:38 +0200)]
imx8mp_evk: README instruction fixes

Use the full name of firmware self extracting file to make it run.

Also, don't use sudo when not needed.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
3 years agodoc: board: imx8qm-rom7720-a1.rst: convert readme to reST
Oliver Graute [Fri, 20 Nov 2020 14:05:51 +0000 (15:05 +0100)]
doc: board: imx8qm-rom7720-a1.rst: convert readme to reST

Convert README to reStructuredText format.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
3 years agoclk: at91: sam9x60: remove the parsing of atmel, main-osc-bypass
Claudiu Beznea [Wed, 2 Dec 2020 11:39:33 +0000 (13:39 +0200)]
clk: at91: sam9x60: remove the parsing of atmel, main-osc-bypass

Remove the parsing of atmel,main-osc-bypass DT property as the SAM9X60
have no support for crystal oscillator bypass. Setting this bit might
affect the device functionality.

Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
3 years agoarm: mvebu: Espressobin: Detect presence of emmc at runtime
Pali Rohár [Wed, 25 Nov 2020 18:20:10 +0000 (19:20 +0100)]
arm: mvebu: Espressobin: Detect presence of emmc at runtime

Try to initialize emmc in board_late_init() and if it fails then we know
that emmc device is not connected.

This allows to use in U-Boot just one DTS file for all Espressobin variants
and also to correctly set fdtfile env variable for Linux kernel.

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Reviewed-by: Andre Heider <a.heider@gmail.com>
3 years agoarm: mvebu: Espressobin: Add support for emmc into dts file
Pali Rohár [Wed, 25 Nov 2020 18:20:09 +0000 (19:20 +0100)]
arm: mvebu: Espressobin: Add support for emmc into dts file

To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.

Code for emmc is extracted from commit f1a43c84a960 ("arm64: dts: a3720:
add support for espressobin with populated emmc").

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
3 years agoRevert "arm64: dts: a3720: add support for espressobin with populated emmc"
Pali Rohár [Wed, 25 Nov 2020 18:20:08 +0000 (19:20 +0100)]
Revert "arm64: dts: a3720: add support for espressobin with populated emmc"

This reverts commit f1a43c84a960265309fa8365759de271a70c5a7e.

3 years agoRevert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi"
Pali Rohár [Wed, 25 Nov 2020 18:20:07 +0000 (19:20 +0100)]
Revert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi"

This reverts commit 03bb6a9b1ed7085794c5f167307273d15c99d3f0.

3 years agoarm: mvebu: a38x: Configurable USB2 high-speed impedance threshold
Joshua Scott [Sun, 8 Nov 2020 21:14:08 +0000 (10:14 +1300)]
arm: mvebu: a38x: Configurable USB2 high-speed impedance threshold

Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.

As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.

Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoarm: mvebu: puzzle-m801: Add a maintainer
Luka Kovacic [Thu, 29 Oct 2020 21:30:30 +0000 (22:30 +0100)]
arm: mvebu: puzzle-m801: Add a maintainer

Add Luka Perkov to Puzzle-M801 BOARD MAINTAINERS.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agocolibri-imx8x: add implementation for board_mem_get_layout
Igor Opaniuk [Thu, 22 Oct 2020 08:21:43 +0000 (11:21 +0300)]
colibri-imx8x: add implementation for board_mem_get_layout

Add implementation of board_mem_get_layout for overriding the memory
layout.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
3 years agoapalis-imx8x: add implementation for board_mem_get_layout
Igor Opaniuk [Thu, 22 Oct 2020 08:21:42 +0000 (11:21 +0300)]
apalis-imx8x: add implementation for board_mem_get_layout

Add implementation of board_mem_get_layout for overriding the memory
layout.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
3 years agoapalis-imx8: add implementation for board_mem_get_layout
Igor Opaniuk [Thu, 22 Oct 2020 08:21:41 +0000 (11:21 +0300)]
apalis-imx8: add implementation for board_mem_get_layout

Add implementation of board_mem_get_layout for overriding the memory
layout.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
3 years agoimx8: allow overriding memory layout
Marcel Ziswiler [Thu, 22 Oct 2020 08:21:40 +0000 (11:21 +0300)]
imx8: allow overriding memory layout

Introduce weak function board_mem_get_layout() which allows overriding
the memory layout from board code in runtime, useful for handling
different SKU versions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
3 years agodoc: board: apalis-imx8x: add documentation
Igor Opaniuk [Thu, 22 Oct 2020 08:21:39 +0000 (11:21 +0300)]
doc: board: apalis-imx8x: add documentation

This documents the u-boot build and deployment procedure.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
3 years agoboard: toradex: add apalis-imx8x 2gb wb it v1.1a module support
Igor Opaniuk [Thu, 22 Oct 2020 08:21:38 +0000 (11:21 +0300)]
board: toradex: add apalis-imx8x 2gb wb it v1.1a module support

This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].

Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial@5a070000
Out:   serial@5a070000
Err:   serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net:   eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot:  0

Functionality wise the following is known to be working:
  - eMMC and MMC/SD card
  - Ethernet (*)
  - GPIOs
  - I2C

Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.

* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.

[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
3 years agoARM: dts: fsl-imx8qxp-apalis: add initial device tree
Igor Opaniuk [Thu, 22 Oct 2020 08:21:37 +0000 (11:21 +0300)]
ARM: dts: fsl-imx8qxp-apalis: add initial device tree

Introduce initial hierarchy of device trees for Apalis iMX8X
System on Module.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
3 years agoimx8m: fix cache setup for dynamic sdram size
Tim Harvey [Fri, 25 Sep 2020 15:08:35 +0000 (08:08 -0700)]
imx8m: fix cache setup for dynamic sdram size

the mem_map structure containing the size of SDRAM is used in various
cache functions in cache_v8.c thus we need to update it with the
sdram size the board is configured with as well. Without this
the cache functions do not get setup properly and can hang
in the case where a board reports more SDRAM than defined in
PHYS_SDRAM_SIZE.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>