Sridharan S N [Fri, 16 Jun 2023 08:32:37 +0000 (14:02 +0530)]
arm64: dts: qcom: ipq5332: enable GPIO based LEDs and Buttons
Add support for wlan-2g LED on GPIO 36 and wps buttons on GPIO 35.
Signed-off-by: Sridharan S N <quic_sridsn@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230616083238.20690-2-quic_sridsn@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Fri, 11 Aug 2023 20:50:58 +0000 (22:50 +0200)]
arm64: dts: qcom: sm8450: Add PRNG
Add the Qualcomm Pseudo-Random Number Generator.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811-topic-8450_prng-v1-3-01becceeb1ee@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bryan O'Donoghue [Fri, 11 Aug 2023 23:47:38 +0000 (00:47 +0100)]
arm64: dts: qcom: apq8016-sbc: Enable camss for non-mezzanine cases
When we have no camera mezzanine attached it is still possible to run the
test-pattern generator of the CSID block.
As an example:
media-ctl --reset
yavta --no-query -w '0x009f0903 1' /dev/v4l-subdev2
yavta --list /dev/v4l-subdev2
media-ctl -d /dev/media0 -V '"msm_csid0":0[fmt:UYVY8_1X16/1920x1080 field:none]'
media-ctl -l '"msm_csid0":1->"msm_ispif0":0[1]'
media-ctl -d /dev/media0 -V '"msm_ispif0":0[fmt:UYVY8_1X16/1920x1080 field:none]'
media-ctl -l '"msm_ispif0":1->"msm_vfe0_rdi0":0[1]'
media-ctl -d /dev/media0 -V '"msm_vfe0_rdi0":0[fmt:UYVY8_1X16/1920x1080]'
media-ctl -d /dev/media0 -p
yavta -B capture-mplane --capture=5 -n 5 -I -f UYVY -s 1920x1080 --file=TPG-UYVU-1920x1080-000-#.bin /dev/video0
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20230811234738.2859417-8-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bryan O'Donoghue [Fri, 11 Aug 2023 23:47:37 +0000 (00:47 +0100)]
arm64: dts: qcom: apq8016-sbc-d3-camera-mezzanine: Move default ov5640 to a standalone dts
At the moment we define a single ov5640 sensor in the apq8016-sbc and
disable that sensor.
The sensor mezzanine for this is a D3 Engineering Dual ov5640 mezzanine
card. Move the definition from the apq8016-sbc where it shouldn't be to a
standalone dts.
Enables the sensor by default, as we are adding a standalone mezzanine
structure.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811234738.2859417-7-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bryan O'Donoghue [Fri, 11 Aug 2023 23:47:36 +0000 (00:47 +0100)]
arm64: dts: qcom: apq8016-sbc: Rename ov5640 enable-gpios to powerdown-gpios
There are two control lines controlled by GPIO going into ov5640
- Reset
- Powerdown
The driver and yaml expect "reset-gpios" and "powerdown-gpios" there has
never been an "enable-gpios".
Fixes:
39e0ce6cd1bf ("arm64: dts: qcom: apq8016-sbc: Add CCI/Sensor nodes")
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811234738.2859417-6-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bryan O'Donoghue [Fri, 11 Aug 2023 23:47:35 +0000 (00:47 +0100)]
arm64: dts: qcom: apq8016-sbc: Set ov5640 assigned-clock
The driver for the ov5640 doesn't do a set-rate, instead it expects the
clock to already be set at an appropriate rate.
Similarly the yaml for ov5640 doesn't understand clock-frequency. Convert
from clock-rate to assigned-clock and assigned-clock-rate to remediate.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811234738.2859417-5-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bryan O'Donoghue [Fri, 11 Aug 2023 23:47:34 +0000 (00:47 +0100)]
arm64: dts: qcom: apq8016-sbc: Fix ov5640 data-lanes declaration
The yaml constraint for data-lanes is [1, 2] not [0, 2]. The driver itself
doesn't do anything with the data-lanes declaration save count the number
of specified data-lanes and calculate the link rate so, this change doesn't
have any functional side-effects.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20230811234738.2859417-4-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bryan O'Donoghue [Fri, 11 Aug 2023 23:47:33 +0000 (00:47 +0100)]
arm64: dts: qcom: apq8016-sbc: Fix ov5640 regulator supply names
The ov5640 driver expects DOVDD, AVDD and DVDD as regulator supply names.
The ov5640 has depended on these names since the driver was committed
upstream in 2017. Similarly apq8016-sbc.dtsi has had completely different
regulator names since its own initial commit in 2020.
Perhaps the regulators were left on in previous 410c bootloaders. In any
case today on 6.5 we won't switch on the ov5640 without correctly naming
the regulators.
Fixes:
39e0ce6cd1bf ("arm64: dts: qcom: apq8016-sbc: Add CCI/Sensor nodes")
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811234738.2859417-3-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bryan O'Donoghue [Fri, 11 Aug 2023 23:47:32 +0000 (00:47 +0100)]
arm64: dts: qcom: msm8916: Define CAMSS ports in core dtsi
Each CSIPHY in CAMMS maps to a port here in the dtsi, since the number of
CSIPHYs is fixed per SoC define the 8916 ports for both available PHYs.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811234738.2859417-2-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Sricharan Ramabadhran [Fri, 28 Jul 2023 08:33:11 +0000 (14:03 +0530)]
arm64: dts: Add ipq5018 SoC and rdp432-c2 board support
Add initial device tree support for the Qualcomm IPQ5018 SoC and
rdp432-c2 board.
Few things like 'reboot' does not work because, couple of more 'SCM'
APIS are needed to clear some TrustZone settings. Those will be
posted separately.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Co-developed-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/1690533192-22220-6-git-send-email-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Sricharan Ramabadhran [Fri, 28 Jul 2023 08:33:09 +0000 (14:03 +0530)]
dt-bindings: qcom: Add ipq5018 bindings
Document the new ipq5018 SOC/board device tree bindings.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/1690533192-22220-4-git-send-email-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bjorn Andersson [Fri, 11 Aug 2023 17:51:15 +0000 (10:51 -0700)]
Merge branch '
1690533192-22220-2-git-send-email-quic_srichara@quicinc.com' into arm64-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in
order to the the clock defines.
Sricharan Ramabadhran [Fri, 28 Jul 2023 08:33:07 +0000 (14:03 +0530)]
dt-bindings: clock: Add IPQ5018 clock and reset
This patch adds support for the global clock controller found on
the IPQ5018 based devices.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/1690533192-22220-2-git-send-email-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bartosz Golaszewski [Thu, 10 Aug 2023 08:09:09 +0000 (10:09 +0200)]
arm64: dts: qcom: sa8775p-ride: enable EMAC1
Enable the second MAC on sa8775p-ride.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20230810080909.6259-10-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bartosz Golaszewski [Thu, 10 Aug 2023 08:09:08 +0000 (10:09 +0200)]
arm64: dts: qcom: sa8775p-ride: add an alias for ethernet0
Once we add a second ethernet node, the MDIO bus names will conflict
unless we provide aliases. Add one for the existing ethernet node.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20230810080909.6259-9-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bartosz Golaszewski [Thu, 10 Aug 2023 08:09:07 +0000 (10:09 +0200)]
arm64: dts: qcom: sa8775p-ride: sort aliases alphabetically
For improved readability order the aliases alphabetically for
sa8775p-ride.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20230810080909.6259-8-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bartosz Golaszewski [Thu, 10 Aug 2023 08:09:06 +0000 (10:09 +0200)]
arm64: dts: qcom: sa8775p-ride: add the second SGMII PHY
Add a second SGMII PHY that will be used by EMAC1 on sa8775p-ride.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20230810080909.6259-7-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bartosz Golaszewski [Thu, 10 Aug 2023 08:09:05 +0000 (10:09 +0200)]
arm64: dts: qcom: sa8775p-ride: index the first SGMII PHY
We'll be adding a second SGMII PHY on the same MDIO bus, so let's index
the first one for better readability.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20230810080909.6259-6-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bartosz Golaszewski [Thu, 10 Aug 2023 08:09:04 +0000 (10:09 +0200)]
arm64: dts: qcom: sa8775p-ride: move the reset-gpios property of the PHY
Device-tree bindings for MDIO define per-PHY reset-gpios as well as a
global reset-gpios property at the MDIO node level which controls all
devices on the bus. The latter is most likely a workaround for the
chicken-and-egg problem where we cannot read the ID of the PHY before
bringing it out of reset but we cannot bring it out of reset until we've
read its ID.
I have proposed a comprehensive solution for this problem in 2020 but it
never got upstream. We do however have workaround in place which allows
us to hard-code the PHY id in the compatible property, thus skipping the
ID scanning.
Let's make the device-tree for sa8775p-ride slightly more correct by
moving the reset-gpios property to the PHY node with its ID put into the
PHY node's compatible.
Link: https://lore.kernel.org/all/20200622093744.13685-1-brgl@bgdev.pl/
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20230810080909.6259-5-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bartosz Golaszewski [Thu, 10 Aug 2023 08:09:03 +0000 (10:09 +0200)]
arm64: dts: qcom: sa8775p-ride: enable the second SerDes PHY
Enable the second SerDes PHY on sa8775p-ride development board.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20230810080909.6259-4-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bartosz Golaszewski [Thu, 10 Aug 2023 08:09:02 +0000 (10:09 +0200)]
arm64: dts: qcom: sa8775p: add a node for EMAC1
Add a node for the second MAC on sa8775p platforms.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20230810080909.6259-3-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bartosz Golaszewski [Thu, 10 Aug 2023 08:09:01 +0000 (10:09 +0200)]
arm64: dts: qcom: sa8775p: add a node for the second serdes PHY
Add a node for the SerDes PHY used by EMAC1 on sa8775p-ride.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Andrew Halaney <ahalaney@redhat.com>
Link: https://lore.kernel.org/r/20230810080909.6259-2-brgl@bgdev.pl
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bryan O'Donoghue [Wed, 9 Aug 2023 20:35:34 +0000 (21:35 +0100)]
arm64: dts: qcom: sdm845: Enable CAMSS on the bare rb3 board
Enable CAMSS on the standard RB3 as it is possible to run the test pattern
generator (TPG) without any populated ports/endpoints.
media-ctl --reset
yavta --no-query -w '0x009f0903 9' /dev/v4l-subdev4
yavta --list /dev/v4l-subdev4
media-ctl -d /dev/media0 -V '"msm_csid0":0[fmt:SGRBG10_1X10/3280x2464]'
media-ctl -d /dev/media0 -V '"msm_vfe0_rdi0":0[fmt:SGRBG10_1X10/3280x2464]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
media-ctl -d /dev/media0 -p
yavta -B capture-mplane --capture=5 -n 5 -I -f SGRBG10P -s 3280x2464 --file=TPG-SGRBG10-3280x2464-000-#.bin /dev/video2
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20230809203534.1100030-2-bryan.odonoghue@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Eric Chanudet [Wed, 9 Aug 2023 20:32:33 +0000 (16:32 -0400)]
arm64: dts: qcom: sa8540p-ride: enable rtc
SA8540P-ride is one of the Qualcomm platforms that does not have access
to UEFI runtime services and on which the RTC registers are read-only,
as described in:
https://lore.kernel.org/all/
20230202155448.6715-1-johan+linaro@kernel.org/
Reserve four bytes in one of the PMIC registers to hold the RTC offset
the same way as it was done for sc8280xp-crd which has similar
limitations:
commit
e67b45582c5e ("arm64: dts: qcom: sc8280xp-crd: enable rtc")
On SA8540P-ride, the register bank SDAM6 of the first PMIC is not
writable. Following recommendations provided during the review, use
SDAM2 from the second PMIC at offset 0xa0 instead.
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Eric Chanudet <echanude@redhat.com>
Link: https://lore.kernel.org/r/20230809203506.1833205-1-echanude@redhat.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Richard Acayan [Wed, 2 Aug 2023 01:15:52 +0000 (21:15 -0400)]
arm64: dts: qcom: sdm670: add frequency profile
Add the coefficients for the CPU frequencies to aid in frequency
scaling.
Profiling setup:
- freqbench (https://github.com/kdrag0n/freqbench)
- LineageOS kernel, android_kernel_google_msm-4.9
- recommended configuration options by freqbench
- disabled options that require clang or 32-bit compilers
- mmc governor switched from simple_ondemand to powersave
Frequency domains: cpu1 cpu6
Offline CPUs: cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7
Sampling power every 1000 ms
Baseline power usage: 445 mW
===== CPU 1 =====
Frequencies: 300 576 748 998 1209 1324 1516 1612 1708
300: 1114 3.7 C/MHz 43 mW 11.6 J 25.8 I/mJ 269.4 s
576: 2138 3.7 C/MHz 51 mW 7.1 J 42.2 I/mJ 140.3 s
748: 2780 3.7 C/MHz 67 mW 7.3 J 41.3 I/mJ 107.9 s
998: 3706 3.7 C/MHz 73 mW 5.9 J 51.1 I/mJ 80.9 s
1209: 4490 3.7 C/MHz 86 mW 5.7 J 52.2 I/mJ 66.8 s
1324: 4918 3.7 C/MHz 90 mW 5.5 J 54.6 I/mJ 61.0 s
1516: 5631 3.7 C/MHz 103 mW 5.5 J 54.9 I/mJ 53.3 s
1612: 5987 3.7 C/MHz 109 mW 5.5 J 55.0 I/mJ 50.1 s
1708: 6344 3.7 C/MHz 126 mW 5.9 J 50.5 I/mJ 47.3 s
===== CPU 6 =====
Frequencies: 300 652 825 979 1132 1363 1536 1747 1843 1996
300: 1868 6.2 C/MHz 53 mW 8.5 J 35.2 I/mJ 160.6 s
652: 4073 6.2 C/MHz 96 mW 7.1 J 42.4 I/mJ 73.7 s
825: 5132 6.2 C/MHz 117 mW 6.9 J 43.7 I/mJ 58.5 s
979: 6099 6.2 C/MHz 151 mW 7.4 J 40.4 I/mJ 49.2 s
1132: 7071 6.2 C/MHz 207 mW 8.8 J 34.1 I/mJ 42.4 s
1363: 8482 6.2 C/MHz 235 mW 8.3 J 36.1 I/mJ 35.4 s
1536: 9578 6.2 C/MHz 287 mW 9.0 J 33.3 I/mJ 31.3 s
1747: 10892 6.2 C/MHz 340 mW 9.4 J 32.0 I/mJ 27.6 s
1843: 11471 6.2 C/MHz 368 mW 9.6 J 31.1 I/mJ 26.2 s
1996: 12425 6.2 C/MHz 438 mW 10.6 J 28.3 I/mJ 24.2 s
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20230802011548.387519-10-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Richard Acayan [Wed, 2 Aug 2023 01:15:51 +0000 (21:15 -0400)]
arm64: dts: qcom: sdm670: add cpu frequency scaling
Add CPU frequency scaling, and also add the corresponding memory and
cache bandwidths for each frequency.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20230802011548.387519-9-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Richard Acayan [Wed, 2 Aug 2023 01:15:50 +0000 (21:15 -0400)]
arm64: dts: qcom: sdm670: add osm l3
Add the interconnect node for L3 cache on SDM670.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230802011548.387519-8-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Marijn Suijten [Sun, 30 Jul 2023 20:31:26 +0000 (22:31 +0200)]
arm64: dts: qcom: Use labels with generic node names for ADC channels
As discussed in [1] it is more convenient to use a generic `channel`
node name for ADC channels while storing a friendly - board-specific
instead of PMIC-specific - name in the label, if/when desired to
overwrite the channel description already contained (but previously
unused) in the driver [2]. Follow up on the dt-bindings' `channel` node
name requirement, and instead provide this (sometimes per-board) channel
description through a label property.
Also remove all the unused label references (not to be confused with
label properties) from pm660, pmp8074 and pms405.
[1]: https://lore.kernel.org/linux-arm-msm/
20221106193018.270106-1-marijn.suijten@somainline.org/T/#u
[2]: https://lore.kernel.org/linux-arm-msm/
20230116220909.196926-4-marijn.suijten@somainline.org/
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230730-generic-adc-channels-v5-2-e6c69bda8034@somainline.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Sun, 30 Jul 2023 20:20:51 +0000 (22:20 +0200)]
arm64: dts: qcom: msm8953-daisy: use new speaker maxim,interleave-mode
MAX98927 speaker amplifier "interleave_mode" property was never
documented. Corrected bindings expect "maxim,interleave-mode" instead,
which is already supported by Linux driver. Change is not compatible
with older Linux kernels.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230730202051.71099-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Sun, 30 Jul 2023 20:19:13 +0000 (22:19 +0200)]
arm64: dts: qcom: sdm845-enchilada: use 0 as speaker DAI cells
MAX98927 speaker amplifier has only one DAI, so DAI cells can be just 0
(as expected by bindings).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230730201913.70667-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Sun, 30 Jul 2023 20:19:12 +0000 (22:19 +0200)]
arm64: dts: qcom: msm8953-tissot: use 0 as speaker DAI cells
MAX98927 speaker amplifier has only one DAI, so DAI cells can be just 0
(as expected by bindings).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230730201913.70667-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Sun, 30 Jul 2023 18:06:38 +0000 (20:06 +0200)]
arm64: dts: qcom: use defines for interrupts
Replace hard-coded interrupt parts (GIC, flags) with standard defines
for readability. No changes in resulting DTBs.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230730180638.23539-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Abel Vesa [Tue, 1 Aug 2023 09:52:46 +0000 (12:52 +0300)]
arm64: dts: qcom: sm8550-mtp: Add missing supply for L1B regulator
Even though currently there is no consumer for L1B, add the supply
for it anyway.
Fixes:
71342fb91eae ("arm64: dts: qcom: Add base SM8550 MTP dts")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230801095246.2884770-1-abel.vesa@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Tengfei Fan [Mon, 31 Jul 2023 08:00:41 +0000 (16:00 +0800)]
arm64: dts: qcom: Add base SM4450 QRD DTS
Add DTS for Qualcomm QRD platform which uses SM4450 SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20230731080043.38552-5-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Tengfei Fan [Mon, 31 Jul 2023 08:00:40 +0000 (16:00 +0800)]
arm64: dts: qcom: Adds base SM4450 DTSI
Add based DTSI for SM4450 SoC and includes base description of
CPUs and interrupt-controller which helps to boot to shell with dcc
console on boards with this SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20230731080043.38552-4-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Tengfei Fan [Mon, 31 Jul 2023 08:00:39 +0000 (16:00 +0800)]
dt-bindings: arm: qcom: Document SM4450 SoC and boards
Document the SM4450 SoC binding and also the boards using it.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
Link: https://lore.kernel.org/r/20230731080043.38552-3-quic_tengfan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Neil Armstrong [Mon, 19 Jun 2023 08:07:18 +0000 (10:07 +0200)]
arm64: dts: qcom: sm8550-qrd: add pmic glink port/endpoints
Add nodes to support Type-C USB/DP functionality.
On this platform, a Type-C redriver is added to the
SuperSpeed graph.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-type-c-v5-6-9221cd300903@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Neil Armstrong [Mon, 19 Jun 2023 08:07:17 +0000 (10:07 +0200)]
arm64: dts: qcom: sm8550-mtp: add pmic glink port/endpoints
Add nodes to support Type-C USB/DP functionality.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-type-c-v5-5-9221cd300903@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Neil Armstrong [Mon, 19 Jun 2023 08:07:16 +0000 (10:07 +0200)]
arm64: dts: qcom: sm8550: add ports subnodes in usb/dp qmpphy node
Add the USB3+DP Combo QMP PHY port subnodes in the SM8550 SoC DTSI
to avoid duplication in the devices DTs.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-type-c-v5-4-9221cd300903@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Zeyan Li [Thu, 27 Jul 2023 02:53:21 +0000 (10:53 +0800)]
arm64: dts: qcom: sm8150: Fix the I2C7 interrupt
I2C6 and I2C7 use the same interrupts, which is incorrect.
In the downstream kernel, I2C7 has interrupts of 608 instead of 607.
Fixes:
81bee6953b58 ("arm64: dts: qcom: sm8150: add i2c nodes")
Signed-off-by: Zeyan Li <qaz6750@outlook.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/SY7P282MB378712225CBCEA95FE71554DB201A@SY7P282MB3787.AUSP282.PROD.OUTLOOK.COM
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Stephan Gerhold [Sun, 23 Jul 2023 10:54:41 +0000 (12:54 +0200)]
arm64: dts: qcom: msm8939-samsung-a7: Drop internal pull for SD CD
A7 seems to have external pull-up for the SD card chip detect (like
most MSM8916/MSM8939 devices) so drop the internal pull-up. It's not
necessary.
Tested-by: "Lin, Meng-Bo" <linmengbo0689@protonmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20230723-a7sdc2cdnopull-v1-1-699fd730afcb@gerhold.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Alexander Stein [Mon, 24 Jul 2023 10:39:13 +0000 (12:39 +0200)]
arm64: dts: qcom: Replace deprecated extcon-usb-gpio id-gpio/vbus-gpio properties
Use id-gpios and vbus-gpios instead.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de> #rockchip
Link: https://lore.kernel.org/r/20230724103914.1779027-7-alexander.stein@ew.tq-group.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Thu, 20 Jul 2023 08:35:00 +0000 (10:35 +0200)]
arm64: dts: qcom: sc8180x-pmics: align LPG node name with dtschema
Bindings expect the LPG node name to be "pwm":
sc8180x-lenovo-flex-5g.dtb: pmic@5: 'lpg' does not match any of the regexes:
Fixes:
d3302290f59e ("arm64: dts: qcom: sc8180x: Add pmics")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230720083500.73554-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Thu, 20 Jul 2023 08:34:59 +0000 (10:34 +0200)]
arm64: dts: qcom: sc8180x-pmics: align SPMI PMIC Power-on node name with dtschema
Bindings expect the Power-on node name to be "pon":
sc8180x-lenovo-flex-5g.dtb: pmic@0: 'power-on@800' does not match any of the regexes:
Fixes:
d3302290f59e ("arm64: dts: qcom: sc8180x: Add pmics")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230720083500.73554-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Thu, 20 Jul 2023 08:34:58 +0000 (10:34 +0200)]
arm64: dts: qcom: sc8180x-pmics: add missing gpio-ranges
The GPIO children of PMICs should use gpio-ranges:
sc8180x-primus.dtb: pmic@0: gpio@c000: 'gpio-ranges' is a required property
Fixes:
d3302290f59e ("arm64: dts: qcom: sc8180x: Add pmics")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230720083500.73554-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Thu, 20 Jul 2023 08:34:57 +0000 (10:34 +0200)]
arm64: dts: qcom: sc8180x-pmics: add missing qcom,spmi-gpio fallbacks
The GPIO children of PMICs should use qcom,spmi-gpio fallback:
sc8180x-primus.dtb: pmic@0: gpio@c000:compatible: ['qcom,pmc8180-gpio'] is too short
Fixes:
d3302290f59e ("arm64: dts: qcom: sc8180x: Add pmics")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230720083500.73554-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Thu, 20 Jul 2023 11:53:32 +0000 (13:53 +0200)]
arm64: dts: qcom: msm8996-sagit: drop unsupported syna,codes
Synaptics RMI4 Touchscreen bindings never defined syna,codes property
for function 1a. No usage in Linux drivers.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230720115335.137354-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Thu, 20 Jul 2023 11:53:31 +0000 (13:53 +0200)]
arm64: dts: qcom: msm8996-gemini: fix touchscreen VIO supply
According to bindings and Linux driver, there is no VDDA but VIO supply.
Fixes:
4ac46b3682c5 ("arm64: dts: qcom: msm8996: xiaomi-gemini: Add support for Xiaomi Mi 5")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230720115335.137354-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Thu, 20 Jul 2023 11:53:30 +0000 (13:53 +0200)]
arm64: dts: qcom: msm8953-vince: drop duplicated touschreen parent interrupt
Interrupts extended already define a parent interrupt controller:
msm8953-xiaomi-vince.dtb: touchscreen@20: Unevaluated properties are not allowed ('interrupts-parent' was unexpected)
Fixes:
aa17e707e04a ("arm64: dts: qcom: msm8953: Add device tree for Xiaomi Redmi 5 Plus")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230720115335.137354-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Mrinmay Sarkar [Fri, 21 Jul 2023 17:24:35 +0000 (22:54 +0530)]
arm64: dts: qcom: sa8775p-ride: enable pcie nodes
Enable pcie0, pcie1 nodes and their respective phy's.
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Link: https://lore.kernel.org/r/1689960276-29266-5-git-send-email-quic_msarkar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Mrinmay Sarkar [Fri, 21 Jul 2023 17:24:34 +0000 (22:54 +0530)]
arm64: dts: qcom: sa8775p: Add pcie0 and pcie1 nodes
Add pcie dtsi nodes for two controllers found on sa8775p platform.
Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
Link: https://lore.kernel.org/r/1689960276-29266-4-git-send-email-quic_msarkar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bjorn Andersson [Mon, 12 Jun 2023 22:06:32 +0000 (15:06 -0700)]
arm64: dts: qcom: sc8180x: Fix LLCC reg property
The LLCC binding and driver was recently corrected to handle the stride
varying between platforms. Switch to the new format to ensure accesses
are done in the right place.
Fixes:
8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230612220632.1885175-1-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bjorn Andersson [Mon, 12 Jun 2023 22:14:56 +0000 (15:14 -0700)]
arm64: dts: qcom: sc8180x-flex5g: Wire up USB Type-C
Following the SC8180X Primus reference design, add pmic_glink and USB
Type-C wiring for battery manager, external display and orientation
switching.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230612221456.1887533-4-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bjorn Andersson [Mon, 12 Jun 2023 22:14:55 +0000 (15:14 -0700)]
arm64: dts: qcom: sc8180x-primus: Wire up USB Type-C
Wire up pmic_glink and the various components of USB Type-C to get
battery status, orientation switching of SuperSpeed USB, as well as
support for external display on the SC8180X Primus reference device.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230612221456.1887533-3-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bjorn Andersson [Mon, 12 Jun 2023 22:14:54 +0000 (15:14 -0700)]
arm64: dts: qcom: sc8180x: Add USB Type-C of_graph anchors
Define anchors for wiring up the USB Type-C graph in the board files.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230612221456.1887533-2-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Devi Priya [Thu, 15 Jun 2023 08:48:41 +0000 (14:18 +0530)]
arm64: dts: qcom: ipq9574: Use assigned-clock-rates for QUP I2C core clks
Use assigned-clock-rates property for configuring the QUP I2C core clocks
to operate at nominal frequency.
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20230615084841.12375-1-quic_devipriy@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Lin, Meng-Bo [Fri, 23 Jun 2023 10:02:51 +0000 (10:02 +0000)]
arm64: dts: qcom: msm8939-samsung-a7: Add initial dts
This dts adds support for Samsung Galaxy A7 smartphone released in 2015.
Add a device tree for A7 with initial support for:
- GPIO keys
- Hall Sensor
- SDHCI (internal and external storage)
- USB Device Mode
- UART (on USB connector via the SM5502 MUIC)
- WCNSS (WiFi/BT)
- Regulators
- Touch key
- Accelerometer/Magnetometer
- Fuelgauge
- NFC
- Vibrator
- Touchscreen
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Link: https://lore.kernel.org/r/20230623100237.5299-1-linmengbo0689@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Lin, Meng-Bo [Fri, 23 Jun 2023 10:02:34 +0000 (10:02 +0000)]
dt-bindings: qcom: Document msm8939,a7
Document samsung,a7 bindings used in its device tree.
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230623100220.5284-1-linmengbo0689@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Mon, 26 Jun 2023 20:00:23 +0000 (22:00 +0200)]
dt-bindings: qcom: Allow SoC names ending in "pro"
There are a couple of SoCs whose names end in "pro", with the currently-
upstream examples being msm8974pro and msm8996pro. Allow such suffix in
SoC-specific compatibles.
Fixes:
5aa332c5e7ca ("dt-bindings: qcom: document preferred compatible naming")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230626-topic-bindingsfixups-v1-1-254ae8642e69@linaro.org
[bjorn: Changed (pro|) to (pro)?, per Rob's request]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Lin, Meng-Bo [Sat, 15 Jul 2023 21:41:01 +0000 (21:41 +0000)]
arm64: dts: qcom: msm8916-samsung-j5-common: Add touchscreen
J5 and J5X use an Imagis IST3038C touchscreen that is connected to
blsp_i2c5. Add it to the device tree.
MFD driver for SM5703 is unavailable at the moment, which is required
to power up the touchscreen on J5, so it's disabled on J5 for now.
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Link: https://lore.kernel.org/r/20230715214046.14902-1-linmengbo0689@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Lin, Meng-Bo [Sun, 16 Jul 2023 19:08:24 +0000 (19:08 +0000)]
arm64: dts: qcom: msm8916-samsung-e2015: Add accelerometer
E5, E7 and Grand Max have ST LIS2HH12 accelerometer.
Add support for it.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com>
Link: https://lore.kernel.org/r/20230716190807.7056-1-linmengbo0689@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Wed, 19 Jul 2023 19:28:09 +0000 (21:28 +0200)]
arm64: dts: qcom: sm8350: add APR and LPASS TLMM
Add audio-related nodes: the APR in the ADSP (same as on SM8250) and
LPASS TLMM pin controller.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230719192809.434709-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Wed, 19 Jul 2023 19:28:08 +0000 (21:28 +0200)]
arm64: dts: qcom: sm8350-hdk: add uSD card
Add uSD card to HDK8350.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230719192809.434709-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Wed, 19 Jul 2023 19:28:07 +0000 (21:28 +0200)]
arm64: dts: qcom: sm8350-hdk: include PMK8350
HDK8350 comes with PMK8350 PMIC, so include relevant DTSI. This also
allows to use reboot reason.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230719192809.434709-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Manivannan Sadhasivam [Thu, 20 Jul 2023 05:40:58 +0000 (11:10 +0530)]
arm64: dts: qcom: sm8250: Add interconnect paths to UFSHC
UFS host controller requires interconnect path configuration for proper
working. So let's specify them for SM8250 SoC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230720054100.9940-14-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Manivannan Sadhasivam [Thu, 20 Jul 2023 05:40:57 +0000 (11:10 +0530)]
arm64: dts: qcom: sdm845: Add interconnect paths to UFSHC
UFS host controller requires interconnect path configuration for proper
working. So let's specify them for SDM845 SoC.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230720054100.9940-13-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Manivannan Sadhasivam [Thu, 20 Jul 2023 05:40:49 +0000 (11:10 +0530)]
arm64: dts: qcom: sdm845: Fix the min frequency of "ice_core_clk"
Minimum frequency of the "ice_core_clk" should be 75MHz as specified in the
downstream vendor devicetree. So fix it!
https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.7.3.r1-09300-sdm845.0/arch/arm64/boot/dts/qcom/sdm845.dtsi
Fixes:
433f9a57298f ("arm64: dts: sdm845: add Inline Crypto Engine registers and clock")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230720054100.9940-5-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Manivannan Sadhasivam [Thu, 20 Jul 2023 05:40:48 +0000 (11:10 +0530)]
arm64: dts: qcom: sdm845: Add missing RPMh power domain to GCC
GCC and it's GDSCs are under the RPMh CX power domain. So let's add the
missing RPMh power domain to the GCC node.
Fixes:
6d4cf750d03a ("arm64: dts: sdm845: Add minimal dts/dtsi files for sdm845 SoC and MTP")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20230720054100.9940-4-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Rohit Agarwal [Thu, 20 Jul 2023 08:09:05 +0000 (13:39 +0530)]
arm64: dts: qcom: sm8550: Update the RPMHPD bindings entry
Update the RPMHPD bindings entry as per the new generic bindings defined
in rpmhpd.h for SM8550 SoC.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1689840545-5094-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Rohit Agarwal [Thu, 20 Jul 2023 08:09:04 +0000 (13:39 +0530)]
arm64: dts: qcom: sm8450: Update the RPMHPD bindings entry
Update the RPMHPD bindings entry as per the new generic bindings defined
in rpmhpd.h for SM8450 SoC.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1689840545-5094-4-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Rohit Agarwal [Thu, 20 Jul 2023 08:09:03 +0000 (13:39 +0530)]
arm64: dts: qcom: sm8350: Update the RPMHPD bindings entry
Update the RPMHPD bindings entry as per the new generic bindings defined in
rpmhpd.h for SM8350 SoC.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1689840545-5094-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Rohit Agarwal [Thu, 20 Jul 2023 08:09:02 +0000 (13:39 +0530)]
arm64: dts: qcom: sm8250: Update the RPMHPD bindings entry
Update the RPMHPD bindings entry as per the new generic bindings defined in
rpmhpd.h for SM8250 SoC.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1689840545-5094-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bjorn Andersson [Sat, 22 Jul 2023 02:54:52 +0000 (19:54 -0700)]
Merge branch '
1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com' into arm64-for-6.6
Merge the new generic RPMHPD defines from a topic branch, to alow them
being used in DeviceTree source, and the driver.
Rohit Agarwal [Wed, 19 Jul 2023 05:22:41 +0000 (10:52 +0530)]
dt-bindings: power: qcom,rpmhpd: Add Generic RPMh PD indexes
Add Generic RPMh Power Domain indexes that can be used
for all the Qualcomm SoC henceforth.
The power domain indexes of these bindings are based on compatibility
with current targets like SM8[2345]50 targets.
Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Suggested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/1689744162-9421-2-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Komal Bajaj [Thu, 6 Jul 2023 12:51:29 +0000 (18:21 +0530)]
arm64: dts: qcom: qru1000-idp: Update reserved memory region
Add missing reserved regions as described in QRU1000 memory map.
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Link: https://lore.kernel.org/r/20230706125129.20969-3-quic_kbajaj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Komal Bajaj [Thu, 6 Jul 2023 12:51:28 +0000 (18:21 +0530)]
arm64: dts: qcom: qdu1000-idp: Update reserved memory region
Add missing reserved regions as described in QDU1000 memory map.
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
Link: https://lore.kernel.org/r/20230706125129.20969-2-quic_kbajaj@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Mon, 17 Jul 2023 21:00:55 +0000 (23:00 +0200)]
arm64: dts: qcom: sm8250-pdx203: add required pin function
DT bindings expect function in each pin state in the pin configuration:
sm8250-sony-xperia-edo-pdx203.dtb: pinctrl@f100000: cam-pwr-b-state: 'oneOf' conditional failed, one must be fixed:
'function' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230717210055.21979-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Mon, 17 Jul 2023 21:00:54 +0000 (23:00 +0200)]
arm64: dts: qcom: sc8180x-primus: remove superfluous "input-enable"
Pin configuration property "input-enable" was used with the intention to
disable the output, but this is done by default by Linux drivers. Since
commit
c4a48b0df8bf ("dt-bindings: pinctrl: qcom: tlmm should use
output-disable, not input-enable") the property is not accepted anymore:
sc8180x-primus.dtb: pinctrl@3100000: hall-int-active-state: 'oneOf' conditional failed, one must be fixed:
'bias-disable', 'function', 'input-enable', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230717210055.21979-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Caleb Connolly [Thu, 29 Jun 2023 21:00:55 +0000 (22:00 +0100)]
arm64: dts: qcom: sdm850-*: fix uart6 aliases
This is a follow up on a previous patch[1] fixing the aliases for
sdm845 devices, fix them here too.
[1]:
4772c03002c3 ("arm64: dts: qcom: sdm845-*: fix uart6 aliases")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20230627-c630-uart-and-1p2-reg-v2-3-496b581935c1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Caleb Connolly [Thu, 29 Jun 2023 21:00:54 +0000 (22:00 +0100)]
arm64: dts: qcom: c630: add debug uart
The c630 exposes its debug UART via a connector on the PCB, enable it.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20230627-c630-uart-and-1p2-reg-v2-2-496b581935c1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Caleb Connolly [Thu, 29 Jun 2023 21:00:53 +0000 (22:00 +0100)]
arm64: dts: qcom: c630: add panel bridge 1p2 regulator
The VCC and VCCA supplies of the DSI<->eDP bridge are derived from
vreg_l2a_1p2 and controlled by a GPIO on the PMIC. Add the regulator
here so Linux can control it.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20230627-c630-uart-and-1p2-reg-v2-1-496b581935c1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Mon, 26 Jun 2023 20:00:29 +0000 (22:00 +0200)]
arm64: dts: qcom: sc8180x: Add missing 'cache-unified' to L3
Add the missing property to fix the dt checker warning:
qcom/sc8180x-primus.dtb: l3-cache: 'cache-unified' is a required property
Fixes:
8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230626-topic-bindingsfixups-v1-7-254ae8642e69@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Mon, 26 Jun 2023 20:00:28 +0000 (22:00 +0200)]
arm64: dts: qcom: pmi8994: Add missing OVP interrupt
Add the missing OVP interrupt. This fixes the schema warning:
wled@d800: interrupt-names: ['short'] is too short
Fixes:
37aa540cbd30 ("arm64: dts: qcom: pmi8994: Add WLED node")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230626-topic-bindingsfixups-v1-6-254ae8642e69@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Mon, 26 Jun 2023 20:00:27 +0000 (22:00 +0200)]
arm64: dts: qcom: pmi8950: Add missing OVP interrupt
Add the missing OVP interrupt. This fixes the schema warning:
wled@d800: interrupt-names: ['short'] is too short
Fixes:
0d97fdf380b4 ("arm64: dts: qcom: Add configuration for PMI8950 peripheral")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230626-topic-bindingsfixups-v1-5-254ae8642e69@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Mon, 26 Jun 2023 20:00:26 +0000 (22:00 +0200)]
arm64: dts: qcom: pm660l: Add missing short interrupt
Add the missing short interrupt. This fixes the schema warning:
wled@d800: interrupt-names: ['ovp'] is too short
Fixes:
7b56a804e58b ("arm64: dts: qcom: pm660l: Add WLED support")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230626-topic-bindingsfixups-v1-4-254ae8642e69@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Mon, 26 Jun 2023 20:00:25 +0000 (22:00 +0200)]
arm64: dts: qcom: pm6150l: Add missing short interrupt
Add the missing short interrupt. This fixes the schema warning:
wled@d800: interrupt-names: ['ovp'] is too short
Fixes:
fe508ced49dd ("arm64: dts: qcom: pm6150l: Add wled node")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230626-topic-bindingsfixups-v1-3-254ae8642e69@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Sat, 17 Jun 2023 17:15:12 +0000 (19:15 +0200)]
arm64: dts: qcom: sdm850-c630: add missing panel supply
Panel bindings (boe,nv133fhm-n61) require supply which here actually can
be turned on/off via GPIO control:
sdm850-lenovo-yoga-c630.dtb: panel: 'power-supply' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20230617171512.286795-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Stephan Gerhold [Thu, 15 Jun 2023 16:50:44 +0000 (18:50 +0200)]
arm64: dts: qcom: Add rpm-proc node for GLINK gplatforms
Rather than having the RPM GLINK channels as the only child of a dummy
top-level rpm-glink node, switch to representing the RPM as remoteproc
like all the other remoteprocs (modem DSP, ...).
This allows assigning additional subdevices to it like the MPM
interrupt-controller or rpm-master-stats.
Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> # SM6375
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20230531-rpm-rproc-v3-11-a07dcdefd918@gerhold.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Stephan Gerhold [Thu, 15 Jun 2023 16:50:43 +0000 (18:50 +0200)]
arm64: dts: qcom: Add rpm-proc node for SMD platforms
Rather than having the RPM SMD channels as the only child of a dummy
SMD node, switch to representing the RPM as remoteproc like all the
other remoteprocs (WCNSS, modem DSP).
This allows assigning additional subdevices to it like the MPM
interrupt-controller or rpm-master-stats.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20230531-rpm-rproc-v3-10-a07dcdefd918@gerhold.net
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Praveenkumar I [Thu, 13 Jul 2023 08:31:01 +0000 (14:01 +0530)]
arm64: dts: qcom: ipq9574: Add cpu cooling maps
Add cpu cooling maps for passive trip points. The cpu cooling
device states are mapped to cpufreq based scaling frequencies.
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Link: https://lore.kernel.org/r/20230713083101.971525-2-quic_ipkumar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Dmitry Baryshkov [Wed, 12 Jul 2023 12:11:45 +0000 (15:11 +0300)]
arm64: dts: qcom: sm8450: provide MDSS cfg interconnect
Add support for the MDSS cfg-cpu bus vote on the SM8450 platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230712121145.1994830-9-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krzysztof Kozlowski [Tue, 11 Jul 2023 06:30:11 +0000 (08:30 +0200)]
arm64: dts: qcom: sm8250-sony-xperia: correct GPIO keys wakeup again
gpio-keys,wakeup is a deprecated property:
m8250-sony-xperia-edo-pdx206.dtb: gpio-keys: key-camera-focus: Unevaluated properties are not allowed ('gpio-key,wakeup' was unexpected)
Fixes:
a422c6a91a66 ("arm64: dts: qcom: sm8250-edo: Rectify gpio-keys")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230711063011.16222-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Tue, 11 Jul 2023 10:28:17 +0000 (12:28 +0200)]
arm64: dts: qcom: qrb2210-rb1: Add regulators
Add and assign RPM regulators coming from PM2250.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230711-topic-rb1_regulator-v1-1-bc4398c35800@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Tue, 11 Jul 2023 11:00:53 +0000 (13:00 +0200)]
arm64: dts: qcom: sc7180: Bring back cpufreq-based DDR votes
ChromeOS folks reported that bwmon is too slow and getting rid of
statically defined CPUFREQ-based votes (effectively floor votes because of
how opp-peak-kBps is interpreted), has a major performance impact in some
common applications. Bring them back until MEMLAT support is introduced.
This is a partial revert of the commit referenced in the fixes tag.
Fixes:
adc16b84e1ea ("arm64: dts: qcom: sc7180: Hook up BWMONs")
Reported-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230711-topic-7180ddr-v1-1-56e4f13afe9b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Tue, 11 Jul 2023 14:35:16 +0000 (16:35 +0200)]
arm64: dts: qcom: sm6350: Add BWMONs
Add the CPU and LLC BWMONs (skip the NPU ones for now) on sm6350.
There are 3 more NPU BWMONs, but these are skipped for now.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230711-topic-sm638250_bwmon-v1-4-bd4bb96b0673@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Tue, 11 Jul 2023 14:35:15 +0000 (16:35 +0200)]
arm64: dts: qcom: sm8250: Add BWMONs
Add the CPU and LLC BWMONs (skip the NPU ones for now) on sm8250.
LPDDR4X levels are skipped, as LPDDR5 seems more popular with SM8250 and
voting for inexistent levels doesn't uptick the bus frequency, which
results in no increased bandwidth, which results in bwmon deciding we
shouldn't go higher.. you see the point!
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230711-topic-sm638250_bwmon-v1-3-bd4bb96b0673@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Dmitry Baryshkov [Fri, 12 May 2023 00:13:34 +0000 (03:13 +0300)]
arm64: dts: qcom: msm8996: scale CBF clock according to the CPUfreq
Turn CBF into the interconnect provider. Scale CBF frequency (bandwidth)
according to CPU frequencies.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Yassine Oudjana <y.oudjana@protonmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230512001334.2983048-5-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Tue, 4 Jul 2023 12:23:18 +0000 (14:23 +0200)]
arm64: dts: qcom: sm8250: Mark SMMUs as DMA coherent
The SMMUs on SM8250 are cache-coherent. Mark them as such.
Fixes:
a89441fcd09d ("arm64: dts: qcom: sm8250: add apps_smmu node")
Fixes:
04a3605b184e ("arm64: dts: qcom: add sm8250 GPU nodes")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230704-topic-8250_pcie_dmac-v1-2-799603a980b0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Tue, 4 Jul 2023 12:23:17 +0000 (14:23 +0200)]
arm64: dts: qcom: sm8250: Mark PCIe hosts as DMA coherent
The PCIe hosts on SM8250 are cache-coherent. Mark them as such.
Fixes:
e53bdfc00977 ("arm64: dts: qcom: sm8250: Add PCIe support")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230704-topic-8250_pcie_dmac-v1-1-799603a980b0@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Dmitry Baryshkov [Fri, 7 Jul 2023 12:30:27 +0000 (15:30 +0300)]
arm64: dts: qcom: sm8450-hdk: add ADC-TM thermal zones
Add thermal zones controlled through the ADC-TM (ADC thermal monitoring)
PMIC interface. This includes several onboard sensors and the XO thermal
sensor.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230707123027.1510723-9-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>