Weverything [Tue, 17 Aug 2021 19:07:18 +0000 (12:07 -0700)]
Simplify testcase from c411c1b
Nikita Popov [Mon, 16 Aug 2021 18:58:31 +0000 (20:58 +0200)]
[PassBuilder] Use loop-mssa for licm
Currently specifying -licm or -passes=licm will implicitly create
-passes=loop(licm). This does not match the intended default (used
by the legacy PM and by the default pipeline) of using the
MemorySSA-based LICM implementation. As I plan to drop the non-MSSA
implementation, this will stop working entirely...
This special-cases licm to create a loop-mssa manager instead. At
this point it's still possible to use -passes='loop(licm)' to opt
into the AST-based implementation.
Differential Revision: https://reviews.llvm.org/D108155
wlei [Thu, 12 Aug 2021 01:01:37 +0000 (18:01 -0700)]
[llvm-profgen] Clean up code dealing with multiple binaries
As we decided to support only one binary each time, this patch cleans up the related code dealing with multiple binaries. We can use `llvm-profdata` to merge profile from multiple binaries.
Reviewed By: hoy, wenlei
Differential Revision: https://reviews.llvm.org/D108002
Martin Storsjö [Tue, 17 Aug 2021 10:15:49 +0000 (13:15 +0300)]
[OpenMP] Fix the usage of sscanf on MinGW
KMP_SSCANF only evaluates to sscanf_s within
#if KMP_OS_WINDOWS && KMP_MSVC_COMPAT
so we need to pass the sscanf_s specific parameters within a similar
condition.
Differential Revision: https://reviews.llvm.org/D108196
Martin Storsjö [Mon, 16 Aug 2021 08:50:10 +0000 (11:50 +0300)]
[sanitizers] Fix building on 32 bit Windows after
7256c05ecb7
On 32 bit, 'long' (which is 32 bit on Windows) is used as base
type for SIZE_T and similar.
Differential Revision: https://reviews.llvm.org/D108191
Sanjay Patel [Tue, 17 Aug 2021 17:46:08 +0000 (13:46 -0400)]
[InstCombine] add TODO about another min/max fold; NFC
Suggested in post-commit for
d0975b7cb0e1
Sanjay Patel [Tue, 17 Aug 2021 15:38:10 +0000 (11:38 -0400)]
[InstCombine] add tests for min/max with 'not' ops; NFC
Craig Topper [Tue, 17 Aug 2021 17:52:34 +0000 (10:52 -0700)]
[RISCV] Use RISCV::RVVBitsPerBlock for RGK_ScalableVector in getRegisterBitWidth.
I might be wrong, but I think this is should be width of the known
min size we use for scalable vectors. It shouldn't scale with
minimum vlen.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D107945
peter klausler [Fri, 13 Aug 2021 18:57:58 +0000 (11:57 -0700)]
[flang] Add missing call to BeginReadingRecord()
NAMELIST input needs to start with a call to BeginReadingRecord().
Internal unit input doesn't care (so unit tests were passing), but
external unit input does need the call and will assert without it.
Differential Revision: https://reviews.llvm.org/D108051
Simon Pilgrim [Tue, 17 Aug 2021 17:20:04 +0000 (18:20 +0100)]
SelectionDAGBuilder::visitInlineAsm - don't dereference dyn_cast<> results.
dyn_cast<> can return nullptr if the cast is illegal, use cast<> instead which will assert that the cast is correct.
Fixes static analyser warning.
Simon Pilgrim [Tue, 17 Aug 2021 17:15:33 +0000 (18:15 +0100)]
[AArch64] AArch64DAGToDAGISel::tryReadRegister/tryWriteRegister - don't dereference dyn_cast<> results.
dyn_cast<> can return nullptr if the cast is illegal, use cast<> instead which will assert that the cast is correct.
Fixes static analyser warnings.
Simon Pilgrim [Tue, 17 Aug 2021 17:13:59 +0000 (18:13 +0100)]
[ARM] ARMDAGToDAGISel::tryReadRegister/tryWriteRegister - don't dereference dyn_cast<> results.
dyn_cast<> can return nullptr if the cast is illegal, use cast<> instead which will assert that the cast is correct.
Fixes static analyser warnings.
Louis Dionne [Tue, 17 Aug 2021 17:35:50 +0000 (13:35 -0400)]
[libc++] Update the version of CMake in the Docker image
Marco Elver [Tue, 17 Aug 2021 17:26:19 +0000 (19:26 +0200)]
Revert "[tsan] Fix GCC 8.3 build after D107911"
This reverts commit
797fe59e6b9512652c0ae5a6b69a3c6f5a573fcd.
The use of "EventType type : 3" is replicated for all Event structs and
therefore was still present. As a result this still caused failures on
older GCCs (9.2 or 8.3 or earlier).
The particular bot that was failing due to buggy GCC was fixed by
fef39cc472a773fae4761deaab1c701024ad13ec.
Therefore, no reason to keep the workaround around; revert it.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D108192
Sylvestre Ledru [Tue, 17 Aug 2021 17:17:30 +0000 (19:17 +0200)]
scan-build-py: Force the opening in utf-8
It fails on ubuntu bionic otherwise with:
```
scan-build-py-14: Run 'scan-view /tmp/scan-build-2021-08-09-09-14-36-765350-nx9s888s' to examine bug reports.
scan-build-py-14: Internal error.
Traceback (most recent call last):
File "/usr/lib/llvm-14/lib/libscanbuild/__init__.py", line 125, in wrapper
return function(*args, **kwargs)
File "/usr/lib/llvm-14/lib/libscanbuild/analyze.py", line 72, in scan_build
number_of_bugs = document(args)
File "/usr/lib/llvm-14/lib/libscanbuild/report.py", line 35, in document
for bug in read_bugs(args.output, html_reports_available):
File "/usr/lib/llvm-14/lib/libscanbuild/report.py", line 282, in read_bugs
for bug in parser(bug_file):
File "/usr/lib/llvm-14/lib/libscanbuild/report.py", line 421, in parse_bug_html
for line in handler.readlines():
File "/usr/lib/python3.6/encodings/ascii.py", line 26, in decode
return codecs.ascii_decode(input, self.errors)[0]
UnicodeDecodeError: 'ascii' codec can't decode byte 0xc3 in position 3360: ordinal not in range(128)
scan-build-py-14: Please run this command again and turn on verbose mode (add '-vvvv' as argument).
```
I guess it is caused by a problem in Python 3.6
Reviewed By: phosek, isthismyaccount
Differential Revision: https://reviews.llvm.org/D107887
Peter Collingbourne [Tue, 17 Aug 2021 03:13:42 +0000 (20:13 -0700)]
hwasan: Move stack ring buffer initialization before InitStackAndTls.
D104248 moved the call to GetThreadStackAndTls to before the
initialization of the ring buffer TLS slot. As a result, if libc
is instrumented we crash in pthread_getattr_np which is called from
__sanitizer::GetThreadStackTopAndBottom.
Fix the problem by moving the stack ring buffer initialization before
the call to InitStackAndTls.
Differential Revision: https://reviews.llvm.org/D108184
peter klausler [Mon, 16 Aug 2021 20:15:01 +0000 (13:15 -0700)]
[flang] Fix regression from recent runtime input fix
A recent runtime I/O change[1] was meant to improve the handling of
input from external files missing a terminal newline on their last
records; the change was "triggered" by the wrong circumstances and
causing reads that should have pulled more data into the buffer to be
treated as EOFs. So fix that, and also don't retain input data
in the buffer once an input record has been finished unless it's
known that list-directed or NAMELIST input of a repeated input item
may need to backspace a non-positionable external unit to return
to the beginning of the repeated item.
[1]
6578893a0453384346f149479f8574dfff977ace
Differential Revision: https://reviews.llvm.org/D108164
Simon Pilgrim [Tue, 17 Aug 2021 16:57:01 +0000 (17:57 +0100)]
[AMDGPU] Fix lowering of AMDGPU::G_CTTZ_ZERO_UNDEF to AMDGPU::G_AMDGPU_FFBL_B32
As mentioned on D107474, there was a copy+paste typo repeating G_CTLZ_ZERO_UNDEF that coverity reported as dead code.
Differential Revision: https://reviews.llvm.org/D108210
Fraser Cormack [Mon, 14 Jun 2021 08:42:00 +0000 (09:42 +0100)]
[VP] Add vector-predicated reduction intrinsics
This patch adds vector-predicated ("VP") reduction intrinsics corresponding to
each of the existing unpredicated `llvm.vector.reduce.*` versions. Unlike the
unpredicated reductions, all VP reductions have a start value. This start value
is returned when the no vector element is active.
Support for expansion on targets without native vector-predication support is
included.
This patch is based on the ["reduction
slice"](https://reviews.llvm.org/D57504#1732277) of the LLVM-VP reference patch
(https://reviews.llvm.org/D57504).
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D104308
Siva Chandra Reddy [Tue, 17 Aug 2021 16:42:34 +0000 (16:42 +0000)]
[libc][NFC] Disable double precision cos, sin and tan on Windows.
The current x86_64 implementations do not build on the windows bot
machine. We will enable them back after fixing the problem.
Joseph Huber [Mon, 16 Aug 2021 17:06:54 +0000 (13:06 -0400)]
[OpenMP][NFC] Add option to print module after OpenMPOpt for debugging
This patch adds an extra option to print the module after running one of
the OpenMPOpt passes if debugging is enabled. This makes it much easier
to inspect the effects of this pass when doing debugging.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D108146
Philip Reames [Tue, 17 Aug 2021 16:26:59 +0000 (09:26 -0700)]
[SCEVExpander] Stop hoisting IR when reusing phis
his is a fix for PR43678, and is an alternate patch to D105723.
The basic issue we're running into is that LSR + SCEVExpander are moving the very instruction whose operand we're in the process of expanding. This breaks the subtle and ill-documented invariant which let LSR work. (Full story can be found here: https://reviews.llvm.org/D105723#2878473)
Rather than attempting a fix, this change just removes the optimization entirely. The code is entirely untested, and removing it appears to have no impact I can find. This code was added back in 2014 by
1e12f8563d4b7 with a single test which does not seem to actually test the hoisting logic.
From a philosophical standpoint, it also seems very strange to have the expander implementing optimizations which should live in a dedicated transform pass.
Differential Revision: https://reviews.llvm.org/D106178
Denys Petrov [Tue, 3 Aug 2021 16:09:00 +0000 (19:09 +0300)]
[analyzer] Adjust JS code of analyzer's HTML report for IE support.
Summary: Change and replace some functions which IE does not support. This patch is made as a continuation of D92928 revision. Also improve hot keys behavior.
Differential Revision: https://reviews.llvm.org/D107366
Tozer [Tue, 17 Aug 2021 16:09:44 +0000 (17:09 +0100)]
Fix 2: [MCParser] Correctly handle CRLF line ends when consuming line comments
Fixes an issue with revision
5c6f748c and
ad40cb88.
Adds an mcpu argument to the test command, preventing an invalid default
CPU from being used on some platforms.
Fangrui Song [Tue, 17 Aug 2021 16:10:50 +0000 (09:10 -0700)]
[llvm-objdump] -T: print symbol versions
Similar to D94907 (llvm-nm -D).
The output will match GNU objdump 2.37.
Older versions don't use ` (version)` for undefined symbols.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D108097
MaheshRavishankar [Tue, 17 Aug 2021 15:59:13 +0000 (08:59 -0700)]
Allow setting attributes in build method generated by YAML-gen.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D108182
Fangrui Song [Tue, 17 Aug 2021 16:06:39 +0000 (09:06 -0700)]
[Object] Move llvm-nm's symbol version utility to ELFObjectFile::readDynsymVersions
The utility can be reused by llvm-objdump -T.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D108096
Louis Dionne [Mon, 16 Aug 2021 16:41:58 +0000 (12:41 -0400)]
[libc++][NFC] Format expression-equivalent wrappers consistently
Differential Revision: https://reviews.llvm.org/D108144
Roman Lebedev [Tue, 17 Aug 2021 15:42:22 +0000 (18:42 +0300)]
[X86] Lower insertions into upper half of an 256-bit vector as broadcast+blend (PR50971)
Broadcast is not worse than extract+insert of subvector.
https://godbolt.org/z/aPq98G6Yh
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D105390
Michael Kruse [Tue, 17 Aug 2021 15:34:59 +0000 (10:34 -0500)]
[Polly] Fix possibly infinite loop.
The loop had no side-effect since first committed in
642594ae87aca.
While it is obvious what was intended, the code seems to never trigger.
Kostya Kortchinsky [Mon, 16 Aug 2021 22:23:48 +0000 (15:23 -0700)]
[scudo] Fix format string specifiers
Enable `-Wformat` again, and fix the offending instances.
Differential Revision: https://reviews.llvm.org/D108168
Louis Dionne [Wed, 11 Aug 2021 18:26:33 +0000 (14:26 -0400)]
[libc++] Do not require movability in __non_propagating_cache::__emplace_deref
As explained in http://eel.is/c++draft/range.nonprop.cache#note-1, we
should allow copy and move elision to happen when calling emplace_deref
in non-propagating-cache. Before this change, the only way to emplace
into the non-propagating-cache was to call `__set(*it)`, which materialized
`*it` when binding it to the reference argument of `__set` and disabled
move elision.
As a fly-by change, this also renames `__set` to `__emplace` for consistency
and adds tests for it.
Differential Revision: https://reviews.llvm.org/D107932
Tozer [Tue, 17 Aug 2021 15:14:12 +0000 (16:14 +0100)]
Fix: [MCParser] Correctly handle CRLF line ends when consuming line comments
Fixes an issue with revision
5c6f748c.
Move the test added in the above commit into the X86 folder, ensuring
that it is only run on targets where its triple is valid.
Marco Elver [Tue, 17 Aug 2021 14:54:07 +0000 (16:54 +0200)]
tsan: test: Initialize all fields of Params struct
Some compilers started complaining about the test:
tsan_trace_test.cpp:128:21: error: missing field 'type' initializer
Fix it by initializing all 5 fields, even though the type field will be
reset in the for loop.
Differential Revision: https://reviews.llvm.org/D108207
Tozer [Tue, 17 Aug 2021 14:38:45 +0000 (15:38 +0100)]
[MCParser] Correctly handle CRLF line ends when consuming line comments
Fixes issue: https://bugs.llvm.org/show_bug.cgi?id=47983
The AsmLexer currently has an issue with lexing line comments in files
with CRLF line endings, in which it reads the carriage return as being
part of the line comment. This causes an error for certain valid comment
layouts; this patch fixes this by excluding the carriage return from the
line comment.
Differential Revision: https://reviews.llvm.org/D90234
Louis Dionne [Tue, 17 Aug 2021 14:52:12 +0000 (10:52 -0400)]
[libc++][NFC] Fix indentation of documentation
Kazu Hirata [Tue, 17 Aug 2021 14:10:51 +0000 (07:10 -0700)]
[Bitcode] Remove unused declaration writeBitcodeHeader (NFC)
The corresponding definition was removed on Nov 29, 2016 in commit
5a0a2e648c267d99111b21482ca709f580e9ccc2.
Jinsong Ji [Tue, 17 Aug 2021 14:05:28 +0000 (14:05 +0000)]
[LIT]Accept cat_64 command name on AIX in shtest
AIX may use cat_64 for 64 bit cat, this is just update the lit test to accept the name as well.
Reviewed By: #powerpc, shchenz
Differential Revision: https://reviews.llvm.org/D108149
Dylan Fleming [Tue, 17 Aug 2021 13:00:47 +0000 (14:00 +0100)]
[SVE] Remove usage of getMaxVScale for AArch64, in favour of IR Attribute
Removed AArch64 usage of the getMaxVScale interface, replacing it with
the vscale_range(min, max) IR Attribute.
Reviewed By: paulwalker-arm
Differential Revision: https://reviews.llvm.org/D106277
Louis Dionne [Tue, 17 Aug 2021 13:20:24 +0000 (09:20 -0400)]
[libc++][NFC] Refactor tests for transform_view
Adjust the names of helper function objects to represent better what
they do, as suggested in the review of D107098.
David Green [Tue, 17 Aug 2021 13:10:33 +0000 (14:10 +0100)]
[ARM] Enable subreg liveness
This enables subreg liveness in the arm backend when MVE is present,
which allows the register allocator to detect when subregister are
alive/dead, compared to only acting on full registers. This can helps
produce better code on MVE with the way MQPR registers are made up of
SPR registers, but is especially helpful for MQQPR and MQQQQPR
registers, where there are very few "registers" available and being able
to split them up into subregs can help produce much better code.
Differential Revision: https://reviews.llvm.org/D107642
David Green [Tue, 17 Aug 2021 12:51:34 +0000 (13:51 +0100)]
[ARM] Add MQQPR and MQQQQPR spill and reload pseudo instructions
As a part of D107642, this adds pseudo instructions for MQQPR and
MQQQQPR register classes, that can spill and reloads entire registers
whilst keeping them combined, not splitting them into multiple D subregs
that a VLDMIA/VSTMIA would use. This can help certain analyses, and
helps to prevent verifier issues with subreg liveness.
Sanjay Patel [Tue, 17 Aug 2021 12:10:16 +0000 (08:10 -0400)]
[InstCombine] remove unused function argument; NFC
Sanjay Patel [Tue, 17 Aug 2021 11:31:05 +0000 (07:31 -0400)]
[InstCombine] fold signed min/max intrinsics with negated operands
If both operands are negated, we can invert the min/max and do
the negation after:
smax (neg nsw X), (neg nsw Y) --> neg nsw (smin X, Y)
smin (neg nsw X), (neg nsw Y) --> neg nsw (smax X, Y)
This is visible as a remaining regression in D98152. I don't see
a way to generalize this for 'unsigned' or adapt Negator to
handle it. This only appears to be safe with 'nsw':
https://alive2.llvm.org/ce/z/GUy1zJ
Differential Revision: https://reviews.llvm.org/D108165
Sanjay Patel [Mon, 16 Aug 2021 19:27:55 +0000 (15:27 -0400)]
[InstCombine] add tests for smin/smax intrinsics with negated ops; NFC
Sebastian Neubauer [Tue, 17 Aug 2021 11:58:16 +0000 (13:58 +0200)]
[GlobalISel] Add combine for PTR_ADD with regbanks
Combine two G_PTR_ADDs, but keep the register bank of the constant.
That way, the combine can be used in post-regbank-select combines.
Introduce two helper methods in CombinerHelper, getRegBank and
setRegBank that get and set an optional register bank to a register.
That way, they can be used before and after register bank selection.
Differential Revision: https://reviews.llvm.org/D103326
Raphael Isemann [Tue, 17 Aug 2021 10:46:44 +0000 (12:46 +0200)]
[lldb] Make TestAArch64AdrpAdd depend on the AArch64 target
LLDB is using LLVM's target-specific disassembler which is only available when
the respective LLVM target has been enabled in the build config.
This patch just skips the test if there is no arm64 target (and its
disassembler) available in the current build config.
Reviewed By: jasonmolenda
Differential Revision: https://reviews.llvm.org/D108145
Tiehu Zhang [Tue, 17 Aug 2021 10:50:54 +0000 (18:50 +0800)]
[CodeGenPrepare] The instruction to be sunk should be inserted before its user in a block
In current implementation, the instruction to be sunk will be inserted before the target instruction without considering the def-use tree,
which may case Instruction does not dominate all uses error. We need to choose a suitable location to insert according to the use chain
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D107262
Jeremy Morse [Tue, 17 Aug 2021 10:32:41 +0000 (11:32 +0100)]
[DebugInfo][InstrRef] Honour too-much-debug-info cutouts
This reapplies
54a61c94f93, its follow up in
547b712500e, which were
reverted
95fe61e63954. Original commit message:
VarLoc based LiveDebugValues will abandon variable location propagation if
there are too many blocks and variable assignments in the function. If it
didn't, and we had (say) 1000 blocks and 1000 variables in scope, we'd end
up with 1 million DBG_VALUEs just at the start of blocks.
Instruction-referencing LiveDebugValues should honour this limitation too
(because the same limitation applies to it). Hoist the relevant command
line options into LiveDebugValues.cpp and pass it down into the
implementation classes as an argument to ExtendRanges. I've duplicated all
the run-lines in live-debug-values-cutoffs.mir to have an
instruction-referencing flavour.
Differential Revision: https://reviews.llvm.org/D107823
Simon Pilgrim [Tue, 17 Aug 2021 10:22:49 +0000 (11:22 +0100)]
[AArch64] LowerCONCAT_VECTORS - merge getNumOperands() calls. NFCI.
Improves on the unused variable fix from rG4357562067003e25ab343a2d67a60bd89cd66dbf
Anton Afanasyev [Thu, 12 Aug 2021 11:51:57 +0000 (14:51 +0300)]
[AggressiveInstCombine] Add shift left instruction to `TruncInstCombine` DAG
Add `shl` instruction to the DAG post-dominated by `trunc`, allowing
TruncInstCombine to reduce bitwidth of expressions containing left shifts.
The only thing we need to check is that the target bitwidth must be wider
than the maximal shift amount: https://alive2.llvm.org/ce/z/AwArqu
Part of https://reviews.llvm.org/D107766
Differential Revision: https://reviews.llvm.org/D108091
Anton Afanasyev [Thu, 12 Aug 2021 11:51:57 +0000 (14:51 +0300)]
[Test][AggressiveInstCombine] Add test for shifts
Precommit test for D107766/D108091. Also move fixed test for PR50555
from SLPVectorizer/X86/ to PhaseOrdering/X86/ subdirectory.
Florian Mayer [Wed, 11 Aug 2021 13:25:50 +0000 (14:25 +0100)]
[hwasan] Prevent reordering of tag checks.
They were previously unconstrained, which allowed them to be reordered
before the shadow memory write.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D107901
PeixinQiao [Tue, 17 Aug 2021 09:16:37 +0000 (17:16 +0800)]
[NFC] Fix typos
Initial commit test.
Tobias Gysi [Tue, 17 Aug 2021 07:04:21 +0000 (07:04 +0000)]
[mlir][linalg] Remove duplicate methods (NFC).
Remove duplicate methods used to check iterator types.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D108102
Bing1 Yu [Thu, 5 Aug 2021 09:01:21 +0000 (17:01 +0800)]
[X86] [AMX] Replace bitcast with specific AMX intrinsics with X86 specific cast.
There is some discussion on the bitcast for vector and x86_amx at https://reviews.llvm.org/D99152. This patch is to introduce a x86 specific cast for vector and x86_amx, so that it can avoid some unnecessary optimization by middle-end. On the other way, we have to optimize the x86 specific cast by ourselves. This patch also optimize the cast operation to eliminate redundant code.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D107544
David Stuttard [Wed, 5 Feb 2020 14:22:18 +0000 (14:22 +0000)]
AMDGPU: During img instruction ret value construction cater for non int values
Make sure return type is int type.
Differential Revision: https://reviews.llvm.org/D108131
Change-Id: Ic02f07d1234cd51b6ed78c3fecd2cb1d6acd5644
Andrzej Warzynski [Fri, 13 Aug 2021 16:27:46 +0000 (16:27 +0000)]
[flang][nfc] Tweak the FrontendAction class
This patch refactors the `FrontendAction` class. It merely moves code
around so that re-using it is easier. No new functionality is
introduced.
1. Three new member methods are introduced: `RunPrescan`, `RunParse`,
`RunSemanticChecks`.
2. The following free functions are re-implemented as member methods:
* `reportFatalSemanticErrors`
* `reportFatalScanningErrors`
* `reportFatalParsingErrors`
* `reportFatalErrors`
`reportFatalSemanticErrors` is updated to resemble the other error
reporting functions and to make the API more consistent.
3. The `BeginSourceFileAction` methods are simplified and the unused
input argument is deleted.
Differential Revision: https://reviews.llvm.org/D108130
Riccardo Mori [Tue, 17 Aug 2021 07:34:28 +0000 (09:34 +0200)]
[Polly][Isl] Use isl::val::sub instead of isl::val::sub_ui. NFC
This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.
Changes made:
- Use `isl::val::sub` instead of `isl::val::sub_ui`
- `isl-noexceptions.h` has been generated by https://github.com/patacca/isl/commit/
355e84163ae78ff637c71fb532f36d15277a2b1b
Depends on D107225
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D107293
John Demme [Tue, 17 Aug 2021 05:37:14 +0000 (22:37 -0700)]
[MLIR] [Python] Allow 'operation.parent' to return 'None'
This is more Pythonic and better matches the C++ and C APIs.
Reviewed By: stellaraccident
Differential Revision: https://reviews.llvm.org/D108183
Deep Majumder [Tue, 17 Aug 2021 05:12:30 +0000 (10:42 +0530)]
[analyzer] Add option to SATest.py for extra checkers
This patch adds the flag `extra-checkers` to the sub-command `build` for
passing a comma separated list of additional checkers to include.
Differential Revision: https://reviews.llvm.org/D106739
Yunde Zhong [Tue, 17 Aug 2021 05:02:23 +0000 (13:02 +0800)]
[tests] precommit tests for D107692
Kazu Hirata [Tue, 17 Aug 2021 04:21:11 +0000 (21:21 -0700)]
[AsmParser] Remove MDConstant (NFC)
The last use was removed on Sep 22, 2016 in commit
fcee2d80017f8e2db6a8ac3a70bdc0653afa7d01.
Whitney Tsang [Tue, 17 Aug 2021 03:50:13 +0000 (12:50 +0900)]
[LNICM] Fix infinite loop
There is a bug introduced by https://reviews.llvm.org/D107219 which causes an infinite loop, when there are more than 2 levels PHINode chain.
Reviewed By: uint256_t
Differential Revision: https://reviews.llvm.org/D108166
Ben Shi [Sat, 7 Aug 2021 08:29:27 +0000 (16:29 +0800)]
[AVR][clang] Improve search for avr-libc installation path
Search avr-libc path according to avr-gcc installation at first,
then other possible installed pathes.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D107682
Christudasan Devadasan [Fri, 13 Aug 2021 02:54:42 +0000 (22:54 -0400)]
[AMDGPU] Skip pseudo MIs in hazard recognizer
Instructions like WAVE_BARRIER and SI_MASKED_UNREACHABLE
are only placeholders to prevent certain unwanted
transformations and will get discarded during assembly
emission. They should not be counted during nop insertion.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D108022
Fangrui Song [Tue, 17 Aug 2021 02:41:11 +0000 (19:41 -0700)]
[lld-macho][test] Remove ld64.lld: prefix in a diagnostic
The convention is not to check the prefix before `error: `.
This gives flexibility if we need to rename ld64.lld to something else,
(e.g. a while ago we used ld64.lld.darwinnew).
Fangrui Song [Tue, 17 Aug 2021 02:23:11 +0000 (19:23 -0700)]
[split-file] Default to --no-leading-lines
It turns out that the --leading-lines may be a bad default.
[[#@LINE+-num]] is rarely used.
John Demme [Tue, 17 Aug 2021 02:18:23 +0000 (19:18 -0700)]
[MLIR] [Python] Fix out-of-tree Windows python bindings
MSVC needs to know where to put the archive (.lib) as well as the runtime
(.dll). If left to the default location, multiple rules to generate the same
file will be produced, creating a Ninja error.
Differential Revision: https://reviews.llvm.org/D108181
Vincent Lee [Mon, 16 Aug 2021 22:19:43 +0000 (15:19 -0700)]
[lld-macho] Refactor parseSections to avoid creating isec on LLVM segments
Address post follow up comment in D108016. Avoid creating isec for
LLVM segments since we are skipping over it.
Reviewed By: #lld-macho, int3
Differential Revision: https://reviews.llvm.org/D108167
Carl Ritson [Tue, 17 Aug 2021 01:24:49 +0000 (10:24 +0900)]
[AMDGPU] Make BVH isel consistent with other MIMG opcodes
Suffix opcodes with _gfx10.
Remove direct references to architecture specific opcodes.
Add a BVH flag and apply this to diassembly.
Fix a number of disassembly errors on gfx90a target caused by
previous incorrect BVH detection code.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D108117
Matthias Springer [Tue, 17 Aug 2021 01:27:41 +0000 (10:27 +0900)]
[mlir][Analysis][NFC] Clean up FlatAffineValueConstraints
* Rename ids to values in FlatAffineValueConstraints.
* Overall cleanup of comments in FlatAffineConstraints and FlatAffineValueConstraints.
Differential Revision: https://reviews.llvm.org/D107947
Weverything [Mon, 16 Aug 2021 23:54:10 +0000 (16:54 -0700)]
Fix missing qualifier in template type diffing
Handle SubstTemplateTypeParmType so qualifiers do not get dropped from
the diagnostic message.
Matthias Springer [Tue, 17 Aug 2021 01:08:08 +0000 (10:08 +0900)]
[mlir][Analysis][NFC] Split FlatAffineConstraints class
* Extract "value" functionality of `FlatAffineConstraints` into a new derived `FlatAffineValueConstraints` class. Current users of `FlatAffineConstraints` can use `FlatAffineValueConstraints` without additional code changes, thus NFC.
* `FlatAffineConstraints` no longer associates dimensions with SSA Values. All functionality that requires this, is moved to `FlatAffineValueConstraints`.
* `FlatAffineConstraints` no longer makes assumptions about where Values associated with dimensions are coming from.
Differential Revision: https://reviews.llvm.org/D107725
Hongtao Yu [Mon, 16 Aug 2021 21:17:43 +0000 (14:17 -0700)]
[SamplePGO][NFC] Dump function profiles in order
Sample profiles are stored in a string map which is basically an unordered map. Printing out profiles by simply walking the string map doesn't enforce an order. I'm sorting the map in the decreasing order of total samples to enable a more stable dump, which is good for comparing two dumps.
Reviewed By: wenlei, wlei
Differential Revision: https://reviews.llvm.org/D108147
Nathan Chancellor [Tue, 17 Aug 2021 00:11:07 +0000 (17:11 -0700)]
[clang] Expose unreachable fallthrough annotation warning
The Linux kernel has a macro called IS_ENABLED(), which evaluates to a
constant 1 or 0 based on Kconfig selections, allowing C code to be
unconditionally enabled or disabled at build time. For example:
int foo(struct *a, int b) {
switch (b) {
case 1:
if (a->flag || !IS_ENABLED(CONFIG_64BIT))
return 1;
__attribute__((fallthrough));
case 2:
return 2;
default:
return 3;
}
}
There is an unreachable warning about the fallthrough annotation in the
first case because !IS_ENABLED(CONFIG_64BIT) can be evaluated to 1,
which looks like
return 1;
__attribute__((fallthrough));
to clang.
This type of warning is pointless for the Linux kernel because it does
this trick all over the place due to the sheer number of configuration
options that it has.
Add -Wunreachable-code-fallthrough, enabled under -Wunreachable-code, so
that projects that want to warn on unreachable code get this warning but
projects that do not care about unreachable code can still use
-Wimplicit-fallthrough without having to make changes to their code
base.
Fixes PR51094.
Reviewed By: aaron.ballman, nickdesaulniers
Differential Revision: https://reviews.llvm.org/D107933
Geoffrey Martin-Noble [Thu, 5 Aug 2021 23:29:59 +0000 (16:29 -0700)]
[MLIR] Add a bitcast method to DenseElementsAttr
This method bitcasts a DenseElementsAttr elementwise to one of the same
shape with a different element type.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D107612
Douglas Yung [Tue, 17 Aug 2021 00:01:57 +0000 (17:01 -0700)]
[tsan] Another attempt to fix GCC 8.3 build after D107911
This removes the -Werror compilation flag for x64 linux to work around a gcc bug.
GCC 8.3 reports '__tsan::v3::Event::type’ is too small to hold all values of ‘enum class __tsan::v3::EventType’
incorrectly which gets promoted to an error and causes the build to fail.
Fangrui Song [Mon, 16 Aug 2021 23:41:17 +0000 (16:41 -0700)]
[lldb] Fix -Wunused-but-set-variable
Hongtao Yu [Mon, 16 Aug 2021 16:21:13 +0000 (09:21 -0700)]
[SamplePGO] Fixing a memory issue when creating profiles on-demand
There is a on-dmeand creation of function profile during top-down processing in the sample loader when merging uninlined callees. During the profile creation, a stack string object is used to store a newly-created MD5 name, which is then used by reference as hash key in the profile map. This makes the hash key a dangling reference when later on the stack string object is deallocated.
The issue only happens with md5 profile use and was exposed by context split work for CS profile. I'm making a fix by storing newly created names in the reader.
Reviewed By: wenlei, wmi, wlei
Differential Revision: https://reviews.llvm.org/D108142
Duncan P. N. Exon Smith [Mon, 16 Aug 2021 23:18:11 +0000 (16:18 -0700)]
Clean up test for -f{,no-}implicit-modules-uses-lock
@arichardson pointed out in post-commit review for
https://reviews.llvm.org/D95583 (
b714f73defc8e075) that `-verify` has an
optional argument that works a lot like `FileCheck`'s `-check-prefix`.
Use it to simplify the test for `-fno-implicit-modules-use-lock`!
Vitaly Buka [Mon, 16 Aug 2021 23:15:57 +0000 (16:15 -0700)]
[tsan] Fix GCC 8.3 build after D107911
gcc 8.3 reports:
__tsan::v3::Event::type’ is too small to hold all values of ‘enum class __tsan::v3::EventType’
Arthur Eubanks [Mon, 16 Aug 2021 23:07:47 +0000 (16:07 -0700)]
[NFC] Remove/replace some confusing attribute getters on Function
Vitaly Buka [Sat, 14 Aug 2021 23:51:10 +0000 (16:51 -0700)]
[sanitizer] Define 32bit uptr as uint
This makes it consistent with uintptr_t.
It's
45138f788c9b3c4ac5d9ae4479841c411c15190e with Darwin fix.
Reviewed By: kstoimenov
Differential Revision: https://reviews.llvm.org/D108163
Vitaly Buka [Mon, 16 Aug 2021 22:42:17 +0000 (15:42 -0700)]
Revert "[sanitizer] Fix MAC build after D108163"
They still fail to fix Darwin builds
https://green.lab.llvm.org/green/job/clang-stage1-RA/23399/consoleFull#
462858634a1ca8a51-895e-46c6-af87-
ce24fa4cd561
This reverts commit
ae0628f716cc05ad28adf963538a67e69d58d21d.
This reverts commit
2c6448cdc2f68f8c28fd0bd9404182b81306e6e6.
Min-Yih Hsu [Mon, 16 Aug 2021 00:19:33 +0000 (17:19 -0700)]
[M68k] Do not pass llvm::Function& to M68kCCState
Previously we're passing `llvm::Function&` into `M68kCCState` to lower
arguments in fastcc. However, that reference might not be available if
it's a library call and we only need its argument types. Therefore,
now we're simply passing a list of argument llvm::Type-s.
This fixes PR-50752.
Differential Revision: https://reviews.llvm.org/D108101
Afanasyev Ivan [Mon, 16 Aug 2021 22:26:57 +0000 (15:26 -0700)]
[AsmPrinter] fix nullptr dereference for MBBs with hasAddressTaken property without BB
Basic block pointer is dereferenced unconditionally for MBBs with
hasAddressTaken property.
MBBs might have hasAddressTaken property without reference to BB.
Backend developers must assign fake BB to MBB to workaround this issue
and it should be fixed.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D108092
Guillaume Chatelet [Mon, 16 Aug 2021 22:28:53 +0000 (22:28 +0000)]
[libc] dedup handling of size 4 for memset
Vitaly Buka [Mon, 16 Aug 2021 22:21:54 +0000 (15:21 -0700)]
[sanitizer] Fix MAC build after D108163
Guillaume Chatelet [Mon, 16 Aug 2021 22:12:00 +0000 (22:12 +0000)]
[libc] Optimize Loop strategy
Since the precondition for loop is `size >= T::kSize` we always expect
at least one run of the loop. This patch transforms the for-loop into a
do/while-loop which saves at least one test.
We also add a second template parameter to allow the Tail operation to
differ from the loop operation.
David Green [Mon, 16 Aug 2021 21:58:12 +0000 (22:58 +0100)]
[ARM] Create MQQPR and MQQQQPR register classes
Similar to the MQPR register class as the MVE equivalent to QPR, this
adds MQQPR and MQQQQPR register classes for the MVE equivalents of QQPR
and QQQQPR registers. The MVE MQPR seemed have worked out quite well,
and adding MQQPR and MQQQQPR allows us to a little more accurately
specify the number of registers, calculating register pressure limits a
little better.
Differential Revision: https://reviews.llvm.org/D107463
Kostya Kortchinsky [Mon, 16 Aug 2021 18:59:15 +0000 (11:59 -0700)]
[scudo] Use stdint types for internal types (redo)
This is a redo of D108089 that broke some 32-bit builds.
`scudo::uptr` was defined as an `unsigned long` on 32-b platform,
while a `uintptr_t` is usually defined as an `unsigned int`.
This worked, this was not consistent, particularly with regard to
format string specifiers.
As suggested by Vitaly, since we are including `stdint.h`, define
the internal scudo integer types to those.
Differential Revision: https://reviews.llvm.org/D108152
Vitaly Buka [Sat, 14 Aug 2021 23:51:10 +0000 (16:51 -0700)]
[sanitizer] Define 32bit uptr as uint
This makes it consistent with uintptr_t.
It's
45138f788c9b3c4ac5d9ae4479841c411c15190e with Darwin fix.
Reviewed By: kstoimenov
Differential Revision: https://reviews.llvm.org/D108163
Rob Suderman [Mon, 16 Aug 2021 20:47:00 +0000 (13:47 -0700)]
[mlir][tosa] Fixed depthwise conv parallel/reduction indices order
Reduction axis should come after all parallel axis to work with vectorization.
Reviewed By: NatashaKnk
Differential Revision: https://reviews.llvm.org/D108005
Anshil Gandhi [Mon, 16 Aug 2021 20:56:01 +0000 (14:56 -0600)]
[Remarks] Emit optimization remarks for atomics generating CAS loop
Implements ORE in AtomicExpand pass to report atomics generating a
compare and swap loop.
Differential Revision: https://reviews.llvm.org/D106891
Jason Molenda [Mon, 16 Aug 2021 20:46:12 +0000 (13:46 -0700)]
Ah, fix formatting, I didn't notice lldb-instr's code
additions were unusually formatted.
Craig Topper [Mon, 16 Aug 2021 20:36:16 +0000 (13:36 -0700)]
[ARM][TypePromotion] Re-generate test checks. NFC
Tests were missing load/store alignment. One test in casts.ll had
no check lines.
Jason Molenda [Mon, 16 Aug 2021 20:40:07 +0000 (13:40 -0700)]
Correctly update reproducer hooks for SB API I added
In
9ea6dd5cfac0b233fbb148c1e2d0f81f816737c8 /
https://reviews.llvm.org/D88387 where I added skinny corefile
creation, I added new SB API and tried to manually update the hooks
for the reproducers. I missed a spot, and I should have used
lldb-instr to update the instrumentation automatically.
Evgenii Stepanov [Sat, 14 Aug 2021 00:15:52 +0000 (17:15 -0700)]
[hwasan] Ignore lit config.enable_aliases on non-x86.
This re-enables a number of Android tests that have been lost in
check-hwasan.
Differential Revision: https://reviews.llvm.org/D108064
Vyacheslav Zakharin [Fri, 13 Aug 2021 00:23:28 +0000 (17:23 -0700)]
[clang-offload-wrapper] Add standard notes for ELF offload images
The patch adds ELF notes into SHT_NOTE sections of ELF offload images
passed to clang-offload-wrapper.
The new notes use a null-terminated "LLVMOMPOFFLOAD" note name.
There are currently three types of notes:
VERSION: a string (not null-terminated) representing the ELF offload
image structure. The current version '1.0' does not put any restrictions
on the structure of the image. If we ever need to come up with a common
structure for ELF offload images (e.g. to be able to analyze the images
in libomptarget in some standard way), then we will introduce new versions.
PRODUCER: a vendor specific name of the producing toolchain.
Upstream LLVM uses "LLVM" (not null-terminated).
PRODUCER_VERSION: a vendor specific version of the producing toolchain.
Upstream LLVM uses LLVM_VERSION_STRING with optional <space> LLVM_REVISION.
All three notes are not mandatory currently.
Differential Revision: https://reviews.llvm.org/D99551