wren romano [Fri, 24 Mar 2023 21:34:20 +0000 (14:34 -0700)]
[mlir][sparse] Updating TensorExp ctor to catch unknown TensorExp::Kind
Depends On D146562
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D146673
wren romano [Fri, 24 Mar 2023 21:24:27 +0000 (14:24 -0700)]
[mlir][sparse] Misc cleanup in Merger.h
* Moving the `Children` class to be nested under `TensorExp`.
* Marking `TensorExp`, `TensorExp::Children`, and `LatPoint` as final.
Depends On D146083
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D146562
wren romano [Fri, 24 Mar 2023 21:17:11 +0000 (14:17 -0700)]
[mlir][sparse] Updating the `Merger::{exp,lat,set}` methods to return const
This helps the `Merger` maintain invariants, as well as clarifying the immutability of the underlying objects (with the one exception of `TensorExp::val`).
Depends On: D146559
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D146083
Dave Lee [Fri, 24 Mar 2023 04:43:32 +0000 (21:43 -0700)]
[lldb] Add ability to hide the root name of a value
When printing a value, allow the root value's name to be elided, without omiting the
names of child values.
At the API level, this adds `SetHideRootName()`, which joins the existing
`SetHideName()` function.
This functionality is used by `dwim-print` and `expression`.
Fixes an issue identified by @jgorbe in https://reviews.llvm.org/D145609.
Differential Revision: https://reviews.llvm.org/D146783
Siva Chandra Reddy [Fri, 24 Mar 2023 20:24:57 +0000 (20:24 +0000)]
[libc][Obvious] Remove a compile opt to x86_64 longjmp in a previous commit.
The option -fno-omit-frame-pointer was accidentally added to the x86_64
longjmp target. This change not only removes it, but makes it
-fomit-frame-pointer.
David Majnemer [Fri, 24 Mar 2023 20:42:47 +0000 (20:42 +0000)]
Fix mlir/lib/Bindings/Python/IRTypes.cpp for Float8E4M3B11FNUZType
David Majnemer [Thu, 9 Mar 2023 23:10:57 +0000 (23:10 +0000)]
[APFloat] Add E4M3B11FNUZ
X. Sun et al. (https://dl.acm.org/doi/10.5555/3454287.3454728) published
a paper showing that an FP format with 4 bits of exponent, 3 bits of
significand and an exponent bias of 11 would work quite well for ML
applications.
Google hardware supports a variant of this format where 0x80 is used to
represent NaN, as in the Float8E4M3FNUZ format. Just like the
Float8E4M3FNUZ format, this format does not support -0 and values which
would map to it will become +0.
This format is proposed for inclusion in OpenXLA's StableHLO dialect: https://github.com/openxla/stablehlo/pull/1308
As part of inclusion in that dialect, APFloat needs to know how to
handle this format.
Differential Revision: https://reviews.llvm.org/D146441
Kazu Hirata [Fri, 24 Mar 2023 20:01:52 +0000 (13:01 -0700)]
[Support] Fix warnings
This patch fixes:
llvm/unittests/Support/ScopedPrinterTest.cpp:519:20: error: unused
variable 'InfDouble' [-Werror,-Wunused-variable]
llvm/unittests/Support/ScopedPrinterTest.cpp:520:16: error: unused
variable 'NaNDouble' [-Werror,-Wunused-variable]
llvm/unittests/Support/ScopedPrinterTest.cpp:516:15: error: unused
variable 'NaNFloat' [-Werror,-Wunused-variable]
llvm/unittests/Support/ScopedPrinterTest.cpp:515:19: error: unused
variable 'InfFloat' [-Werror,-Wunused-variable]
Since commit
fa56e362af475e0758cfb41c42f78db50da7235c has temporarily
disabled tests involving these constants, this patch simply comments
them out instead of removing them.
Stefan Gränitz [Fri, 24 Mar 2023 19:49:54 +0000 (20:49 +0100)]
[JITLink] Fix MSVC build error: formatv can't handle support::ulittle16_t values
The issue was reported with compiler output here: https://reviews.llvm.org/D144083#4219383
Spenser Bauman [Fri, 24 Mar 2023 19:42:12 +0000 (19:42 +0000)]
[mlir][tosa] Improve performance of tosa.transpose constant folding
Folding of the tosa.transpose operation is both time and memory
intensive as the underlying ElementsAttr is processed as a sequence of
Attributes. This change attempts operate on the underlying raw data of
the ElementsAttr.
In an example resnet50 network, this change reduces the time spent in
folding transpose ops from 35s to 1.5s.
Reviewed By: GeorgeARM, rsuderman, stellaraccident
Differential Revision: https://reviews.llvm.org/D146526
Joseph Huber [Fri, 24 Mar 2023 19:45:14 +0000 (14:45 -0500)]
[libc] Use `nvptx_kernel` attribute in NVPTX startup code
Summary:
A recent patch allowed us to emit a callable kernel from freestanding
NVPTX code. This allows us to move away from using the CUDA language.
This has several advantages in that it works around an entire assortment
of errors I was seeing while implementing RPC for Nvidia.
wlei [Fri, 24 Mar 2023 17:21:38 +0000 (10:21 -0700)]
[Pseudo Probe] Add the test for probe desc
Added a test to https://reviews.llvm.org/D146657, make sure the guid and name are computed using the debug info name.
Reviewed By: hoy, wenlei
Differential Revision: https://reviews.llvm.org/D146826
Alex Langford [Fri, 24 Mar 2023 19:38:50 +0000 (12:38 -0700)]
[lldb] Add header REPL.h to lldb_Expression
As of
c5bfa3dafb3e7ccc871734a96b7a9188868d925a, REPL.h no longer has a
private implementation header in it. This TODO and the thing it marks
cdan be removed.
Joseph Huber [Fri, 24 Mar 2023 18:10:22 +0000 (13:10 -0500)]
[NVPTX] Introduce attribute to mark kernels without a language mode
We may want to be able to mark certain regions as kernels even without
being in an accepted CUDA or OpenCL language mode. This patch introduces
a new attribute limited to `nvptx` targets called `nvptx_kernel` which
will perform the same metadata action as the existing CUDA ones. This
closely mimics the behaviour of the `amdgpu_kernel` attribute. This
allows for making executable NVPTX device images without using an
existing offloading language model.
I was unsure how to do this, I could potentially re-use all the CUDA
attributes and just replace the `CUDA` language requirement with an
`NVPTX` architecture requirement. Also I don't know if I should add more
than just this attribute.
Reviewed By: tra
Differential Revision: https://reviews.llvm.org/D140226
SJW [Fri, 24 Mar 2023 19:22:43 +0000 (19:22 +0000)]
[linalg] Fixed tosa-to-linalg-named for tosa.conv2d i8 with i8 bias
Missing sign extension.
Reviewed By: rsuderman
Differential Revision: https://reviews.llvm.org/D145744
Jim Ingham [Fri, 24 Mar 2023 19:27:33 +0000 (12:27 -0700)]
Don't expect what newlines look like - never works on Windows.
Joseph Huber [Fri, 24 Mar 2023 19:25:38 +0000 (14:25 -0500)]
[Libomptarget] Update CMake messages if the tests aren't build
Summary:
These messages have been wrong for quite some time. Update them to be
more descriptive of why the tests weren't built.
Michał Górny [Mon, 20 Mar 2023 15:00:10 +0000 (16:00 +0100)]
[clang-tools-extra] Fix linking ClangdTests when using libclang-cpp
Fix linking ClangdTests to specify the dependency on the private
clangTesting library via target_link_libraries() rather than
clang_target_link_libraries(). The latter uses libclang-cpp when
CLANG_LINK_CLANG_DYLIB is used, and clangTesting is not included
in this library.
This fixes
d60d3455eb2b375d026a4aa74c4ba0c38f5d323c.
Differential Revision: https://reviews.llvm.org/D146427
Mikhail R. Gadelha [Fri, 24 Mar 2023 19:13:19 +0000 (16:13 -0300)]
[libc] Add support for setjmp and longjmp in riscv
This patch implements setjmp and longjmp in riscv using inline asm. The
following changes were required:
* Omit frame pointer: otherwise gcc won't allow us to use s0
* Use __attribute__((naked)): otherwise both gcc and clang will generate
function prologue and epilogue in both functions. This doesn't happen
in x86_64, so we guard it to only riscv
Furthermore, using __attribute__((naked)) causes two problems: we
can't use `return 0` (both gcc and clang) and the function arguments in
the function body (clang only), so we had to use a0 and a1 directly.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D145584
Florian Hahn [Fri, 24 Mar 2023 19:14:34 +0000 (19:14 +0000)]
[ConstraintElim] Use GEPOperator instead of GetElementPtrInst.
The logic in ConstraintElimination should trivially apply to GEP
constant expressions as well, so update code to deal with GEPOperator
instead.
Denis Revunov [Fri, 24 Mar 2023 18:50:07 +0000 (21:50 +0300)]
[BOLT] Don't use section relocations when computing hash for data from other section
When computing symbol hashes in BinarySection::hash, we try to find relocations
in the section which reference the passed BinaryData. We do so by doing
lower_bound on data begin offset and upper_bound on data end offset. Since
offsets are relative to the current section, if it is a data from the previous
section, we get underflow when computing offset and lower_bound returns
Relocations.end(). If this data also ends where current section begins,
upper_bound on zero offset will return some valid iterator if we have any
relocations after the first byte. Then we'll try to iterate from lower_bound to
upper_bound, since they're not equal, which in that case means we'll dereference
Relocations.end(), increment it, and try to do so until we reach the second
valid iterator. Of course we reach segfault earlier. In this patch we stop BOLT
from searching relocations for symbols outside of the current section.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D146620
Jonas Paulsson [Tue, 14 Mar 2023 15:40:10 +0000 (16:40 +0100)]
[SystemZ] Allow fp/int casting with inline assembly operands.
Support bitcasting between int/fp/vector values and 'r'/'f'/'v' inline
assembly operands. This is intended to match GCCs beahvior.
Reviewed By: Ulrich Weigand
Differential Revision: https://reviews.llvm.org/D146059
Felipe de Azevedo Piovezan [Fri, 24 Mar 2023 18:49:47 +0000 (14:49 -0400)]
Revert "[Serialization] Place command line defines in the correct file"
This reverts commit
72073fc95cd4793a853925ddc8cc3fb2118808a5.
Paul Kirth [Fri, 24 Mar 2023 17:41:10 +0000 (17:41 +0000)]
[support] Temporarily disable Inf/NaN testing in PrintNumber
This is still breaking on some platforms. The underlying implementation
doesn't seem to be the cause, rather the test is not robust across
platforms. So, we'll just disable this for the time being, to unblock
builds until we have a proper fix.
Reviewed By: abhina.sreeskantharajan
Differential Revision: https://reviews.llvm.org/D146834
Doru Bercea [Fri, 10 Mar 2023 23:03:51 +0000 (18:03 -0500)]
Add support for critical regions in device code.
Review: https://reviews.llvm.org/D145831
Julian Lettner [Wed, 22 Mar 2023 22:07:37 +0000 (15:07 -0700)]
[TSan] Refactor ExternalAccess() to avoid unnecessary pop/push tag [NFC]
* Avoid unnecessary frame & tag push/pops if memory access is ignored
* Rename function and add comment to make it clearer what the code does
* Make helper functions static and move inside `#if !SANITIZER_GO`
Differential Revision: https://reviews.llvm.org/D146670
David Green [Fri, 24 Mar 2023 18:11:54 +0000 (18:11 +0000)]
[ARM] Add Thumb Attributes for thumb thunks created in SLSHarding
Without this the function will be use an Arm subtarget, meaning the
instructions in it will be invalid for the current subtarget.
Differential Revision: https://reviews.llvm.org/D144733
Min-Yih Hsu [Fri, 24 Mar 2023 17:59:46 +0000 (10:59 -0700)]
[M68k] Fix CConvs for pointer type return values
Put the value into A0 instead of data registers. And remove the
redundant `RetCC_M68kCommon` as there aren't many rules shared between
existing CCs other than the pointer one.
This change is tested by existing tests.
Alex Langford [Fri, 24 Mar 2023 17:55:33 +0000 (10:55 -0700)]
[lldb] Explicitly mark PlatformFreeBSD's dependency on PlatformPOSIX
I accidentally broke the FreeBSD lldb-server build in 0c5cee7 because it
now depends on PlatformFreeBSD. PlatformFreeBSD depends on PlatformPOSIX
but this dependency was not explicitly tracked in CMake. As a result,
the FreeBSD lldb-server build broke.
Credit to John F. Carr <jfc@mit.edu> for pointing out the issue and
providing a fix.
Jim Ingham [Fri, 24 Mar 2023 17:38:56 +0000 (10:38 -0700)]
Fix backtick handling in parsed commands.
https://reviews.llvm.org/D146779
Artem Belevich [Thu, 23 Mar 2023 22:27:02 +0000 (15:27 -0700)]
[NVPTX] Fix integer overflow affecting array size calculation.
It turns out, 4GB+ large arrays are a thing and a 32-bit integer is just not
enough to handle them.
Differential Revision: https://reviews.llvm.org/D146767
Luke Lau [Thu, 23 Mar 2023 17:45:30 +0000 (17:45 +0000)]
[RISCV] Model select and insertsubvector shuffle kinds
Selects get lowered to a vmerge with a mask, and insertsubvectors get
lowered to a vslideup.
Differential Revision: https://reviews.llvm.org/D146747
Luke Lau [Fri, 24 Mar 2023 13:46:03 +0000 (13:46 +0000)]
[RISCV] Add test case for two equivalent reductions
They are functionally equivalent but currently one fails to vectorize
because the cost of an insert subvector shuffle is too expensive.
D146747 will update the cost of these types of shuffles, so add a test
case for it.
Luke Lau [Fri, 24 Mar 2023 13:43:32 +0000 (13:43 +0000)]
[RISCV] Enable SLP in RISC-V SLP reduction tests
Horizontal reduction can still kick in even when the max VF is set to 0,
but strange stuff can happen as it affects the cost model.
Enable it for these tests as eventually the goal will be to have SLP
enabled.
Luke Lau [Fri, 24 Mar 2023 13:39:51 +0000 (13:39 +0000)]
[RISCV] Add test cases for modeling more shuffle kinds
These map to SK_InsertSubvector and SK_Select shuffle kinds
Luke Lau [Fri, 24 Mar 2023 15:52:02 +0000 (15:52 +0000)]
[RISCV][NFC] Rename some test cases
Since they no longer involve a merge
Luke Lau [Fri, 24 Mar 2023 12:03:41 +0000 (12:03 +0000)]
[RISCV] Lower insert subvector shuffles as vslideups
A shuffle with an insert subvector mask is functionally equivalent to:
(insert_subvector v0, (extract_subvector v1, len), index)
We can emulate by doing a vslideup on v1 into the right index, and
carefully selecting VL so that we don't overwrite any more destination
elements than what we have to.
This avoids the need for a select with a mask.
Sergio Afonso [Tue, 14 Mar 2023 17:40:04 +0000 (17:40 +0000)]
[flang][driver][openmp] Write MLIR for -save-temps
This patch adds support for producing MLIR files when using -save-temps on
flang. One MLIR file will be produced before lowering and optimization passes,
containing the operations produced by the PFT-to-MLIR lowering bridge, and
another at the end of the process, just before LLVM IR generation.
This is accomplished by forwarding the -save-temps flag from the driver to the
frontend, and modifying it to output MLIR files accordingly.
Differential Revision: https://reviews.llvm.org/D146075
Chia-hung Duan [Fri, 24 Mar 2023 17:06:29 +0000 (17:06 +0000)]
[scudo] Use bytes-in-freelist as a hint of page release
Tracking the pushed bytes between to releaseToOSMaybe calls may lead to
a overestimated case that if we do malloc 2KB -> free 2KB -> malloc 2KB
-> free 2KB, we may think we have released 4KB but it only releases 2KB
actually. Switch to use bytes-in-freelist excludes more cases that can't
release the pages
Reviewed By: cferris
Differential Revision: https://reviews.llvm.org/D146400
yijia1212 [Fri, 24 Mar 2023 17:05:07 +0000 (10:05 -0700)]
Remove unused header file in VectorTransformOps.h
Remove unused header file in VectorTransformOps.h
Differential Revision: https://reviews.llvm.org/D146825
Kazu Hirata [Fri, 24 Mar 2023 16:52:17 +0000 (09:52 -0700)]
Fix warnings
This patch fixes:
clang/lib/Driver/ToolChains/OHOS.cpp:410:18: warning: unused
variable ‘A’ [-Wunused-variable]
clang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp:293:15:
warning: unused variable ‘II’ [-Wunused-variable]
llvm/lib/ProfileData/RawMemProfReader.cpp:364:68: warning: suggest
parentheses around ‘&&’ within ‘||’ [-Wparentheses]
Doru Bercea [Fri, 24 Mar 2023 14:18:27 +0000 (10:18 -0400)]
Make test more explicit on failure.
Patch: https://reviews.llvm.org/D146812
Paul Kirth [Fri, 24 Mar 2023 16:02:49 +0000 (16:02 +0000)]
[support] Attempt to fix PrintNumber test for Solaris
NaN and Inf are still causing some problems in a formatting test.
This patch makes the checked format string exactly match the internal
JSON format string. If there are still problems, we should disable
testing Inf and NaN values until we can come to a portable solution.
Reviewed By: abhina.sreeskantharajan
Differential Revision: https://reviews.llvm.org/D146818
Tomas Matheson [Thu, 23 Mar 2023 15:18:34 +0000 (15:18 +0000)]
[extract_symbols.py] Export unique symbols
As described in a comment on D140637, PluginInlineOrderTest.NoInlineFoo
will fail with:
InlineOrderPlugin.so: undefined symbol: _ZN4llvm13AllAnalysesOnINS_6ModuleEE6SetKeyE
The symbol is unique in libLLVMCore and ends up local in AnalysisTests.
Fix this by exporting all unique symbols found in libraries.
AnalysisTests.symbols change in line count: 12464 -> 12499
Differential Revision: https://reviews.llvm.org/D146731
Quinn Dawkins [Fri, 24 Mar 2023 15:44:51 +0000 (11:44 -0400)]
[mlir][linalg] Use affine apply in im2col gather index calculations
Differential Revision: https://reviews.llvm.org/D146816
Augie Fackler [Fri, 24 Mar 2023 15:34:58 +0000 (11:34 -0400)]
Mariusz Sikora [Fri, 10 Mar 2023 07:50:16 +0000 (08:50 +0100)]
[AMDGPU] Add clang builtin for __builtin_amdgcn_ds_atomic_fadd_v2f16
Differential Revision: https://reviews.llvm.org/D146808
Nikita Popov [Fri, 24 Mar 2023 15:08:37 +0000 (16:08 +0100)]
[LICM] Require MSSA in SinkAndHoistLICMFlags (NFC)
Nowadays MSSA is required for LICM/LoopSink, so drop the checks
for whether its available or not.
Alvin Wong [Wed, 22 Mar 2023 10:14:40 +0000 (18:14 +0800)]
[sanitizer][win] Change cmdline check to allow double backslashs
When `llvm-symbolizer.exe` is on the PATH in an entry containing two
consecutive backslashes, sanitizers will try to launch llvm-symbolizer
with its absolute path containing these consecutive backslashes. This
fails a sanity check in `sanitizer_symbolizer_win.cpp`.
According to the documentation of `CommandLineToArgvW` [1] and a MS blog
post [2], backslashes in general, regardless of how many of them in a
row, do not have any special effect, unless when immediately followed by
a double quote.
There already exists a check that fails when the command line arguments
contains double quote, therefore the check for double backslashes can
simply be removed.
[1]: https://learn.microsoft.com/en-us/windows/win32/api/shellapi/nf-shellapi-commandlinetoargvw
[2]: https://learn.microsoft.com/en-us/archive/blogs/twistylittlepassagesallalike/everyone-quotes-command-line-arguments-the-wrong-way
Differential Revision: https://reviews.llvm.org/D146621
Xiaodong Liu [Fri, 24 Mar 2023 14:57:22 +0000 (09:57 -0500)]
[LoongArch] Add Scalar link component
Fix the lld link error on ppc64le builders:
```
ld.lld: error: undefined symbol: llvm::createLoopDataPrefetchPass()
>>> referenced by LoongArchTargetMachine.cpp
>>> lib/Target/LoongArch/CMakeFiles/LLVMLoongArchCodeGen.dir/LoongArchTargetMachine.cpp.o:((anonymous namespace)::LoongArchPassConfig::addIRPasses())
collect2: error: ld returned 1 exit status`
```
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D146806
Nemanja Ivanovic [Fri, 24 Mar 2023 14:34:25 +0000 (10:34 -0400)]
[SelectionDAG] Correctly reduce BV to shuffle with zero on big endian
This DAG combine is correct on little endian targets but
is incorrect on big endian targets.
Add big endian code to correct it.
Differential revision: https://reviews.llvm.org/D146460
Joseph Huber [Fri, 24 Mar 2023 14:37:28 +0000 (09:37 -0500)]
[libc] Change RPC outbox stores to be relaxed
Summary:
These stored previously used `RELEASE`. This was done originally to
ensure that the stores to the shared memory buffer were flushed prior to
signaling that the other side can begin accessing it. However, this
should be accomplished by the memory fence above the store. This change
is required because NVPTX does not support non-relaxed atomics used on
unified shared memory.
Sander de Smalen [Wed, 22 Mar 2023 16:54:00 +0000 (16:54 +0000)]
[AArch64][SME] SelectSMETileSlice should also match to 'reg+0' when slice is ADD with non-constant RHS.
It would decompose an address into a `reg + 0` when the slice was not an ADD,
but when the RHS of the ADD was not a constant, it would simply not match.
This patch fixes that, by always resolving to a `reg + 0` slice.
Vlad Serebrennikov [Fri, 24 Mar 2023 14:14:11 +0000 (17:14 +0300)]
[clang] Extend pragma dump to support expressions
Extend `#pragma clang __debug dump` to support not only single identifier, but an expression as well. This makes it possible to test ADL and overload resolution directly, without being creative to make them observable via diagnostics (e.g. when [[ http://eel.is/c++draft/over.match.best | over.match.best ]] is involved). This implementation has a known limitation of not supporting dependent expressions properly, but it's quite useful even without such support.
Differential Revision: https://reviews.llvm.org/D144115
Nikita Popov [Fri, 24 Mar 2023 14:24:21 +0000 (15:24 +0100)]
[LICM] Add tests for GEP reassociation (NFC)
Dmitry Makogon [Fri, 24 Mar 2023 13:34:55 +0000 (20:34 +0700)]
[Test] Regenerate test checks for some LSR tests (NFC)
Dmitry Makogon [Fri, 24 Mar 2023 12:02:25 +0000 (19:02 +0700)]
[Test] Add test to check that LCSSA is preserved by LSR (NFC)
Currently it fails as LSR doesn't preserve LCSSA in some cases.
Nicolas Vasilache [Fri, 24 Mar 2023 12:09:50 +0000 (12:09 +0000)]
[mlir][Vector][Transforms] Improve the control over individual vector lowerings and transforms
This revision adds vector transform operations that allow us to better inspect the composition
of various lowerings that were previously very opaque.
This commit is NFC in that it does not change patterns beyond adding `rewriter.notifyFailure` messages
and it does not change the tests beyond breaking them into pieces and using transforms instead of
throwaway opaque test passes.
Reviewed By: ftynse, springerm
Co-authored-by: Alex Zinenko <zinenko@google.com>
Differential Revision: https://reviews.llvm.org/D146755
Nikita Popov [Thu, 23 Mar 2023 14:23:31 +0000 (15:23 +0100)]
[SimplifyCFG] Don't merge invoke if this makes immarg non-constant (PR61265)
Don't merge invokes if this replaces constant operands with phis
in a place where this is not legal.
This also disallows converting operand bundles from constant to
non-constant, in line with the restriction we use in other
transforms.
Fixes https://github.com/llvm/llvm-project/issues/61265.
Differential Revision: https://reviews.llvm.org/D146723
Rainer Orth [Fri, 24 Mar 2023 13:24:07 +0000 (14:24 +0100)]
[flang][Driver] Fix lto-flags.f90 on Solaris
The `Flang :: Driver/lto-flags.f90` test `FAIL`s on Solaris:
/vol/llvm/src/llvm-project/dist/flang/test/Driver/lto-flags.f90:30:13: error: THIN-LTO: expected string not found in input
! THIN-LTO: "-plugin-opt=thinlto"
^
This is no wonder since the native Solaris `ld` doesn't support the linker
plugin interface at all, so this patch marks the test as `UNSUPPORTED`.
Tested on `amd64-pc-solaris2.11` and `x86_64-pc-linux-gnu`.
Differential Revision: https://reviews.llvm.org/D146807
Nikita Popov [Fri, 24 Mar 2023 13:17:26 +0000 (14:17 +0100)]
[GlobalOpt] Fix dead const handling in pointer root user cleanup (PR61674)
Rather than cleanup up dead constant expressions as we go along,
do this once at the end. This aligns it with the
CleanupConstantGlobalUsers() implementation and avoids
any invalidation issues.
Fixes https://github.com/llvm/llvm-project/issues/61674.
khei4 [Fri, 24 Mar 2023 10:21:25 +0000 (19:21 +0900)]
[AggressiveInstCombine] use m_Deferred on funnel shift(NFC)
Differential Revision: https://reviews.llvm.org/D146798
Reviewed By: nikic
Mariusz Sikora [Thu, 9 Mar 2023 10:29:33 +0000 (11:29 +0100)]
[AMDGPU] Create Subtarget Features for some of 16 bits atomic fadd instructions
Introducing Subtarget Features for instructions:
- ds_pk_add_bf16
- ds_pk_add_f16
- ds_pk_add_rtn_bf16
- ds_pk_add_rtn_f16
- flat_atomic_pk_add_f16
- flat_atomic_pk_add_bf16
- global_atomic_pk_add_f16
- global_atomic_pk_add_bf16
- buffer_atomic_pk_add_f16
Differential Revision: https://reviews.llvm.org/D146701
Nico Weber [Fri, 24 Mar 2023 12:06:37 +0000 (13:06 +0100)]
[gn] somewhat port
0c5cee779929 (lldb-server platform plugin)
Nikita Popov [Fri, 24 Mar 2023 11:55:02 +0000 (12:55 +0100)]
[Local] Check for null VH in RecursivelyDeleteTriviallyDeadInstructionsPermissive()
Peculiarly, the non-permissive variant handled this gracefully,
but the permissive one did not.
Dmitry Makogon [Fri, 24 Mar 2023 11:22:47 +0000 (18:22 +0700)]
[Test] Use autogenerated checks in uglygep.ll test for LSR (NFC)
Aaron Ballman [Fri, 24 Mar 2023 11:27:07 +0000 (07:27 -0400)]
Fix Clang sphinx build
This addresses the issues found in:
https://lab.llvm.org/buildbot/#/builders/92/builds/41772
Kiran Chandramohan [Fri, 24 Mar 2023 11:02:18 +0000 (11:02 +0000)]
[Flang][OpenMP] Add TODO message for common block privatisation
This is a temporary message until the feature is implemented and
merged.
Note: There is a proposed patch (https://reviews.llvm.org/D127215)
Reviewed By: peixin
Differential Revision: https://reviews.llvm.org/D146768
Stefan Gränitz [Fri, 24 Mar 2023 11:01:52 +0000 (12:01 +0100)]
[JITLink] Fix MSVC build error: fully qualify llvm::object::ELFFile
Sven van Haastregt [Fri, 24 Mar 2023 11:03:10 +0000 (11:03 +0000)]
[OpenCL] Emit EOL at end of generated header
Kadir Cetinkaya [Thu, 23 Mar 2023 16:36:54 +0000 (17:36 +0100)]
[include-cleaner] Attribute references to explicit specializations
Fixes https://github.com/llvm/llvm-project/issues/61652
Differential Revision: https://reviews.llvm.org/D146732
Karl-Johan Karlsson [Fri, 24 Mar 2023 09:33:46 +0000 (10:33 +0100)]
[compiler-rt] Fix signed integer overflow in int_mulo_impl.inc
When compiling compiler-rt with -fsanitize=undefined and running testcases you
end up with the following warning:
UBSan:/repo/uabkaka/llvm-project/compiler-rt/lib/builtins/int_mulo_impl.inc:24:23: signed integer overflow: -1 * -
2147483648 cannot be represented in type 'si_int' (aka 'long')
This can be avoided by doing the multiplication in a matching unsigned variant
of the type.
This was found in an out of tree target.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D146623
Ben Shi [Mon, 9 Jan 2023 04:05:00 +0000 (12:05 +0800)]
[AVR] Do not emit 'LPM Rd, Z' on devices without FeatureLPMX
The 'LPM' instruction has three forms:
------------------------
| form | feature |
| ---------- | --------|
| LPM | hasLPM |
| LPM Rd, Z | hasLPMX |
| LPM Rd, Z+ | hasLPMX |
------------------------
The second form is always selected in ISelDAGToDAG, even on devices
without FeatureLPMX. This patch emits "LPM + MOV" on devices with
only FeatureLPM.
Reviewed By: jacquesguan
Differential Revision: https://reviews.llvm.org/D141246
David Sherwood [Thu, 16 Mar 2023 11:39:00 +0000 (11:39 +0000)]
[NFC][LoopVectorize] Change trip counts for some tests to guarantee a scalar tail
Quite a few vectoriser tests were using a trip count of 1024,
which meant:
1. For fixed-length VFs we would never actually tail-fold, e.g.
see Transforms/LoopVectorize/RISCV/uniform-load-store.ll. This
is because we can prove at compile-time there will never be a
scalar tail.
2. As of D146199 the same optimisation mentioned above will also
apply to scalable VFs too.
I've changed all such trip counts to be 1025 instead.
Differential Revision: https://reviews.llvm.org/D146219
Akshay Khadse [Fri, 24 Mar 2023 09:14:30 +0000 (17:14 +0800)]
[NFC] Fix auto usage to avoid copies
Fixes some usages of the "auto" keyword to avoid creation of copies.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D146694
mydeveloperday [Fri, 24 Mar 2023 09:27:23 +0000 (09:27 +0000)]
[clang-format] NFC Format.h and ClangFormatStyleOptions.rst are out of date
Regenerate the style documentation, requires some minor sphinx changes to avoid warnings
Reviewed By: klimek
Differential Revision: https://reviews.llvm.org/D146704
Stefan Gränitz [Thu, 23 Mar 2023 10:10:39 +0000 (11:10 +0100)]
Reland "[JITLink] Initial AArch32 backend"
This first version lays the foundations for AArch32 support in JITLink. ELFLinkGraphBuilder_aarch32 processes REL-type relocations and populates LinkGraphs from ELF object files for both big- and little-endian systems. The ArmCfg member controls subarchitecture-specific details throughout the linking process (i.e. it's passed to ELFJITLinker_aarch32).
Relocation types follow the ABI documentation's division into classes: Data (endian-sensitive), Arm (32-bit little-endian) and Thumb (2x 16-bit little-endian, "Thumb32" in the docs). The implementation of instruction encoding/decoding for relocation resolution is implemented symmetrically and is testable in isolation (see AArch32 category in JITLinkTests).
Callable Thumb functions are marked with a ThumbSymbol target-flag and stored in the LinkGraph with their real addresses. The thumb-bit is added back in when the owning JITDylib requests the address for such a symbol.
The StubsManager can generate (absolute) Thumb-state stubs for branch range extensions on v7+ targets. Proper GOT/PLT handling is not yet implemented.
This patch is based on the backend implementation in ez-clang and has just enough functionality to model the infrastructure and link a Thumb function `main()` that calls `printf()` to dump "Hello Arm!" on Armv7a. It was tested on Raspberry Pi with 32-bit Raspbian OS.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D144083
Luke Lau [Thu, 23 Mar 2023 10:59:59 +0000 (10:59 +0000)]
[RISCV] Add test for shuffles that could be done as vmerges
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D146710
Andrzej Warzynski [Thu, 23 Mar 2023 17:39:48 +0000 (17:39 +0000)]
[mlir][arith] Extend the `floordivsi` converter
This patch extends the `createConst` method so that it can generate
constant vectors (it can already generate scalars). This change is
required to be able to apply the converter for `arith.floordivsi`
(i.e. `FloorDivSIOpConverter`) to vectors.
While `arith.floordivsi` is my main motivation for this change, this
patch should also allow other Arith ops to be converted in vector cases.
In my example, the Linalg vectorizer updates `arith.floordivsi` to
operate on vectors and hence the need for this change.
Differential Revision: https://reviews.llvm.org/D146741
luxufan [Fri, 24 Mar 2023 08:35:56 +0000 (16:35 +0800)]
[NFC] Regenerate test of InstCombine/load-combine-metadata-dominance.ll
Max Kazantsev [Fri, 24 Mar 2023 08:42:23 +0000 (15:42 +0700)]
[Test] Regenerate checks in test file
Martin Storsjö [Wed, 22 Mar 2023 22:44:18 +0000 (00:44 +0200)]
[CMake] Respect variables for specifying host tools even without LLVM_USE_HOST_TOOLS set
When LLVM_NATIVE_TOOL_DIR was introduced in
d3da9067d143f3d4ce59b6d9ab4606a8ef1dc937 / D131052, it consisted
of refactoring a couple cases of manual logic for tools in
clang-tools-extra/clang-tidy, clang-tools-extra/pseudo/include
and mlir/tools/mlir-linalg-ods-gen. The former two had the same
consistent behaviour while the latter was slightly different, so
the refactoring would end up slightly adjusting one or the other.
The difference was that the clang-tools-extra tools respected the
external variable for setting the tool name, regardless of the
LLVM_USE_HOST_TOOLS variable, while mlir-linalg-ods-gen tool
only checked its external variable if LLVM_USE_HOST_TOOLS was set.
LLVM_USE_HOST_TOOLS is supposed to be enabled automatically whenever
cross compiling, so this shouldn't have been an issue.
In https://github.com/llvm/llvm-project/issues/60784, it seems like
some users do cross compile LLVM, without CMake knowing about it
(without CMAKE_CROSSCOMPILING being set). In these cases, their
build broke, as the variables for pointing to external host tools
no longer were being respected.
The fact that CMAKE_CROSSCOMPILING wasn't set stems from a
non-obvious behaviour of CMake; CMAKE_CROSSCOMPILING isn't supposed
to be set by the user (and if it was, it gets overridden), but one
has to set CMAKE_SYSTEM_NAME to indicate that one is cross compiling,
even if the target OS is the same as the current host.
Skip the checks for LLVM_USE_HOST_TOOLS and always respect the
variables for pointing to external tools (both the old tool specific
variables, and the new LLVM_NATIVE_TOOL_DIR), if they're set. This
makes the logic within setup_host_tool more exactly match the
logic for the clang-tools-extra tools from before the refactoring
in
d3da9067d143f3d4ce59b6d9ab4606a8ef1dc937. This makes the behaviour
consistent with that of the tablegen executables, which also respect
the externally set variables regardless of LLVM_USE_HOST_TOOLS.
This fixes
https://github.com/llvm/llvm-project/issues/60784.
Differential Revision: https://reviews.llvm.org/D146666
Johannes de Fine Licht [Fri, 24 Mar 2023 08:27:27 +0000 (09:27 +0100)]
[MLIR][LLVM] Add debug output to the LLVM inliner.
This revealed a test case that wasn't hitting the intended branch
because the inlinees had no function definition.
Depends on D146628
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D146633
Martin Storsjö [Fri, 24 Mar 2023 08:23:50 +0000 (10:23 +0200)]
[LLD] [test] Add a missing REQUIRES: x86 in a new test
This test somewhat unconventionally assembles both aarch64 and
x86 object files.
This fixes test failures in build configurations with the aarch64
target enabled but x86 target disabled.
luxufan [Fri, 24 Mar 2023 08:26:32 +0000 (16:26 +0800)]
[NFC] Regenerate test NewGVN/metadata-nonnull.ll
Dmitry Chernenkov [Thu, 23 Mar 2023 16:20:42 +0000 (16:20 +0000)]
Revert "Recommit [Modules] Remove unnecessary check when generating name lookup table in ASTWriter"
This reverts commit
25557aa38a0dab76f5b7a4518942f69d879693c0.
Tobias Gysi [Fri, 24 Mar 2023 06:57:24 +0000 (07:57 +0100)]
[mlir][llvm] Switch remaining LLVM dialect tests to opaque pointers.
The revision switches the remaining LLVM dialect tests to use opaque
pointers. Selected tests are copied to a postfixed test file for the
time being.
A number of tests disappear once we fully switch to opaque pointers.
In particular, all tests that check verify a pointer element type
matches another type as well as tests of recursive types.
Part of https://discourse.llvm.org/t/rfc-switching-the-llvm-dialect-and-dialect-lowerings-to-opaque-pointers/68179
Reviewed By: Dinistro, zero9178
Differential Revision: https://reviews.llvm.org/D146726
Carlos Galvez [Thu, 23 Mar 2023 12:16:40 +0000 (12:16 +0000)]
[clang-tidy][NFC] Improve naming convention in google-readability-avoid-underscore-in-googletest-name
According to the Google docs, the convention is
TEST(TestSuiteName, TestName). Apply that convention to the
source code, test and documentation of the check.
Differential Revision: https://reviews.llvm.org/D146713
Michael Platings [Tue, 14 Mar 2023 19:40:58 +0000 (19:40 +0000)]
[Driver] Change multilib selection algorithm
The new algorithm is:
1. Find all multilibs with flags that are a subset of the requested
flags.
2. If more than one multilib matches, choose the last.
In addition a new selection mechanism is permitted via an overload of
MultilibSet::select() for which multiple multilibs are returned.
This allows layering multilibs on top of each other.
Since multilibs are now ordered within a list, they no longer need a
Priority field.
The new algorithm is different to the old algorithm, but in practise
the old algorithm was always used in such a way that the effect is the
same.
The old algorithm was to find the set intersection of the requested
flags (with the first character of each removed) with each multilib's
flags (ditto), and for that intersection check whether the first
character matched. However, ignoring the first characters, the
requested flags were always a superset of all the multilibs flags.
Therefore the new algorithm can be used as a drop-in replacement.
The exception is Fuchsia, which needs adjusting slightly to set both
fexceptions and fno-exceptions flags.
Differential Revision: https://reviews.llvm.org/D142905
Kazu Hirata [Fri, 24 Mar 2023 06:48:17 +0000 (23:48 -0700)]
[X86] Precommit a test
This patch precommits a test for:
https://github.com/llvm/llvm-project/issues/61365
Dave Lee [Fri, 24 Mar 2023 05:14:10 +0000 (22:14 -0700)]
[lldb] Fix type of --apply-fixits (NFC)
Xiang1 Zhang [Tue, 21 Mar 2023 09:33:54 +0000 (17:33 +0800)]
[BugFix] Fix VSELECT ISel fail
Reviewed By: Luo yuanke
Differential Revision: https://reviews.llvm.org/D146683
Kazu Hirata [Fri, 24 Mar 2023 03:20:20 +0000 (20:20 -0700)]
[AArch64] Add tests for umax(x, 1u)
This patch adds tests for umax(x, 1u).
This patch fixes:
https://github.com/llvm/llvm-project/issues/60233
It turns out that commit
86b4d8645fc1b86693fef564cef68f24599c930f on
Feb 8, 2023 already performs the instcombine transformation proposed
in the issue, so the issue requires no change on the codegen side.
Xiaodong Liu [Fri, 24 Mar 2023 03:08:21 +0000 (11:08 +0800)]
[LoongArch] Enable LoopDataPrefetch pass
Keep `EnableLoopDataPrefetch` option off for now because
we need a few more TTIs and ISels.
This patch is inspired by http://reviews.llvm.org/D17943.
Reviewed By: SixWeining
Differential Revision: https://reviews.llvm.org/D146600
Jun Zhang [Fri, 24 Mar 2023 02:28:02 +0000 (10:28 +0800)]
[InstCombine] Try to recognize bswap pattern when calling funnel shifts
Alive2: https://alive2.llvm.org/ce/z/dxxD7B
Fixes: https://github.com/llvm/llvm-project/issues/60690
Signed-off-by: Jun Zhang <jun@junz.org>
Differential Revision: https://reviews.llvm.org/D146637
Jun Zhang [Fri, 24 Mar 2023 02:27:02 +0000 (10:27 +0800)]
Precommit tests for #60690
Differential Revision: https://reviews.llvm.org/D146636
Signed-off-by: Jun Zhang <jun@junz.org>
XinWang10 [Fri, 24 Mar 2023 02:32:18 +0000 (22:32 -0400)]
[NFC][X86]remove trailing space in X86InstrArithmetic.td
In this file, most of the line don't have trailing spaces,
but some of them have. To keep consistent, remove the trailing
spaces.
Reviewed By: skan
Differential Revision: https://reviews.llvm.org/D146697
Kazu Hirata [Fri, 24 Mar 2023 02:26:43 +0000 (19:26 -0700)]
[InstCombine] Generate better code for std::bit_ceil
Without this patch, std::bit_ceil<uint32_t> is compiled as:
%dec = add i32 %x, -1
%lz = tail call i32 @llvm.ctlz.i32(i32 %dec, i1 false)
%sub = sub i32 32, %lz
%res = shl i32 1, %sub
%ugt = icmp ugt i32 %x, 1
%sel = select i1 %ugt, i32 %res, i32 1
With this patch, we generate:
%dec = add i32 %x, -1
%ctlz = tail call i32 @llvm.ctlz.i32(i32 %dec, i1 false)
%sub = sub nsw i32 0, %ctlz
%and = and i32 %1, 31
%sel = shl nuw i32 1, %and
ret i32 %sel
https://alive2.llvm.org/ce/z/pwezvF
This patch recognizes the specific pattern from std::bit_ceil in
libc++ and libstdc++ and drops the conditional move. In addition to
the LLVM IR generated for std::bit_ceil(X), this patch recognizes
variants like:
std::bit_ceil(X - 1)
std::bit_ceil(X + 1)
std::bit_ceil(X + 2)
std::bit_ceil(-X)
std::bit_ceil(~X)
This patch fixes:
https://github.com/llvm/llvm-project/issues/60802
Differential Revision: https://reviews.llvm.org/D145299
Kazu Hirata [Fri, 24 Mar 2023 02:26:42 +0000 (19:26 -0700)]
[SelectionDAG] Use isOneConstant (NFC)
Rahul Joshi [Thu, 23 Mar 2023 23:06:37 +0000 (16:06 -0700)]
[NFC] Fix Windows builds that use MSVC 14.x
Differential Revision: https://reviews.llvm.org/D146769