Andres Gomez [Mon, 14 Jun 2021 13:20:07 +0000 (16:20 +0300)]
ci: bump x86_test-base tag
When adding crosvm to the x86_test-gl building deqp-runner was also
mistakenly introduced. deqp-runner is already included in the
x86_test-base image.
Additionally, when bumping the deqp-runner version, only the
x86_test-gl tag was updated.
Now, we remove the unnecessary build from x86_test-gl and bump the tag
for the x86_test-base image.
v2:
- Bump x86_test-gl, not x86_test-vk (Tomeu).
v3: add in fixes for duplicated lines in lvp xfails (Anholt)
Fixes:
dc9cd18f522 ("ci: Build Crosvm in our container")
Fixes:
53826932db5 ("ci: Update piglit and deqp/piglit-runner.")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11359>
Emma Anholt [Sat, 12 Jun 2021 00:07:31 +0000 (17:07 -0700)]
ci: Disable Xorg's screensaver entirely.
The screensaver kicks in at 10 minutes and obscures the screen,
independent of dpms. This causes piglit tests to get flaky (swaps start
taking a whole second, and swapbuffersmsc-divisor-zero times out at
exactly the wrong time) and slow if the run takes longer than 10 minutes.
Hopefully with this we'll see some piglit glx flakes go away forever, it
did seem to for this test locally.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11334>
Alexander Monakov [Fri, 11 Jun 2021 20:56:17 +0000 (23:56 +0300)]
freedreno/drm-shim: keep GEM buffers page-aligned
Trying to run turnip under drm-shim reveals that pretended device
offsets are not sufficiently aligned, failing this assert in tu_pipeline.c:
/* emit program binary & private memory layout
* binary_iova should be aligned to 1 instrlen unit (128 bytes)
*/
assert((binary_iova & 0x7f) == 0);
Round up BO size to 4096 in msm_ioctl_gem_new to avoid this (the kernel
aligns to page size).
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11331>
Alexander Monakov [Fri, 11 Jun 2021 20:29:57 +0000 (23:29 +0300)]
freedreno/drm-shim: pretend to offer DRM 1.6.0
turnip's DRM device interface requires version 1.6 (for SYNCOBJ).
To unblock use of turnip over drm-shim, raise shim's version to 1.6.
This allows to see shader disassembly, while submission fails with
DRM_SHIM: unhandled core DRM ioctl 0xC4 (0xc01064c4)
TU: error: DRM_IOCTL_SYNCOBJ_RESET failure: Invalid argument
Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11331>
Rhys Perry [Wed, 9 Jun 2021 19:10:51 +0000 (20:10 +0100)]
aco/lower_phis: don't allocate unused temporary ids
The excessive number of temporary IDs caused #4872's live-out sets to be
extremely large and expensive to iterate.
With this change, #4872's shader is much faster to compile and uses much
less memory.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4872
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11300>
Rhys Perry [Thu, 10 Jun 2021 10:23:56 +0000 (11:23 +0100)]
aco/lower_phis: fix undef_operands initialization with >32 predecessors
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11300>
Samuel Pitoiset [Tue, 8 Jun 2021 14:18:20 +0000 (16:18 +0200)]
radv: fix dynamic rasterizer discard enable state
If a pipeline enables rasterizerDiscardEnable statically we have to
properly initialize the value, otherwise it won't be updated when a
new pipeline is bound.
Fixes few dEQP-VK.pipeline.extended_dynamic_state.*disable_raster.
Fixes:
dd19bf9d7dd ("radv: implement dynamic rasterizer discard enable")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11242>
Rhys Perry [Fri, 27 Nov 2020 16:37:07 +0000 (16:37 +0000)]
aco: move VMEM instructions below descriptor loads
This is to prevent sequences like:
a = descriptor_load()
vmem(a)
b = descriptor_load()
vmem(b)
and instead create:
a = descriptor_load()
b = descriptor_load()
vmem(a)
vmem(b)
fossil-db (GFX10.3):
Totals from 114521 (78.30% of 146267) affected shaders:
VGPRs: 4540352 -> 4540216 (-0.00%); split: -0.03%, +0.02%
CodeSize:
289864228 ->
289114652 (-0.26%); split: -0.29%, +0.03%
MaxWaves: 2940234 -> 2940338 (+0.00%); split: +0.00%, -0.00%
Instrs:
55112418 ->
54919910 (-0.35%); split: -0.38%, +0.03%
Latency:
956528393 ->
954682011 (-0.19%); split: -0.24%, +0.05%
InvThroughput:
229280830 ->
229238107 (-0.02%); split: -0.04%, +0.02%
VClause: 1141832 -> 1139002 (-0.25%); split: -0.63%, +0.38%
SClause: 2357840 -> 2225008 (-5.63%); split: -6.01%, +0.38%
Copies: 3316040 -> 3331519 (+0.47%); split: -0.31%, +0.77%
Branches: 1187212 -> 1186919 (-0.02%); split: -0.03%, +0.01%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6489>
Rhys Perry [Fri, 27 Nov 2020 17:26:46 +0000 (17:26 +0000)]
aco: don't move descriptor loads below buffer loads
fossil-db (GFX10.3):
Totals from 52870 (36.15% of 146267) affected shaders:
VGPRs: 2109936 -> 2110056 (+0.01%); split: -0.01%, +0.01%
CodeSize:
134898056 ->
134812748 (-0.06%); split: -0.08%, +0.02%
MaxWaves: 1347354 -> 1347346 (-0.00%)
Instrs:
25598063 ->
25575415 (-0.09%); split: -0.11%, +0.02%
Latency:
432491613 ->
432047723 (-0.10%); split: -0.12%, +0.02%
InvThroughput:
90940977 ->
90927545 (-0.01%); split: -0.03%, +0.01%
VClause: 570039 -> 570019 (-0.00%); split: -0.05%, +0.04%
SClause: 1145076 -> 1139040 (-0.53%); split: -0.60%, +0.07%
Copies: 1513949 -> 1513102 (-0.06%); split: -0.32%, +0.26%
Branches: 524279 -> 524275 (-0.00%); split: -0.03%, +0.03%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6489>
Rhys Perry [Mon, 14 Jun 2021 13:45:22 +0000 (14:45 +0100)]
aco/ra: use adjust_max_used_regs() in compact_relocate_vars()
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6489>
Samuel Pitoiset [Wed, 9 Jun 2021 14:10:59 +0000 (16:10 +0200)]
radv/winsys: remove useless errno.h includes
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11269>
Samuel Pitoiset [Wed, 9 Jun 2021 14:09:32 +0000 (16:09 +0200)]
radv/winsys: adjust some error messages
Report the return code from libdrm instead of errno. While we are at it,
fix the function name in radv_amdgpu_wait_timeline_syncobj().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11269>
Bas Nieuwenhuizen [Mon, 2 Nov 2020 01:09:11 +0000 (02:09 +0100)]
gallium/va: Add support for PRIME_2 import.
That way we can actually import surfaces with modifiers & metadata
planes.
Tested with patches for ffmpeg to use this with kmsgrab & modifiers.
For AMD & multiplanar formats we always have 1 format plane = 1
memory plane, even with modifiers.
Intel (non Gallium) does have 1 format plane is 2 memory planes
for some modifiers with NV12. Currently with Gallium we don't really
have info about layer/plane ordering so this manually orders things
so that they align with Intel.
This shouldn't impact other drivers as without modifiers with metadata
planes this should give equivalent behavior to the old import path.
Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10815>
Bas Nieuwenhuizen [Sun, 1 Nov 2020 23:16:29 +0000 (00:16 +0100)]
gallium/vl: Use format plane count for sampler view creation.
Extra memory planes don't need a sampler.
Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10815>
Bas Nieuwenhuizen [Fri, 14 May 2021 12:08:12 +0000 (14:08 +0200)]
radv: Allow DCC images to be compressed with foreign queues.
Otherwise we would always decompress when transitioning to the
foreign queue.
Fixes:
8b9033ad0a0 ("radv: Support DCC modifiers fully.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10802>
Bas Nieuwenhuizen [Fri, 14 May 2021 12:04:11 +0000 (14:04 +0200)]
radv: Actually return correct value for read-only DCC compressedness.
Most stuff that depends on the value wouldn't be triggered anyway but
...
Fixes:
b5ecf0748a5 ("radv: Ensure we never decompress or FCE read-only textures.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10802>
Bas Nieuwenhuizen [Fri, 14 May 2021 11:57:11 +0000 (13:57 +0200)]
radv: Don't skip barriers that only change queues.
We depend on the queue mask for some decisions ...
CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10802>
Rhys Perry [Fri, 12 Feb 2021 10:49:03 +0000 (10:49 +0000)]
aco: adjust the condition for expanding vertex fetch data format
Instead of avoiding out-of-bounds access, avoid creating a load larger
than the original attribute. This should work just as well, since the only
situations expending a load helped was because we shrunk it first.
Also fixes a bug where a 3 component load (4 components with the first
component skipped) would be incorrectly expanded to 4 components because
the stride check would never be performed. Maybe we should avoid skipping
the first component in some situations, but I'm not sure if it's worth
the VGPR cost.
fossil-db (vega10):
Totals from 583 (0.39% of 149974) affected shaders:
CodeSize: 1496848 -> 1500868 (+0.27%); split: -0.03%, +0.30%
Instrs: 286155 -> 286575 (+0.15%); split: -0.07%, +0.22%
Latency: 2947101 -> 2946865 (-0.01%); split: -0.23%, +0.22%
InvThroughput: 797396 -> 797127 (-0.03%); split: -0.08%, +0.04%
fossil-db (polaris10):
Totals from 583 (0.39% of 151365) affected shaders:
SGPRs: 38880 -> 39216 (+0.86%)
VGPRs: 24440 -> 24356 (-0.34%)
CodeSize: 1506808 -> 1510876 (+0.27%); split: -0.01%, +0.28%
Instrs: 288735 -> 289167 (+0.15%); split: -0.06%, +0.21%
Latency: 2963263 -> 2961884 (-0.05%); split: -0.24%, +0.19%
InvThroughput: 802351 -> 801665 (-0.09%); split: -0.12%, +0.04%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9007>
Rhys Perry [Fri, 12 Feb 2021 10:48:58 +0000 (10:48 +0000)]
radv,aco: use all attributes in a binding to obtain an alignment for fetch
Instead of assuming scalar alignment for an attribute, we can use the
required alignment of other attributes in a binding to expect a higher
one.
This uses the alignment of all attributes in the pipeline, not just the
ones loaded. This can create slightly better code, but could break
pipelines which relied on unused (and unaligned) attributes no being
loaded. I don't think such pipelines are allowed by the spec.
fossil-db (Sienna Cichlid):
Totals from 44350 (30.32% of 146267) affected shaders:
VGPRs: 1694464 -> 1700616 (+0.36%); split: -0.08%, +0.44%
CodeSize:
60207184 ->
58093836 (-3.51%); split: -3.51%, +0.00%
MaxWaves: 1175998 -> 1174948 (-0.09%); split: +0.02%, -0.11%
Instrs:
11763444 ->
11458952 (-2.59%); split: -2.60%, +0.01%
Latency:
70679612 ->
67062215 (-5.12%); split: -5.27%, +0.15%
InvThroughput:
11482495 ->
11362911 (-1.04%); split: -1.20%, +0.16%
VClause: 359459 -> 343248 (-4.51%); split: -6.36%, +1.85%
SClause: 422404 -> 419229 (-0.75%); split: -1.17%, +0.42%
Copies: 754384 -> 764368 (+1.32%); split: -1.74%, +3.06%
Branches: 197472 -> 197474 (+0.00%); split: -0.03%, +0.03%
PreVGPRs: 1215348 -> 1215503 (+0.01%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9007>
Tomeu Vizoso [Mon, 14 Jun 2021 07:35:56 +0000 (09:35 +0200)]
Revert "ci: Disable the iris APL jobs"
This reverts commit
209c82977572dc73cc5c022be3949e1600fba05e.
They are stable now.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11355>
Iago Toral Quiroga [Thu, 10 Jun 2021 11:17:45 +0000 (13:17 +0200)]
v3dv: handle Vulkan 1.1 feature and property queries
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11316>
Hyunjun Ko [Mon, 7 Jun 2021 04:59:32 +0000 (04:59 +0000)]
turnip: add missing VKAPI_ATTR/CALL
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11099>
Dave Airlie [Wed, 2 Jun 2021 19:52:40 +0000 (05:52 +1000)]
ci: add crocus to the build tests
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11146>
Dave Airlie [Tue, 1 Jun 2021 03:14:51 +0000 (13:14 +1000)]
crocus: initial gallium driver for Intel gfx 4-7
This is a gallium driver for the Intel gfx 4-7 GPUs.
It was initially cloned from the iris driver by Ilia Mirkin,
then I ported over large reams of code from i965 until it worked.
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11146>
Dave Airlie [Tue, 8 Jun 2021 05:04:42 +0000 (15:04 +1000)]
intel/compiler: add flag to indicate edge flags vertex input is last
965 and the mesa st disagree on how vertex elements are ordered when
edgeflags are involved. 965 wants them in gl_vert_attrib order,
but gallium supplies the edgeflag as the last vertex element regardless.
This adds a flag which is enabled for gen4/5 to denote that the
edgeflag is at the end. When we reap 965 later we can resolve this
better.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11146>
Dave Airlie [Wed, 2 Jun 2021 02:24:37 +0000 (12:24 +1000)]
intel: reorder base program key.
This gets hashed a lot, this reduces the size of this, and the other
keys by a small amount
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11146>
Dave Airlie [Wed, 9 Jun 2021 21:01:21 +0000 (07:01 +1000)]
intel/decode: handle gen4/5 WM state fragment shaders
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11146>
Dave Airlie [Tue, 30 Mar 2021 03:44:34 +0000 (13:44 +1000)]
st/mesa: also disable other int textures
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11146>
Rob Clark [Sat, 12 Jun 2021 19:29:14 +0000 (12:29 -0700)]
freedreno/a6xx: Improve UBWC demotion logic
Sampler/image/surface views with different component sizes also need to
force demotion to uncompressed, as the UBWC metadata is not compatible.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11343>
Rob Clark [Sat, 12 Jun 2021 18:41:47 +0000 (11:41 -0700)]
freedreno/a6xx: Handle non-UBWC surface views
Similar to sampler views and shader images, if we get a surface view
with a non-UBWC compatible format while the underlying resource is UBWC,
we need to demote to uncompressed.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11343>
Rob Clark [Sat, 12 Jun 2021 17:00:15 +0000 (10:00 -0700)]
freedreno/a6xx: Fix r16_snorm blits
The .NORM bit doesn't seem to do what we think or want.. tu also doesn't
set it, and things seem to work out better when we don't.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11343>
Rob Clark [Sat, 12 Jun 2021 17:45:12 +0000 (10:45 -0700)]
freedreno/ci: Sort a630 piglit xfails
Next patches fixes a bunch.. it will be easier to not update the xfails
by hand.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11343>
Hoe Hao Cheng [Fri, 11 Jun 2021 16:36:32 +0000 (00:36 +0800)]
zink: move extension function verification to when it is used
Some vulkan functions are not loaded when the corresponding features are
not enabled, but the verifier checks for *all* functions, so make the
verifier more forgiving and use a stub to catch when we actually use a
function that is not loaded.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11328>
Yiwei Zhang [Sat, 12 Jun 2021 23:35:19 +0000 (23:35 +0000)]
anv: fix Android WSI VkFence
Fix an obvious one-liner bug.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11344>
Ilia Mirkin [Thu, 10 Jun 2021 04:20:04 +0000 (00:20 -0400)]
nv50: use the no-mipmap texture type for 2d ms views
There are size restrictions on 2D images which can't accommodate the
*full* 2D MSAA image. There's no way to make it work for 2D MSAA Array
images, but at least for the non-array variants, we can use the
no-mipmap variant which has a larger maximum size.
Fixes dEQP-GLES31.functional.shaders.builtin_functions.texture_size.*2d
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11285>
Chia-I Wu [Tue, 8 Jun 2021 19:46:22 +0000 (12:46 -0700)]
venus: add support for external semaphores on Android
This is a hack.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11253>
Chia-I Wu [Tue, 8 Jun 2021 17:54:49 +0000 (10:54 -0700)]
venus: add support for external fence on Android
This is a hack.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11253>
Chia-I Wu [Tue, 8 Jun 2021 19:40:02 +0000 (12:40 -0700)]
venus: update venus-protocol headers
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11253>
Chia-I Wu [Tue, 8 Jun 2021 18:43:28 +0000 (11:43 -0700)]
venus: simplify vn_renderer_sync creation
Remove the ability to init/release repeatedly.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11253>
Chia-I Wu [Tue, 8 Jun 2021 18:18:04 +0000 (11:18 -0700)]
venus: move vn_renderer_sync_ops to vn_renderer
To follow vn_renderer_{shmem,bo}_ops.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11253>
Emma Anholt [Fri, 4 Jun 2021 17:36:02 +0000 (10:36 -0700)]
ci/iris: Enable piglit testing on AML-Y.
We use AML-Y since it's pretty fast and we have a bunch of boards running.
In exchange, to keep the farm from getting too busy, we disable
deqp-gles3/31 jobs by default, since the other gens get us pretty good
coverage.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11193>
Mike Blumenkrantz [Fri, 21 May 2021 10:50:01 +0000 (06:50 -0400)]
aux/cso: set flatshade_first onto vbuf when binding rasterizer
ensure this value is always updated
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10964>
Mike Blumenkrantz [Fri, 21 May 2021 10:29:54 +0000 (06:29 -0400)]
util/vbuf: add flatshade_first to vbuf context and api
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10964>
Mike Blumenkrantz [Fri, 21 May 2021 10:28:33 +0000 (06:28 -0400)]
util/primconvert: add function for setting flatshade_first
this is the value that needs to be set, not the actual rasterizer state
original function preserved to avoid driver changes
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10964>
Mike Blumenkrantz [Fri, 21 May 2021 09:26:51 +0000 (05:26 -0400)]
aux/cso: store flatshade_first state from rasterizer
this is necessary for handling index rewriting
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10964>
Jason Ekstrand [Fri, 11 Jun 2021 03:53:26 +0000 (22:53 -0500)]
i965: Use nir_lower_passthrough_edgeflags
Now that there's a common NIR pass, there's no point in us doing this in
the back-end anymore. In order to use this pass in i965, we do have to
make one tiny change. Gallium runs the pass after assigning input and
output locations and so needs the pass to respect those locations and
num_inputs. i965, however, runs it before any location assignment or
I/O lowering so we don't care. We do, however, need the pass to succeed
with num_inputs == 0 because we set that later.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11313>
Dave Airlie [Tue, 8 Jun 2021 02:58:18 +0000 (12:58 +1000)]
nir/edgeflags: update outputs written when lowering edge flags.
In theory you can rerun the info gather pass, but in practice that
doesn't always end well. Be consistent inside this pass and update the
info.
While we're here, change the inputs read to use VERT_BIT_EDGEFLAG.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11313>
Jason Ekstrand [Wed, 21 Feb 2018 18:08:31 +0000 (10:08 -0800)]
intel/isl: Use a 4D physical total extent for size calculations
With Yf and Ys tiling, everything is actually four dimensional because
we can have multiple depth or multisampled array slices in the same
tile. This commit just enhances the calculations so they can handle it.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Jason Ekstrand [Wed, 21 Feb 2018 17:37:01 +0000 (09:37 -0800)]
intel/isl: Make tile logical extents four dimensional
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Jason Ekstrand [Wed, 21 Feb 2018 10:53:14 +0000 (02:53 -0800)]
intel/isl: Make the offset helpers four dimensional
We need to do this in order to handle Yf and Ys tiling because they use
a four-dimensional tile instead of laying everything out in two
dimensions.
v2 (Jason Ekstrand):
- Update functions added since v1:
- isl_surf_get_image_range_B_tile
- blorp_can_hiz_clear_depth
- get_image_offset_el
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (v1)
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Jason Ekstrand [Wed, 21 Feb 2018 10:23:52 +0000 (02:23 -0800)]
intel/blorp: Use isl_surf_get_image_offset_B_tile_el in ccs_ambiguate
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Jason Ekstrand [Wed, 21 Feb 2018 10:22:41 +0000 (02:22 -0800)]
intel/isl: Add a isl_surf_get_image_offset_B_tile_el helper
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11330>
Emma Anholt [Thu, 10 Jun 2021 20:48:45 +0000 (13:48 -0700)]
ci/fastboot: Consistently restart the run on intermittent conditions.
Not currently on my list of intermittent issues, but let's be
resilient hopefully.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11308>
Emma Anholt [Thu, 10 Jun 2021 20:42:35 +0000 (13:42 -0700)]
ci/fastboot: Add a serial timeout to catch fastboot prompt failure.
The a530s will occasionally fail to make it to the fastboot prompt,
with no other deltas between a working log and a log stalled waiting
for that line to show up.
So, add a serial timeout (like the rpi boards do for similar reasons),
and on timeout restart the run. We actually restart the whole serial
watching process, because the SerialBuffer finishes itself on timeout.
This should also help with the intermittent issue we've had where a
power cycle causes the python serial module to throw an exception.
Tested with the gitlab-disabled db820c that never makes it to the
fastboot prompt (I think it's one where we need a longer micro cable
to connect it!) and saw successful boot looping to retry.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11308>
Chia-I Wu [Tue, 8 Jun 2021 23:56:13 +0000 (16:56 -0700)]
venus: document the darkest corner of venus
The "Optional Requirements" section is fine. The
"VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT" section details how venus goes
out-of-spec and becomes illegal.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11277>
Mike Blumenkrantz [Wed, 9 Jun 2021 21:28:30 +0000 (17:28 -0400)]
zink: fix typo that's definitely not at all embarrassing or anything like that
and also adjust some formatting to pad out the diff and really make sure nobody
notices that anything was ever amiss here
Fixes:
787412b7eb8 ("zink: break out region overlap testing function into helper")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11279>
Mike Blumenkrantz [Thu, 10 Jun 2021 20:51:39 +0000 (16:51 -0400)]
lavapipe: use cso caching
really this only needs cso_cache api, but it's cumbersome to redo all
the hashing and state creation, so just use the whole context
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11071>
Mike Blumenkrantz [Fri, 4 Jun 2021 13:18:02 +0000 (09:18 -0400)]
aux/cso: split cso_destroy_context into unbind and a destroy functions
this makes the unbind function reusable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11071>
Mike Blumenkrantz [Thu, 27 May 2021 15:19:38 +0000 (11:19 -0400)]
aux/cso: add flag to disable vbuf
it may be known in advance that vbuf shouldn't be used, so allow users
to skip this in case caps would otherwise enable it
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11071>
Mike Blumenkrantz [Fri, 11 Jun 2021 15:01:46 +0000 (11:01 -0400)]
zink: clamp PIPE_CAP_MAX_VIEWPORTS to PIPE_MAX_VIEWPORTS
this is all we need
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11322>
Hoe Hao Cheng [Fri, 11 Jun 2021 04:36:00 +0000 (12:36 +0800)]
zink: do not fail when EXT_calibrated_timestamps is unavailable
Fixes:
039078fe ("zink: slight refactor of load_device_extensions()")
Acked-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11314>
Mike Blumenkrantz [Thu, 10 Jun 2021 19:52:18 +0000 (15:52 -0400)]
zink: use scissor region for discarding clears during blit
ensure that clears aren't being mistakenly discarded or applied due to
scissor region being ignored and full surface geometry being used
Fixes:
a8e047e8f4a ("zink: discard pending clears during blit/copy if we'll overwrite the data")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11307>
Daniel Stone [Thu, 10 Jun 2021 23:13:30 +0000 (00:13 +0100)]
ci/lava: Avoid tee as it ruins exit status
I was today years old when I learned this about classic composable UNIX
tools:
~/mesa/mesa lava-submitter-overlay * % bash
[daniels@strictly mesa]$ set -e
[daniels@strictly mesa]$ false | tee
[daniels@strictly mesa]$ echo $?
0
Use tail rather than tee, so it doesn't hide our exit status.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 23:09:45 +0000 (00:09 +0100)]
ci/lava: Dump and artifact YAML again
Now it's safe to do so without leaking JWTs, dump the generated YAML to
make it easier to reproduce things.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 22:59:56 +0000 (23:59 +0100)]
ci/lava: Disable stdout/stderr buffering
Frequency of writes is unlikely to be a performance bottleneck, and
given the number of steps in between execution and the user, less
buffering is gooder.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 22:45:07 +0000 (23:45 +0100)]
ci/lava: Add explicit fatal-error handler
Truth is relative in 2021, and Python's duck-typing means truthiness
isn't what you think it is. Use an explicit fatal-error handler to make
sure we crash out hard on failure, rather than hoping sys.exit() behaves
like you think it does, because it doesn't.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 22:13:46 +0000 (23:13 +0100)]
ci/lava: Remove unused arguments
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 22:19:08 +0000 (23:19 +0100)]
ci/lava: Generate job name from lava-submit.sh
Just use the CI job name rather than open-coding the parameters.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 18:23:16 +0000 (19:23 +0100)]
ci/panfrost: Remove useless variable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 16:00:32 +0000 (17:00 +0100)]
ci/lava: Use per-job rootfs overlay for environment
Trying to get arbitrary strings suitably quoted for shell, embedded in a
YAML file, processed by Python templating, is like seven bad ideas all
embedded into one big can of bees.
Reuse the same script we use for bare-metal to generate the environment,
tar that up into a per-job overlay which is added to the
inter-pipeline-reusable rootfs built by the container jobs and the
intra-pipeline-reusable overlay built by the build jobs.
@anholt wrote a chunk of this - replacing the $ENV_VARS GitLab CI
variable with a Python loop across the POSIX job environment - in
!11192, but this still had YAML quoting nightmares, and was more
needless duplication between LAVA and bare-metal.
The diff is large and annoying, but is mostly a sed job to get
ENV_VARS="FOO=bar BAZ=quux" into FOO: bar\nBAZ: quux.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Co-authored-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 15:35:03 +0000 (16:35 +0100)]
ci: Use JOB_ARTIFACTS_BASE for Piglit fails
It's not Piglit-specific per se, it's just another per-job artifact
upload which needs to be made visible through MinIO.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 15:29:39 +0000 (16:29 +0100)]
ci: Add JOB_ARTIFACTS_BASE variable
Used for both LAVA (uploading results to MinIO because we don't yet have
non-ephemeral NFS storage) and Piglit (for the Tracie dashboard).
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 15:24:48 +0000 (16:24 +0100)]
ci: Make PIPELINE_ARTIFACTS_BASE a common variable
$minio/artifacts/$project/$pipeline/ is common between all our CI.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 13:53:57 +0000 (14:53 +0100)]
ci/lava: Clean up variable naming, document them
Our variable names haven't aged very well. Rename them to make them more
clear and straightforward, especially when we bring in a third rootfs
element to download.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 12:11:02 +0000 (13:11 +0100)]
ci/lava: Wrap submission in a shell script
Just do what we're already doing but in a shell script, which will make
it less tedious to expand out later.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 12:05:38 +0000 (13:05 +0100)]
ci/lava: Cosmetic reordering of job init
Split our init up into: base system setup (filesystem mounts, network),
pulling the build artifacts, environment common to us and bare-metal,
bespoke environment, and finally running the tests.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 10:26:38 +0000 (11:26 +0100)]
ci/lava: Pass JWT separately from environment variables
As the JWT is sensitive, we don't want to record or leak it anywhere.
Doing this lets us run --dump-yaml in normal execution so we can
artifact the result, as well as bringing us into line with bare-metal.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 10:10:10 +0000 (11:10 +0100)]
ci/lava: Move LAVA files to lava/
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 09:51:50 +0000 (10:51 +0100)]
ci/bare-metal: Don't leak JWT into logs
The JWT is sensitive - as it can be used to access e.g. private traces -
so we don't want it anywhere in our logs.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Daniel Stone [Thu, 10 Jun 2021 09:50:44 +0000 (10:50 +0100)]
ci/bare-metal: Factor out environment to a separate script
This will let us reuse the same environment generation for both
bare-metal and LAVA.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11309>
Erico Nunes [Thu, 10 Jun 2021 19:20:28 +0000 (21:20 +0200)]
meson: kmsro: require dri3 for X11
The current implementation in kmsro relies on buffer sharing using
WINSYS_HANDLE_TYPE_FD, which in x11 is only used by default when dri3
is enabled.
Since the current implementation will not work without it, we can
prevent user error by checking that it is not disabled at configuration
time.
Closes #4861
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11305>
Daniel Schürmann [Tue, 26 Jan 2021 18:05:23 +0000 (19:05 +0100)]
aco/ra: refactor register assignment for vector operands
No functional changes.
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8764>
Daniel Schürmann [Tue, 26 Jan 2021 17:49:58 +0000 (18:49 +0100)]
aco/ra: refactor affinity coalescing
Also adds v_interp_p2_f32 to the list of
affinity-related instructions.
Totals from 68 (0.05% of 149839) affected shaders (GFX10.3):
CodeSize: 792928 -> 792056 (-0.11%)
Instrs: 152843 -> 152625 (-0.14%)
Latency: 1235353 -> 1235278 (-0.01%)
InvThroughput: 224087 -> 224049 (-0.02%)
Copies: 9218 -> 9000 (-2.36%)
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8764>
Daniel Schürmann [Thu, 28 Jan 2021 15:52:28 +0000 (16:52 +0100)]
aco/ra: only create phi-affinities for killed operands
If a phi-operand is not killed, it must be copied anyway.
The additional affinity would only overwrite any potential
better affinity that was already created
Totals from 1067 (0.71% of 149839) affected shaders (GFX10.3):
VGPRs: 68072 -> 68064 (-0.01%)
CodeSize: 8252588 -> 8245220 (-0.09%); split: -0.12%, +0.03%
Instrs: 1596146 -> 1593941 (-0.14%); split: -0.16%, +0.02%
Latency:
18828176 ->
18823914 (-0.02%); split: -0.08%, +0.06%
InvThroughput: 3575063 -> 3574787 (-0.01%); split: -0.05%, +0.04%
VClause: 24345 -> 24325 (-0.08%); split: -0.16%, +0.07%
Copies: 88712 -> 87398 (-1.48%); split: -1.77%, +0.29%
Branches: 52067 -> 51364 (-1.35%); split: -1.38%, +0.03%
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8764>
Erik Faye-Lund [Wed, 9 Jun 2021 08:29:34 +0000 (10:29 +0200)]
zink: limit non-extension version feature to spirv 1.5
In order to use the Vulkan 1.2 core viewport and layer shader outputs,
we need to use SPIR-V 1.5. But we've recently added some preliminary
support to compute the SPIR-V version we're using, with the intention of
adding a SPIR-V version override to work around bugs in tools like
RenderDoc. We haven't implemented the latter yet.
But just to be safe, let's limit this to SPIR-V 1.5. This isn't going to
matter right now, but it might avoid a problem if we decide to finish up
the SPIR-V version overriding.
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11259>
Erik Faye-Lund [Thu, 3 Jun 2021 14:45:31 +0000 (16:45 +0200)]
zink: reject more illegal blits
Vulkan has some additional restrictions for vkCmdBlitImage that we
weren't testing for. Quting the Vulkan 1.2 spec, section 20.5 "Image
Copies with Scaling", "Valid Usage" subsection:
- If either of srcImage or dstImage was created with a signed integer
VkFormat, the other must also have been created with a signed integer
VkFormat
- If either of srcImage or dstImage was created with an unsigned integer
VkFormat, the other must also have been created with an unsigned
integer VkFormat.
So let's make sure we reject these illegal blits.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11217>
Erik Faye-Lund [Thu, 10 Jun 2021 06:25:18 +0000 (08:25 +0200)]
zink/ci: re-enable test
Since
f34ff037027 ("zink/ci: increase piglit and deqp-runner timeouts"),
we're no longer dangerously close to timing out this test, so it should
be safe to re-enable this.
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11288>
Erik Faye-Lund [Mon, 7 Jun 2021 14:06:15 +0000 (16:06 +0200)]
llvmpipe: do not always use pixel-rounded coordinates for points
LLVMpipe always used the bounding-box to rasterize-points, rather than
the actual rasterization-planes. This happened because the primitive was
expanded by one unit outside the bounding box. While this kinda work for
non-multisampled cases, it's not really quite *correct*.
Rasterization of non-legacy points in OpenGL is defined as the
intersection of a the pixel centers with a rectangle of size width and
height, centered around the point in viewport coordinates. This applies
both to multi-sampled and non-multisampled cases.
So let's fix the rasterizer to use the correct definition in both cases.
We leave the legacy case as-is, and just do the inverse adjustment
there so the end result should be the same.
This fixes the following dEQP test-cases:
- dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_4.primitives.points
- dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.points
...as well as this one for Lavapipe:
- dEQP-VK.rasterization.primitives_multisample_4_bit.no_stipple.points
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11183>
Erik Faye-Lund [Fri, 4 Jun 2021 11:42:25 +0000 (13:42 +0200)]
llvmpipe: fix multisample lines again
This does a little bit better than what we did in
2c0a078fdb4
("llvmpipe: fix multisample lines."), where parts of the diamond-exit
rule stuff was bypassed. But we should actually bypass *all* of the
diamond-exit rule stuff here instead.
The reason is that multisampled lines have a completely differently
specified set of rasterization rules, as per the OpenGL 4.6 core spec,
section 14.5.4 ("Line Multisample Rasterization").
So let's give multisampled lines their own geometry-generation codepath
instead.
This fixes the following dEQP tests:
- dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_4.primitives.lines
- dEQP-GLES3.functional.rasterization.fbo.rbo_multisample_max.primitives.lines
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11183>
Erik Faye-Lund [Wed, 9 Jun 2021 08:55:44 +0000 (10:55 +0200)]
llvmpipe: consistently deal with post-rast state
There's no good reason why we peek into the rasterization state when
dealing with the point_quad_rasterization state, rather than set it
through lp_setup_set_point_state like other point-state.
Let's fix this up, and get rid of a needless NULL-check per primitive.
This makes the code a bit easier to read as well, and will help once
these conditions gets more complicated later on.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11183>
Erik Faye-Lund [Tue, 8 Jun 2021 11:20:59 +0000 (13:20 +0200)]
llvmpipe: fix edge-rule logic for lines
In
2737abb44ef, the handling of pixel-offsets and edge rules were
untangled, but one case was missed.
This fixes the following dEQP test-cases on VirGL + LLVMpipe
- dEQP-GLES2.functional.draw.random.10
- dEQP-GLES2.functional.draw.random.42
- dEQP-GLES3.functional.draw.random.105
- dEQP-GLES3.functional.draw.random.114
- dEQP-GLES3.functional.draw.random.135
- dEQP-GLES3.functional.draw.random.144
- dEQP-GLES3.functional.draw.random.155
- dEQP-GLES3.functional.draw.random.174
- dEQP-GLES3.functional.draw.random.206
- dEQP-GLES3.functional.draw.random.31
- dEQP-GLES3.functional.draw.random.43
- dEQP-GLES3.functional.draw.random.84
- dEQP-GLES31.functional.draw_indirect.random.20
...as well as these on Zink + Lavapipe:
- spec@nv_primitive_restart@primitive-restart-disable_vbo
- spec@nv_primitive_restart@primitive-restart-vbo_combined_vertex_and_index
- spec@nv_primitive_restart@primitive-restart-vbo_index_only
- spec@nv_primitive_restart@primitive-restart-vbo_separate_vertex_and_index
- spec@nv_primitive_restart@primitive-restart-vbo_vertex_only
Fixes:
2737abb44ef ("gallium: Replace gl_rasterization_rules with lower_left_origin and half_pixel_center.")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11183>
Yiwei Zhang [Fri, 4 Jun 2021 05:56:38 +0000 (05:56 +0000)]
virgl: forward the host renderer hardware info
Some game engines rely on the real hardware info to adjust default
graphics quality and other attributes.
Prepend "virgl" to avoid app compat issues and to distinguish from
native platforms while giving engines/apps a chance to adjust graphics
defaults.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11179>
Georg Lehmann [Thu, 10 Jun 2021 10:47:51 +0000 (12:47 +0200)]
ac: Enable 32bit predication on gfx9 with fw feature version 52.
Amdvlk does this as well and it passes the vulkan CTS on renoir.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11297>
Georg Lehmann [Thu, 10 Jun 2021 12:14:24 +0000 (14:14 +0200)]
ac: Enable 32bit predication on gfx10.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11297>
Georg Lehmann [Thu, 10 Jun 2021 10:46:22 +0000 (12:46 +0200)]
ac: Check me_fw_feature for 32bit predication on gfx10.3
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11297>
Samuel Pitoiset [Thu, 10 Jun 2021 16:20:19 +0000 (18:20 +0200)]
radv: fix aligning the image offset by using align64()
This doesn't fix anything known. Found by inspection.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11302>
Mike Blumenkrantz [Mon, 10 May 2021 11:37:09 +0000 (07:37 -0400)]
util/disk_cache: add nocopy variant of disk cache store function
this is a bit more convenient in some cases
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11304>
Yiwei Zhang [Thu, 10 Jun 2021 04:23:40 +0000 (04:23 +0000)]
egl/android: add aosp_nougat system/window.h back for back compat
Also layer ANativeWindow_* APIs on top of legacy APIs for api level less
than 26 in a new platform_android.h header.
v2: persist frozen system/window.h header
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Rob Clark <robdclark@chromium.org> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11286>
Rob Clark [Thu, 10 Jun 2021 19:33:32 +0000 (12:33 -0700)]
docs: Update freedreno features
Bring features.txt a bit more up to date.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11311>
Rob Clark [Thu, 10 Jun 2021 21:20:36 +0000 (14:20 -0700)]
freedreno: Add missing valid range tracking for SSBOs/images
Normally TC takes care of this for us. But we might as well not get it
wrong in cases where TC is disabled.
Reported-by: Alyssa Rosenzweig <alyssa@collabora.com>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11311>