platform/kernel/linux-starfive.git
7 years agodrm/nouveau/gr/nv50-mcp89: add defines for gr classes
Ben Skeggs [Wed, 21 Dec 2016 02:46:50 +0000 (12:46 +1000)]
drm/nouveau/gr/nv50-mcp89: add defines for gr classes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/gr/gf100-: fix ccache error logging
Ben Skeggs [Thu, 22 Dec 2016 00:07:49 +0000 (10:07 +1000)]
drm/nouveau/gr/gf100-: fix ccache error logging

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/disp/g94: remove unused sor implementation
Ben Skeggs [Thu, 22 Dec 2016 00:07:27 +0000 (10:07 +1000)]
drm/nouveau/disp/g94: remove unused sor implementation

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/fb/ram/gk104: remove unused best_clk variable
Ben Skeggs [Thu, 22 Dec 2016 00:06:54 +0000 (10:06 +1000)]
drm/nouveau/fb/ram/gk104: remove unused best_clk variable

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: clear halt interrupt after ACR is run
Alexandre Courbot [Wed, 14 Dec 2016 08:02:52 +0000 (17:02 +0900)]
drm/nouveau/secboot: clear halt interrupt after ACR is run

The halt interrupt must be cleared after ACR is run, otherwise the LS
PMU firmware will not be able to run.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: add lazy-bootstrap flag
Alexandre Courbot [Wed, 14 Dec 2016 08:02:50 +0000 (17:02 +0900)]
drm/nouveau/secboot: add lazy-bootstrap flag

When the PMU firmware is present, the falcons it manages need to have
the lazy-bootstrap flag of their WPR header set so the ACR does not boot
them. Add support for this.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: fix WPR descriptor generation
Alexandre Courbot [Wed, 14 Dec 2016 08:02:49 +0000 (17:02 +0900)]
drm/nouveau/secboot: fix WPR descriptor generation

Generate the WPR descriptor closer to what RM does. In particular, set
the expected masks, and only set the ucode members on Tegra.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: set default error value in error register
Alexandre Courbot [Wed, 14 Dec 2016 08:02:48 +0000 (17:02 +0900)]
drm/nouveau/secboot: set default error value in error register

Set a default error value in the mailbox 0 register so we can catch
cases where the secure boot binary fails early without being able to
report anything.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: add missing fields to BL structure
Alexandre Courbot [Wed, 14 Dec 2016 08:02:47 +0000 (17:02 +0900)]
drm/nouveau/secboot: add missing fields to BL structure

Since DMEM was initialized to zero, these fields went unnoticed. Add
them for safety.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: safer zeroing of BL descriptors
Alexandre Courbot [Wed, 14 Dec 2016 08:02:46 +0000 (17:02 +0900)]
drm/nouveau/secboot: safer zeroing of BL descriptors

Perform the zeroing of BL descriptors in the caller function instead of
trusting each generator will do it. This could avoid a few pulled hairs.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: abstract LS firmware loading functions
Alexandre Courbot [Wed, 14 Dec 2016 08:02:45 +0000 (17:02 +0900)]
drm/nouveau/secboot: abstract LS firmware loading functions

The WPR and LSB headers, used to generate the LS blob, may have a
different layout and sizes depending on the driver version they come
from. Abstract them and confine their use to driver-specific code.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: remove ls_ucode_mgr
Alexandre Courbot [Wed, 14 Dec 2016 08:02:44 +0000 (17:02 +0900)]
drm/nouveau/secboot: remove ls_ucode_mgr

This was used only locally to one function and can be replaced by ad-hoc
variables.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: remove unneeded ls_ucode_img member
Alexandre Courbot [Wed, 14 Dec 2016 08:02:43 +0000 (17:02 +0900)]
drm/nouveau/secboot: remove unneeded ls_ucode_img member

ucode_header is not used anywhere, so just get rid of it.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: disable falcon interrupts when running blob
Alexandre Courbot [Wed, 14 Dec 2016 08:02:42 +0000 (17:02 +0900)]
drm/nouveau/secboot: disable falcon interrupts when running blob

Make sure we are not disturbed by spurious interrupts, as we poll the
halt bit anyway.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: split reset function
Alexandre Courbot [Wed, 14 Dec 2016 08:02:41 +0000 (17:02 +0900)]
drm/nouveau/secboot: split reset function

Split the reset function into more meaningful and reusable ones.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: add LS flags to LS func structure
Alexandre Courbot [Wed, 14 Dec 2016 08:02:40 +0000 (17:02 +0900)]
drm/nouveau/secboot: add LS flags to LS func structure

Add a flag that can be set when declaring how a LS firmware should be
loaded. This allows us to remove falcon-specific code in the loader.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: reorganize into more files
Alexandre Courbot [Wed, 14 Dec 2016 08:02:39 +0000 (17:02 +0900)]
drm/nouveau/secboot: reorganize into more files

Split the act of building the ACR blob from firmware files from the rest
of the (chip-dependent) secure boot logic. ACR logic is moved into
acr_rxxx.c files, where rxxx corresponds to the compatible release of
the NVIDIA driver. At the moment r352 and r361 are supported since
firmwares have been released for these versions. Some abstractions are
added on top of r352 so r361 can easily be implemented on top of it by
just overriding a few hooks.

This split makes it possible and easy to reuse the same ACR version on
different chips. It also hopefully makes the code much more readable as
the different secure boot logics are separated. As more chips and
firmware versions will be supported, this is a necessity to not get lost
in code that is already quite complex.

This is a big commit, but it essentially moves things around (and split
the nvkm_secboot structure into two, nvkm_secboot and nvkm_acr). Code
semantics should not be affected.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: generate HS BL descriptor in hook
Alexandre Courbot [Wed, 14 Dec 2016 08:02:38 +0000 (17:02 +0900)]
drm/nouveau/secboot: generate HS BL descriptor in hook

Use the HS hook to completely generate the HS BL descriptor, similarly
to what is done in the LS hook, instead of (arbitrarily) using the
acr_v1 format as an intermediate.

This allows us to make the bootloader descriptor structures private to
each implementation, resulting in a cleaner an more consistent design.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: add low-secure firmware hooks
Alexandre Courbot [Wed, 14 Dec 2016 08:02:37 +0000 (17:02 +0900)]
drm/nouveau/secboot: add low-secure firmware hooks

Secure firmwares provided by NVIDIA will follow the same overall
principle, but may slightly differ in format, or not use the same
bootloader descriptor even on the same chip. In order to handle
this as gracefully as possible, turn the LS firmware functions into
hooks that can be overloaded as needed.

The current hooks cover the external firmware loading as well as the
bootloader descriptor generation.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: remove fixup_hs_desc hook
Alexandre Courbot [Wed, 14 Dec 2016 08:02:36 +0000 (17:02 +0900)]
drm/nouveau/secboot: remove fixup_hs_desc hook

This hook can be removed if the function writing the HS
descriptor is aware of WPR settings. Let's do that as it allows us to
make the ACR descriptor structure private and save some code.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: rename init() hook to oneinit()
Alexandre Courbot [Wed, 14 Dec 2016 08:02:35 +0000 (17:02 +0900)]
drm/nouveau/secboot: rename init() hook to oneinit()

The init() hook is called by the subdev's oneinit(). Rename it
accordingly to avoid confusion about the lifetime of objects allocated
in it.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: remove nvkm_secboot_start()
Alexandre Courbot [Tue, 13 Dec 2016 08:11:31 +0000 (17:11 +0900)]
drm/nouveau/secboot: remove nvkm_secboot_start()

Since GR has moved to using the falcon library to start the falcons,
this function is not needed anymore.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/gr/gf100: instantiate and reserve GR falcons
Alexandre Courbot [Tue, 13 Dec 2016 08:11:30 +0000 (17:11 +0900)]
drm/nouveau/gr/gf100: instantiate and reserve GR falcons

Create instances for the FECS and GPCCS falcons and use the init() and
fini() hooks to reserve them for as long as GR controls them.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/gr/gf100: split gf100_gr_init_ctxctl()
Alexandre Courbot [Tue, 13 Dec 2016 08:11:29 +0000 (17:11 +0900)]
drm/nouveau/gr/gf100: split gf100_gr_init_ctxctl()

gf100_gr_init_ctxctl() is basically two different functions (one for
use of internal firmware, the other for use of external firmware), but
its current layout makes it look more complex than it is. Split it to
better reflect that fact.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/gr: add fini() hook
Alexandre Courbot [Tue, 13 Dec 2016 08:11:28 +0000 (17:11 +0900)]
drm/nouveau/gr: add fini() hook

Add a fini() hook to the GR engine. This will be used by gf100+ to
properly release the FECS and GPCCS falcons.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: use falcon library
Alexandre Courbot [Tue, 13 Dec 2016 08:11:27 +0000 (17:11 +0900)]
drm/nouveau/secboot: use falcon library

Use the falcon library functions in secure boot. This removes a lot of
code and makes the secure boot flow easier to understand as no register
is directly accessed.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/secboot: fix functions definitions
Alexandre Courbot [Tue, 13 Dec 2016 08:11:26 +0000 (17:11 +0900)]
drm/nouveau/secboot: fix functions definitions

These functions should use the nvkm_secboot_falcon enum. Fix this.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/gm20b: add dummy PMU device
Alexandre Courbot [Tue, 13 Dec 2016 08:11:25 +0000 (17:11 +0900)]
drm/nouveau/gm20b: add dummy PMU device

Add a dummy PMU device so the PMU falcon is instanciated and can be used
by secure boot.

We could reuse gk20a's implementation here, but it would fight with
secboot over PMU falcon's ownership and secboot will reset the PMU,
preventing it from operating afterwards. Proper handout between secboot
and pmu is coming along with the actual gm20b PMU implementation, so
use this as a temporary solution.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/pmu/gk20a: use falcon library functions
Alexandre Courbot [Tue, 13 Dec 2016 08:11:24 +0000 (17:11 +0900)]
drm/nouveau/pmu/gk20a: use falcon library functions

Use the falcon library functions where relevant.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/pmu/gk20a: simplify code a bit
Alexandre Courbot [Tue, 13 Dec 2016 08:11:23 +0000 (17:11 +0900)]
drm/nouveau/pmu/gk20a: simplify code a bit

Some functions always succeed - change their return type to void and
remove the error-handling code in their caller.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/pmu/gk20a: use nvkm_pmu_ctor()
Alexandre Courbot [Tue, 13 Dec 2016 08:11:22 +0000 (17:11 +0900)]
drm/nouveau/pmu/gk20a: use nvkm_pmu_ctor()

Use the PMU constructor so that all base members (in particular the
falcon instance) are initialized properly.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/pmu: instanciate the falcon in PMU device
Alexandre Courbot [Tue, 13 Dec 2016 08:11:20 +0000 (17:11 +0900)]
drm/nouveau/pmu: instanciate the falcon in PMU device

Have an instance of nvkm_falcon in the PMU structure, ready to be used
by other subdevs (i.e. secboot).

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/pmu: add nvkm_pmu_ctor() function
Alexandre Courbot [Tue, 13 Dec 2016 08:11:21 +0000 (17:11 +0900)]
drm/nouveau/pmu: add nvkm_pmu_ctor() function

Add a PMU constructor so implementations that extend the nvkm_pmu
structure can have all base members properly initialized.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/core: add falcon library functions
Alexandre Courbot [Tue, 13 Dec 2016 08:11:19 +0000 (17:11 +0900)]
drm/nouveau/core: add falcon library functions

Falcon processors are used in various places of GPU chips. Although there
exist different versions of the falcon, and some variants exist, the
base set of actions performed on them is the same, which results in lots
of duplicated code.

This patch consolidates the current nvkm_falcon structure and extends it
with the following features:

* Ability for an engine to obtain and later release a given falcon,
* Abstractions for basic operations (IMEM/DMEM access, start, etc)
* Abstractions for secure operations if a falcon is secure

Abstractions make it easy to e.g. start a falcon, without having to care
about its details. For instance, falcons in secure mode need to be
started by writing to a different register.

Right now the abstractions variants only cover secure vs. non-secure
falcon, but more will come as e.g. SEC2 support is added.

This is still a WIP as other functions previously done by
engine/falcon.c need to be reimplemented. However this first step allows
to keep things simple and to discuss basic design.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/mc: add nvkm_mc_enabled() function
Alexandre Courbot [Tue, 13 Dec 2016 08:11:18 +0000 (17:11 +0900)]
drm/nouveau/mc: add nvkm_mc_enabled() function

Add a function that allows us to query whether a given subdev is
currently enabled or not.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agodrm/nouveau/core: constify nv*_printk macros
Alexandre Courbot [Tue, 13 Dec 2016 08:11:17 +0000 (17:11 +0900)]
drm/nouveau/core: constify nv*_printk macros

Constify the local variables declared in these macros so we can pass
const pointers to them.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
7 years agoRevert "drm: Resurrect atomic rmfb code, v3"
Dave Airlie [Fri, 17 Feb 2017 02:38:46 +0000 (12:38 +1000)]
Revert "drm: Resurrect atomic rmfb code, v3"

This reverts commit 1592364de3912dad264262f4bcc61552984c9523.

This apparantly causes some regressions so pull it out for now.

Signed-off-by: Dave Airlie <airlied@redhat.com>
7 years agoMerge tag 'omapdrm-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba...
Dave Airlie [Fri, 17 Feb 2017 02:04:09 +0000 (12:04 +1000)]
Merge tag 'omapdrm-4.11-fixes' of git://git./linux/kernel/git/tomba/linux into drm-next

omapdrm fixes for v4.11

Fix regressions:
- Planes might have been left enabled
- Scaling checks did not use the new config

Also limit downscaling decimation to prevent HW underflows.

* tag 'omapdrm-4.11-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux:
  drm/omapdrm: dispc: Refuse x-decimation above 4 for all but 8-bit formats
  drm/omapdrm: Move commit_modeset_enables() before commit_planes()
  Revert "drm: omapdrm: Let the DRM core skip plane commit on inactive CRTCs"

7 years agoMerge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Fri, 17 Feb 2017 01:55:12 +0000 (11:55 +1000)]
Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next

Fixes for 4.11. Highlights:
- fix >2 displays on asics with 3 or 5 crtcs
- fix SI headless asics
- powerplay fixes for new polaris variants
- misc fixes

* 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: fix warning on older gcc releases
  drm/ttm: make TTM_MAX_BO_PRIORITY unsigned
  drm/amd/amdgpu: Fix flow control in uvd_v4_2_stop()
  drm/amd/powerplay: add didt config table for polaris kicker
  drm/amd/powerplay: modify VddcPhase value for polaris kicker
  drm/amd/powerplay: add kicker flag into smumgr
  drm/amdgpu: Initialize pipe priority order on graphic initialization
  drm/amdgpu: read hw register to check pg status.
  drm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL register
  drm/amdgpu/pm: check for headless before calling compute_clocks
  drm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm()
  drm/amdgpu: add more cases to DCE11 possible crtc mask setup

7 years agodrm/amdgpu: fix warning on older gcc releases
Arnd Bergmann [Fri, 3 Feb 2017 16:47:26 +0000 (17:47 +0100)]
drm/amdgpu: fix warning on older gcc releases

gcc-4.8 warns about '{0}' being used an an initializer for nested structures:

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function ‘gfx_v8_0_ring_emit_ce_meta_init’:
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:7263:2: warning: missing braces around initializer [-Wmissing-braces]
  } ce_payload = {0};
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function ‘gfx_v8_0_ring_emit_de_meta_init’:
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:7290:2: warning: missing braces around initializer [-Wmissing-braces]
  } de_payload = {0};

Using an empty {} initializer however has the same effect and works on all versions.

Fixes: acad2b2a7b70 ("drm/amdgpu:implement CE/DE meta-init routines")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: make TTM_MAX_BO_PRIORITY unsigned
Nicolai Hähnle [Tue, 14 Feb 2017 10:06:52 +0000 (11:06 +0100)]
drm/ttm: make TTM_MAX_BO_PRIORITY unsigned

Fix a warning about different types in min() macro in amdgpu:

In file included from ./include/linux/list.h:8:0,
                 from drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:32:
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c: In function ‘amdgpu_bo_create_restricted’:
./include/linux/kernel.h:739:16: warning: comparison of distinct pointer types lacks a cast
  (void) (&min1 == &min2);   \
                ^
./include/linux/kernel.h:742:2: note: in expansion of macro ‘__min’
  __min(typeof(x), typeof(y),   \
  ^~~~~
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:434:21: note: in expansion of macro ‘min’
  bo->tbo.priority = min(bo->tbo.priority, TTM_MAX_BO_PRIORITY - 1);
                     ^~~

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Fix flow control in uvd_v4_2_stop()
Tom St Denis [Mon, 13 Feb 2017 19:11:40 +0000 (14:11 -0500)]
drm/amd/amdgpu: Fix flow control in uvd_v4_2_stop()

Break out of outer loop properly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add didt config table for polaris kicker
Huang Rui [Mon, 13 Feb 2017 02:38:08 +0000 (10:38 +0800)]
drm/amd/powerplay: add didt config table for polaris kicker

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: modify VddcPhase value for polaris kicker
Huang Rui [Fri, 10 Feb 2017 08:55:18 +0000 (16:55 +0800)]
drm/amd/powerplay: modify VddcPhase value for polaris kicker

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add kicker flag into smumgr
Huang Rui [Fri, 10 Feb 2017 08:42:19 +0000 (16:42 +0800)]
drm/amd/powerplay: add kicker flag into smumgr

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/omapdrm: dispc: Refuse x-decimation above 4 for all but 8-bit formats
Jyri Sarha [Wed, 8 Feb 2017 14:08:06 +0000 (16:08 +0200)]
drm/omapdrm: dispc: Refuse x-decimation above 4 for all but 8-bit formats

Let's disable all scaling that requires horizontal decimation with
higher factor than 4, until we have better estimates of what we can
and can not do. However, NV12 color format appears to work Ok with
all decimation factors.

When decimating horizontally by more that 4 the dss is not able to
fetch the data in burst mode. When this happens it is hard to tell if
there enough bandwidth. Despite what theory says this appears to be
true also for 16-bit color formats.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
7 years agodrm/omapdrm: Move commit_modeset_enables() before commit_planes()
Jyri Sarha [Fri, 27 Jan 2017 10:04:55 +0000 (12:04 +0200)]
drm/omapdrm: Move commit_modeset_enables() before commit_planes()

Move drm_atomic_helper_commit_modeset_enables() call to before
drm_atomic_helper_commit_planes() call and have a
omap_atomic_wait_for_completion() call after both.

With the current dss dispc implementation we have to enable the new
modeset before we can commit planes. The dispc ovl configuration
relies on the video mode configuration been written into the HW when
the ovl configuration is calculated.

This approach is not ideal because after a mode change the plane
update is executed only after the first vblank interrupt. The dispc
implementation should be fixed so that it is able use uncommitted drm
state information.  information.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
7 years agoRevert "drm: omapdrm: Let the DRM core skip plane commit on inactive CRTCs"
Jyri Sarha [Fri, 27 Jan 2017 10:04:54 +0000 (12:04 +0200)]
Revert "drm: omapdrm: Let the DRM core skip plane commit on inactive CRTCs"

This reverts commit dadf4659d0608e034b6633f30300c2eff2dafb4c.

If planes are not disabled when the they are not on any crtc anymore
they will remain active and may show as "ghosts" when the crtc they
were last on is active again.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
7 years agoMerge branch 'drm-rockchip-next-2017-02-16' of https://github.com/markyzq/kernel...
Dave Airlie [Thu, 16 Feb 2017 03:57:37 +0000 (13:57 +1000)]
Merge branch 'drm-rockchip-next-2017-02-16' of https://github.com/markyzq/kernel-drm-rockchip into drm-next

Use iommu for rockchip arm64 platform.

* 'drm-rockchip-next-2017-02-16' of https://github.com/markyzq/kernel-drm-rockchip:
  drm/rockchip: Use common IOMMU API to attach devices
  drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain

7 years agoMerge tag 'drm-misc-next-fixes-2017-02-15' of git://anongit.freedesktop.org/git/drm...
Dave Airlie [Thu, 16 Feb 2017 03:27:55 +0000 (13:27 +1000)]
Merge tag 'drm-misc-next-fixes-2017-02-15' of git://anongit.freedesktop.org/git/drm-misc into drm-next

Fixes for the v4.11 merge window.

* tag 'drm-misc-next-fixes-2017-02-15' of git://anongit.freedesktop.org/git/drm-misc:
  drm: Resurrect atomic rmfb code, v3
  uapi: add missing install of dma-buf.h

7 years agoMerge tag 'sti-drm-next-2017-02-10' of https://github.com/vinceab/linux into drm...
Dave Airlie [Thu, 16 Feb 2017 03:27:24 +0000 (13:27 +1000)]
Merge tag 'sti-drm-next-2017-02-10' of https://github.com/vinceab/linux into drm-next

- remove deprecated stih416 chip functionnalities
- fix issues met around gdp panes
- fix STI driver unbind procedure
- DVI/HDMI mode is automatically detected
- allow fps statisitics resetting

* tag 'sti-drm-next-2017-02-10' of https://github.com/vinceab/linux:
  drm/sti: debug fps reset
  drm/sti: hdmi: automatically check DVI/HDMI mode
  drm/sti: unbind all components while driver cleanup
  drm/sti: do not post GDP command if no update
  drm/sti: do not set gdp pixel clock rate if mode is not set
  drm/sti: enable gdp pixel clock in atomic_update
  drm/sti: remove deprecated legacy vtg slave
  drm/sti: remove deprecated sink_term config
  drm/sti: do not check hw scaling if mode is not set
  drm/sti: Fix up crtc_state->event handling
  drm/sti: use atomic_helper for commit

7 years agodrm: Resurrect atomic rmfb code, v3
Maarten Lankhorst [Wed, 25 Jan 2017 11:30:47 +0000 (12:30 +0100)]
drm: Resurrect atomic rmfb code, v3

This was somehow lost between v3 and the merged version in Maarten's
patch merged as:

commit f2d580b9a8149735cbc4b59c4a8df60173658140
Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Date:   Wed May 4 14:38:26 2016 +0200

    drm/core: Do not preserve framebuffer on rmfb, v4.

This introduces a slight behavioral change to rmfb. Instead of
disabling a crtc when the primary plane is disabled, we try to
preserve it.

Apart from old versions of the vmwgfx xorg driver, there is
nothing depending on rmfb disabling a crtc. Since vmwgfx is
a legacy driver we can safely only disable the plane with atomic.

If this commit is rejected by the driver then we will still fall
back to the old behavior and turn off the crtc.

v2:
- Remove plane->fb assignment, done by drm_atomic_clean_old_fb.
- Add WARN_ON when atomic_remove_fb fails.
- Always call drm_atomic_state_put.
v3:
- Use drm_drv_uses_atomic_modeset
- Handle the case where the first plane-disable-only commit fails
  with -EINVAL. Some drivers do not support this, fall back to
  disabling all crtc's in this case.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/66fc3da5-697b-1613-0a67-a5293209f0dc@linux.intel.com
7 years agodrm/rockchip: Use common IOMMU API to attach devices
Shunqian Zheng [Fri, 24 Jun 2016 02:13:32 +0000 (10:13 +0800)]
drm/rockchip: Use common IOMMU API to attach devices

Rockchip DRM used the arm special API, arm_iommu_*(), to attach
iommu for ARM32 SoCs. This patch convert to common iommu API
so it would support ARM64 like RK3399.

Since previous patch added support for direct IOMMU address space
management, there is no need to use DMA API anymore and this patch wires
things to use the new method.

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
7 years agodrm/rockchip: Do not use DMA mapping API if attached to IOMMU domain
Tomasz Figa [Fri, 24 Jun 2016 02:13:31 +0000 (10:13 +0800)]
drm/rockchip: Do not use DMA mapping API if attached to IOMMU domain

The API is not suitable for subsystems consisting of multiple devices
and requires severe hacks to use it. To mitigate this, this patch
implements allocation and address space management locally by using
helpers provided by DRM framework, like other DRM drivers do, e.g.
Tegra.

This patch should not introduce any functional changes until the driver
is made to attach subdevices into an IOMMU domain with the generic IOMMU
API, which will happen in following patch. Based heavily on GEM
implementation of Tegra DRM driver.

Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: rjan Eide <orjan.eide@arm.com>
7 years agouapi: add missing install of dma-buf.h
Denys Dmytriyenko [Tue, 14 Feb 2017 20:00:47 +0000 (15:00 -0500)]
uapi: add missing install of dma-buf.h

As part of c11e391da2a8fe973c3c2398452000bed505851e "dma-buf: Add ioctls to
allow userspace to flush" a new uapi header file dma-buf.h was added, but an
entry was not added on Kbuild to install it. This patch resolves this omission
so that "make headers_install" installs this header.

Signed-off-by: Denys Dmytriyenko <denys@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: David Herrmann <dh.herrmann@gmail.com>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Tiago Vignatti <tiago.vignatti@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1487102447-59265-1-git-send-email-denis@denix.org
7 years agodrm/amdgpu: Initialize pipe priority order on graphic initialization
ozeng [Fri, 10 Feb 2017 23:55:36 +0000 (17:55 -0600)]
drm/amdgpu: Initialize pipe priority order on graphic initialization

Initialized PIPE_ORDER_TS0/1/2/3 field of SPI_ARB_PRIORITY register to 2.
This set the pipe priority order to:
02 - HP3D, CS_H, GFX, CS_M, CS_L

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: read hw register to check pg status.
Rex Zhu [Wed, 8 Feb 2017 09:17:55 +0000 (17:17 +0800)]
drm/amdgpu: read hw register to check pg status.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL register
Alan Harrison [Thu, 9 Feb 2017 21:01:57 +0000 (16:01 -0500)]
drm/amdgpu: Add to initialization of mmVCE_VCPU_CNTL register

Add a bit needed during initialization into the driver, where it is supposed
to be.  Currently, this is happening in the VCE firmware, and although
functional, this is the correct place to perform this initialization.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alan Harrison <Alan.Harrison@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/pm: check for headless before calling compute_clocks
Alex Deucher [Fri, 10 Feb 2017 23:09:32 +0000 (18:09 -0500)]
drm/amdgpu/pm: check for headless before calling compute_clocks

Don't update display bandwidth on headless asics.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=99387

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
7 years agodrm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm()
Samuel Pitoiset [Thu, 9 Feb 2017 22:28:24 +0000 (23:28 +0100)]
drm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm()

This removes code duplication.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add more cases to DCE11 possible crtc mask setup
Alex Deucher [Fri, 10 Feb 2017 05:00:52 +0000 (00:00 -0500)]
drm/amdgpu: add more cases to DCE11 possible crtc mask setup

Add cases for asics with 3 and 5 crtcs.  Fixes an artificial
limitation on asics with 3 or 5 crtcs.

Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=99744

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
7 years agodrm/sti: debug fps reset
Vincent Abriou [Thu, 2 Feb 2017 08:58:39 +0000 (09:58 +0100)]
drm/sti: debug fps reset

Reset the fps debug information when 'fps_show' is updated.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
7 years agodrm/sti: hdmi: automatically check DVI/HDMI mode
Vincent Abriou [Thu, 2 Feb 2017 08:45:48 +0000 (09:45 +0100)]
drm/sti: hdmi: automatically check DVI/HDMI mode

Remove the hdmi_mode_property and use drm_detect_hdmi_monitor function
to check whether the connected monitor is HDMI capable or DVI only.

Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
7 years agodrm/sti: unbind all components while driver cleanup
Vincent Abriou [Thu, 2 Feb 2017 08:51:43 +0000 (09:51 +0100)]
drm/sti: unbind all components while driver cleanup

Unbind all the components when the STI driver is unregistered.

Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
7 years agodrm/sti: do not post GDP command if no update
Vincent Abriou [Thu, 2 Feb 2017 08:50:48 +0000 (09:50 +0100)]
drm/sti: do not post GDP command if no update

Do not process update requests with unmodified parameters.

This typically happens when the driver is called with legacy
(non-atomic) IOCTL : in that case atomic_update() is called multiple
times with the same parameters.

Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
7 years agodrm/sti: do not set gdp pixel clock rate if mode is not set
Vincent Abriou [Thu, 2 Feb 2017 08:49:02 +0000 (09:49 +0100)]
drm/sti: do not set gdp pixel clock rate if mode is not set

Fix a division by 0 case : in some cases, when the GDP plane is being
disabled atomic_check() is called with "mode->clock = 0".
In that case, do not set parent and pixel clock rate.

Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
7 years agodrm/sti: enable gdp pixel clock in atomic_update
Vincent Abriou [Thu, 2 Feb 2017 08:47:32 +0000 (09:47 +0100)]
drm/sti: enable gdp pixel clock in atomic_update

Set gdp pix clock rate and parent in atomic_check function and enable
it in the atomic_update only the first time.

Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
7 years agodrm/sti: remove deprecated legacy vtg slave
Vincent Abriou [Thu, 2 Feb 2017 08:52:32 +0000 (09:52 +0100)]
drm/sti: remove deprecated legacy vtg slave

stih416 chip family is no more supported in Linux v4.9.
It is then useless to keep vtg slave field since it not used at all for
the stih407/10 chip family supported by sti driver.

Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
7 years agodrm/sti: remove deprecated sink_term config
Vincent Abriou [Wed, 1 Feb 2017 17:04:00 +0000 (18:04 +0100)]
drm/sti: remove deprecated sink_term config

stih416 chip family is no more supported in Linux v4.9.
Then sink_term config becomes useless. The field of the
register it was referring to is tag as reserved for stih410
chip family.

Signed-off-by: Vincent Abriou <vincent.abriou@st.com>
7 years agodrm/sti: do not check hw scaling if mode is not set
Fabien DESSENNE [Thu, 12 Jan 2017 16:27:37 +0000 (17:27 +0100)]
drm/sti: do not check hw scaling if mode is not set

Fix a division by 0 case : in some cases, when the HQVDP plane is being
disabled atomic_check() is called with "mode->clock = 0".
In that case, do not check for scaling capabilities.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Acked-by: Vincent Abriou <vincent.abriou@st.com>
7 years agodrm/sti: Fix up crtc_state->event handling
Fabien DESSENNE [Thu, 12 Jan 2017 16:27:36 +0000 (17:27 +0100)]
drm/sti: Fix up crtc_state->event handling

Use drm-core to handle event.
This is required to be able to use the nonblocking helpers.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Acked-by: Vincent Abriou <vincent.abriou@st.com>
7 years agodrm/sti: use atomic_helper for commit
Fabien DESSENNE [Thu, 12 Jan 2017 16:27:35 +0000 (17:27 +0100)]
drm/sti: use atomic_helper for commit

Since nonblocking atomic commits are now supported, the driver can
now use drm_atomic_helper_commit().

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Acked-by: Vincent Abriou <vincent.abriou@st.com>
7 years agoMerge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm...
Dave Airlie [Fri, 10 Feb 2017 00:13:30 +0000 (10:13 +1000)]
Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next

Some additional fixes for 4.11.  Delayed a bit due to Chinese New Year. Highlights:
- Powerplay fixes
- VCE and UVD powergating fixes
- Clean up amdgpu SI gfx code to match CI and VI
- Misc bug fixes

* 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (30 commits)
  drm/amdgpu: report the number of bytes moved at buffer creation
  drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
  drm/amdgpu: add support for new smc firmware on polaris
  drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
  drm/amdgpu: shut up #warning for compile testing
  drm/amdgpu/virt: fix double kfree on bo_va
  drm/radeon: remove some dead code
  drm/radeon: avoid kernel segfault in vce when gpu fails to resume
  drm/amd/powerplay: set fan speed to max in profile peak mode only.
  drm/amd/gfx6: update gb_addr_config
  drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN
  drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN
  drm/amdgpu: refine si_read_register
  drm/amdgpu/gfx6: clean up spi configuration
  drm/amdgpu/gfx6: clean up cu configuration
  drm/amdgpu/gfx6: clean up rb configuration
  drm/amdgpu: refine vce3.0 code and related powerplay pg code.
  drm/amdgpu: move subfunctions to the front of vce_v2_0.c.
  drm/amdgpu: enable vce pg feature on Kv.
  drm/amdgpu: refine code for VCE2.0 and related dpm code.
  ...

7 years agoMerge tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu into...
Dave Airlie [Fri, 10 Feb 2017 00:12:56 +0000 (10:12 +1000)]
Merge tag 'drm-fsl-dcu-for-v4.11' of git.agner.ch/git/linux-drm-fsl-dcu into drm-next

two minor fixes.

* tag 'drm-fsl-dcu-for-v4.11' of http://git.agner.ch/git/linux-drm-fsl-dcu:
  drm/fsl-dcu: check for clk_prepare_enable() error
  drm/fsl-dcu: remove unneeded 'ret' assignment

7 years agoMerge tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm...
Dave Airlie [Fri, 10 Feb 2017 00:12:00 +0000 (10:12 +1000)]
Merge tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-misc into drm-next

Just 3 bugfixes for 4.11 merge window:

- fbdev module unload oops fix from Chris
- patch from Dan that look really dangers, better safe than sorry

* tag 'drm-misc-next-fixes-2017-02-09' of git://anongit.freedesktop.org/git/drm-misc:
  drm/atomic: fix an error code in mode_fixup()
  drm: Cancel drm_fb_helper_resume_work on unload
  drm: Cancel drm_fb_helper_dirty_work on unload

7 years agodrm/amdgpu: report the number of bytes moved at buffer creation
Samuel Pitoiset [Thu, 9 Feb 2017 10:33:37 +0000 (11:33 +0100)]
drm/amdgpu: report the number of bytes moved at buffer creation

Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.

v2: fix computation

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
Samuel Pitoiset [Thu, 9 Feb 2017 10:33:36 +0000 (11:33 +0100)]
drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()

When ttm_bo_init() fails, the reservation mutex should be unlocked.

In debug build, the kernel reported "possible recursive locking
detected" in this codepath. For debugging purposes, I also added
a "WARN_ON(ww_mutex_is_locked())" when ttm_bo_init() fails and the
mutex was locked as expected.

This should fix (random) GPU hangs. The easy way to reproduce the
issue is to change the "Super Sampling" option from 1.0 to 2.0 in
Hitman. It will create a huge buffer, evict a bunch of buffers
(around ~5k) and deadlock.

This regression has been introduced pretty recently.

v2: only release the mutex if resv is NULL

Fixes: 12a852219583 ("drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add support for new smc firmware on polaris
Alex Deucher [Thu, 9 Feb 2017 03:35:51 +0000 (22:35 -0500)]
drm/amdgpu: add support for new smc firmware on polaris

Some polaris variants require new smc firmware.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.
Rex Zhu [Mon, 6 Feb 2017 04:58:57 +0000 (12:58 +0800)]
drm/amd/powerplay: refine code to avoid potential bug that the memory not cleared.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: shut up #warning for compile testing
Arnd Bergmann [Wed, 1 Feb 2017 15:59:21 +0000 (16:59 +0100)]
drm/amdgpu: shut up #warning for compile testing

My randconfig tests on linux-next showed a newly introduced warning:

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c: In function 'amdgpu_bo_create_restricted':
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c:377:2: error: #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance thanks to write-combining [-Werror=cpp]

Generally speaking, warnings about bad kernel configuration are not particularly
helpful. We could enforce the selection of X86_PAT through Kconfig, so the driver
cannot even be used unless it is enabled, or we could just rely on the runtime
warning that is also there.

In this version, I'm making the warning conditional on CONFIG_COMPILE_TEST, which
shuts it up for me, but not people that may actually want to run the kernel
as a compromize.

Fixes: a2e2f29970aa ("drm/amdgpu: Bring bo creation in line with radeon driver (v2)")
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/virt: fix double kfree on bo_va
Colin Ian King [Fri, 3 Feb 2017 20:23:42 +0000 (20:23 +0000)]
drm/amdgpu/virt: fix double kfree on bo_va

bo_va is being kfree'd twice, once in the call to amdgpu_vm_bo_rmv
and then a short while later. Fix this double free by removing
the 2nd kfree.

Detected by CoverityScan, CID#1399524 ("Double Free")

Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: remove some dead code
Dan Carpenter [Tue, 7 Feb 2017 13:16:04 +0000 (16:16 +0300)]
drm/radeon: remove some dead code

If "rdev->bios" is NULL then we don't need to free it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: avoid kernel segfault in vce when gpu fails to resume
Jérôme Glisse [Mon, 6 Feb 2017 20:13:18 +0000 (15:13 -0500)]
drm/radeon: avoid kernel segfault in vce when gpu fails to resume

When GPU fails to resume we can not trust that value we write to GPU
memory will post and we might get garbage (more like 0xffffffff on
x86) when reading them back. This trigger out of range memory access
in the kernel inside the vce resume code path.

This patch use canonical value to compute offset instead of reading
back value from GPU memory.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Jérôme Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: set fan speed to max in profile peak mode only.
Rex Zhu [Tue, 7 Feb 2017 09:34:11 +0000 (17:34 +0800)]
drm/amd/powerplay: set fan speed to max in profile peak mode only.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/gfx6: update gb_addr_config
Flora Cui [Tue, 7 Feb 2017 07:36:32 +0000 (15:36 +0800)]
drm/amd/gfx6: update gb_addr_config

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN
Flora Cui [Tue, 7 Feb 2017 07:35:09 +0000 (15:35 +0800)]
drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN
Flora Cui [Tue, 7 Feb 2017 07:32:34 +0000 (15:32 +0800)]
drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine si_read_register
Flora Cui [Tue, 7 Feb 2017 07:24:25 +0000 (15:24 +0800)]
drm/amdgpu: refine si_read_register

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx6: clean up spi configuration
Flora Cui [Tue, 7 Feb 2017 07:20:37 +0000 (15:20 +0800)]
drm/amdgpu/gfx6: clean up spi configuration

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx6: clean up cu configuration
Flora Cui [Tue, 7 Feb 2017 07:18:27 +0000 (15:18 +0800)]
drm/amdgpu/gfx6: clean up cu configuration

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx6: clean up rb configuration
Flora Cui [Tue, 7 Feb 2017 07:14:48 +0000 (15:14 +0800)]
drm/amdgpu/gfx6: clean up rb configuration

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine vce3.0 code and related powerplay pg code.
Rex Zhu [Thu, 26 Jan 2017 02:47:00 +0000 (10:47 +0800)]
drm/amdgpu: refine vce3.0 code and related powerplay pg code.

1. not start vce3.0 when hw_init
2. stop vce3.0 when vce idle.
3. pg mask used to ctrl power down/up vce.
4. change cg pg sequence in powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move subfunctions to the front of vce_v2_0.c.
Rex Zhu [Thu, 26 Jan 2017 08:46:22 +0000 (16:46 +0800)]
drm/amdgpu: move subfunctions to the front of vce_v2_0.c.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: enable vce pg feature on Kv.
Rex Zhu [Wed, 25 Jan 2017 08:50:15 +0000 (16:50 +0800)]
drm/amdgpu: enable vce pg feature on Kv.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine code for VCE2.0 and related dpm code.
Rex Zhu [Thu, 26 Jan 2017 08:25:05 +0000 (16:25 +0800)]
drm/amdgpu: refine code for VCE2.0 and related dpm code.

v2: clean up vce cg function.
    use sw cg when vce stoped.

1. implement vce_stop function.
2. not start vce when hw_init.
3. refine vce cg/pg code.
4. delete bypass mode.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: when dpm disabled, also need to stop/start vce.
Rex Zhu [Wed, 25 Jan 2017 09:35:14 +0000 (17:35 +0800)]
drm/amdgpu: when dpm disabled, also need to stop/start vce.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine uvd5.0/6.0 code.
Rex Zhu [Fri, 20 Jan 2017 09:46:34 +0000 (17:46 +0800)]
drm/amdgpu: refine uvd5.0/6.0 code.

1. delete redundant cg pg mask check.
   pg mask use to ctrl power on/down uvd.
   not start/stop uvd.
   cg mask will be check when enable mgcg.
2. no need to start uvd when initializ.
   when ring test/ib test/encode, uvd was enabled.
   when uvd idle, uvd was stopped.
3. chang cg pg sequence in powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix uvd can't initialized when dpm disabled on Ci.
Rex Zhu [Fri, 3 Feb 2017 09:33:11 +0000 (17:33 +0800)]
drm/amdgpu: fix uvd can't initialized when dpm disabled on Ci.

need to start smc when dpm disabled.
otherwise, uvd can't get response from smu.
so uvd ring test and ib test will timeout.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine uvd4.2 init/stop code.
Rex Zhu [Fri, 20 Jan 2017 07:56:45 +0000 (15:56 +0800)]
drm/amdgpu: refine uvd4.2 init/stop code.

1. set uvd_status busy before uvd_start.
2. clear uvd_status to 0 after uvd stop.
   smu firmware may check uvd_status.
3. wait uvd idle before stop uvd.
4. not start uvd when hw_init.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine uvd pg code in kv_dpm.c
Rex Zhu [Fri, 20 Jan 2017 06:34:43 +0000 (14:34 +0800)]
drm/amdgpu: refine uvd pg code in kv_dpm.c

1. no need to set cg as use hw dynamic cg.
2. when uvd idle, stop uvd. encode, start uvd.
3. if pg feature enabled, power on/down uvd by smu.
4. drm/amdgpu: dpm do not set uvd pg status.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>