Roman Lebedev [Sat, 23 Jan 2021 13:23:11 +0000 (16:23 +0300)]
[SimplifyCFG] Change 'LoopHeaders' to be ArrayRef<WeakVH>, not a naked set, thus avoiding dangling pointers
If i change it to AssertingVH instead, a number of existing tests fail,
which means we don't consistently remove from the set when deleting blocks,
which means newly-created blocks may happen to appear in that set
if they happen to occupy the same memory chunk as did some block
that was in the set originally.
There are many places where we delete blocks,
and while we could probably consistently delete from LoopHeaders
when deleting a block in transforms located in SimplifyCFG.cpp itself,
transforms located elsewhere (Local.cpp/BasicBlockUtils.cpp) also may
delete blocks, and it doesn't seem good to teach them to deal with it.
Since we at most only ever delete from LoopHeaders,
let's just delegate to WeakVH to do that automatically.
But to be honest, personally, i'm not sure that the idea
behind LoopHeaders is sound.
LLVM GN Syncbot [Sat, 23 Jan 2021 13:38:51 +0000 (13:38 +0000)]
[gn build] Port
2325157c0568
Ayke van Laethem [Sat, 23 Jan 2021 10:53:24 +0000 (11:53 +0100)]
[Clang] Move assembler into a separate file
This change adds an AssemblerInvocation class, similar to the
CompilerInvocation class. It can be used to invoke cc1as directly.
The project I'm working on wants to compile Clang and use it as a static
library. For that to work, there must be a way to invoke the assembler
programmatically, using the same arguments as you would otherwise pass
to cc1as.
Differential Revision: https://reviews.llvm.org/D63852
Nikita Popov [Sat, 23 Jan 2021 12:06:46 +0000 (13:06 +0100)]
[LSR] Add test for PR46943 (NFC)
LSR should be dropping nowrap flags when adding new postinc users.
Florian Hahn [Sat, 23 Jan 2021 12:09:29 +0000 (12:09 +0000)]
[LTO] Store target attributes as vector of strings (NFC).
The target features are obtained as a list of features/attributes.
Instead of storing them in a single string, store the vector. This
matches lto::Config's behavior and simplifies the transition to
lto::backend().
Reviewed By: tejohnson
Differential Revision: https://reviews.llvm.org/D95224
Jeroen Dobbelaere [Sat, 23 Jan 2021 11:10:57 +0000 (12:10 +0100)]
[InlineFunction] Use llvm.experimental.noalias.scope.decl for noalias arguments.
Insert a llvm.experimental.noalias.scope.decl intrinsic that identifies where a noalias argument was inlined.
This patch includes some refactorings from D90104.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D93040
Simon Pilgrim [Sat, 23 Jan 2021 11:03:43 +0000 (11:03 +0000)]
[Support] TrigramIndex::insert - pass std::String argument by const reference. NFCI.
Avoid string copies and fix clang-tidy warning.
Roger Ferrer Ibanez [Sat, 23 Jan 2021 07:30:30 +0000 (07:30 +0000)]
[RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them immediately unreachable from the stack pointer
In RISC-V there is a single addressing mode of the form imm(reg) where
imm is a signed integer of 12-bit with a range of [-2048..2047] bytes
from reg.
The test MultiSource/UnitTests/C++11/frame_layout of the LLVM test-suite
exercises several scenarios with the stack, including function calls
where the stack will need to be realigned to to a local variable having
a large alignment of 4096 bytes.
In situations of large stacks, the RISC-V backend (in
RISCVFrameLowering) reserves an extra emergency spill slot which can be
used (if no free register is found) by the register scavenger after the
frame indexes have been eliminated. PrologEpilogInserter already takes
care of keeping the emergency spill slots as close as possible to the
stack pointer or frame pointer (depending on what the function will
use). However there is a final alignment step to honour the maximum
alignment of the stack that, when using the stack pointer to access the
emergency spill slots, has the side effect of setting them farther from
the stack pointer.
In the case of the frame_layout testcase, the net result is that we do
have an emergency spill slot but it is so far from the stack pointer
(more than 2048 bytes due to the extra alignment of a variable to 4096
bytes) that it becomes unreachable via any immediate offset.
During elimination of the frame index, many (regular) offsets of the
stack may be immediately unreachable already. Their address needs to be
computed using a register. A virtual register is created and later
RegisterScavenger should be able to find an unused (physical) register.
However if no register is available, RegisterScavenger will pick a
physical register and spill it onto an emergency stack slot, while we
compute the offset (restoring the chosen register after all this). This
assumes that the emergency stack slot is easily reachable (this is,
without requiring another register!).
This is the assumption we seem to break when we perform the extra
alignment in PrologEpilogInserter.
We can "float" the emergency spill slots by increasing (in absolute
value) their offsets from the incoming stack pointer. This way the
emergency spill slots will remain close to the stack pointer (once the
function has allocated storage for the stack, including the needed
realignment). The new size computed in PrologEpilogInserter is padding
so it should be OK to move the emergency spill slots there. Also because
we're increasing the alignment, the new location should stay aligned for
the purpose of the emergency spill slots.
Note that this change also impacts other backends as shown by the tests.
Changes are minor adjustments to the emergency stack slot offset.
Differential Revision: https://reviews.llvm.org/D89239
Sergey Dmitriev [Sat, 23 Jan 2021 03:33:27 +0000 (19:33 -0800)]
[llvm-link] Fix for an assertion when linking global with appending linkage
This patch fixes llvm-link assertion when linking external variable
declaration with a definition with appending linkage.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95126
Dan Liew [Thu, 7 Jan 2021 01:41:46 +0000 (17:41 -0800)]
[ASan] Stop blocking child thread progress from parent thread in `pthread_create` interceptor.
Previously in ASan's `pthread_create` interceptor we would block in the
`pthread_create` interceptor waiting for the child thread to start.
Unfortunately this has bad performance characteristics because the OS
scheduler doesn't know the relationship between the parent and child
thread (i.e. the parent thread cannot make progress until the child
thread makes progress) and may make the wrong scheduling decision which
stalls progress.
It turns out that ASan didn't use to block in this interceptor but was
changed to do so to try to address
http://llvm.org/bugs/show_bug.cgi?id=21621/.
In that bug the problem being addressed was a LeakSanitizer false
positive. That bug concerns a heap object being passed
as `arg` to `pthread_create`. If:
* The calling thread loses a live reference to the object (e.g.
`pthread_create` finishes and the thread no longer has a live
reference to the object).
* Leak checking is triggered.
* The child thread has not yet started (once it starts it will have a
live reference).
then the heap object will incorrectly appear to be leaked.
This bug is covered by the `lsan/TestCases/leak_check_before_thread_started.cpp` test case.
In
b029c5101fb49b3577a1c322f42ef9fc616f25bf ASan was changed to block
in `pthread_create()` until the child thread starts so that `arg` is
kept alive for the purposes of leaking check.
While this change "works" its problematic due to the performance
problems it causes. The change is also completely unnecessary if leak
checking is disabled (via detect_leaks runtime option or
CAN_SANITIZE_LEAKS compile time config).
This patch does two things:
1. Takes a different approach to solving the leak false positive by
making LSan's leak checking mechanism treat the `arg` pointer of
created but not started threads as reachable. This is done by
implementing the `ForEachRegisteredThreadContextCb` callback for
ASan.
2. Removes the blocking behaviour in the ASan `pthread_create`
interceptor.
rdar://problem/
63537240
Differential Revision: https://reviews.llvm.org/D95184
Kazu Hirata [Sat, 23 Jan 2021 07:25:05 +0000 (23:25 -0800)]
[llvm] Use static_assert instead of assert (NFC)
Identified with misc-static-assert.
Kazu Hirata [Sat, 23 Jan 2021 07:25:03 +0000 (23:25 -0800)]
[llvm] Use isAlpha/isAlnum (NFC)
Kazu Hirata [Sat, 23 Jan 2021 07:25:01 +0000 (23:25 -0800)]
[Analysis] Use llvm::append_range (NFC)
George Koehler [Sat, 23 Jan 2021 05:13:36 +0000 (00:13 -0500)]
[PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets
In the PPC32 SVR4 ABI, a va_list has copies of registers from the function call.
va_arg looked in the wrong registers for (the pointer representation of) an
object in Objective-C, and for some types in C++. Fix va_arg to look in the
general-purpose registers, not the floating-point registers. Also fix va_arg
for some C++ types, like a member function pointer, that are aggregates for
the ABI.
Anthony Richardby found the problem in Objective-C. Eli Friedman suggested
part of this fix.
Fixes https://bugs.llvm.org/show_bug.cgi?id=47921
Reviewed By: efriedma, nemanjai
Differential Revision: https://reviews.llvm.org/D90329
Xun Li [Sat, 23 Jan 2021 04:23:30 +0000 (20:23 -0800)]
[Coroutine] Improve coro-elide-musttail.ll test
The test wasn't sensitive to alias analysis. As you can seen from D95117 when AA is added by default this is affected.
Updating the test so that it coveres both cases for AA analysis.
Note that this patch depends on D95117 to land first.
Differential Revision: https://reviews.llvm.org/D95247
Craig Topper [Sat, 23 Jan 2021 03:15:31 +0000 (19:15 -0800)]
[TargetLowering] Use isOneConstant to simplify some code. NFC
Dan Liew [Thu, 21 Jan 2021 23:48:41 +0000 (15:48 -0800)]
[LSan] Introduce a callback mechanism to allow adding data reachable from ThreadContexts to the frontier.
This mechanism is intended to provide a way to treat the `arg` pointer
of a created (but not yet started) thread as reachable. In future
patches this will be implemented in `GetAdditionalThreadContextPtrs`.
A separate implementation of `GetAdditionalThreadContextPtrs` exists
for ASan and LSan runtimes because they need to be implemented
differently in future patches.
rdar://problem/
63537240
Differential Revision: https://reviews.llvm.org/D95183
Fangrui Song [Sat, 23 Jan 2021 03:07:02 +0000 (19:07 -0800)]
[test] Add -mtriple
Fangrui Song [Sat, 23 Jan 2021 02:46:56 +0000 (18:46 -0800)]
[ELF][test] Add a test about --exclude-libs applying to version symbols
D94280 also fixed PR48702.
Cassie Jones [Sat, 23 Jan 2021 01:29:10 +0000 (17:29 -0800)]
Recommit "[AArch64][GlobalISel] Make G_USUBO legal and select it."
The expansion for wide subtractions includes G_USUBO.
Differential Revision: https://reviews.llvm.org/D95032
This was miscompiling on ubsan bots.
Zequan Wu [Sat, 23 Jan 2021 01:06:41 +0000 (17:06 -0800)]
[InstCombine] remove incompatible attribute when simplifying some lib calls
Like D95088, remove incompatible attribute in more lib calls.
Differential Revision: https://reviews.llvm.org/D95278
Hansang Bae [Sat, 23 Jan 2021 01:18:50 +0000 (19:18 -0600)]
[OpenMP] Remove unnecessary pointer checks in a few locations
Also, return NULL from unsuccessful OMPT function lookup.
Differential Revision: https://reviews.llvm.org/D95277
Hsiangkai Wang [Thu, 21 Jan 2021 15:40:32 +0000 (23:40 +0800)]
[RISCV] Add RV64 test cases for vsoxseg.
Differential Revision: https://reviews.llvm.org/D95195
Hsiangkai Wang [Thu, 21 Jan 2021 15:40:15 +0000 (23:40 +0800)]
[RISCV] Add RV32 test cases for vsoxseg.
Differential Revision: https://reviews.llvm.org/D95194
Hsiangkai Wang [Thu, 21 Jan 2021 15:41:12 +0000 (23:41 +0800)]
[RISCV] Add RV64 test cases for vsuxseg.
Differential Revision: https://reviews.llvm.org/D95197
Hsiangkai Wang [Thu, 21 Jan 2021 15:40:50 +0000 (23:40 +0800)]
[RISCV] Add RV32 test cases for vsuxseg.
Differential Revision: https://reviews.llvm.org/D95196
Hsiangkai Wang [Tue, 19 Jan 2021 02:47:44 +0000 (10:47 +0800)]
[RISCV] Implement vsoxseg/vsuxseg intrinsics.
Define vsoxseg/vsuxseg intrinsics and pseudo instructions.
Lower vsoxseg/vsuxseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.
Differential Revision: https://reviews.llvm.org/D94940
Hsiangkai Wang [Thu, 21 Jan 2021 15:39:37 +0000 (23:39 +0800)]
[RISCV] Add RV64 test cases for vloxseg.
Differential Revision: https://reviews.llvm.org/D95192
Hsiangkai Wang [Thu, 21 Jan 2021 15:39:13 +0000 (23:39 +0800)]
[RISCV] Add RV32 test cases for vloxseg.
Differential Revision: https://reviews.llvm.org/D95191
Hsiangkai Wang [Thu, 21 Jan 2021 15:37:05 +0000 (23:37 +0800)]
[RISCV] Add RV64 test cases for vluxseg.
Differential Revision: https://reviews.llvm.org/D95190
Hsiangkai Wang [Thu, 21 Jan 2021 15:40:00 +0000 (23:40 +0800)]
[RISCV] Add RV32 test cases for vluxseg.
Differential Revision: https://reviews.llvm.org/D95193
Hsiangkai Wang [Mon, 18 Jan 2021 02:02:40 +0000 (10:02 +0800)]
[RISCV] Implement vloxseg/vluxseg intrinsics.
Define vloxseg/vluxseg intrinsics and pseudo instructions.
Lower vloxseg/vluxseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.
Differential Revision: https://reviews.llvm.org/D94903
Philip Reames [Sat, 23 Jan 2021 00:31:29 +0000 (16:31 -0800)]
[LoopDeletion] Handle inner loops w/untaken backedges
This builds on the restricted after initial revert form of D93906, and adds back support for breaking backedges of inner loops. It turns out the original invalidation logic wasn't quite right, specifically around the handling of LCSSA.
When breaking the backedge of an inner loop, we can cause blocks which were in the outer loop only because they were also included in a sub-loop to be removed from both loops. This results in the exit block set for our original parent loop changing, and thus a need for new LCSSA phi nodes.
This case happens when the inner loop has an exit block which is also an exit block of the parent, and there's a block in the child which reaches an exit to said block without also reaching an exit to the parent loop.
(I'm describing this in terms of the immediate parent, but the problem is general for any transitive parent in the nest.)
The approach implemented here involves a potentially expensive LCSSA rebuild. Perf testing during review didn't show anything concerning, but we may end up needing to revert this if anyone encounters a practical compile time issue.
Differential Revision: https://reviews.llvm.org/D94378
Duncan P. N. Exon Smith [Fri, 22 Jan 2021 00:53:26 +0000 (16:53 -0800)]
ADT: Use 'using' to inherit assign and append in SmallString
Rather than reimplement, use a `using` declaration to bring in
`SmallVectorImpl<char>`'s assign and append implementations in
`SmallString`.
The `SmallString` versions were missing reference invalidation
assertions from `SmallVector`. This patch also fixes a bug in
`llvm::FileCollector::addFileImpl`, which was a copy/paste from
`clang::ModuleDependencyCollector::copyToRoot`, both caught by the
no-longer-skipped assertions.
As a drive-by, this also sinks the `const SmallVectorImpl&` versions of
these methods down into `SmallVectorImpl`, since I imagine they'd be
useful elsewhere.
Differential Revision: https://reviews.llvm.org/D95202
Jon Chesterfield [Sat, 23 Jan 2021 00:15:03 +0000 (00:15 +0000)]
[libomptarget] Build cuda plugin without cuda installed locally
[libomptarget] Build cuda plugin without cuda installed locally
Compiles a new file, `plugins/cuda/dynamic_cuda/cuda.cpp`, to an object file that exposes the same symbols that the plugin presently uses from libcuda. The object file contains dlopen of libcuda and cached dlsym calls. Also provides a cuda.h containing the subset that is used.
This lets the cmake file choose between the system cuda and a dlopen shim, with no changes to rtl.cpp.
The corresponding change to amdgpu is postponed until after a refactor of the plugin to reduce the size of the hsa.h stub required
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D95155
Jason Molenda [Sat, 23 Jan 2021 00:11:47 +0000 (16:11 -0800)]
Change static buffer to be BSS instead of DATA in HandlePacket_qSpeedTest
Having this 4MB buffer with a compile-time initialized string forced it
into the DATA section and it took up 4MB of space in the binary, which
accounts for like 80% of debugserver's footprint on disk. Change it to
BSS and strcpy in the initial value at runtime instead.
<rdar://problem/
73503892>
Stanislav Mekhanoshin [Fri, 22 Jan 2021 19:06:14 +0000 (11:06 -0800)]
[AMDGPU] Fix FP materialization/resolve with flat scratch
Differential Revision: https://reviews.llvm.org/D95266
Stanislav Mekhanoshin [Fri, 22 Jan 2021 23:02:36 +0000 (15:02 -0800)]
Change materializeFrameBaseRegister() to return register
The only caller of this function is in the LocalStackSlotAllocation
and it creates base register of class returned by the target's
getPointerRegClass(). AMDGPU wants to use a different reg class
here so let materializeFrameBaseRegister to just create and return
whatever it wants.
Differential Revision: https://reviews.llvm.org/D95268
Richard Smith [Fri, 22 Jan 2021 23:43:47 +0000 (15:43 -0800)]
PR47682: Merge the DeclContext of a merged FunctionDecl before we inherit
default arguments.
When a function is declared with a qualified name, its eventual semantic
DeclContext may differ from the scope specified by the qualifier if it
redeclares a function in an inline namespace. In this case, we need to
update the DeclContext to be that of the previous declaration, and we
need to do so before we decide whether to inherit default arguments from
that previous declaration, because we only inherit default arguments
from declarations in the same scope.
Nathan James [Fri, 22 Jan 2021 23:40:35 +0000 (23:40 +0000)]
[CodeComplete] Add ranged for loops code pattern.
Add code pattersn for c++ `range for` loops and objective c `for...in` loops.
Reviewed By: kadircet
Differential Revision: https://reviews.llvm.org/D95131
Paul Robinson [Fri, 15 Jan 2021 17:11:31 +0000 (09:11 -0800)]
[RGT][TextAPI] Remove a zero-trip loop and the assertions within it
Found by the Rotten Green Tests project.
Differential Revision: https://reviews.llvm.org/D95259
Paul Robinson [Fri, 15 Jan 2021 16:52:58 +0000 (08:52 -0800)]
[RGT] Don't use EXPECT* macros in a subprocess that exits by signalling
Found by the Rotten Green Tests project.
Differential Revision: https://reviews.llvm.org/D95256
Jonas Devlieghere [Fri, 22 Jan 2021 23:04:11 +0000 (15:04 -0800)]
[lldb] FixFileSystem::GetExternalPath for VFS API change
Paul Robinson [Fri, 15 Jan 2021 16:29:35 +0000 (08:29 -0800)]
[RGT][ADT] Remove test assertion that will not be executed
Found by the Rotten Green Tests project.
Differential Revision: https://reviews.llvm.org/D95255
Craig Topper [Fri, 22 Jan 2021 21:53:37 +0000 (13:53 -0800)]
[RISCV] Add more cmov isel patterns to handle seteq/ne with a small non-zero immediate.
Similar to our free standing setcc patterns, we can use ADDI to
subtract the immediate from the other operand. Then the cmov
can check if the result is zero or non-zero.
Reviewed By: mundaym
Differential Revision: https://reviews.llvm.org/D95169
MaheshRavishankar [Fri, 22 Jan 2021 22:38:47 +0000 (14:38 -0800)]
[mlir][Linalg] Make Fill operation work on tensors.
Depends on D95109
Francis Visoiu Mistrih [Fri, 22 Jan 2021 19:16:11 +0000 (11:16 -0800)]
[Matrix] Propagate shape information through fneg
Similar to binary operators like fadd/fmul/fsub, propagate shape info
through unary operators (fneg is the only one?).
Differential Revision: https://reviews.llvm.org/D95252
Mitch Phillips [Fri, 22 Jan 2021 19:50:35 +0000 (11:50 -0800)]
Revert "[AArch64][GlobalISel] Make G_USUBO legal and select it."
This reverts commit
3dedad475da45c05bc4f66cd14e9f44581edf0bc.
Broke UBSan on Android:
http://lab.llvm.org:8011/#/builders/77/builds/3082
More details at: https://reviews.llvm.org/D95032
Mitch Phillips [Fri, 22 Jan 2021 19:49:51 +0000 (11:49 -0800)]
Revert "[AArch64][GlobalISel] Implement widenScalar for signed overflow"
This reverts commit
541d98efa222b00e16c67348810898c2fa11f398.
Reason: Dependent patch
3dedad475da45c05bc4f66cd14e9f44581edf0bc broke
UBSan on Android: http://lab.llvm.org:8011/#/builders/77/builds/3082
Mitch Phillips [Fri, 22 Jan 2021 22:25:31 +0000 (14:25 -0800)]
Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method"
This reverts commit
2bb92bf451d7eb2c817f3e5403353e7c0c14d350.
Dependent patch broke UBSan on Android:
3dedad475da45c05bc4f66cd14e9f44581edf0bc
Roman Lebedev [Fri, 22 Jan 2021 19:18:34 +0000 (22:18 +0300)]
[SimplifyCFG] FoldBranchToCommonDest(): re-lift restrictions on liveout uses of bonus instructions
I have previously tried doing that in
b33fbbaa34f0fe9fb16789afc72ae424c1825b69 /
d38205144febf4dc42c9270c6aa3d978f1ef65e1,
but eventually it was pointed out that the approach taken there
was just broken wrt how the uses of bonus instructions are updated
to account for the fact that they should now use either bonus instruction
or the cloned bonus instruction. In particluar, all that manual handling
of PHI nodes in successors was just wrong.
But, the fix is actually much much simpler than my initial approach:
just tell SSAUpdate about both instances of bonus instruction,
and let it deal with all the PHI handling.
Alive2 confirms that the reproducers from the original bugs (@pr48450*)
are now handled correctly.
This effectively reverts commit
59560e85897afc50090b6c3d920bacfd28b49d06,
effectively relanding
b33fbbaa34f0fe9fb16789afc72ae424c1825b69.
Roman Lebedev [Fri, 22 Jan 2021 20:35:30 +0000 (23:35 +0300)]
[NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): move instruction cloning to after CFG update
This simplifies follow-up patch, and is NFC otherwise.
Roman Lebedev [Fri, 22 Jan 2021 19:13:56 +0000 (22:13 +0300)]
[NFC][SimplifyCFG] fold-branch-to-common-dest.ll: reduce complexity of @pr48450* test
We don't need that many iterations there,
having less iterations helps alive2 verify it.
Roman Lebedev [Fri, 22 Jan 2021 19:03:13 +0000 (22:03 +0300)]
[NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): fix instruction name preservation
NewBonusInst just took name from BonusInst, so BonusInst has no name,
so BonusInst.getName() makes no sense.
So we need to ask NewBonusInst for the name.
Jonas Devlieghere [Fri, 22 Jan 2021 21:51:59 +0000 (13:51 -0800)]
[VFS] Fix inconsistencies between relative paths and fallthrough.
This patch addresses inconsistencies in the way fallthrough is handled
in the RedirectingFileSystem. Rather than trying to change the working
directory of the external filesystem, the RedirectingFileSystem will
canonicalize every path before handing it down. This guarantees that
relative paths are resolved relative to the RedirectingFileSystem's
working directory.
This allows us to have a strictly virtual working directory, and still
fallthrough for absolute paths, but not for relative paths that would
get resolved incorrectly at the lower layer (for example, in case of the
RealFileSystem, because the strictly virtual path does not exist).
Differential revision: https://reviews.llvm.org/D95188
Cassie Jones [Fri, 22 Jan 2021 21:36:58 +0000 (13:36 -0800)]
[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method
The widenScalar implementation for signed and unsigned overflowing
operations were very similar: both are checked by truncating the result
and then re-sign/zero-extending it and checking that it matches the
computed operation.
Using a truncate + zero-extend for the unsigned case instead of manually
producing the AND instruction like before leads to an extra copy
instruction during legalization, but this should be harmless.
Differential Revision: https://reviews.llvm.org/D95035
Craig Topper [Fri, 22 Jan 2021 21:30:12 +0000 (13:30 -0800)]
[RISCV] Add B extension tests to make sure RV64 only instructions aren't accepted in RV32.
Add tests to make sure common instructions are accepted in RV64
and not just RV32.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D95150
Jez Ng [Fri, 22 Jan 2021 21:48:50 +0000 (16:48 -0500)]
[lld-macho] Ignore -lto_library
Just getting rid of some logspew as I test LLD under existing build
systems.
Reviewed By: #lld-macho, smeenai
Differential Revision: https://reviews.llvm.org/D95213
LLVM GN Syncbot [Fri, 22 Jan 2021 21:40:40 +0000 (21:40 +0000)]
[gn build] Port
622eaa4a4cea
Florian Hahn [Tue, 5 Jan 2021 18:46:17 +0000 (18:46 +0000)]
[Inline] Precommit tests for dead calls and willreturn.
precommit tests for D94106.
Craig Topper [Fri, 22 Jan 2021 20:54:02 +0000 (12:54 -0800)]
[RISCV] Add isel patterns for SH*ADD(.UW)
This adds an initial set of patterns for these instructions. Its
more complicated that I would like for the sh*add.uw instructions
because there is no guaranteed canonicalization for shl/and with
constants.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D95106
Shimin Cui [Fri, 22 Jan 2021 20:59:29 +0000 (15:59 -0500)]
[Analysis] Support AIX vec_malloc routines
This is to support the memory routines vec_malloc, vec_calloc, vec_realloc, and vec_free. These routines manage memory that is 16-byte aligned. And they are only available on AIX.
Differential Revision: https://reviews.llvm.org/D94710
Nikita Popov [Fri, 22 Jan 2021 20:55:34 +0000 (21:55 +0100)]
[InstSimplify] Add willreturn to more libcall tests (NFC)
Annotate more math libcalls with willreturn. The attribute would
have been added by the InferFuncAttrs.
MaheshRavishankar [Fri, 22 Jan 2021 20:53:27 +0000 (12:53 -0800)]
[mlir][Linalg] Disable fusion of tensor_reshape op by expansion when unit-dims are involved
Fusion of generic/indexed_generic operations with tensor_reshape by
expansion when the latter just adds/removes unit-dimensions is
disabled since it just adds unit-trip count loops.
Differential Revision: https://reviews.llvm.org/D94626
Craig Topper [Fri, 22 Jan 2021 20:24:55 +0000 (12:24 -0800)]
[RISCV] Update B extension version to 0.93.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D95002
Craig Topper [Fri, 22 Jan 2021 20:16:32 +0000 (12:16 -0800)]
[RISCV] Add xperm.* instructions to Zbp extension.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94999
Craig Topper [Fri, 22 Jan 2021 20:07:13 +0000 (12:07 -0800)]
[RISCV] Add support for rev8 and orc.b to Zbb.
These instructions use a portion of the encodings for grevi and
gorci. The full encodings are only supported with Zbp. Note,
rev8 has a different encoding between rv32 and rv64.
Zbb is closer to being finalized that Zbp which has motivated
some decisions in this patch.
I'm treating rev8 and orc.b as separate instructions when
either Zbb or Zbp is enabled. This allows us to print to suggest
that either feature needs to be enabled to support these mnemonics.
I had tried to put HasStdExtZbbAndNotZbp on the Zbb instructions,
but that caused a diagnostic that said Zbp is required if neither
feature is enabled. We should really mention Zbb since its closer
to final.
This does require extra isel patterns for the different cases so
that bswap will always print as rev8 in assembly listing since
we can't use an InstAlias.
llvm-objdump disassembling should always pick the rev8 or orc.b
instructions. llvm-mc parsing and printing text will not convert
the grevi/gorci spellings to rev8/gorc.b. We could probably fix
this with a special case in processInstruction in the assembly
parser if it its important.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94944
Craig Topper [Fri, 22 Jan 2021 19:58:03 +0000 (11:58 -0800)]
[RISCV] Add zext.h instruction to Zbb.
zext.h uses the same encoding as pack rd, rs, x0 in rv32 and
packw rd, rs, x0 in rv64. Encodings without x0 as the second source
are not valid in Zbb.
I've added two new instructions with these specific encodings with
predicates that enable them when either Zbb or Zbp is enabled.
The pack spelling will only be accepted with Zbp. The disassembler
will use the zext.h instruction when either feature is enabled.
Using the pack spelling will print as pack when llvm-mc is
emitting text. We could fix this with some custom code in
processInstruction if this is important, but I'm not sure it is.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94818
Craig Topper [Fri, 22 Jan 2021 19:47:36 +0000 (11:47 -0800)]
[RISCV] Move pack instructions to Zbp extension only.
Zext.h will need to come back to Zbb, but that only uses specific
encodings of pack.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94742
Craig Topper [Fri, 22 Jan 2021 19:42:18 +0000 (11:42 -0800)]
[RISCV] Change zext.w to be an alias of add.uw rd, rs1, x0 instead of pack.
This didn't make it into the published 0.93 spec, but it was the
intention.
But it is in the tex source as of this commit
https://github.com/riscv/riscv-bitmanip/commit/
d172f029c074d47026a0c0d0f12d8b475c86a472
This means zext.w now requires Zba. Not sure if we should still use
pack if Zbp is enabled and Zba isn't. I'll leave that for the future
when pack is closer to being final.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94736
Craig Topper [Fri, 22 Jan 2021 19:33:47 +0000 (11:33 -0800)]
[RISCV] Modify add.uw patterns to put the masked operand in rs1 to match 0.93 bitmanip spec.
The 0.93 spec has this implementation for add.uw
uint_xlen_t adduw(uint_xlen_t rs1, uint_xlen_t rs2) {
uint_xlen_t rs1u = (uint32_t)rs1;
return rs1u + rs2;
}
The 0.92 spec had the usages of rs1 and rs2 swapped.
Reviewed By: frasercrmck, asb
Differential Revision: https://reviews.llvm.org/D95090
Craig Topper [Fri, 22 Jan 2021 19:32:33 +0000 (11:32 -0800)]
[RISCV] Rename Zbs instructions to start with just 'b' instead of 'sb' to match 0.93 bitmanip spec.
Also renamed Zbe instructions to resolve name conflict even though
that change is in the 0.94 draft.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94653
Craig Topper [Fri, 22 Jan 2021 19:24:07 +0000 (11:24 -0800)]
[RISCV] Move Shift Ones instructions from Zbb to Zbp to match 0.93 bitmanip spec.
It's not really clear in the spec that these are in Zbp now, but
that's what I've gather from previous commits to the spec. I've
file an issue to get it documented properly.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94652
Craig Topper [Fri, 22 Jan 2021 19:22:49 +0000 (11:22 -0800)]
[RISCV] Add SH*ADD(.UW) instructions to Zba extension based on 0.93 bitmanip spec.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94637
Craig Topper [Fri, 22 Jan 2021 18:58:06 +0000 (10:58 -0800)]
[RISCV] Add Zba feature and move add.uw and slli.uw to it.
Still need to add SH*ADD instructions.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94617
Craig Topper [Fri, 22 Jan 2021 18:57:00 +0000 (10:57 -0800)]
[RISCV] Rename mnemonics slliu.w->slli.uw and addu.w->add.uw to match 0.93 bitmanip spec.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94582
Craig Topper [Fri, 22 Jan 2021 18:47:12 +0000 (10:47 -0800)]
[RISCV] Swap encodings of max and minu to match 0.93 bitmanip spec.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94580
Craig Topper [Fri, 22 Jan 2021 18:37:11 +0000 (10:37 -0800)]
[RISCV] Remove addiwu, addwu, subwu, subuw, clmulw, clmulrw, clmulhw to match 0.93 bitmanip spec.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94577
Craig Topper [Fri, 22 Jan 2021 18:23:46 +0000 (10:23 -0800)]
[RISCV] Rename pcnt->cpop to match 0.93 bitmanip spec.
This is the first of multiple patches to bring our 0.92
implementation up to 0.93.
Reviewed By: asb, frasercrmck
Differential Revision: https://reviews.llvm.org/D94568
Nikita Popov [Fri, 22 Jan 2021 20:06:06 +0000 (21:06 +0100)]
[Tests] Add willreturn to libcalls in some tests
Willreturn would be inferred by FuncAttrs for these. Annotate them
to preserve test behavior in the future.
Arthur Eubanks [Fri, 22 Jan 2021 18:47:10 +0000 (10:47 -0800)]
[NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0
The legacy PM's EP_CGSCCOptimizerLate was only used under not-O0.
Fixes clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp under the new PM.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D95250
Thorsten Schütt [Mon, 18 Jan 2021 12:21:00 +0000 (13:21 +0100)]
[libc++] Introduce __bits
It has the low-level bit fiddling operations from bit. It eliminates a cyclic dependency between __bit_reference, bits, and vector. I want to exploit this in later patches.
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D94908
Bjorn Pettersson [Tue, 19 Jan 2021 14:24:20 +0000 (15:24 +0100)]
[CGExpr] Use getCharWidth() more consistently in CCGExprConstant. NFC
Most of CGExprConstant.cpp is using the CharUnits abstraction
and is using getCharWidth() (directly of indirectly) when converting
between size of a char and size in bits. This patch is making that
abstraction more consistent by adding CharTy to the CodeGenTypeCache
(honoring getCharWidth() when mapping from char to LLVM IR types,
instead of using Int8Ty directly).
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D94979
Bjorn Pettersson [Tue, 19 Jan 2021 14:32:35 +0000 (15:32 +0100)]
[CodeGen] Use getCharWidth() more consistently in CGRecordLowering. NFC
When using getByteArrayType the requested size is calculated in
char units, but the type used for the array was hardcoded to the
Int8Ty. This patch is using getCharWIdth a bit more consistently
by using getIntNTy in combination with getCharWidth, instead
of explictly using getInt8Ty.
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D94977
River Riddle [Fri, 22 Jan 2021 20:07:07 +0000 (12:07 -0800)]
[mlir][OpFormatGen] Add support for anchoring optional groups with types
This revision adds support for using either operand or result types to anchor an optional group. It also removes the arbitrary restriction that type directives must refer to variables in the same group, which is overly limiting for a declarative format syntax.
Fixes PR#48784
Differential Revision: https://reviews.llvm.org/D95109
Julian Lettner [Fri, 22 Jan 2021 20:01:54 +0000 (12:01 -0800)]
Remove obsolete TODOs
Remove a few of my own TODOs that I will not have time to fix from lit
code.
Nikita Popov [Fri, 22 Jan 2021 19:44:44 +0000 (20:44 +0100)]
[SimplifyLibCalls] Skip unused calls in sincos transform
If the call result is unused, we should let it get DCEd rather
than replacing it. Also, don't try to replace an existing sincos
with another one (unless it's as part of combining sin and cos).
This avoids an infinite combine loop if the calls are not DCEd
as expected, which can happen with D94106 and lack of willreturn
annotation in hand-crafted IR.
Louis Dionne [Thu, 21 Jan 2021 22:53:29 +0000 (17:53 -0500)]
[libc++] Bring back mach_absolute_time implementation of steady_clock
This is meant to unblock Chrome, as discussed in https://llvm.org/D74489.
Differential Revision: https://reviews.llvm.org/D95177
Jacques Pienaar [Fri, 22 Jan 2021 19:45:25 +0000 (11:45 -0800)]
Add more explicit assert for failures
Differential Revision: https://reviews.llvm.org/D95201
MaheshRavishankar [Fri, 22 Jan 2021 19:32:50 +0000 (11:32 -0800)]
[mlir][Linalg] Extend tile+fuse to work on Linalg operation on tensors.
Differential Revision: https://reviews.llvm.org/D93086
Mark de Wever [Fri, 22 Jan 2021 19:24:33 +0000 (20:24 +0100)]
[NFC][libc++] Update the implementation status.
During the review of https://reviews.llvm.org/D93912 we failed to notice
the implementation status wasn't updated. This rectifies the issue.
MaheshRavishankar [Fri, 22 Jan 2021 19:19:03 +0000 (11:19 -0800)]
[mlir][Linalg] NFC: Refactor LinalgDependenceGraphElem to allow
representing dependence from producer result to consumer.
With Linalg on tensors the dependence between operations can be from
the result of the producer to the consumer. This change just does a
NFC refactoring of the LinalgDependenceGraphElem to allow representing
both OpResult and OpOperand*.
Differential Revision: https://reviews.llvm.org/D95208
Hongtao Yu [Wed, 20 Jan 2021 17:24:43 +0000 (09:24 -0800)]
[CSSPGO] LTO option for pseudo probe
Adding a lld option to support emitting pseudo probe metadata in LTO mode.
Reviewed By: MaskRay, wmi, wenlei
Differential Revision: https://reviews.llvm.org/D95056
peter klausler [Thu, 21 Jan 2021 22:59:43 +0000 (14:59 -0800)]
[flang][nfc] Fix comments, remove needless API, tweak script
* Remove an unimplemented and unused member function declaration
* Remove a misleading comment about an unrelated constraint number
* Fix a comment
* Add f18 crash message to "flang" driver script
Differential Revision: https://reviews.llvm.org/D95180
Abhina Sreeskantharajan [Fri, 22 Jan 2021 18:54:01 +0000 (13:54 -0500)]
[SystemZ][z/OS] Fix No such file or directory expression error matching in lit tests - continued
This is a continuation of https://reviews.llvm.org/D94239. I missed some other spellings of the same error.
Reviewed By: muiez
Differential Revision: https://reviews.llvm.org/D95246
peter klausler [Thu, 14 Jan 2021 20:54:31 +0000 (12:54 -0800)]
[flang] Correct shape analysis for transformational intrinsic functions
Correct the analysis of references to transformational intrinsic
functions that have different semantics based on the presence or
absence of a DIM= argument; add shape analysis for UNPACK().
Differential Revision: https://reviews.llvm.org/D94716
Sanjay Patel [Fri, 22 Jan 2021 18:33:21 +0000 (13:33 -0500)]
[InstCombine] narrow abs with sign-extended input
In the motivating cases from https://llvm.org/PR48816 ,
we have a trailing trunc. But that is not required to
reduce the abs width:
https://alive2.llvm.org/ce/z/ECaz-p
...as long as we clear the int-min-is-poison bit (nsw).
We have some existing tests that are affected, and I'm
not sure what the overall implications are, but in general
we favor narrowing operations over preserving nsw/nuw.
If that causes problems, we could restrict this transform
based on type (shouldChangeType() and/or vector vs. scalar).
Differential Revision: https://reviews.llvm.org/D95235
Sanjay Patel [Fri, 22 Jan 2021 15:02:51 +0000 (10:02 -0500)]
[InstCombine] add tests for abs(sext X); NFC
https://llvm.org/PR48816
Lei Zhang [Fri, 22 Jan 2021 18:08:00 +0000 (13:08 -0500)]
[mlir][spirv] Define spv.IsNan/spv.IsInf and add lowerings
spv.Ordered/spv.Unordered are meant for OpenCL Kernel capability.
For Vulkan Shader capability, we should use spv.IsNan to check
whether a number is NaN.
Add a new pattern for converting `std.cmpf ord|uno` to spv.IsNan
and bumped the pattern converting to spv.Ordered/spv.Unordered
to a higher benefit. The SPIR-V target environment will properly
select between these two patterns.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D95237
peter klausler [Thu, 21 Jan 2021 22:38:42 +0000 (14:38 -0800)]
[flang] Remove some needless operations in expr rewriting
Expressions emitted to module files and error messages
sometimes contain conversions of integer results of inquiry
intrinsics; these are usually not needed, and can conflict
with "int" in the user's namespace. Improve folding so that
these conversions don't appear, and do some other clean-up
in adjacent code.
Differential Revision: https://reviews.llvm.org/D95172